1 /* Target-dependent code for the IA-64 for GDB, the GNU debugger.
3 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
4 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street, Fifth Floor,
21 Boston, MA 02110-1301, USA. */
26 #include "arch-utils.h"
27 #include "floatformat.h"
29 #include "reggroups.h"
31 #include "frame-base.h"
32 #include "frame-unwind.h"
35 #include "gdb_assert.h"
37 #include "elf/common.h" /* for DT_PLTGOT value */
42 #include "ia64-tdep.h"
45 #ifdef HAVE_LIBUNWIND_IA64_H
46 #include "elf/ia64.h" /* for PT_IA_64_UNWIND value */
47 #include "libunwind-frame.h"
48 #include "libunwind-ia64.h"
50 /* Note: KERNEL_START is supposed to be an address which is not going
51 to ever contain any valid unwind info. For ia64 linux, the choice
52 of 0xc000000000000000 is fairly safe since that's uncached space.
54 We use KERNEL_START as follows: after obtaining the kernel's
55 unwind table via getunwind(), we project its unwind data into
56 address-range KERNEL_START-(KERNEL_START+ktab_size) and then
57 when ia64_access_mem() sees a memory access to this
58 address-range, we redirect it to ktab instead.
60 None of this hackery is needed with a modern kernel/libcs
61 which uses the kernel virtual DSO to provide access to the
62 kernel's unwind info. In that case, ktab_size remains 0 and
63 hence the value of KERNEL_START doesn't matter. */
65 #define KERNEL_START 0xc000000000000000ULL
67 static size_t ktab_size
= 0;
68 struct ia64_table_entry
70 uint64_t start_offset
;
75 static struct ia64_table_entry
*ktab
= NULL
;
79 /* An enumeration of the different IA-64 instruction types. */
81 typedef enum instruction_type
83 A
, /* Integer ALU ; I-unit or M-unit */
84 I
, /* Non-ALU integer; I-unit */
85 M
, /* Memory ; M-unit */
86 F
, /* Floating-point ; F-unit */
87 B
, /* Branch ; B-unit */
88 L
, /* Extended (L+X) ; I-unit */
89 X
, /* Extended (L+X) ; I-unit */
90 undefined
/* undefined or reserved */
93 /* We represent IA-64 PC addresses as the value of the instruction
94 pointer or'd with some bit combination in the low nibble which
95 represents the slot number in the bundle addressed by the
96 instruction pointer. The problem is that the Linux kernel
97 multiplies its slot numbers (for exceptions) by one while the
98 disassembler multiplies its slot numbers by 6. In addition, I've
99 heard it said that the simulator uses 1 as the multiplier.
101 I've fixed the disassembler so that the bytes_per_line field will
102 be the slot multiplier. If bytes_per_line comes in as zero, it
103 is set to six (which is how it was set up initially). -- objdump
104 displays pretty disassembly dumps with this value. For our purposes,
105 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
106 never want to also display the raw bytes the way objdump does. */
108 #define SLOT_MULTIPLIER 1
110 /* Length in bytes of an instruction bundle */
112 #define BUNDLE_LEN 16
114 static gdbarch_init_ftype ia64_gdbarch_init
;
116 static gdbarch_register_name_ftype ia64_register_name
;
117 static gdbarch_register_type_ftype ia64_register_type
;
118 static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc
;
119 static gdbarch_skip_prologue_ftype ia64_skip_prologue
;
120 static struct type
*is_float_or_hfa_type (struct type
*t
);
121 static CORE_ADDR
ia64_find_global_pointer (CORE_ADDR faddr
);
123 static struct type
*builtin_type_ia64_ext
;
125 #define NUM_IA64_RAW_REGS 462
127 static int sp_regnum
= IA64_GR12_REGNUM
;
128 static int fp_regnum
= IA64_VFP_REGNUM
;
129 static int lr_regnum
= IA64_VRAP_REGNUM
;
131 /* NOTE: we treat the register stack registers r32-r127 as pseudo-registers because
132 they may not be accessible via the ptrace register get/set interfaces. */
133 enum pseudo_regs
{ FIRST_PSEUDO_REGNUM
= NUM_IA64_RAW_REGS
, VBOF_REGNUM
= IA64_NAT127_REGNUM
+ 1, V32_REGNUM
,
134 V127_REGNUM
= V32_REGNUM
+ 95,
135 VP0_REGNUM
, VP16_REGNUM
= VP0_REGNUM
+ 16, VP63_REGNUM
= VP0_REGNUM
+ 63, LAST_PSEUDO_REGNUM
};
137 /* Array of register names; There should be ia64_num_regs strings in
140 static char *ia64_register_names
[] =
141 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
142 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
143 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
144 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
145 "", "", "", "", "", "", "", "",
146 "", "", "", "", "", "", "", "",
147 "", "", "", "", "", "", "", "",
148 "", "", "", "", "", "", "", "",
149 "", "", "", "", "", "", "", "",
150 "", "", "", "", "", "", "", "",
151 "", "", "", "", "", "", "", "",
152 "", "", "", "", "", "", "", "",
153 "", "", "", "", "", "", "", "",
154 "", "", "", "", "", "", "", "",
155 "", "", "", "", "", "", "", "",
156 "", "", "", "", "", "", "", "",
158 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
159 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
160 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
161 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
162 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
163 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
164 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
165 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
166 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
167 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
168 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
169 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
170 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
171 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
172 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
173 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
175 "", "", "", "", "", "", "", "",
176 "", "", "", "", "", "", "", "",
177 "", "", "", "", "", "", "", "",
178 "", "", "", "", "", "", "", "",
179 "", "", "", "", "", "", "", "",
180 "", "", "", "", "", "", "", "",
181 "", "", "", "", "", "", "", "",
182 "", "", "", "", "", "", "", "",
184 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
188 "pr", "ip", "psr", "cfm",
190 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
191 "", "", "", "", "", "", "", "",
192 "rsc", "bsp", "bspstore", "rnat",
194 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
195 "ccv", "", "", "", "unat", "", "", "",
196 "fpsr", "", "", "", "itc",
197 "", "", "", "", "", "", "", "", "", "",
198 "", "", "", "", "", "", "", "", "",
200 "", "", "", "", "", "", "", "", "", "",
201 "", "", "", "", "", "", "", "", "", "",
202 "", "", "", "", "", "", "", "", "", "",
203 "", "", "", "", "", "", "", "", "", "",
204 "", "", "", "", "", "", "", "", "", "",
205 "", "", "", "", "", "", "", "", "", "",
207 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
208 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
209 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
210 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
211 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
212 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
213 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
214 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
215 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
216 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
217 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
218 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
219 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
220 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
221 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
222 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
226 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
227 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
228 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
229 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
230 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
231 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
232 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
233 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
234 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
235 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
236 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
237 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
239 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
240 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
241 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
242 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
243 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
244 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
245 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
246 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
249 struct ia64_frame_cache
251 CORE_ADDR base
; /* frame pointer base for frame */
252 CORE_ADDR pc
; /* function start pc for frame */
253 CORE_ADDR saved_sp
; /* stack pointer for frame */
254 CORE_ADDR bsp
; /* points at r32 for the current frame */
255 CORE_ADDR cfm
; /* cfm value for current frame */
256 CORE_ADDR prev_cfm
; /* cfm value for previous frame */
258 int sof
; /* Size of frame (decoded from cfm value) */
259 int sol
; /* Size of locals (decoded from cfm value) */
260 int sor
; /* Number of rotating registers. (decoded from cfm value) */
261 CORE_ADDR after_prologue
;
262 /* Address of first instruction after the last
263 prologue instruction; Note that there may
264 be instructions from the function's body
265 intermingled with the prologue. */
266 int mem_stack_frame_size
;
267 /* Size of the memory stack frame (may be zero),
268 or -1 if it has not been determined yet. */
269 int fp_reg
; /* Register number (if any) used a frame pointer
270 for this frame. 0 if no register is being used
271 as the frame pointer. */
273 /* Saved registers. */
274 CORE_ADDR saved_regs
[NUM_IA64_RAW_REGS
];
278 #define SIGCONTEXT_REGISTER_ADDRESS \
279 (gdbarch_tdep (current_gdbarch)->sigcontext_register_address)
282 ia64_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
283 struct reggroup
*group
)
288 if (group
== all_reggroup
)
290 vector_p
= TYPE_VECTOR (register_type (gdbarch
, regnum
));
291 float_p
= TYPE_CODE (register_type (gdbarch
, regnum
)) == TYPE_CODE_FLT
;
292 raw_p
= regnum
< NUM_IA64_RAW_REGS
;
293 if (group
== float_reggroup
)
295 if (group
== vector_reggroup
)
297 if (group
== general_reggroup
)
298 return (!vector_p
&& !float_p
);
299 if (group
== save_reggroup
|| group
== restore_reggroup
)
305 ia64_register_name (int reg
)
307 return ia64_register_names
[reg
];
311 ia64_register_type (struct gdbarch
*arch
, int reg
)
313 if (reg
>= IA64_FR0_REGNUM
&& reg
<= IA64_FR127_REGNUM
)
314 return builtin_type_ia64_ext
;
316 return builtin_type_long
;
320 ia64_dwarf_reg_to_regnum (int reg
)
322 if (reg
>= IA64_GR32_REGNUM
&& reg
<= IA64_GR127_REGNUM
)
323 return V32_REGNUM
+ (reg
- IA64_GR32_REGNUM
);
328 floatformat_valid (const struct floatformat
*fmt
, const void *from
)
333 const struct floatformat floatformat_ia64_ext
=
335 floatformat_little
, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
336 floatformat_intbit_yes
, "floatformat_ia64_ext", floatformat_valid
339 const struct floatformat
*floatformats_ia64_ext
[2] =
341 &floatformat_ia64_ext
,
342 &floatformat_ia64_ext
346 /* Extract ``len'' bits from an instruction bundle starting at
350 extract_bit_field (char *bundle
, int from
, int len
)
352 long long result
= 0LL;
354 int from_byte
= from
/ 8;
355 int to_byte
= to
/ 8;
356 unsigned char *b
= (unsigned char *) bundle
;
362 if (from_byte
== to_byte
)
363 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
364 result
= c
>> (from
% 8);
365 lshift
= 8 - (from
% 8);
367 for (i
= from_byte
+1; i
< to_byte
; i
++)
369 result
|= ((long long) b
[i
]) << lshift
;
373 if (from_byte
< to_byte
&& (to
% 8 != 0))
376 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
377 result
|= ((long long) c
) << lshift
;
383 /* Replace the specified bits in an instruction bundle */
386 replace_bit_field (char *bundle
, long long val
, int from
, int len
)
389 int from_byte
= from
/ 8;
390 int to_byte
= to
/ 8;
391 unsigned char *b
= (unsigned char *) bundle
;
394 if (from_byte
== to_byte
)
396 unsigned char left
, right
;
398 left
= (c
>> (to
% 8)) << (to
% 8);
399 right
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
400 c
= (unsigned char) (val
& 0xff);
401 c
= (unsigned char) (c
<< (from
% 8 + 8 - to
% 8)) >> (8 - to
% 8);
409 c
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
410 c
= c
| (val
<< (from
% 8));
412 val
>>= 8 - from
% 8;
414 for (i
= from_byte
+1; i
< to_byte
; i
++)
423 unsigned char cv
= (unsigned char) val
;
425 c
= c
>> (to
% 8) << (to
% 8);
426 c
|= ((unsigned char) (cv
<< (8 - to
% 8))) >> (8 - to
% 8);
432 /* Return the contents of slot N (for N = 0, 1, or 2) in
433 and instruction bundle */
436 slotN_contents (char *bundle
, int slotnum
)
438 return extract_bit_field (bundle
, 5+41*slotnum
, 41);
441 /* Store an instruction in an instruction bundle */
444 replace_slotN_contents (char *bundle
, long long instr
, int slotnum
)
446 replace_bit_field (bundle
, instr
, 5+41*slotnum
, 41);
449 static enum instruction_type template_encoding_table
[32][3] =
451 { M
, I
, I
}, /* 00 */
452 { M
, I
, I
}, /* 01 */
453 { M
, I
, I
}, /* 02 */
454 { M
, I
, I
}, /* 03 */
455 { M
, L
, X
}, /* 04 */
456 { M
, L
, X
}, /* 05 */
457 { undefined
, undefined
, undefined
}, /* 06 */
458 { undefined
, undefined
, undefined
}, /* 07 */
459 { M
, M
, I
}, /* 08 */
460 { M
, M
, I
}, /* 09 */
461 { M
, M
, I
}, /* 0A */
462 { M
, M
, I
}, /* 0B */
463 { M
, F
, I
}, /* 0C */
464 { M
, F
, I
}, /* 0D */
465 { M
, M
, F
}, /* 0E */
466 { M
, M
, F
}, /* 0F */
467 { M
, I
, B
}, /* 10 */
468 { M
, I
, B
}, /* 11 */
469 { M
, B
, B
}, /* 12 */
470 { M
, B
, B
}, /* 13 */
471 { undefined
, undefined
, undefined
}, /* 14 */
472 { undefined
, undefined
, undefined
}, /* 15 */
473 { B
, B
, B
}, /* 16 */
474 { B
, B
, B
}, /* 17 */
475 { M
, M
, B
}, /* 18 */
476 { M
, M
, B
}, /* 19 */
477 { undefined
, undefined
, undefined
}, /* 1A */
478 { undefined
, undefined
, undefined
}, /* 1B */
479 { M
, F
, B
}, /* 1C */
480 { M
, F
, B
}, /* 1D */
481 { undefined
, undefined
, undefined
}, /* 1E */
482 { undefined
, undefined
, undefined
}, /* 1F */
485 /* Fetch and (partially) decode an instruction at ADDR and return the
486 address of the next instruction to fetch. */
489 fetch_instruction (CORE_ADDR addr
, instruction_type
*it
, long long *instr
)
491 char bundle
[BUNDLE_LEN
];
492 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
;
496 /* Warn about slot numbers greater than 2. We used to generate
497 an error here on the assumption that the user entered an invalid
498 address. But, sometimes GDB itself requests an invalid address.
499 This can (easily) happen when execution stops in a function for
500 which there are no symbols. The prologue scanner will attempt to
501 find the beginning of the function - if the nearest symbol
502 happens to not be aligned on a bundle boundary (16 bytes), the
503 resulting starting address will cause GDB to think that the slot
506 So we warn about it and set the slot number to zero. It is
507 not necessarily a fatal condition, particularly if debugging
508 at the assembly language level. */
511 warning (_("Can't fetch instructions for slot numbers greater than 2.\n"
512 "Using slot 0 instead"));
518 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
523 *instr
= slotN_contents (bundle
, slotnum
);
524 template = extract_bit_field (bundle
, 0, 5);
525 *it
= template_encoding_table
[(int)template][slotnum
];
527 if (slotnum
== 2 || (slotnum
== 1 && *it
== L
))
530 addr
+= (slotnum
+ 1) * SLOT_MULTIPLIER
;
535 /* There are 5 different break instructions (break.i, break.b,
536 break.m, break.f, and break.x), but they all have the same
537 encoding. (The five bit template in the low five bits of the
538 instruction bundle distinguishes one from another.)
540 The runtime architecture manual specifies that break instructions
541 used for debugging purposes must have the upper two bits of the 21
542 bit immediate set to a 0 and a 1 respectively. A breakpoint
543 instruction encodes the most significant bit of its 21 bit
544 immediate at bit 36 of the 41 bit instruction. The penultimate msb
545 is at bit 25 which leads to the pattern below.
547 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
548 it turns out that 0x80000 was used as the syscall break in the early
549 simulators. So I changed the pattern slightly to do "break.i 0x080001"
550 instead. But that didn't work either (I later found out that this
551 pattern was used by the simulator that I was using.) So I ended up
552 using the pattern seen below. */
555 #define IA64_BREAKPOINT 0x00002000040LL
557 #define IA64_BREAKPOINT 0x00003333300LL
560 ia64_memory_insert_breakpoint (struct bp_target_info
*bp_tgt
)
562 CORE_ADDR addr
= bp_tgt
->placed_address
;
563 char bundle
[BUNDLE_LEN
];
564 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
;
570 error (_("Can't insert breakpoint for slot numbers greater than 2."));
574 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
576 /* Check for L type instruction in 2nd slot, if present then
577 bump up the slot number to the 3rd slot */
578 template = extract_bit_field (bundle
, 0, 5);
579 if (slotnum
== 1 && template_encoding_table
[template][1] == L
)
584 instr
= slotN_contents (bundle
, slotnum
);
585 memcpy (bp_tgt
->shadow_contents
, &instr
, sizeof (instr
));
586 bp_tgt
->placed_size
= bp_tgt
->shadow_len
= sizeof (instr
);
587 replace_slotN_contents (bundle
, IA64_BREAKPOINT
, slotnum
);
589 target_write_memory (addr
, bundle
, BUNDLE_LEN
);
595 ia64_memory_remove_breakpoint (struct bp_target_info
*bp_tgt
)
597 CORE_ADDR addr
= bp_tgt
->placed_address
;
598 char bundle
[BUNDLE_LEN
];
599 int slotnum
= (addr
& 0x0f) / SLOT_MULTIPLIER
;
606 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
608 /* Check for L type instruction in 2nd slot, if present then
609 bump up the slot number to the 3rd slot */
610 template = extract_bit_field (bundle
, 0, 5);
611 if (slotnum
== 1 && template_encoding_table
[template][1] == L
)
616 memcpy (&instr
, bp_tgt
->shadow_contents
, sizeof instr
);
617 replace_slotN_contents (bundle
, instr
, slotnum
);
619 target_write_memory (addr
, bundle
, BUNDLE_LEN
);
624 /* We don't really want to use this, but remote.c needs to call it in order
625 to figure out if Z-packets are supported or not. Oh, well. */
626 const unsigned char *
627 ia64_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
629 static unsigned char breakpoint
[] =
630 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
631 *lenptr
= sizeof (breakpoint
);
639 ia64_read_pc (ptid_t ptid
)
641 CORE_ADDR psr_value
= read_register_pid (IA64_PSR_REGNUM
, ptid
);
642 CORE_ADDR pc_value
= read_register_pid (IA64_IP_REGNUM
, ptid
);
643 int slot_num
= (psr_value
>> 41) & 3;
645 return pc_value
| (slot_num
* SLOT_MULTIPLIER
);
649 ia64_write_pc (CORE_ADDR new_pc
, ptid_t ptid
)
651 int slot_num
= (int) (new_pc
& 0xf) / SLOT_MULTIPLIER
;
652 CORE_ADDR psr_value
= read_register_pid (IA64_PSR_REGNUM
, ptid
);
653 psr_value
&= ~(3LL << 41);
654 psr_value
|= (CORE_ADDR
)(slot_num
& 0x3) << 41;
658 write_register_pid (IA64_PSR_REGNUM
, psr_value
, ptid
);
659 write_register_pid (IA64_IP_REGNUM
, new_pc
, ptid
);
662 #define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
664 /* Returns the address of the slot that's NSLOTS slots away from
665 the address ADDR. NSLOTS may be positive or negative. */
667 rse_address_add(CORE_ADDR addr
, int nslots
)
670 int mandatory_nat_slots
= nslots
/ 63;
671 int direction
= nslots
< 0 ? -1 : 1;
673 new_addr
= addr
+ 8 * (nslots
+ mandatory_nat_slots
);
675 if ((new_addr
>> 9) != ((addr
+ 8 * 64 * mandatory_nat_slots
) >> 9))
676 new_addr
+= 8 * direction
;
678 if (IS_NaT_COLLECTION_ADDR(new_addr
))
679 new_addr
+= 8 * direction
;
685 ia64_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
686 int regnum
, gdb_byte
*buf
)
688 if (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
)
690 #ifdef HAVE_LIBUNWIND_IA64_H
691 /* First try and use the libunwind special reg accessor, otherwise fallback to
693 if (!libunwind_is_initialized ()
694 || libunwind_get_reg_special (gdbarch
, regnum
, buf
) != 0)
697 /* The fallback position is to assume that r32-r127 are found sequentially
698 in memory starting at $bof. This isn't always true, but without libunwind,
699 this is the best we can do. */
703 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
704 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
706 /* The bsp points at the end of the register frame so we
707 subtract the size of frame from it to get start of register frame. */
708 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
710 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
712 ULONGEST reg_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
713 reg
= read_memory_integer ((CORE_ADDR
)reg_addr
, 8);
714 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), reg
);
717 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), 0);
720 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
724 regcache_cooked_read_unsigned (regcache
, IA64_UNAT_REGNUM
, &unat
);
725 unatN_val
= (unat
& (1LL << (regnum
- IA64_NAT0_REGNUM
))) != 0;
726 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), unatN_val
);
728 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
730 ULONGEST natN_val
= 0;
733 CORE_ADDR gr_addr
= 0;
734 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
735 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
737 /* The bsp points at the end of the register frame so we
738 subtract the size of frame from it to get start of register frame. */
739 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
741 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
742 gr_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
746 /* Compute address of nat collection bits. */
747 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
748 CORE_ADDR nat_collection
;
750 /* If our nat collection address is bigger than bsp, we have to get
751 the nat collection from rnat. Otherwise, we fetch the nat
752 collection from the computed address. */
754 regcache_cooked_read_unsigned (regcache
, IA64_RNAT_REGNUM
, &nat_collection
);
756 nat_collection
= read_memory_integer (nat_addr
, 8);
757 nat_bit
= (gr_addr
>> 3) & 0x3f;
758 natN_val
= (nat_collection
>> nat_bit
) & 1;
761 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), natN_val
);
763 else if (regnum
== VBOF_REGNUM
)
765 /* A virtual register frame start is provided for user convenience.
766 It can be calculated as the bsp - sof (sizeof frame). */
770 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
771 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
773 /* The bsp points at the end of the register frame so we
774 subtract the size of frame from it to get beginning of frame. */
775 vbsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
776 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), vbsp
);
778 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
784 regcache_cooked_read_unsigned (regcache
, IA64_PR_REGNUM
, &pr
);
785 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
787 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
789 /* Fetch predicate register rename base from current frame
790 marker for this frame. */
791 int rrb_pr
= (cfm
>> 32) & 0x3f;
793 /* Adjust the register number to account for register rotation. */
795 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
797 prN_val
= (pr
& (1LL << (regnum
- VP0_REGNUM
))) != 0;
798 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), prN_val
);
801 memset (buf
, 0, register_size (current_gdbarch
, regnum
));
805 ia64_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
806 int regnum
, const gdb_byte
*buf
)
808 if (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
)
813 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
814 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
816 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
818 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
820 ULONGEST reg_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
821 write_memory (reg_addr
, (void *)buf
, 8);
824 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
826 ULONGEST unatN_val
, unat
, unatN_mask
;
827 regcache_cooked_read_unsigned (regcache
, IA64_UNAT_REGNUM
, &unat
);
828 unatN_val
= extract_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
));
829 unatN_mask
= (1LL << (regnum
- IA64_NAT0_REGNUM
));
832 else if (unatN_val
== 1)
834 regcache_cooked_write_unsigned (regcache
, IA64_UNAT_REGNUM
, unat
);
836 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
841 CORE_ADDR gr_addr
= 0;
842 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
843 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
845 /* The bsp points at the end of the register frame so we
846 subtract the size of frame from it to get start of register frame. */
847 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
849 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
850 gr_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
852 natN_val
= extract_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
));
854 if (gr_addr
!= 0 && (natN_val
== 0 || natN_val
== 1))
856 /* Compute address of nat collection bits. */
857 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
858 CORE_ADDR nat_collection
;
859 int natN_bit
= (gr_addr
>> 3) & 0x3f;
860 ULONGEST natN_mask
= (1LL << natN_bit
);
861 /* If our nat collection address is bigger than bsp, we have to get
862 the nat collection from rnat. Otherwise, we fetch the nat
863 collection from the computed address. */
866 regcache_cooked_read_unsigned (regcache
, IA64_RNAT_REGNUM
, &nat_collection
);
868 nat_collection
|= natN_mask
;
870 nat_collection
&= ~natN_mask
;
871 regcache_cooked_write_unsigned (regcache
, IA64_RNAT_REGNUM
, nat_collection
);
876 nat_collection
= read_memory_integer (nat_addr
, 8);
878 nat_collection
|= natN_mask
;
880 nat_collection
&= ~natN_mask
;
881 store_unsigned_integer (nat_buf
, register_size (current_gdbarch
, regnum
), nat_collection
);
882 write_memory (nat_addr
, nat_buf
, 8);
886 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
893 regcache_cooked_read_unsigned (regcache
, IA64_PR_REGNUM
, &pr
);
894 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
896 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
898 /* Fetch predicate register rename base from current frame
899 marker for this frame. */
900 int rrb_pr
= (cfm
>> 32) & 0x3f;
902 /* Adjust the register number to account for register rotation. */
904 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
906 prN_val
= extract_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
));
907 prN_mask
= (1LL << (regnum
- VP0_REGNUM
));
910 else if (prN_val
== 1)
912 regcache_cooked_write_unsigned (regcache
, IA64_PR_REGNUM
, pr
);
916 /* The ia64 needs to convert between various ieee floating-point formats
917 and the special ia64 floating point register format. */
920 ia64_convert_register_p (int regno
, struct type
*type
)
922 return (regno
>= IA64_FR0_REGNUM
&& regno
<= IA64_FR127_REGNUM
);
926 ia64_register_to_value (struct frame_info
*frame
, int regnum
,
927 struct type
*valtype
, gdb_byte
*out
)
929 char in
[MAX_REGISTER_SIZE
];
930 frame_register_read (frame
, regnum
, in
);
931 convert_typed_floating (in
, builtin_type_ia64_ext
, out
, valtype
);
935 ia64_value_to_register (struct frame_info
*frame
, int regnum
,
936 struct type
*valtype
, const gdb_byte
*in
)
938 char out
[MAX_REGISTER_SIZE
];
939 convert_typed_floating (in
, valtype
, out
, builtin_type_ia64_ext
);
940 put_frame_register (frame
, regnum
, out
);
944 /* Limit the number of skipped non-prologue instructions since examining
945 of the prologue is expensive. */
946 static int max_skip_non_prologue_insns
= 40;
948 /* Given PC representing the starting address of a function, and
949 LIM_PC which is the (sloppy) limit to which to scan when looking
950 for a prologue, attempt to further refine this limit by using
951 the line data in the symbol table. If successful, a better guess
952 on where the prologue ends is returned, otherwise the previous
953 value of lim_pc is returned. TRUST_LIMIT is a pointer to a flag
954 which will be set to indicate whether the returned limit may be
955 used with no further scanning in the event that the function is
958 /* FIXME: cagney/2004-02-14: This function and logic have largely been
959 superseded by skip_prologue_using_sal. */
962 refine_prologue_limit (CORE_ADDR pc
, CORE_ADDR lim_pc
, int *trust_limit
)
964 struct symtab_and_line prologue_sal
;
965 CORE_ADDR start_pc
= pc
;
967 /* Start off not trusting the limit. */
970 prologue_sal
= find_pc_line (pc
, 0);
971 if (prologue_sal
.line
!= 0)
974 CORE_ADDR addr
= prologue_sal
.end
;
976 /* Handle the case in which compiler's optimizer/scheduler
977 has moved instructions into the prologue. We scan ahead
978 in the function looking for address ranges whose corresponding
979 line number is less than or equal to the first one that we
980 found for the function. (It can be less than when the
981 scheduler puts a body instruction before the first prologue
983 for (i
= 2 * max_skip_non_prologue_insns
;
984 i
> 0 && (lim_pc
== 0 || addr
< lim_pc
);
987 struct symtab_and_line sal
;
989 sal
= find_pc_line (addr
, 0);
992 if (sal
.line
<= prologue_sal
.line
993 && sal
.symtab
== prologue_sal
.symtab
)
1000 if (lim_pc
== 0 || prologue_sal
.end
< lim_pc
)
1002 lim_pc
= prologue_sal
.end
;
1003 if (start_pc
== get_pc_function_start (lim_pc
))
1010 #define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
1011 || (8 <= (_regnum_) && (_regnum_) <= 11) \
1012 || (14 <= (_regnum_) && (_regnum_) <= 31))
1013 #define imm9(_instr_) \
1014 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
1015 | (((_instr_) & 0x00008000000LL) >> 20) \
1016 | (((_instr_) & 0x00000001fc0LL) >> 6))
1018 /* Allocate and initialize a frame cache. */
1020 static struct ia64_frame_cache
*
1021 ia64_alloc_frame_cache (void)
1023 struct ia64_frame_cache
*cache
;
1026 cache
= FRAME_OBSTACK_ZALLOC (struct ia64_frame_cache
);
1032 cache
->prev_cfm
= 0;
1038 cache
->frameless
= 1;
1040 for (i
= 0; i
< NUM_IA64_RAW_REGS
; i
++)
1041 cache
->saved_regs
[i
] = 0;
1047 examine_prologue (CORE_ADDR pc
, CORE_ADDR lim_pc
, struct frame_info
*next_frame
, struct ia64_frame_cache
*cache
)
1050 CORE_ADDR last_prologue_pc
= pc
;
1051 instruction_type it
;
1056 int unat_save_reg
= 0;
1057 int pr_save_reg
= 0;
1058 int mem_stack_frame_size
= 0;
1060 CORE_ADDR spill_addr
= 0;
1063 char reg_contents
[256];
1069 CORE_ADDR bof
, sor
, sol
, sof
, cfm
, rrb_gr
;
1071 memset (instores
, 0, sizeof instores
);
1072 memset (infpstores
, 0, sizeof infpstores
);
1073 memset (reg_contents
, 0, sizeof reg_contents
);
1075 if (cache
->after_prologue
!= 0
1076 && cache
->after_prologue
<= lim_pc
)
1077 return cache
->after_prologue
;
1079 lim_pc
= refine_prologue_limit (pc
, lim_pc
, &trust_limit
);
1080 next_pc
= fetch_instruction (pc
, &it
, &instr
);
1082 /* We want to check if we have a recognizable function start before we
1083 look ahead for a prologue. */
1084 if (pc
< lim_pc
&& next_pc
1085 && it
== M
&& ((instr
& 0x1ee0000003fLL
) == 0x02c00000000LL
))
1087 /* alloc - start of a regular function. */
1088 int sor
= (int) ((instr
& 0x00078000000LL
) >> 27);
1089 int sol
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1090 int sof
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1091 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1093 /* Verify that the current cfm matches what we think is the
1094 function start. If we have somehow jumped within a function,
1095 we do not want to interpret the prologue and calculate the
1096 addresses of various registers such as the return address.
1097 We will instead treat the frame as frameless. */
1099 (sof
== (cache
->cfm
& 0x7f) &&
1100 sol
== ((cache
->cfm
>> 7) & 0x7f)))
1104 last_prologue_pc
= next_pc
;
1109 /* Look for a leaf routine. */
1110 if (pc
< lim_pc
&& next_pc
1111 && (it
== I
|| it
== M
)
1112 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
1114 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1115 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
1116 | ((instr
& 0x001f8000000LL
) >> 20)
1117 | ((instr
& 0x000000fe000LL
) >> 13));
1118 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1119 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1120 int qp
= (int) (instr
& 0x0000000003fLL
);
1121 if (qp
== 0 && rN
== 2 && imm
== 0 && rM
== 12 && fp_reg
== 0)
1123 /* mov r2, r12 - beginning of leaf routine */
1125 last_prologue_pc
= next_pc
;
1129 /* If we don't recognize a regular function or leaf routine, we are
1135 last_prologue_pc
= lim_pc
;
1139 /* Loop, looking for prologue instructions, keeping track of
1140 where preserved registers were spilled. */
1143 next_pc
= fetch_instruction (pc
, &it
, &instr
);
1147 if (it
== B
&& ((instr
& 0x1e1f800003fLL
) != 0x04000000000LL
))
1149 /* Exit loop upon hitting a non-nop branch instruction. */
1154 else if (((instr
& 0x3fLL
) != 0LL) &&
1155 (frameless
|| ret_reg
!= 0))
1157 /* Exit loop upon hitting a predicated instruction if
1158 we already have the return register or if we are frameless. */
1163 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00188000000LL
))
1166 int b2
= (int) ((instr
& 0x0000000e000LL
) >> 13);
1167 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1168 int qp
= (int) (instr
& 0x0000000003f);
1170 if (qp
== 0 && b2
== 0 && rN
>= 32 && ret_reg
== 0)
1173 last_prologue_pc
= next_pc
;
1176 else if ((it
== I
|| it
== M
)
1177 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
1179 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1180 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
1181 | ((instr
& 0x001f8000000LL
) >> 20)
1182 | ((instr
& 0x000000fe000LL
) >> 13));
1183 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1184 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1185 int qp
= (int) (instr
& 0x0000000003fLL
);
1187 if (qp
== 0 && rN
>= 32 && imm
== 0 && rM
== 12 && fp_reg
== 0)
1191 last_prologue_pc
= next_pc
;
1193 else if (qp
== 0 && rN
== 12 && rM
== 12)
1195 /* adds r12, -mem_stack_frame_size, r12 */
1196 mem_stack_frame_size
-= imm
;
1197 last_prologue_pc
= next_pc
;
1199 else if (qp
== 0 && rN
== 2
1200 && ((rM
== fp_reg
&& fp_reg
!= 0) || rM
== 12))
1202 char buf
[MAX_REGISTER_SIZE
];
1203 CORE_ADDR saved_sp
= 0;
1204 /* adds r2, spilloffset, rFramePointer
1206 adds r2, spilloffset, r12
1208 Get ready for stf.spill or st8.spill instructions.
1209 The address to start spilling at is loaded into r2.
1210 FIXME: Why r2? That's what gcc currently uses; it
1211 could well be different for other compilers. */
1213 /* Hmm... whether or not this will work will depend on
1214 where the pc is. If it's still early in the prologue
1215 this'll be wrong. FIXME */
1218 frame_unwind_register (next_frame
, sp_regnum
, buf
);
1219 saved_sp
= extract_unsigned_integer (buf
, 8);
1221 spill_addr
= saved_sp
1222 + (rM
== 12 ? 0 : mem_stack_frame_size
)
1225 last_prologue_pc
= next_pc
;
1227 else if (qp
== 0 && rM
>= 32 && rM
< 40 && !instores
[rM
] &&
1228 rN
< 256 && imm
== 0)
1230 /* mov rN, rM where rM is an input register */
1231 reg_contents
[rN
] = rM
;
1232 last_prologue_pc
= next_pc
;
1234 else if (frameless
&& qp
== 0 && rN
== fp_reg
&& imm
== 0 &&
1238 last_prologue_pc
= next_pc
;
1243 && ( ((instr
& 0x1efc0000000LL
) == 0x0eec0000000LL
)
1244 || ((instr
& 0x1ffc8000000LL
) == 0x0cec0000000LL
) ))
1246 /* stf.spill [rN] = fM, imm9
1248 stf.spill [rN] = fM */
1250 int imm
= imm9(instr
);
1251 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1252 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1253 int qp
= (int) (instr
& 0x0000000003fLL
);
1254 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
1255 && ((2 <= fM
&& fM
<= 5) || (16 <= fM
&& fM
<= 31)))
1257 cache
->saved_regs
[IA64_FR0_REGNUM
+ fM
] = spill_addr
;
1259 if ((instr
& 0x1efc0000000LL
) == 0x0eec0000000LL
)
1262 spill_addr
= 0; /* last one; must be done */
1263 last_prologue_pc
= next_pc
;
1266 else if ((it
== M
&& ((instr
& 0x1eff8000000LL
) == 0x02110000000LL
))
1267 || (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00050000000LL
)) )
1273 int arM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1274 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1275 int qp
= (int) (instr
& 0x0000000003fLL
);
1276 if (qp
== 0 && isScratch (rN
) && arM
== 36 /* ar.unat */)
1278 /* We have something like "mov.m r3 = ar.unat". Remember the
1279 r3 (or whatever) and watch for a store of this register... */
1281 last_prologue_pc
= next_pc
;
1284 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00198000000LL
))
1287 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1288 int qp
= (int) (instr
& 0x0000000003fLL
);
1289 if (qp
== 0 && isScratch (rN
))
1292 last_prologue_pc
= next_pc
;
1296 && ( ((instr
& 0x1ffc8000000LL
) == 0x08cc0000000LL
)
1297 || ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)))
1301 st8 [rN] = rM, imm9 */
1302 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1303 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1304 int qp
= (int) (instr
& 0x0000000003fLL
);
1305 int indirect
= rM
< 256 ? reg_contents
[rM
] : 0;
1306 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
1307 && (rM
== unat_save_reg
|| rM
== pr_save_reg
))
1309 /* We've found a spill of either the UNAT register or the PR
1310 register. (Well, not exactly; what we've actually found is
1311 a spill of the register that UNAT or PR was moved to).
1312 Record that fact and move on... */
1313 if (rM
== unat_save_reg
)
1315 /* Track UNAT register */
1316 cache
->saved_regs
[IA64_UNAT_REGNUM
] = spill_addr
;
1321 /* Track PR register */
1322 cache
->saved_regs
[IA64_PR_REGNUM
] = spill_addr
;
1325 if ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)
1326 /* st8 [rN] = rM, imm9 */
1327 spill_addr
+= imm9(instr
);
1329 spill_addr
= 0; /* must be done spilling */
1330 last_prologue_pc
= next_pc
;
1332 else if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
1334 /* Allow up to one store of each input register. */
1335 instores
[rM
-32] = 1;
1336 last_prologue_pc
= next_pc
;
1338 else if (qp
== 0 && 32 <= indirect
&& indirect
< 40 &&
1339 !instores
[indirect
-32])
1341 /* Allow an indirect store of an input register. */
1342 instores
[indirect
-32] = 1;
1343 last_prologue_pc
= next_pc
;
1346 else if (it
== M
&& ((instr
& 0x1ff08000000LL
) == 0x08c00000000LL
))
1353 Note that the st8 case is handled in the clause above.
1355 Advance over stores of input registers. One store per input
1356 register is permitted. */
1357 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1358 int qp
= (int) (instr
& 0x0000000003fLL
);
1359 int indirect
= rM
< 256 ? reg_contents
[rM
] : 0;
1360 if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
1362 instores
[rM
-32] = 1;
1363 last_prologue_pc
= next_pc
;
1365 else if (qp
== 0 && 32 <= indirect
&& indirect
< 40 &&
1366 !instores
[indirect
-32])
1368 /* Allow an indirect store of an input register. */
1369 instores
[indirect
-32] = 1;
1370 last_prologue_pc
= next_pc
;
1373 else if (it
== M
&& ((instr
& 0x1ff88000000LL
) == 0x0cc80000000LL
))
1380 Advance over stores of floating point input registers. Again
1381 one store per register is permitted */
1382 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1383 int qp
= (int) (instr
& 0x0000000003fLL
);
1384 if (qp
== 0 && 8 <= fM
&& fM
< 16 && !infpstores
[fM
- 8])
1386 infpstores
[fM
-8] = 1;
1387 last_prologue_pc
= next_pc
;
1391 && ( ((instr
& 0x1ffc8000000LL
) == 0x08ec0000000LL
)
1392 || ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)))
1394 /* st8.spill [rN] = rM
1396 st8.spill [rN] = rM, imm9 */
1397 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1398 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1399 int qp
= (int) (instr
& 0x0000000003fLL
);
1400 if (qp
== 0 && rN
== spill_reg
&& 4 <= rM
&& rM
<= 7)
1402 /* We've found a spill of one of the preserved general purpose
1403 regs. Record the spill address and advance the spill
1404 register if appropriate. */
1405 cache
->saved_regs
[IA64_GR0_REGNUM
+ rM
] = spill_addr
;
1406 if ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)
1407 /* st8.spill [rN] = rM, imm9 */
1408 spill_addr
+= imm9(instr
);
1410 spill_addr
= 0; /* Done spilling */
1411 last_prologue_pc
= next_pc
;
1418 /* If not frameless and we aren't called by skip_prologue, then we need to calculate
1419 registers for the previous frame which will be needed later. */
1421 if (!frameless
&& next_frame
)
1423 /* Extract the size of the rotating portion of the stack
1424 frame and the register rename base from the current
1430 rrb_gr
= (cfm
>> 18) & 0x7f;
1432 /* Find the bof (beginning of frame). */
1433 bof
= rse_address_add (cache
->bsp
, -sof
);
1435 for (i
= 0, addr
= bof
;
1439 if (IS_NaT_COLLECTION_ADDR (addr
))
1443 if (i
+32 == cfm_reg
)
1444 cache
->saved_regs
[IA64_CFM_REGNUM
] = addr
;
1445 if (i
+32 == ret_reg
)
1446 cache
->saved_regs
[IA64_VRAP_REGNUM
] = addr
;
1448 cache
->saved_regs
[IA64_VFP_REGNUM
] = addr
;
1451 /* For the previous argument registers we require the previous bof.
1452 If we can't find the previous cfm, then we can do nothing. */
1454 if (cache
->saved_regs
[IA64_CFM_REGNUM
] != 0)
1456 cfm
= read_memory_integer (cache
->saved_regs
[IA64_CFM_REGNUM
], 8);
1458 else if (cfm_reg
!= 0)
1460 frame_unwind_register (next_frame
, cfm_reg
, buf
);
1461 cfm
= extract_unsigned_integer (buf
, 8);
1463 cache
->prev_cfm
= cfm
;
1467 sor
= ((cfm
>> 14) & 0xf) * 8;
1469 sol
= (cfm
>> 7) & 0x7f;
1470 rrb_gr
= (cfm
>> 18) & 0x7f;
1472 /* The previous bof only requires subtraction of the sol (size of locals)
1473 due to the overlap between output and input of subsequent frames. */
1474 bof
= rse_address_add (bof
, -sol
);
1476 for (i
= 0, addr
= bof
;
1480 if (IS_NaT_COLLECTION_ADDR (addr
))
1485 cache
->saved_regs
[IA64_GR32_REGNUM
+ ((i
+ (sor
- rrb_gr
)) % sor
)]
1488 cache
->saved_regs
[IA64_GR32_REGNUM
+ i
] = addr
;
1494 /* Try and trust the lim_pc value whenever possible. */
1495 if (trust_limit
&& lim_pc
>= last_prologue_pc
)
1496 last_prologue_pc
= lim_pc
;
1498 cache
->frameless
= frameless
;
1499 cache
->after_prologue
= last_prologue_pc
;
1500 cache
->mem_stack_frame_size
= mem_stack_frame_size
;
1501 cache
->fp_reg
= fp_reg
;
1503 return last_prologue_pc
;
1507 ia64_skip_prologue (CORE_ADDR pc
)
1509 struct ia64_frame_cache cache
;
1511 cache
.after_prologue
= 0;
1515 /* Call examine_prologue with - as third argument since we don't have a next frame pointer to send. */
1516 return examine_prologue (pc
, pc
+1024, 0, &cache
);
1520 /* Normal frames. */
1522 static struct ia64_frame_cache
*
1523 ia64_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
1525 struct ia64_frame_cache
*cache
;
1527 CORE_ADDR cfm
, sof
, sol
, bsp
, psr
;
1533 cache
= ia64_alloc_frame_cache ();
1534 *this_cache
= cache
;
1536 frame_unwind_register (next_frame
, sp_regnum
, buf
);
1537 cache
->saved_sp
= extract_unsigned_integer (buf
, 8);
1539 /* We always want the bsp to point to the end of frame.
1540 This way, we can always get the beginning of frame (bof)
1541 by subtracting frame size. */
1542 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
1543 cache
->bsp
= extract_unsigned_integer (buf
, 8);
1545 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
1546 psr
= extract_unsigned_integer (buf
, 8);
1548 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
1549 cfm
= extract_unsigned_integer (buf
, 8);
1551 cache
->sof
= (cfm
& 0x7f);
1552 cache
->sol
= (cfm
>> 7) & 0x7f;
1553 cache
->sor
= ((cfm
>> 14) & 0xf) * 8;
1557 cache
->pc
= frame_func_unwind (next_frame
);
1560 examine_prologue (cache
->pc
, frame_pc_unwind (next_frame
), next_frame
, cache
);
1562 cache
->base
= cache
->saved_sp
+ cache
->mem_stack_frame_size
;
1568 ia64_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
1569 struct frame_id
*this_id
)
1571 struct ia64_frame_cache
*cache
=
1572 ia64_frame_cache (next_frame
, this_cache
);
1574 /* If outermost frame, mark with null frame id. */
1575 if (cache
->base
== 0)
1576 (*this_id
) = null_frame_id
;
1578 (*this_id
) = frame_id_build_special (cache
->base
, cache
->pc
, cache
->bsp
);
1579 if (gdbarch_debug
>= 1)
1580 fprintf_unfiltered (gdb_stdlog
,
1581 "regular frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
1582 paddr_nz (this_id
->code_addr
),
1583 paddr_nz (this_id
->stack_addr
),
1584 paddr_nz (cache
->bsp
), next_frame
);
1588 ia64_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
1589 int regnum
, int *optimizedp
,
1590 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1591 int *realnump
, gdb_byte
*valuep
)
1593 struct ia64_frame_cache
*cache
=
1594 ia64_frame_cache (next_frame
, this_cache
);
1595 char dummy_valp
[MAX_REGISTER_SIZE
];
1598 gdb_assert (regnum
>= 0);
1600 if (!target_has_registers
)
1601 error (_("No registers."));
1608 /* Rather than check each time if valuep is non-null, supply a dummy buffer
1609 when valuep is not supplied. */
1611 valuep
= dummy_valp
;
1613 memset (valuep
, 0, register_size (current_gdbarch
, regnum
));
1615 if (regnum
== SP_REGNUM
)
1617 /* Handle SP values for all frames but the topmost. */
1618 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
1621 else if (regnum
== IA64_BSP_REGNUM
)
1623 char cfm_valuep
[MAX_REGISTER_SIZE
];
1626 enum lval_type cfm_lval
;
1628 CORE_ADDR bsp
, prev_cfm
, prev_bsp
;
1630 /* We want to calculate the previous bsp as the end of the previous register stack frame.
1631 This corresponds to what the hardware bsp register will be if we pop the frame
1632 back which is why we might have been called. We know the beginning of the current
1633 frame is cache->bsp - cache->sof. This value in the previous frame points to
1634 the start of the output registers. We can calculate the end of that frame by adding
1635 the size of output (sof (size of frame) - sol (size of locals)). */
1636 ia64_frame_prev_register (next_frame
, this_cache
, IA64_CFM_REGNUM
,
1637 &cfm_optim
, &cfm_lval
, &cfm_addr
, &cfm_realnum
, cfm_valuep
);
1638 prev_cfm
= extract_unsigned_integer (cfm_valuep
, 8);
1640 bsp
= rse_address_add (cache
->bsp
, -(cache
->sof
));
1641 prev_bsp
= rse_address_add (bsp
, (prev_cfm
& 0x7f) - ((prev_cfm
>> 7) & 0x7f));
1643 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
1646 else if (regnum
== IA64_CFM_REGNUM
)
1648 CORE_ADDR addr
= cache
->saved_regs
[IA64_CFM_REGNUM
];
1652 *lvalp
= lval_memory
;
1654 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
1656 else if (cache
->prev_cfm
)
1657 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
), cache
->prev_cfm
);
1658 else if (cache
->frameless
)
1661 frame_unwind_register (next_frame
, IA64_PFS_REGNUM
, valuep
);
1664 else if (regnum
== IA64_VFP_REGNUM
)
1666 /* If the function in question uses an automatic register (r32-r127)
1667 for the frame pointer, it'll be found by ia64_find_saved_register()
1668 above. If the function lacks one of these frame pointers, we can
1669 still provide a value since we know the size of the frame. */
1670 CORE_ADDR vfp
= cache
->base
;
1671 store_unsigned_integer (valuep
, register_size (current_gdbarch
, IA64_VFP_REGNUM
), vfp
);
1673 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1675 char pr_valuep
[MAX_REGISTER_SIZE
];
1678 enum lval_type pr_lval
;
1681 ia64_frame_prev_register (next_frame
, this_cache
, IA64_PR_REGNUM
,
1682 &pr_optim
, &pr_lval
, &pr_addr
, &pr_realnum
, pr_valuep
);
1683 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1685 /* Fetch predicate register rename base from current frame
1686 marker for this frame. */
1687 int rrb_pr
= (cache
->cfm
>> 32) & 0x3f;
1689 /* Adjust the register number to account for register rotation. */
1690 regnum
= VP16_REGNUM
1691 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
1693 prN_val
= extract_bit_field ((unsigned char *) pr_valuep
,
1694 regnum
- VP0_REGNUM
, 1);
1695 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
), prN_val
);
1697 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
1699 char unat_valuep
[MAX_REGISTER_SIZE
];
1702 enum lval_type unat_lval
;
1703 CORE_ADDR unat_addr
;
1705 ia64_frame_prev_register (next_frame
, this_cache
, IA64_UNAT_REGNUM
,
1706 &unat_optim
, &unat_lval
, &unat_addr
, &unat_realnum
, unat_valuep
);
1707 unatN_val
= extract_bit_field ((unsigned char *) unat_valuep
,
1708 regnum
- IA64_NAT0_REGNUM
, 1);
1709 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
1712 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
1715 /* Find address of general register corresponding to nat bit we're
1719 gr_addr
= cache
->saved_regs
[regnum
- IA64_NAT0_REGNUM
1723 /* Compute address of nat collection bits. */
1724 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
1726 CORE_ADDR nat_collection
;
1728 /* If our nat collection address is bigger than bsp, we have to get
1729 the nat collection from rnat. Otherwise, we fetch the nat
1730 collection from the computed address. */
1731 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
1732 bsp
= extract_unsigned_integer (buf
, 8);
1733 if (nat_addr
>= bsp
)
1735 frame_unwind_register (next_frame
, IA64_RNAT_REGNUM
, buf
);
1736 nat_collection
= extract_unsigned_integer (buf
, 8);
1739 nat_collection
= read_memory_integer (nat_addr
, 8);
1740 nat_bit
= (gr_addr
>> 3) & 0x3f;
1741 natval
= (nat_collection
>> nat_bit
) & 1;
1744 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
), natval
);
1746 else if (regnum
== IA64_IP_REGNUM
)
1749 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
1753 *lvalp
= lval_memory
;
1755 read_memory (addr
, buf
, register_size (current_gdbarch
, IA64_IP_REGNUM
));
1756 pc
= extract_unsigned_integer (buf
, 8);
1758 else if (cache
->frameless
)
1760 frame_unwind_register (next_frame
, IA64_BR0_REGNUM
, buf
);
1761 pc
= extract_unsigned_integer (buf
, 8);
1764 store_unsigned_integer (valuep
, 8, pc
);
1766 else if (regnum
== IA64_PSR_REGNUM
)
1768 /* We don't know how to get the complete previous PSR, but we need it for
1769 the slot information when we unwind the pc (pc is formed of IP register
1770 plus slot information from PSR). To get the previous slot information,
1771 we mask it off the return address. */
1772 ULONGEST slot_num
= 0;
1775 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
1777 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
1778 psr
= extract_unsigned_integer (buf
, 8);
1782 *lvalp
= lval_memory
;
1784 read_memory (addr
, buf
, register_size (current_gdbarch
, IA64_IP_REGNUM
));
1785 pc
= extract_unsigned_integer (buf
, 8);
1787 else if (cache
->frameless
)
1790 frame_unwind_register (next_frame
, IA64_BR0_REGNUM
, buf
);
1791 pc
= extract_unsigned_integer (buf
, 8);
1793 psr
&= ~(3LL << 41);
1794 slot_num
= pc
& 0x3LL
;
1795 psr
|= (CORE_ADDR
)slot_num
<< 41;
1796 store_unsigned_integer (valuep
, 8, psr
);
1798 else if (regnum
== IA64_BR0_REGNUM
)
1801 CORE_ADDR addr
= cache
->saved_regs
[IA64_BR0_REGNUM
];
1804 *lvalp
= lval_memory
;
1806 read_memory (addr
, buf
, register_size (current_gdbarch
, IA64_BR0_REGNUM
));
1807 br0
= extract_unsigned_integer (buf
, 8);
1809 store_unsigned_integer (valuep
, 8, br0
);
1811 else if ((regnum
>= IA64_GR32_REGNUM
&& regnum
<= IA64_GR127_REGNUM
) ||
1812 (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
))
1815 if (regnum
>= V32_REGNUM
)
1816 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
1817 addr
= cache
->saved_regs
[regnum
];
1820 *lvalp
= lval_memory
;
1822 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
1824 else if (cache
->frameless
)
1826 char r_valuep
[MAX_REGISTER_SIZE
];
1829 enum lval_type r_lval
;
1831 CORE_ADDR prev_cfm
, prev_bsp
, prev_bof
;
1833 if (regnum
>= V32_REGNUM
)
1834 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
1835 ia64_frame_prev_register (next_frame
, this_cache
, IA64_CFM_REGNUM
,
1836 &r_optim
, &r_lval
, &r_addr
, &r_realnum
, r_valuep
);
1837 prev_cfm
= extract_unsigned_integer (r_valuep
, 8);
1838 ia64_frame_prev_register (next_frame
, this_cache
, IA64_BSP_REGNUM
,
1839 &r_optim
, &r_lval
, &r_addr
, &r_realnum
, r_valuep
);
1840 prev_bsp
= extract_unsigned_integer (r_valuep
, 8);
1841 prev_bof
= rse_address_add (prev_bsp
, -(prev_cfm
& 0x7f));
1843 addr
= rse_address_add (prev_bof
, (regnum
- IA64_GR32_REGNUM
));
1844 *lvalp
= lval_memory
;
1846 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
1852 if (IA64_FR32_REGNUM
<= regnum
&& regnum
<= IA64_FR127_REGNUM
)
1854 /* Fetch floating point register rename base from current
1855 frame marker for this frame. */
1856 int rrb_fr
= (cache
->cfm
>> 25) & 0x7f;
1858 /* Adjust the floating point register number to account for
1859 register rotation. */
1860 regnum
= IA64_FR32_REGNUM
1861 + ((regnum
- IA64_FR32_REGNUM
) + rrb_fr
) % 96;
1864 /* If we have stored a memory address, access the register. */
1865 addr
= cache
->saved_regs
[regnum
];
1868 *lvalp
= lval_memory
;
1870 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
1872 /* Otherwise, punt and get the current value of the register. */
1874 frame_unwind_register (next_frame
, regnum
, valuep
);
1877 if (gdbarch_debug
>= 1)
1878 fprintf_unfiltered (gdb_stdlog
,
1879 "regular prev register <%d> <%s> is 0x%s\n", regnum
,
1880 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
1881 ? ia64_register_names
[regnum
] : "r??"),
1882 paddr_nz (extract_unsigned_integer (valuep
, 8)));
1885 static const struct frame_unwind ia64_frame_unwind
=
1888 &ia64_frame_this_id
,
1889 &ia64_frame_prev_register
1892 static const struct frame_unwind
*
1893 ia64_frame_sniffer (struct frame_info
*next_frame
)
1895 return &ia64_frame_unwind
;
1898 /* Signal trampolines. */
1901 ia64_sigtramp_frame_init_saved_regs (struct ia64_frame_cache
*cache
)
1903 if (SIGCONTEXT_REGISTER_ADDRESS
)
1907 cache
->saved_regs
[IA64_VRAP_REGNUM
] =
1908 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_IP_REGNUM
);
1909 cache
->saved_regs
[IA64_CFM_REGNUM
] =
1910 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_CFM_REGNUM
);
1911 cache
->saved_regs
[IA64_PSR_REGNUM
] =
1912 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_PSR_REGNUM
);
1913 cache
->saved_regs
[IA64_BSP_REGNUM
] =
1914 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_BSP_REGNUM
);
1915 cache
->saved_regs
[IA64_RNAT_REGNUM
] =
1916 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_RNAT_REGNUM
);
1917 cache
->saved_regs
[IA64_CCV_REGNUM
] =
1918 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_CCV_REGNUM
);
1919 cache
->saved_regs
[IA64_UNAT_REGNUM
] =
1920 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_UNAT_REGNUM
);
1921 cache
->saved_regs
[IA64_FPSR_REGNUM
] =
1922 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_FPSR_REGNUM
);
1923 cache
->saved_regs
[IA64_PFS_REGNUM
] =
1924 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_PFS_REGNUM
);
1925 cache
->saved_regs
[IA64_LC_REGNUM
] =
1926 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_LC_REGNUM
);
1927 for (regno
= IA64_GR1_REGNUM
; regno
<= IA64_GR31_REGNUM
; regno
++)
1928 cache
->saved_regs
[regno
] =
1929 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, regno
);
1930 for (regno
= IA64_BR0_REGNUM
; regno
<= IA64_BR7_REGNUM
; regno
++)
1931 cache
->saved_regs
[regno
] =
1932 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, regno
);
1933 for (regno
= IA64_FR2_REGNUM
; regno
<= IA64_FR31_REGNUM
; regno
++)
1934 cache
->saved_regs
[regno
] =
1935 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, regno
);
1939 static struct ia64_frame_cache
*
1940 ia64_sigtramp_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
1942 struct ia64_frame_cache
*cache
;
1950 cache
= ia64_alloc_frame_cache ();
1952 frame_unwind_register (next_frame
, sp_regnum
, buf
);
1953 /* Note that frame size is hard-coded below. We cannot calculate it
1954 via prologue examination. */
1955 cache
->base
= extract_unsigned_integer (buf
, 8) + 16;
1957 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
1958 cache
->bsp
= extract_unsigned_integer (buf
, 8);
1960 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
1961 cache
->cfm
= extract_unsigned_integer (buf
, 8);
1962 cache
->sof
= cache
->cfm
& 0x7f;
1964 ia64_sigtramp_frame_init_saved_regs (cache
);
1966 *this_cache
= cache
;
1971 ia64_sigtramp_frame_this_id (struct frame_info
*next_frame
,
1972 void **this_cache
, struct frame_id
*this_id
)
1974 struct ia64_frame_cache
*cache
=
1975 ia64_sigtramp_frame_cache (next_frame
, this_cache
);
1977 (*this_id
) = frame_id_build_special (cache
->base
, frame_pc_unwind (next_frame
), cache
->bsp
);
1978 if (gdbarch_debug
>= 1)
1979 fprintf_unfiltered (gdb_stdlog
,
1980 "sigtramp frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
1981 paddr_nz (this_id
->code_addr
),
1982 paddr_nz (this_id
->stack_addr
),
1983 paddr_nz (cache
->bsp
), next_frame
);
1987 ia64_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
1989 int regnum
, int *optimizedp
,
1990 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1991 int *realnump
, gdb_byte
*valuep
)
1993 char dummy_valp
[MAX_REGISTER_SIZE
];
1994 char buf
[MAX_REGISTER_SIZE
];
1996 struct ia64_frame_cache
*cache
=
1997 ia64_sigtramp_frame_cache (next_frame
, this_cache
);
1999 gdb_assert (regnum
>= 0);
2001 if (!target_has_registers
)
2002 error (_("No registers."));
2009 /* Rather than check each time if valuep is non-null, supply a dummy buffer
2010 when valuep is not supplied. */
2012 valuep
= dummy_valp
;
2014 memset (valuep
, 0, register_size (current_gdbarch
, regnum
));
2016 if (regnum
== IA64_IP_REGNUM
)
2019 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
2023 *lvalp
= lval_memory
;
2025 read_memory (addr
, buf
, register_size (current_gdbarch
, IA64_IP_REGNUM
));
2026 pc
= extract_unsigned_integer (buf
, 8);
2029 store_unsigned_integer (valuep
, 8, pc
);
2031 else if ((regnum
>= IA64_GR32_REGNUM
&& regnum
<= IA64_GR127_REGNUM
) ||
2032 (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
))
2035 if (regnum
>= V32_REGNUM
)
2036 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
2037 addr
= cache
->saved_regs
[regnum
];
2040 *lvalp
= lval_memory
;
2042 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
2047 /* All other registers not listed above. */
2048 CORE_ADDR addr
= cache
->saved_regs
[regnum
];
2051 *lvalp
= lval_memory
;
2053 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
2057 if (gdbarch_debug
>= 1)
2058 fprintf_unfiltered (gdb_stdlog
,
2059 "sigtramp prev register <%s> is 0x%s\n",
2060 (regnum
< IA64_GR32_REGNUM
2061 || (regnum
> IA64_GR127_REGNUM
2062 && regnum
< LAST_PSEUDO_REGNUM
))
2063 ? ia64_register_names
[regnum
]
2064 : (regnum
< LAST_PSEUDO_REGNUM
2065 ? ia64_register_names
[regnum
-IA64_GR32_REGNUM
+V32_REGNUM
]
2067 paddr_nz (extract_unsigned_integer (valuep
, 8)));
2070 static const struct frame_unwind ia64_sigtramp_frame_unwind
=
2073 ia64_sigtramp_frame_this_id
,
2074 ia64_sigtramp_frame_prev_register
2077 static const struct frame_unwind
*
2078 ia64_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
2081 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
2083 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
2084 if (legacy_pc_in_sigtramp (pc
, name
))
2085 return &ia64_sigtramp_frame_unwind
;
2092 ia64_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
2094 struct ia64_frame_cache
*cache
=
2095 ia64_frame_cache (next_frame
, this_cache
);
2100 static const struct frame_base ia64_frame_base
=
2103 ia64_frame_base_address
,
2104 ia64_frame_base_address
,
2105 ia64_frame_base_address
2108 #ifdef HAVE_LIBUNWIND_IA64_H
2110 struct ia64_unwind_table_entry
2112 unw_word_t start_offset
;
2113 unw_word_t end_offset
;
2114 unw_word_t info_offset
;
2117 static __inline__
uint64_t
2118 ia64_rse_slot_num (uint64_t addr
)
2120 return (addr
>> 3) & 0x3f;
2123 /* Skip over a designated number of registers in the backing
2124 store, remembering every 64th position is for NAT. */
2125 static __inline__
uint64_t
2126 ia64_rse_skip_regs (uint64_t addr
, long num_regs
)
2128 long delta
= ia64_rse_slot_num(addr
) + num_regs
;
2132 return addr
+ ((num_regs
+ delta
/0x3f) << 3);
2135 /* Gdb libunwind-frame callback function to convert from an ia64 gdb register
2136 number to a libunwind register number. */
2138 ia64_gdb2uw_regnum (int regnum
)
2140 if (regnum
== sp_regnum
)
2142 else if (regnum
== IA64_BSP_REGNUM
)
2143 return UNW_IA64_BSP
;
2144 else if ((unsigned) (regnum
- IA64_GR0_REGNUM
) < 128)
2145 return UNW_IA64_GR
+ (regnum
- IA64_GR0_REGNUM
);
2146 else if ((unsigned) (regnum
- V32_REGNUM
) < 95)
2147 return UNW_IA64_GR
+ 32 + (regnum
- V32_REGNUM
);
2148 else if ((unsigned) (regnum
- IA64_FR0_REGNUM
) < 128)
2149 return UNW_IA64_FR
+ (regnum
- IA64_FR0_REGNUM
);
2150 else if ((unsigned) (regnum
- IA64_PR0_REGNUM
) < 64)
2152 else if ((unsigned) (regnum
- IA64_BR0_REGNUM
) < 8)
2153 return UNW_IA64_BR
+ (regnum
- IA64_BR0_REGNUM
);
2154 else if (regnum
== IA64_PR_REGNUM
)
2156 else if (regnum
== IA64_IP_REGNUM
)
2158 else if (regnum
== IA64_CFM_REGNUM
)
2159 return UNW_IA64_CFM
;
2160 else if ((unsigned) (regnum
- IA64_AR0_REGNUM
) < 128)
2161 return UNW_IA64_AR
+ (regnum
- IA64_AR0_REGNUM
);
2162 else if ((unsigned) (regnum
- IA64_NAT0_REGNUM
) < 128)
2163 return UNW_IA64_NAT
+ (regnum
- IA64_NAT0_REGNUM
);
2168 /* Gdb libunwind-frame callback function to convert from a libunwind register
2169 number to a ia64 gdb register number. */
2171 ia64_uw2gdb_regnum (int uw_regnum
)
2173 if (uw_regnum
== UNW_IA64_SP
)
2175 else if (uw_regnum
== UNW_IA64_BSP
)
2176 return IA64_BSP_REGNUM
;
2177 else if ((unsigned) (uw_regnum
- UNW_IA64_GR
) < 32)
2178 return IA64_GR0_REGNUM
+ (uw_regnum
- UNW_IA64_GR
);
2179 else if ((unsigned) (uw_regnum
- UNW_IA64_GR
) < 128)
2180 return V32_REGNUM
+ (uw_regnum
- (IA64_GR0_REGNUM
+ 32));
2181 else if ((unsigned) (uw_regnum
- UNW_IA64_FR
) < 128)
2182 return IA64_FR0_REGNUM
+ (uw_regnum
- UNW_IA64_FR
);
2183 else if ((unsigned) (uw_regnum
- UNW_IA64_BR
) < 8)
2184 return IA64_BR0_REGNUM
+ (uw_regnum
- UNW_IA64_BR
);
2185 else if (uw_regnum
== UNW_IA64_PR
)
2186 return IA64_PR_REGNUM
;
2187 else if (uw_regnum
== UNW_REG_IP
)
2188 return IA64_IP_REGNUM
;
2189 else if (uw_regnum
== UNW_IA64_CFM
)
2190 return IA64_CFM_REGNUM
;
2191 else if ((unsigned) (uw_regnum
- UNW_IA64_AR
) < 128)
2192 return IA64_AR0_REGNUM
+ (uw_regnum
- UNW_IA64_AR
);
2193 else if ((unsigned) (uw_regnum
- UNW_IA64_NAT
) < 128)
2194 return IA64_NAT0_REGNUM
+ (uw_regnum
- UNW_IA64_NAT
);
2199 /* Gdb libunwind-frame callback function to reveal if register is a float
2202 ia64_is_fpreg (int uw_regnum
)
2204 return unw_is_fpreg (uw_regnum
);
2207 /* Libunwind callback accessor function for general registers. */
2209 ia64_access_reg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_word_t
*val
,
2210 int write
, void *arg
)
2212 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2213 unw_word_t bsp
, sof
, sol
, cfm
, psr
, ip
;
2214 struct frame_info
*next_frame
= arg
;
2215 long new_sof
, old_sof
;
2216 char buf
[MAX_REGISTER_SIZE
];
2221 /* ignore writes to pseudo-registers such as UNW_IA64_PROC_STARTI. */
2227 ia64_write_pc (*val
, inferior_ptid
);
2230 case UNW_IA64_AR_BSPSTORE
:
2231 write_register (IA64_BSP_REGNUM
, *val
);
2234 case UNW_IA64_AR_BSP
:
2236 /* Account for the fact that ptrace() expects bsp to point
2237 after the current register frame. */
2238 cfm
= read_register (IA64_CFM_REGNUM
);
2240 bsp
= ia64_rse_skip_regs (*val
, sof
);
2241 write_register (IA64_BSP_REGNUM
, bsp
);
2245 /* If we change CFM, we need to adjust ptrace's notion of
2246 bsp accordingly, so that the real bsp remains
2248 bsp
= read_register (IA64_BSP_REGNUM
);
2249 cfm
= read_register (IA64_CFM_REGNUM
);
2250 old_sof
= (cfm
& 0x7f);
2251 new_sof
= (*val
& 0x7f);
2252 if (old_sof
!= new_sof
)
2254 bsp
= ia64_rse_skip_regs (bsp
, -old_sof
+ new_sof
);
2255 write_register (IA64_BSP_REGNUM
, bsp
);
2257 write_register (IA64_CFM_REGNUM
, *val
);
2261 write_register (regnum
, *val
);
2264 if (gdbarch_debug
>= 1)
2265 fprintf_unfiltered (gdb_stdlog
,
2266 " access_reg: to cache: %4s=0x%s\n",
2267 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2268 ? ia64_register_names
[regnum
] : "r??"),
2276 /* Libunwind expects to see the pc value which means the slot number
2277 from the psr must be merged with the ip word address. */
2278 frame_unwind_register (next_frame
, IA64_IP_REGNUM
, buf
);
2279 ip
= extract_unsigned_integer (buf
, 8);
2280 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
2281 psr
= extract_unsigned_integer (buf
, 8);
2282 *val
= ip
| ((psr
>> 41) & 0x3);
2285 case UNW_IA64_AR_BSP
:
2286 /* Libunwind expects to see the beginning of the current register
2287 frame so we must account for the fact that ptrace() will return a value
2288 for bsp that points *after* the current register frame. */
2289 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2290 bsp
= extract_unsigned_integer (buf
, 8);
2291 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
2292 cfm
= extract_unsigned_integer (buf
, 8);
2294 *val
= ia64_rse_skip_regs (bsp
, -sof
);
2297 case UNW_IA64_AR_BSPSTORE
:
2298 /* Libunwind wants bspstore to be after the current register frame.
2299 This is what ptrace() and gdb treats as the regular bsp value. */
2300 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2301 *val
= extract_unsigned_integer (buf
, 8);
2305 /* For all other registers, just unwind the value directly. */
2306 frame_unwind_register (next_frame
, regnum
, buf
);
2307 *val
= extract_unsigned_integer (buf
, 8);
2311 if (gdbarch_debug
>= 1)
2312 fprintf_unfiltered (gdb_stdlog
,
2313 " access_reg: from cache: %4s=0x%s\n",
2314 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2315 ? ia64_register_names
[regnum
] : "r??"),
2321 /* Libunwind callback accessor function for floating-point registers. */
2323 ia64_access_fpreg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_fpreg_t
*val
,
2324 int write
, void *arg
)
2326 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2329 regcache_cooked_write (current_regcache
, regnum
, (char *) val
);
2331 regcache_cooked_read (current_regcache
, regnum
, (char *) val
);
2335 /* Libunwind callback accessor function for top-level rse registers. */
2337 ia64_access_rse_reg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_word_t
*val
,
2338 int write
, void *arg
)
2340 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2341 unw_word_t bsp
, sof
, sol
, cfm
, psr
, ip
;
2342 long new_sof
, old_sof
;
2347 /* ignore writes to pseudo-registers such as UNW_IA64_PROC_STARTI. */
2353 ia64_write_pc (*val
, inferior_ptid
);
2356 case UNW_IA64_AR_BSPSTORE
:
2357 write_register (IA64_BSP_REGNUM
, *val
);
2360 case UNW_IA64_AR_BSP
:
2362 /* Account for the fact that ptrace() expects bsp to point
2363 after the current register frame. */
2364 cfm
= read_register (IA64_CFM_REGNUM
);
2366 bsp
= ia64_rse_skip_regs (*val
, sof
);
2367 write_register (IA64_BSP_REGNUM
, bsp
);
2371 /* If we change CFM, we need to adjust ptrace's notion of
2372 bsp accordingly, so that the real bsp remains
2374 bsp
= read_register (IA64_BSP_REGNUM
);
2375 cfm
= read_register (IA64_CFM_REGNUM
);
2376 old_sof
= (cfm
& 0x7f);
2377 new_sof
= (*val
& 0x7f);
2378 if (old_sof
!= new_sof
)
2380 bsp
= ia64_rse_skip_regs (bsp
, -old_sof
+ new_sof
);
2381 write_register (IA64_BSP_REGNUM
, bsp
);
2383 write_register (IA64_CFM_REGNUM
, *val
);
2387 write_register (regnum
, *val
);
2390 if (gdbarch_debug
>= 1)
2391 fprintf_unfiltered (gdb_stdlog
,
2392 " access_rse_reg: to cache: %4s=0x%s\n",
2393 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2394 ? ia64_register_names
[regnum
] : "r??"),
2402 /* Libunwind expects to see the pc value which means the slot number
2403 from the psr must be merged with the ip word address. */
2404 ip
= read_register (IA64_IP_REGNUM
);
2405 psr
= read_register (IA64_PSR_REGNUM
);
2406 *val
= ip
| ((psr
>> 41) & 0x3);
2409 case UNW_IA64_AR_BSP
:
2410 /* Libunwind expects to see the beginning of the current register
2411 frame so we must account for the fact that ptrace() will return a value
2412 for bsp that points *after* the current register frame. */
2413 bsp
= read_register (IA64_BSP_REGNUM
);
2414 cfm
= read_register (IA64_CFM_REGNUM
);
2416 *val
= ia64_rse_skip_regs (bsp
, -sof
);
2419 case UNW_IA64_AR_BSPSTORE
:
2420 /* Libunwind wants bspstore to be after the current register frame.
2421 This is what ptrace() and gdb treats as the regular bsp value. */
2422 *val
= read_register (IA64_BSP_REGNUM
);
2426 /* For all other registers, just read the value directly. */
2427 *val
= read_register (regnum
);
2432 if (gdbarch_debug
>= 1)
2433 fprintf_unfiltered (gdb_stdlog
,
2434 " access_rse_reg: from cache: %4s=0x%s\n",
2435 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2436 ? ia64_register_names
[regnum
] : "r??"),
2442 /* Libunwind callback accessor function for accessing memory. */
2444 ia64_access_mem (unw_addr_space_t as
,
2445 unw_word_t addr
, unw_word_t
*val
,
2446 int write
, void *arg
)
2448 if (addr
- KERNEL_START
< ktab_size
)
2450 unw_word_t
*laddr
= (unw_word_t
*) ((char *) ktab
2451 + (addr
- KERNEL_START
));
2460 /* XXX do we need to normalize byte-order here? */
2462 return target_write_memory (addr
, (char *) val
, sizeof (unw_word_t
));
2464 return target_read_memory (addr
, (char *) val
, sizeof (unw_word_t
));
2467 /* Call low-level function to access the kernel unwind table. */
2469 getunwind_table (gdb_byte
**buf_p
)
2473 /* FIXME drow/2005-09-10: This code used to call
2474 ia64_linux_xfer_unwind_table directly to fetch the unwind table
2475 for the currently running ia64-linux kernel. That data should
2476 come from the core file and be accessed via the auxv vector; if
2477 we want to preserve fall back to the running kernel's table, then
2478 we should find a way to override the corefile layer's
2479 xfer_partial method. */
2481 x
= target_read_alloc (¤t_target
, TARGET_OBJECT_UNWIND_TABLE
,
2487 /* Get the kernel unwind table. */
2489 get_kernel_table (unw_word_t ip
, unw_dyn_info_t
*di
)
2491 static struct ia64_table_entry
*etab
;
2498 size
= getunwind_table (&ktab_buf
);
2500 return -UNW_ENOINFO
;
2502 ktab
= (struct ia64_table_entry
*) ktab_buf
;
2505 for (etab
= ktab
; etab
->start_offset
; ++etab
)
2506 etab
->info_offset
+= KERNEL_START
;
2509 if (ip
< ktab
[0].start_offset
|| ip
>= etab
[-1].end_offset
)
2510 return -UNW_ENOINFO
;
2512 di
->format
= UNW_INFO_FORMAT_TABLE
;
2514 di
->start_ip
= ktab
[0].start_offset
;
2515 di
->end_ip
= etab
[-1].end_offset
;
2516 di
->u
.ti
.name_ptr
= (unw_word_t
) "<kernel>";
2517 di
->u
.ti
.segbase
= 0;
2518 di
->u
.ti
.table_len
= ((char *) etab
- (char *) ktab
) / sizeof (unw_word_t
);
2519 di
->u
.ti
.table_data
= (unw_word_t
*) ktab
;
2521 if (gdbarch_debug
>= 1)
2522 fprintf_unfiltered (gdb_stdlog
, "get_kernel_table: found table `%s': "
2523 "segbase=0x%s, length=%s, gp=0x%s\n",
2524 (char *) di
->u
.ti
.name_ptr
,
2525 paddr_nz (di
->u
.ti
.segbase
),
2526 paddr_u (di
->u
.ti
.table_len
),
2531 /* Find the unwind table entry for a specified address. */
2533 ia64_find_unwind_table (struct objfile
*objfile
, unw_word_t ip
,
2534 unw_dyn_info_t
*dip
, void **buf
)
2536 Elf_Internal_Phdr
*phdr
, *p_text
= NULL
, *p_unwind
= NULL
;
2537 Elf_Internal_Ehdr
*ehdr
;
2538 unw_word_t segbase
= 0;
2539 CORE_ADDR load_base
;
2543 bfd
= objfile
->obfd
;
2545 ehdr
= elf_tdata (bfd
)->elf_header
;
2546 phdr
= elf_tdata (bfd
)->phdr
;
2548 load_base
= ANOFFSET (objfile
->section_offsets
, SECT_OFF_TEXT (objfile
));
2550 for (i
= 0; i
< ehdr
->e_phnum
; ++i
)
2552 switch (phdr
[i
].p_type
)
2555 if ((unw_word_t
) (ip
- load_base
- phdr
[i
].p_vaddr
)
2560 case PT_IA_64_UNWIND
:
2561 p_unwind
= phdr
+ i
;
2569 if (!p_text
|| !p_unwind
)
2570 return -UNW_ENOINFO
;
2572 /* Verify that the segment that contains the IP also contains
2573 the static unwind table. If not, we may be in the Linux kernel's
2574 DSO gate page in which case the unwind table is another segment.
2575 Otherwise, we are dealing with runtime-generated code, for which we
2576 have no info here. */
2577 segbase
= p_text
->p_vaddr
+ load_base
;
2579 if ((p_unwind
->p_vaddr
- p_text
->p_vaddr
) >= p_text
->p_memsz
)
2582 for (i
= 0; i
< ehdr
->e_phnum
; ++i
)
2584 if (phdr
[i
].p_type
== PT_LOAD
2585 && (p_unwind
->p_vaddr
- phdr
[i
].p_vaddr
) < phdr
[i
].p_memsz
)
2588 /* Get the segbase from the section containing the
2590 segbase
= phdr
[i
].p_vaddr
+ load_base
;
2594 return -UNW_ENOINFO
;
2597 dip
->start_ip
= p_text
->p_vaddr
+ load_base
;
2598 dip
->end_ip
= dip
->start_ip
+ p_text
->p_memsz
;
2599 dip
->gp
= ia64_find_global_pointer (ip
);
2600 dip
->format
= UNW_INFO_FORMAT_REMOTE_TABLE
;
2601 dip
->u
.rti
.name_ptr
= (unw_word_t
) bfd_get_filename (bfd
);
2602 dip
->u
.rti
.segbase
= segbase
;
2603 dip
->u
.rti
.table_len
= p_unwind
->p_memsz
/ sizeof (unw_word_t
);
2604 dip
->u
.rti
.table_data
= p_unwind
->p_vaddr
+ load_base
;
2609 /* Libunwind callback accessor function to acquire procedure unwind-info. */
2611 ia64_find_proc_info_x (unw_addr_space_t as
, unw_word_t ip
, unw_proc_info_t
*pi
,
2612 int need_unwind_info
, void *arg
)
2614 struct obj_section
*sec
= find_pc_section (ip
);
2621 /* XXX This only works if the host and the target architecture are
2622 both ia64 and if the have (more or less) the same kernel
2624 if (get_kernel_table (ip
, &di
) < 0)
2625 return -UNW_ENOINFO
;
2627 if (gdbarch_debug
>= 1)
2628 fprintf_unfiltered (gdb_stdlog
, "ia64_find_proc_info_x: 0x%s -> "
2629 "(name=`%s',segbase=0x%s,start=0x%s,end=0x%s,gp=0x%s,"
2630 "length=%s,data=0x%s)\n",
2631 paddr_nz (ip
), (char *)di
.u
.ti
.name_ptr
,
2632 paddr_nz (di
.u
.ti
.segbase
),
2633 paddr_nz (di
.start_ip
), paddr_nz (di
.end_ip
),
2635 paddr_u (di
.u
.ti
.table_len
),
2636 paddr_nz ((CORE_ADDR
)di
.u
.ti
.table_data
));
2640 ret
= ia64_find_unwind_table (sec
->objfile
, ip
, &di
, &buf
);
2644 if (gdbarch_debug
>= 1)
2645 fprintf_unfiltered (gdb_stdlog
, "ia64_find_proc_info_x: 0x%s -> "
2646 "(name=`%s',segbase=0x%s,start=0x%s,end=0x%s,gp=0x%s,"
2647 "length=%s,data=0x%s)\n",
2648 paddr_nz (ip
), (char *)di
.u
.rti
.name_ptr
,
2649 paddr_nz (di
.u
.rti
.segbase
),
2650 paddr_nz (di
.start_ip
), paddr_nz (di
.end_ip
),
2652 paddr_u (di
.u
.rti
.table_len
),
2653 paddr_nz (di
.u
.rti
.table_data
));
2656 ret
= libunwind_search_unwind_table (&as
, ip
, &di
, pi
, need_unwind_info
,
2659 /* We no longer need the dyn info storage so free it. */
2665 /* Libunwind callback accessor function for cleanup. */
2667 ia64_put_unwind_info (unw_addr_space_t as
,
2668 unw_proc_info_t
*pip
, void *arg
)
2670 /* Nothing required for now. */
2673 /* Libunwind callback accessor function to get head of the dynamic
2674 unwind-info registration list. */
2676 ia64_get_dyn_info_list (unw_addr_space_t as
,
2677 unw_word_t
*dilap
, void *arg
)
2679 struct obj_section
*text_sec
;
2680 struct objfile
*objfile
;
2681 unw_word_t ip
, addr
;
2685 if (!libunwind_is_initialized ())
2686 return -UNW_ENOINFO
;
2688 for (objfile
= object_files
; objfile
; objfile
= objfile
->next
)
2692 text_sec
= objfile
->sections
+ SECT_OFF_TEXT (objfile
);
2693 ip
= text_sec
->addr
;
2694 ret
= ia64_find_unwind_table (objfile
, ip
, &di
, &buf
);
2697 addr
= libunwind_find_dyn_list (as
, &di
, arg
);
2698 /* We no longer need the dyn info storage so free it. */
2703 if (gdbarch_debug
>= 1)
2704 fprintf_unfiltered (gdb_stdlog
,
2705 "dynamic unwind table in objfile %s "
2706 "at 0x%s (gp=0x%s)\n",
2707 bfd_get_filename (objfile
->obfd
),
2708 paddr_nz (addr
), paddr_nz (di
.gp
));
2714 return -UNW_ENOINFO
;
2718 /* Frame interface functions for libunwind. */
2721 ia64_libunwind_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
2722 struct frame_id
*this_id
)
2727 CORE_ADDR prev_ip
, addr
;
2728 int realnum
, optimized
;
2729 enum lval_type lval
;
2732 libunwind_frame_this_id (next_frame
, this_cache
, &id
);
2733 if (frame_id_eq (id
, null_frame_id
))
2735 (*this_id
) = null_frame_id
;
2739 /* We must add the bsp as the special address for frame comparison
2741 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2742 bsp
= extract_unsigned_integer (buf
, 8);
2744 /* If the previous frame pc value is 0, then we are at the end of the stack
2745 and don't want to unwind past this frame. We return a null frame_id to
2747 libunwind_frame_prev_register (next_frame
, this_cache
, IA64_IP_REGNUM
,
2748 &optimized
, &lval
, &addr
, &realnum
, buf
);
2749 prev_ip
= extract_unsigned_integer (buf
, 8);
2752 (*this_id
) = frame_id_build_special (id
.stack_addr
, id
.code_addr
, bsp
);
2754 (*this_id
) = null_frame_id
;
2756 if (gdbarch_debug
>= 1)
2757 fprintf_unfiltered (gdb_stdlog
,
2758 "libunwind frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
2759 paddr_nz (id
.code_addr
), paddr_nz (id
.stack_addr
),
2760 paddr_nz (bsp
), next_frame
);
2764 ia64_libunwind_frame_prev_register (struct frame_info
*next_frame
,
2766 int regnum
, int *optimizedp
,
2767 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
2768 int *realnump
, gdb_byte
*valuep
)
2772 if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2773 reg
= IA64_PR_REGNUM
;
2774 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2775 reg
= IA64_UNAT_REGNUM
;
2777 /* Let libunwind do most of the work. */
2778 libunwind_frame_prev_register (next_frame
, this_cache
, reg
,
2779 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
2781 /* No more to do if the value is not supposed to be supplied. */
2785 if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2789 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2793 unsigned char buf
[MAX_REGISTER_SIZE
];
2795 /* Fetch predicate register rename base from current frame
2796 marker for this frame. */
2797 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
2798 cfm
= extract_unsigned_integer (buf
, 8);
2799 rrb_pr
= (cfm
>> 32) & 0x3f;
2801 /* Adjust the register number to account for register rotation. */
2802 regnum
= VP16_REGNUM
2803 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
2805 prN_val
= extract_bit_field ((unsigned char *) valuep
,
2806 regnum
- VP0_REGNUM
, 1);
2807 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
), prN_val
);
2809 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2813 unatN_val
= extract_bit_field ((unsigned char *) valuep
,
2814 regnum
- IA64_NAT0_REGNUM
, 1);
2815 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
2818 else if (regnum
== IA64_BSP_REGNUM
)
2820 char cfm_valuep
[MAX_REGISTER_SIZE
];
2823 enum lval_type cfm_lval
;
2825 CORE_ADDR bsp
, prev_cfm
, prev_bsp
;
2827 /* We want to calculate the previous bsp as the end of the previous register stack frame.
2828 This corresponds to what the hardware bsp register will be if we pop the frame
2829 back which is why we might have been called. We know that libunwind will pass us back
2830 the beginning of the current frame so we should just add sof to it. */
2831 prev_bsp
= extract_unsigned_integer (valuep
, 8);
2832 libunwind_frame_prev_register (next_frame
, this_cache
, IA64_CFM_REGNUM
,
2833 &cfm_optim
, &cfm_lval
, &cfm_addr
, &cfm_realnum
, cfm_valuep
);
2834 prev_cfm
= extract_unsigned_integer (cfm_valuep
, 8);
2835 prev_bsp
= rse_address_add (prev_bsp
, (prev_cfm
& 0x7f));
2837 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
2841 if (gdbarch_debug
>= 1)
2842 fprintf_unfiltered (gdb_stdlog
,
2843 "libunwind prev register <%s> is 0x%s\n",
2844 (regnum
< IA64_GR32_REGNUM
2845 || (regnum
> IA64_GR127_REGNUM
2846 && regnum
< LAST_PSEUDO_REGNUM
))
2847 ? ia64_register_names
[regnum
]
2848 : (regnum
< LAST_PSEUDO_REGNUM
2849 ? ia64_register_names
[regnum
-IA64_GR32_REGNUM
+V32_REGNUM
]
2851 paddr_nz (extract_unsigned_integer (valuep
, 8)));
2854 static const struct frame_unwind ia64_libunwind_frame_unwind
=
2857 ia64_libunwind_frame_this_id
,
2858 ia64_libunwind_frame_prev_register
2861 static const struct frame_unwind
*
2862 ia64_libunwind_frame_sniffer (struct frame_info
*next_frame
)
2864 if (libunwind_is_initialized () && libunwind_frame_sniffer (next_frame
))
2865 return &ia64_libunwind_frame_unwind
;
2871 ia64_libunwind_sigtramp_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
2872 struct frame_id
*this_id
)
2879 libunwind_frame_this_id (next_frame
, this_cache
, &id
);
2880 if (frame_id_eq (id
, null_frame_id
))
2882 (*this_id
) = null_frame_id
;
2886 /* We must add the bsp as the special address for frame comparison
2888 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2889 bsp
= extract_unsigned_integer (buf
, 8);
2891 /* For a sigtramp frame, we don't make the check for previous ip being 0. */
2892 (*this_id
) = frame_id_build_special (id
.stack_addr
, id
.code_addr
, bsp
);
2894 if (gdbarch_debug
>= 1)
2895 fprintf_unfiltered (gdb_stdlog
,
2896 "libunwind sigtramp frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
2897 paddr_nz (id
.code_addr
), paddr_nz (id
.stack_addr
),
2898 paddr_nz (bsp
), next_frame
);
2902 ia64_libunwind_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
2904 int regnum
, int *optimizedp
,
2905 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
2906 int *realnump
, gdb_byte
*valuep
)
2910 CORE_ADDR prev_ip
, addr
;
2911 int realnum
, optimized
;
2912 enum lval_type lval
;
2915 /* If the previous frame pc value is 0, then we want to use the SIGCONTEXT
2916 method of getting previous registers. */
2917 libunwind_frame_prev_register (next_frame
, this_cache
, IA64_IP_REGNUM
,
2918 &optimized
, &lval
, &addr
, &realnum
, buf
);
2919 prev_ip
= extract_unsigned_integer (buf
, 8);
2923 void *tmp_cache
= NULL
;
2924 ia64_sigtramp_frame_prev_register (next_frame
, &tmp_cache
, regnum
, optimizedp
, lvalp
,
2925 addrp
, realnump
, valuep
);
2928 ia64_libunwind_frame_prev_register (next_frame
, this_cache
, regnum
, optimizedp
, lvalp
,
2929 addrp
, realnump
, valuep
);
2932 static const struct frame_unwind ia64_libunwind_sigtramp_frame_unwind
=
2935 ia64_libunwind_sigtramp_frame_this_id
,
2936 ia64_libunwind_sigtramp_frame_prev_register
2939 static const struct frame_unwind
*
2940 ia64_libunwind_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
2942 if (libunwind_is_initialized ())
2944 if (libunwind_sigtramp_frame_sniffer (next_frame
))
2945 return &ia64_libunwind_sigtramp_frame_unwind
;
2949 return ia64_sigtramp_frame_sniffer (next_frame
);
2952 /* Set of libunwind callback acccessor functions. */
2953 static unw_accessors_t ia64_unw_accessors
=
2955 ia64_find_proc_info_x
,
2956 ia64_put_unwind_info
,
2957 ia64_get_dyn_info_list
,
2965 /* Set of special libunwind callback acccessor functions specific for accessing
2966 the rse registers. At the top of the stack, we want libunwind to figure out
2967 how to read r32 - r127. Though usually they are found sequentially in memory
2968 starting from $bof, this is not always true. */
2969 static unw_accessors_t ia64_unw_rse_accessors
=
2971 ia64_find_proc_info_x
,
2972 ia64_put_unwind_info
,
2973 ia64_get_dyn_info_list
,
2975 ia64_access_rse_reg
,
2981 /* Set of ia64 gdb libunwind-frame callbacks and data for generic libunwind-frame code to use. */
2982 static struct libunwind_descr ia64_libunwind_descr
=
2987 &ia64_unw_accessors
,
2988 &ia64_unw_rse_accessors
,
2991 #endif /* HAVE_LIBUNWIND_IA64_H */
2993 /* Should we use DEPRECATED_EXTRACT_STRUCT_VALUE_ADDRESS instead of
2994 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc and TYPE
2995 is the type (which is known to be struct, union or array). */
2997 ia64_use_struct_convention (int gcc_p
, struct type
*type
)
2999 struct type
*float_elt_type
;
3001 /* HFAs are structures (or arrays) consisting entirely of floating
3002 point values of the same length. Up to 8 of these are returned
3003 in registers. Don't use the struct convention when this is the
3005 float_elt_type
= is_float_or_hfa_type (type
);
3006 if (float_elt_type
!= NULL
3007 && TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
) <= 8)
3010 /* Other structs of length 32 or less are returned in r8-r11.
3011 Don't use the struct convention for those either. */
3012 return TYPE_LENGTH (type
) > 32;
3016 ia64_extract_return_value (struct type
*type
, struct regcache
*regcache
,
3019 struct type
*float_elt_type
;
3021 float_elt_type
= is_float_or_hfa_type (type
);
3022 if (float_elt_type
!= NULL
)
3024 char from
[MAX_REGISTER_SIZE
];
3026 int regnum
= IA64_FR8_REGNUM
;
3027 int n
= TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
);
3031 regcache_cooked_read (regcache
, regnum
, from
);
3032 convert_typed_floating (from
, builtin_type_ia64_ext
,
3033 (char *)valbuf
+ offset
, float_elt_type
);
3034 offset
+= TYPE_LENGTH (float_elt_type
);
3042 int regnum
= IA64_GR8_REGNUM
;
3043 int reglen
= TYPE_LENGTH (register_type (get_regcache_arch (regcache
),
3045 int n
= TYPE_LENGTH (type
) / reglen
;
3046 int m
= TYPE_LENGTH (type
) % reglen
;
3051 regcache_cooked_read_unsigned (regcache
, regnum
, &val
);
3052 memcpy ((char *)valbuf
+ offset
, &val
, reglen
);
3059 regcache_cooked_read_unsigned (regcache
, regnum
, &val
);
3060 memcpy ((char *)valbuf
+ offset
, &val
, m
);
3066 ia64_extract_struct_value_address (struct regcache
*regcache
)
3068 error (_("ia64_extract_struct_value_address called and cannot get struct value address"));
3074 is_float_or_hfa_type_recurse (struct type
*t
, struct type
**etp
)
3076 switch (TYPE_CODE (t
))
3080 return TYPE_LENGTH (*etp
) == TYPE_LENGTH (t
);
3087 case TYPE_CODE_ARRAY
:
3089 is_float_or_hfa_type_recurse (check_typedef (TYPE_TARGET_TYPE (t
)),
3092 case TYPE_CODE_STRUCT
:
3096 for (i
= 0; i
< TYPE_NFIELDS (t
); i
++)
3097 if (!is_float_or_hfa_type_recurse
3098 (check_typedef (TYPE_FIELD_TYPE (t
, i
)), etp
))
3109 /* Determine if the given type is one of the floating point types or
3110 and HFA (which is a struct, array, or combination thereof whose
3111 bottom-most elements are all of the same floating point type). */
3113 static struct type
*
3114 is_float_or_hfa_type (struct type
*t
)
3116 struct type
*et
= 0;
3118 return is_float_or_hfa_type_recurse (t
, &et
) ? et
: 0;
3122 /* Return 1 if the alignment of T is such that the next even slot
3123 should be used. Return 0, if the next available slot should
3124 be used. (See section 8.5.1 of the IA-64 Software Conventions
3125 and Runtime manual). */
3128 slot_alignment_is_next_even (struct type
*t
)
3130 switch (TYPE_CODE (t
))
3134 if (TYPE_LENGTH (t
) > 8)
3138 case TYPE_CODE_ARRAY
:
3140 slot_alignment_is_next_even (check_typedef (TYPE_TARGET_TYPE (t
)));
3141 case TYPE_CODE_STRUCT
:
3145 for (i
= 0; i
< TYPE_NFIELDS (t
); i
++)
3146 if (slot_alignment_is_next_even
3147 (check_typedef (TYPE_FIELD_TYPE (t
, i
))))
3156 /* Attempt to find (and return) the global pointer for the given
3159 This is a rather nasty bit of code searchs for the .dynamic section
3160 in the objfile corresponding to the pc of the function we're trying
3161 to call. Once it finds the addresses at which the .dynamic section
3162 lives in the child process, it scans the Elf64_Dyn entries for a
3163 DT_PLTGOT tag. If it finds one of these, the corresponding
3164 d_un.d_ptr value is the global pointer. */
3167 ia64_find_global_pointer (CORE_ADDR faddr
)
3169 struct obj_section
*faddr_sect
;
3171 faddr_sect
= find_pc_section (faddr
);
3172 if (faddr_sect
!= NULL
)
3174 struct obj_section
*osect
;
3176 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
3178 if (strcmp (osect
->the_bfd_section
->name
, ".dynamic") == 0)
3182 if (osect
< faddr_sect
->objfile
->sections_end
)
3187 while (addr
< osect
->endaddr
)
3193 status
= target_read_memory (addr
, buf
, sizeof (buf
));
3196 tag
= extract_signed_integer (buf
, sizeof (buf
));
3198 if (tag
== DT_PLTGOT
)
3200 CORE_ADDR global_pointer
;
3202 status
= target_read_memory (addr
+ 8, buf
, sizeof (buf
));
3205 global_pointer
= extract_unsigned_integer (buf
, sizeof (buf
));
3208 return global_pointer
;
3221 /* Given a function's address, attempt to find (and return) the
3222 corresponding (canonical) function descriptor. Return 0 if
3225 find_extant_func_descr (CORE_ADDR faddr
)
3227 struct obj_section
*faddr_sect
;
3229 /* Return early if faddr is already a function descriptor. */
3230 faddr_sect
= find_pc_section (faddr
);
3231 if (faddr_sect
&& strcmp (faddr_sect
->the_bfd_section
->name
, ".opd") == 0)
3234 if (faddr_sect
!= NULL
)
3236 struct obj_section
*osect
;
3237 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
3239 if (strcmp (osect
->the_bfd_section
->name
, ".opd") == 0)
3243 if (osect
< faddr_sect
->objfile
->sections_end
)
3248 while (addr
< osect
->endaddr
)
3254 status
= target_read_memory (addr
, buf
, sizeof (buf
));
3257 faddr2
= extract_signed_integer (buf
, sizeof (buf
));
3259 if (faddr
== faddr2
)
3269 /* Attempt to find a function descriptor corresponding to the
3270 given address. If none is found, construct one on the
3271 stack using the address at fdaptr. */
3274 find_func_descr (CORE_ADDR faddr
, CORE_ADDR
*fdaptr
)
3278 fdesc
= find_extant_func_descr (faddr
);
3282 CORE_ADDR global_pointer
;
3288 global_pointer
= ia64_find_global_pointer (faddr
);
3290 if (global_pointer
== 0)
3291 global_pointer
= read_register (IA64_GR1_REGNUM
);
3293 store_unsigned_integer (buf
, 8, faddr
);
3294 store_unsigned_integer (buf
+ 8, 8, global_pointer
);
3296 write_memory (fdesc
, buf
, 16);
3302 /* Use the following routine when printing out function pointers
3303 so the user can see the function address rather than just the
3304 function descriptor. */
3306 ia64_convert_from_func_ptr_addr (struct gdbarch
*gdbarch
, CORE_ADDR addr
,
3307 struct target_ops
*targ
)
3309 struct obj_section
*s
;
3311 s
= find_pc_section (addr
);
3313 /* check if ADDR points to a function descriptor. */
3314 if (s
&& strcmp (s
->the_bfd_section
->name
, ".opd") == 0)
3315 return read_memory_unsigned_integer (addr
, 8);
3317 /* There are also descriptors embedded in vtables. */
3320 struct minimal_symbol
*minsym
;
3322 minsym
= lookup_minimal_symbol_by_pc (addr
);
3324 if (minsym
&& is_vtable_name (SYMBOL_LINKAGE_NAME (minsym
)))
3325 return read_memory_unsigned_integer (addr
, 8);
3332 ia64_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
3338 ia64_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
3339 struct regcache
*regcache
, CORE_ADDR bp_addr
,
3340 int nargs
, struct value
**args
, CORE_ADDR sp
,
3341 int struct_return
, CORE_ADDR struct_addr
)
3347 int nslots
, rseslots
, memslots
, slotnum
, nfuncargs
;
3349 CORE_ADDR bsp
, cfm
, pfs
, new_bsp
, funcdescaddr
, pc
, global_pointer
;
3350 CORE_ADDR func_addr
= find_function_addr (function
, NULL
);
3354 /* Count the number of slots needed for the arguments. */
3355 for (argno
= 0; argno
< nargs
; argno
++)
3358 type
= check_typedef (value_type (arg
));
3359 len
= TYPE_LENGTH (type
);
3361 if ((nslots
& 1) && slot_alignment_is_next_even (type
))
3364 if (TYPE_CODE (type
) == TYPE_CODE_FUNC
)
3367 nslots
+= (len
+ 7) / 8;
3370 /* Divvy up the slots between the RSE and the memory stack. */
3371 rseslots
= (nslots
> 8) ? 8 : nslots
;
3372 memslots
= nslots
- rseslots
;
3374 /* Allocate a new RSE frame. */
3375 cfm
= read_register (IA64_CFM_REGNUM
);
3377 bsp
= read_register (IA64_BSP_REGNUM
);
3378 new_bsp
= rse_address_add (bsp
, rseslots
);
3379 write_register (IA64_BSP_REGNUM
, new_bsp
);
3381 pfs
= read_register (IA64_PFS_REGNUM
);
3382 pfs
&= 0xc000000000000000LL
;
3383 pfs
|= (cfm
& 0xffffffffffffLL
);
3384 write_register (IA64_PFS_REGNUM
, pfs
);
3386 cfm
&= 0xc000000000000000LL
;
3388 write_register (IA64_CFM_REGNUM
, cfm
);
3390 /* We will attempt to find function descriptors in the .opd segment,
3391 but if we can't we'll construct them ourselves. That being the
3392 case, we'll need to reserve space on the stack for them. */
3393 funcdescaddr
= sp
- nfuncargs
* 16;
3394 funcdescaddr
&= ~0xfLL
;
3396 /* Adjust the stack pointer to it's new value. The calling conventions
3397 require us to have 16 bytes of scratch, plus whatever space is
3398 necessary for the memory slots and our function descriptors. */
3399 sp
= sp
- 16 - (memslots
+ nfuncargs
) * 8;
3400 sp
&= ~0xfLL
; /* Maintain 16 byte alignment. */
3402 /* Place the arguments where they belong. The arguments will be
3403 either placed in the RSE backing store or on the memory stack.
3404 In addition, floating point arguments or HFAs are placed in
3405 floating point registers. */
3407 floatreg
= IA64_FR8_REGNUM
;
3408 for (argno
= 0; argno
< nargs
; argno
++)
3410 struct type
*float_elt_type
;
3413 type
= check_typedef (value_type (arg
));
3414 len
= TYPE_LENGTH (type
);
3416 /* Special handling for function parameters. */
3418 && TYPE_CODE (type
) == TYPE_CODE_PTR
3419 && TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_FUNC
)
3423 store_unsigned_integer (val_buf
, 8,
3424 find_func_descr (extract_unsigned_integer (value_contents (arg
), 8),
3426 if (slotnum
< rseslots
)
3427 write_memory (rse_address_add (bsp
, slotnum
), val_buf
, 8);
3429 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
3436 /* Skip odd slot if necessary... */
3437 if ((slotnum
& 1) && slot_alignment_is_next_even (type
))
3445 memset (val_buf
, 0, 8);
3446 memcpy (val_buf
, value_contents (arg
) + argoffset
, (len
> 8) ? 8 : len
);
3448 if (slotnum
< rseslots
)
3449 write_memory (rse_address_add (bsp
, slotnum
), val_buf
, 8);
3451 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
3458 /* Handle floating point types (including HFAs). */
3459 float_elt_type
= is_float_or_hfa_type (type
);
3460 if (float_elt_type
!= NULL
)
3463 len
= TYPE_LENGTH (type
);
3464 while (len
> 0 && floatreg
< IA64_FR16_REGNUM
)
3466 char to
[MAX_REGISTER_SIZE
];
3467 convert_typed_floating (value_contents (arg
) + argoffset
, float_elt_type
,
3468 to
, builtin_type_ia64_ext
);
3469 regcache_cooked_write (regcache
, floatreg
, (void *)to
);
3471 argoffset
+= TYPE_LENGTH (float_elt_type
);
3472 len
-= TYPE_LENGTH (float_elt_type
);
3477 /* Store the struct return value in r8 if necessary. */
3480 regcache_cooked_write_unsigned (regcache
, IA64_GR8_REGNUM
, (ULONGEST
)struct_addr
);
3483 global_pointer
= ia64_find_global_pointer (func_addr
);
3485 if (global_pointer
!= 0)
3486 write_register (IA64_GR1_REGNUM
, global_pointer
);
3488 write_register (IA64_BR0_REGNUM
, bp_addr
);
3490 write_register (sp_regnum
, sp
);
3495 static struct frame_id
3496 ia64_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
3501 frame_unwind_register (next_frame
, sp_regnum
, buf
);
3502 sp
= extract_unsigned_integer (buf
, 8);
3504 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
3505 bsp
= extract_unsigned_integer (buf
, 8);
3507 if (gdbarch_debug
>= 1)
3508 fprintf_unfiltered (gdb_stdlog
,
3509 "dummy frame id: code 0x%s, stack 0x%s, special 0x%s\n",
3510 paddr_nz (frame_pc_unwind (next_frame
)),
3511 paddr_nz (sp
), paddr_nz (bsp
));
3513 return frame_id_build_special (sp
, frame_pc_unwind (next_frame
), bsp
);
3517 ia64_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
3520 CORE_ADDR ip
, psr
, pc
;
3522 frame_unwind_register (next_frame
, IA64_IP_REGNUM
, buf
);
3523 ip
= extract_unsigned_integer (buf
, 8);
3524 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
3525 psr
= extract_unsigned_integer (buf
, 8);
3527 pc
= (ip
& ~0xf) | ((psr
>> 41) & 3);
3532 ia64_store_return_value (struct type
*type
, struct regcache
*regcache
,
3533 const gdb_byte
*valbuf
)
3535 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
3537 char to
[MAX_REGISTER_SIZE
];
3538 convert_typed_floating (valbuf
, type
, to
, builtin_type_ia64_ext
);
3539 regcache_cooked_write (regcache
, IA64_FR8_REGNUM
, (void *)to
);
3540 target_store_registers (IA64_FR8_REGNUM
);
3543 regcache_cooked_write (regcache
, IA64_GR8_REGNUM
, valbuf
);
3547 ia64_remote_translate_xfer_address (struct gdbarch
*gdbarch
,
3548 struct regcache
*regcache
,
3549 CORE_ADDR memaddr
, int nr_bytes
,
3550 CORE_ADDR
*targ_addr
, int *targ_len
)
3552 *targ_addr
= memaddr
;
3553 *targ_len
= nr_bytes
;
3557 ia64_print_insn (bfd_vma memaddr
, struct disassemble_info
*info
)
3559 info
->bytes_per_line
= SLOT_MULTIPLIER
;
3560 return print_insn_ia64 (memaddr
, info
);
3563 static struct gdbarch
*
3564 ia64_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
3566 struct gdbarch
*gdbarch
;
3567 struct gdbarch_tdep
*tdep
;
3569 /* If there is already a candidate, use it. */
3570 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
3572 return arches
->gdbarch
;
3574 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
3575 gdbarch
= gdbarch_alloc (&info
, tdep
);
3577 tdep
->sigcontext_register_address
= 0;
3579 /* Define the ia64 floating-point format to gdb. */
3580 builtin_type_ia64_ext
=
3581 init_type (TYPE_CODE_FLT
, 128 / 8,
3582 0, "builtin_type_ia64_ext", NULL
);
3583 TYPE_FLOATFORMAT (builtin_type_ia64_ext
) = floatformats_ia64_ext
;
3585 /* According to the ia64 specs, instructions that store long double
3586 floats in memory use a long-double format different than that
3587 used in the floating registers. The memory format matches the
3588 x86 extended float format which is 80 bits. An OS may choose to
3589 use this format (e.g. GNU/Linux) or choose to use a different
3590 format for storing long doubles (e.g. HPUX). In the latter case,
3591 the setting of the format may be moved/overridden in an
3592 OS-specific tdep file. */
3593 set_gdbarch_long_double_format (gdbarch
, floatformats_i387_ext
);
3595 set_gdbarch_short_bit (gdbarch
, 16);
3596 set_gdbarch_int_bit (gdbarch
, 32);
3597 set_gdbarch_long_bit (gdbarch
, 64);
3598 set_gdbarch_long_long_bit (gdbarch
, 64);
3599 set_gdbarch_float_bit (gdbarch
, 32);
3600 set_gdbarch_double_bit (gdbarch
, 64);
3601 set_gdbarch_long_double_bit (gdbarch
, 128);
3602 set_gdbarch_ptr_bit (gdbarch
, 64);
3604 set_gdbarch_num_regs (gdbarch
, NUM_IA64_RAW_REGS
);
3605 set_gdbarch_num_pseudo_regs (gdbarch
, LAST_PSEUDO_REGNUM
- FIRST_PSEUDO_REGNUM
);
3606 set_gdbarch_sp_regnum (gdbarch
, sp_regnum
);
3607 set_gdbarch_fp0_regnum (gdbarch
, IA64_FR0_REGNUM
);
3609 set_gdbarch_register_name (gdbarch
, ia64_register_name
);
3610 /* FIXME: Following interface should not be needed, however, without it recurse.exp
3611 gets a number of extra failures. */
3612 set_gdbarch_deprecated_register_size (gdbarch
, 8);
3613 set_gdbarch_register_type (gdbarch
, ia64_register_type
);
3615 set_gdbarch_pseudo_register_read (gdbarch
, ia64_pseudo_register_read
);
3616 set_gdbarch_pseudo_register_write (gdbarch
, ia64_pseudo_register_write
);
3617 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, ia64_dwarf_reg_to_regnum
);
3618 set_gdbarch_register_reggroup_p (gdbarch
, ia64_register_reggroup_p
);
3619 set_gdbarch_convert_register_p (gdbarch
, ia64_convert_register_p
);
3620 set_gdbarch_register_to_value (gdbarch
, ia64_register_to_value
);
3621 set_gdbarch_value_to_register (gdbarch
, ia64_value_to_register
);
3623 set_gdbarch_skip_prologue (gdbarch
, ia64_skip_prologue
);
3625 set_gdbarch_deprecated_use_struct_convention (gdbarch
, ia64_use_struct_convention
);
3626 set_gdbarch_extract_return_value (gdbarch
, ia64_extract_return_value
);
3628 set_gdbarch_store_return_value (gdbarch
, ia64_store_return_value
);
3629 set_gdbarch_deprecated_extract_struct_value_address (gdbarch
, ia64_extract_struct_value_address
);
3631 set_gdbarch_memory_insert_breakpoint (gdbarch
, ia64_memory_insert_breakpoint
);
3632 set_gdbarch_memory_remove_breakpoint (gdbarch
, ia64_memory_remove_breakpoint
);
3633 set_gdbarch_breakpoint_from_pc (gdbarch
, ia64_breakpoint_from_pc
);
3634 set_gdbarch_read_pc (gdbarch
, ia64_read_pc
);
3635 set_gdbarch_write_pc (gdbarch
, ia64_write_pc
);
3637 /* Settings for calling functions in the inferior. */
3638 set_gdbarch_push_dummy_call (gdbarch
, ia64_push_dummy_call
);
3639 set_gdbarch_frame_align (gdbarch
, ia64_frame_align
);
3640 set_gdbarch_unwind_dummy_id (gdbarch
, ia64_unwind_dummy_id
);
3642 set_gdbarch_unwind_pc (gdbarch
, ia64_unwind_pc
);
3643 #ifdef HAVE_LIBUNWIND_IA64_H
3644 frame_unwind_append_sniffer (gdbarch
, ia64_libunwind_sigtramp_frame_sniffer
);
3645 frame_unwind_append_sniffer (gdbarch
, ia64_libunwind_frame_sniffer
);
3646 libunwind_frame_set_descr (gdbarch
, &ia64_libunwind_descr
);
3648 frame_unwind_append_sniffer (gdbarch
, ia64_sigtramp_frame_sniffer
);
3650 frame_unwind_append_sniffer (gdbarch
, ia64_frame_sniffer
);
3651 frame_base_set_default (gdbarch
, &ia64_frame_base
);
3653 /* Settings that should be unnecessary. */
3654 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
3656 set_gdbarch_remote_translate_xfer_address (
3657 gdbarch
, ia64_remote_translate_xfer_address
);
3659 set_gdbarch_print_insn (gdbarch
, ia64_print_insn
);
3660 set_gdbarch_convert_from_func_ptr_addr (gdbarch
, ia64_convert_from_func_ptr_addr
);
3662 /* The virtual table contains 16-byte descriptors, not pointers to
3664 set_gdbarch_vtable_function_descriptors (gdbarch
, 1);
3666 /* Hook in ABI-specific overrides, if they have been registered. */
3667 gdbarch_init_osabi (info
, gdbarch
);
3672 extern initialize_file_ftype _initialize_ia64_tdep
; /* -Wmissing-prototypes */
3675 _initialize_ia64_tdep (void)
3677 gdbarch_register (bfd_arch_ia64
, ia64_gdbarch_init
, NULL
);