1 /* Target-dependent code for the IA-64 for GDB, the GNU debugger.
3 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
24 #include "symfile.h" /* for entry_point_address */
26 #include "arch-utils.h"
27 #include "floatformat.h"
30 #include "elf/common.h" /* for DT_PLTGOT value */
33 typedef enum instruction_type
35 A
, /* Integer ALU ; I-unit or M-unit */
36 I
, /* Non-ALU integer; I-unit */
37 M
, /* Memory ; M-unit */
38 F
, /* Floating-point ; F-unit */
39 B
, /* Branch ; B-unit */
40 L
, /* Extended (L+X) ; I-unit */
41 X
, /* Extended (L+X) ; I-unit */
42 undefined
/* undefined or reserved */
45 /* We represent IA-64 PC addresses as the value of the instruction
46 pointer or'd with some bit combination in the low nibble which
47 represents the slot number in the bundle addressed by the
48 instruction pointer. The problem is that the Linux kernel
49 multiplies its slot numbers (for exceptions) by one while the
50 disassembler multiplies its slot numbers by 6. In addition, I've
51 heard it said that the simulator uses 1 as the multiplier.
53 I've fixed the disassembler so that the bytes_per_line field will
54 be the slot multiplier. If bytes_per_line comes in as zero, it
55 is set to six (which is how it was set up initially). -- objdump
56 displays pretty disassembly dumps with this value. For our purposes,
57 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
58 never want to also display the raw bytes the way objdump does. */
60 #define SLOT_MULTIPLIER 1
62 /* Length in bytes of an instruction bundle */
66 extern void _initialize_ia64_tdep (void);
68 extern CORE_ADDR
ia64_linux_sigcontext_register_address (CORE_ADDR
, int);
70 static gdbarch_init_ftype ia64_gdbarch_init
;
72 static gdbarch_register_name_ftype ia64_register_name
;
73 static gdbarch_register_raw_size_ftype ia64_register_raw_size
;
74 static gdbarch_register_virtual_size_ftype ia64_register_virtual_size
;
75 static gdbarch_register_virtual_type_ftype ia64_register_virtual_type
;
76 static gdbarch_register_byte_ftype ia64_register_byte
;
77 static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc
;
78 static gdbarch_frame_chain_ftype ia64_frame_chain
;
79 static gdbarch_frame_saved_pc_ftype ia64_frame_saved_pc
;
80 static gdbarch_skip_prologue_ftype ia64_skip_prologue
;
81 static gdbarch_frame_init_saved_regs_ftype ia64_frame_init_saved_regs
;
82 static gdbarch_get_saved_register_ftype ia64_get_saved_register
;
83 static gdbarch_extract_return_value_ftype ia64_extract_return_value
;
84 static gdbarch_extract_struct_value_address_ftype ia64_extract_struct_value_address
;
85 static gdbarch_use_struct_convention_ftype ia64_use_struct_convention
;
86 static gdbarch_frameless_function_invocation_ftype ia64_frameless_function_invocation
;
87 static gdbarch_init_extra_frame_info_ftype ia64_init_extra_frame_info
;
88 static gdbarch_store_return_value_ftype ia64_store_return_value
;
89 static gdbarch_store_struct_return_ftype ia64_store_struct_return
;
90 static gdbarch_push_arguments_ftype ia64_push_arguments
;
91 static gdbarch_push_return_address_ftype ia64_push_return_address
;
92 static gdbarch_pop_frame_ftype ia64_pop_frame
;
93 static gdbarch_saved_pc_after_call_ftype ia64_saved_pc_after_call
;
94 static void ia64_pop_frame_regular (struct frame_info
*frame
);
95 static struct type
*is_float_or_hfa_type (struct type
*t
);
97 static int ia64_num_regs
= 590;
99 static int pc_regnum
= IA64_IP_REGNUM
;
100 static int sp_regnum
= IA64_GR12_REGNUM
;
101 static int fp_regnum
= IA64_VFP_REGNUM
;
102 static int lr_regnum
= IA64_VRAP_REGNUM
;
104 static LONGEST ia64_call_dummy_words
[] = {0};
106 /* Array of register names; There should be ia64_num_regs strings in
109 static char *ia64_register_names
[] =
110 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
111 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
112 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
113 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
114 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
115 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
116 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
117 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
118 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
119 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
120 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
121 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
122 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
123 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
124 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
125 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
127 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
128 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
129 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
130 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
131 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
132 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
133 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
134 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
135 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
136 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
137 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
138 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
139 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
140 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
141 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
142 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
144 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
145 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
146 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
147 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
148 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
149 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
150 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
151 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
153 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
157 "pr", "ip", "psr", "cfm",
159 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
160 "", "", "", "", "", "", "", "",
161 "rsc", "bsp", "bspstore", "rnat",
163 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
164 "ccv", "", "", "", "unat", "", "", "",
165 "fpsr", "", "", "", "itc",
166 "", "", "", "", "", "", "", "", "", "",
167 "", "", "", "", "", "", "", "", "",
169 "", "", "", "", "", "", "", "", "", "",
170 "", "", "", "", "", "", "", "", "", "",
171 "", "", "", "", "", "", "", "", "", "",
172 "", "", "", "", "", "", "", "", "", "",
173 "", "", "", "", "", "", "", "", "", "",
174 "", "", "", "", "", "", "", "", "", "",
176 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
177 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
178 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
179 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
180 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
181 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
182 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
183 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
184 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
185 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
186 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
187 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
188 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
189 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
190 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
191 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
194 struct frame_extra_info
196 CORE_ADDR bsp
; /* points at r32 for the current frame */
197 CORE_ADDR cfm
; /* cfm value for current frame */
198 int sof
; /* Size of frame (decoded from cfm value) */
199 int sol
; /* Size of locals (decoded from cfm value) */
200 CORE_ADDR after_prologue
;
201 /* Address of first instruction after the last
202 prologue instruction; Note that there may
203 be instructions from the function's body
204 intermingled with the prologue. */
205 int mem_stack_frame_size
;
206 /* Size of the memory stack frame (may be zero),
207 or -1 if it has not been determined yet. */
208 int fp_reg
; /* Register number (if any) used a frame pointer
209 for this frame. 0 if no register is being used
210 as the frame pointer. */
215 int os_ident
; /* From the ELF header, one of the ELFOSABI_
216 constants: ELFOSABI_LINUX, ELFOSABI_MONTEREY,
218 CORE_ADDR (*sigcontext_register_address
) (CORE_ADDR
, int);
219 /* OS specific function which, given a frame address
220 and register number, returns the offset to the
221 given register from the start of the frame. */
224 #define SIGCONTEXT_REGISTER_ADDRESS (gdbarch_tdep (current_gdbarch)->sigcontext_register_address)
227 ia64_register_name (int reg
)
229 return ia64_register_names
[reg
];
233 ia64_register_raw_size (int reg
)
235 return (IA64_FR0_REGNUM
<= reg
&& reg
<= IA64_FR127_REGNUM
) ? 16 : 8;
239 ia64_register_virtual_size (int reg
)
241 return (IA64_FR0_REGNUM
<= reg
&& reg
<= IA64_FR127_REGNUM
) ? 16 : 8;
244 /* Return true iff register N's virtual format is different from
247 ia64_register_convertible (int nr
)
249 return (IA64_FR0_REGNUM
<= nr
&& nr
<= IA64_FR127_REGNUM
);
252 const struct floatformat floatformat_ia64_ext
=
254 floatformat_little
, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
255 floatformat_intbit_yes
259 ia64_register_convert_to_virtual (int regnum
, struct type
*type
,
260 char *from
, char *to
)
262 if (regnum
>= IA64_FR0_REGNUM
&& regnum
<= IA64_FR127_REGNUM
)
265 floatformat_to_doublest (&floatformat_ia64_ext
, from
, &val
);
266 store_floating(to
, TYPE_LENGTH(type
), val
);
269 error("ia64_register_convert_to_virtual called with non floating point register number");
273 ia64_register_convert_to_raw (struct type
*type
, int regnum
,
274 char *from
, char *to
)
276 if (regnum
>= IA64_FR0_REGNUM
&& regnum
<= IA64_FR127_REGNUM
)
278 DOUBLEST val
= extract_floating (from
, TYPE_LENGTH(type
));
279 floatformat_from_doublest (&floatformat_ia64_ext
, &val
, to
);
282 error("ia64_register_convert_to_raw called with non floating point register number");
286 ia64_register_virtual_type (int reg
)
288 if (reg
>= IA64_FR0_REGNUM
&& reg
<= IA64_FR127_REGNUM
)
289 return builtin_type_long_double
;
291 return builtin_type_long
;
295 ia64_register_byte (int reg
)
298 (reg
<= IA64_FR0_REGNUM
? 0 : 8 * ((reg
> IA64_FR127_REGNUM
) ? 128 : reg
- IA64_FR0_REGNUM
));
301 /* Read the given register from a sigcontext structure in the
305 read_sigcontext_register (struct frame_info
*frame
, int regnum
)
310 internal_error ("read_sigcontext_register: NULL frame");
311 if (!frame
->signal_handler_caller
)
313 "read_sigcontext_register: frame not a signal_handler_caller");
314 if (SIGCONTEXT_REGISTER_ADDRESS
== 0)
316 "read_sigcontext_register: SIGCONTEXT_REGISTER_ADDRESS is 0");
318 regaddr
= SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, regnum
);
320 return read_memory_integer (regaddr
, REGISTER_RAW_SIZE (regnum
));
323 "read_sigcontext_register: Register %d not in struct sigcontext", regnum
);
326 /* Extract ``len'' bits from an instruction bundle starting at
330 extract_bit_field (char *bundle
, int from
, int len
)
332 long long result
= 0LL;
334 int from_byte
= from
/ 8;
335 int to_byte
= to
/ 8;
336 unsigned char *b
= (unsigned char *) bundle
;
342 if (from_byte
== to_byte
)
343 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
344 result
= c
>> (from
% 8);
345 lshift
= 8 - (from
% 8);
347 for (i
= from_byte
+1; i
< to_byte
; i
++)
349 result
|= ((long long) b
[i
]) << lshift
;
353 if (from_byte
< to_byte
&& (to
% 8 != 0))
356 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
357 result
|= ((long long) c
) << lshift
;
363 /* Replace the specified bits in an instruction bundle */
366 replace_bit_field (char *bundle
, long long val
, int from
, int len
)
369 int from_byte
= from
/ 8;
370 int to_byte
= to
/ 8;
371 unsigned char *b
= (unsigned char *) bundle
;
374 if (from_byte
== to_byte
)
376 unsigned char left
, right
;
378 left
= (c
>> (to
% 8)) << (to
% 8);
379 right
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
380 c
= (unsigned char) (val
& 0xff);
381 c
= (unsigned char) (c
<< (from
% 8 + 8 - to
% 8)) >> (8 - to
% 8);
389 c
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
390 c
= c
| (val
<< (from
% 8));
392 val
>>= 8 - from
% 8;
394 for (i
= from_byte
+1; i
< to_byte
; i
++)
403 unsigned char cv
= (unsigned char) val
;
405 c
= c
>> (to
% 8) << (to
% 8);
406 c
|= ((unsigned char) (cv
<< (8 - to
% 8))) >> (8 - to
% 8);
412 /* Return the contents of slot N (for N = 0, 1, or 2) in
413 and instruction bundle */
416 slotN_contents (unsigned char *bundle
, int slotnum
)
418 return extract_bit_field (bundle
, 5+41*slotnum
, 41);
421 /* Store an instruction in an instruction bundle */
424 replace_slotN_contents (unsigned char *bundle
, long long instr
, int slotnum
)
426 replace_bit_field (bundle
, instr
, 5+41*slotnum
, 41);
429 static enum instruction_type template_encoding_table
[32][3] =
431 { M
, I
, I
}, /* 00 */
432 { M
, I
, I
}, /* 01 */
433 { M
, I
, I
}, /* 02 */
434 { M
, I
, I
}, /* 03 */
435 { M
, L
, X
}, /* 04 */
436 { M
, L
, X
}, /* 05 */
437 { undefined
, undefined
, undefined
}, /* 06 */
438 { undefined
, undefined
, undefined
}, /* 07 */
439 { M
, M
, I
}, /* 08 */
440 { M
, M
, I
}, /* 09 */
441 { M
, M
, I
}, /* 0A */
442 { M
, M
, I
}, /* 0B */
443 { M
, F
, I
}, /* 0C */
444 { M
, F
, I
}, /* 0D */
445 { M
, M
, F
}, /* 0E */
446 { M
, M
, F
}, /* 0F */
447 { M
, I
, B
}, /* 10 */
448 { M
, I
, B
}, /* 11 */
449 { M
, B
, B
}, /* 12 */
450 { M
, B
, B
}, /* 13 */
451 { undefined
, undefined
, undefined
}, /* 14 */
452 { undefined
, undefined
, undefined
}, /* 15 */
453 { B
, B
, B
}, /* 16 */
454 { B
, B
, B
}, /* 17 */
455 { M
, M
, B
}, /* 18 */
456 { M
, M
, B
}, /* 19 */
457 { undefined
, undefined
, undefined
}, /* 1A */
458 { undefined
, undefined
, undefined
}, /* 1B */
459 { M
, F
, B
}, /* 1C */
460 { M
, F
, B
}, /* 1D */
461 { undefined
, undefined
, undefined
}, /* 1E */
462 { undefined
, undefined
, undefined
}, /* 1F */
465 /* Fetch and (partially) decode an instruction at ADDR and return the
466 address of the next instruction to fetch. */
469 fetch_instruction (CORE_ADDR addr
, instruction_type
*it
, long long *instr
)
471 char bundle
[BUNDLE_LEN
];
472 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
;
477 error("Can't fetch instructions for slot numbers greater than 2.");
481 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
486 *instr
= slotN_contents (bundle
, slotnum
);
487 template = extract_bit_field (bundle
, 0, 5);
488 *it
= template_encoding_table
[(int)template][slotnum
];
490 if (slotnum
== 2 || (slotnum
== 1 && *it
== L
))
493 addr
+= (slotnum
+ 1) * SLOT_MULTIPLIER
;
498 /* There are 5 different break instructions (break.i, break.b,
499 break.m, break.f, and break.x), but they all have the same
500 encoding. (The five bit template in the low five bits of the
501 instruction bundle distinguishes one from another.)
503 The runtime architecture manual specifies that break instructions
504 used for debugging purposes must have the upper two bits of the 21
505 bit immediate set to a 0 and a 1 respectively. A breakpoint
506 instruction encodes the most significant bit of its 21 bit
507 immediate at bit 36 of the 41 bit instruction. The penultimate msb
508 is at bit 25 which leads to the pattern below.
510 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
511 it turns out that 0x80000 was used as the syscall break in the early
512 simulators. So I changed the pattern slightly to do "break.i 0x080001"
513 instead. But that didn't work either (I later found out that this
514 pattern was used by the simulator that I was using.) So I ended up
515 using the pattern seen below. */
518 #define BREAKPOINT 0x00002000040LL
520 #define BREAKPOINT 0x00003333300LL
523 ia64_memory_insert_breakpoint (CORE_ADDR addr
, char *contents_cache
)
525 char bundle
[BUNDLE_LEN
];
526 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
;
531 error("Can't insert breakpoint for slot numbers greater than 2.");
535 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
536 instr
= slotN_contents (bundle
, slotnum
);
537 memcpy(contents_cache
, &instr
, sizeof(instr
));
538 replace_slotN_contents (bundle
, BREAKPOINT
, slotnum
);
540 target_write_memory (addr
, bundle
, BUNDLE_LEN
);
546 ia64_memory_remove_breakpoint (CORE_ADDR addr
, char *contents_cache
)
548 char bundle
[BUNDLE_LEN
];
549 int slotnum
= (addr
& 0x0f) / SLOT_MULTIPLIER
;
555 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
556 memcpy (&instr
, contents_cache
, sizeof instr
);
557 replace_slotN_contents (bundle
, instr
, slotnum
);
559 target_write_memory (addr
, bundle
, BUNDLE_LEN
);
564 /* We don't really want to use this, but remote.c needs to call it in order
565 to figure out if Z-packets are supported or not. Oh, well. */
567 ia64_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
569 static unsigned char breakpoint
[] =
570 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
571 *lenptr
= sizeof (breakpoint
);
579 ia64_read_pc (int pid
)
581 CORE_ADDR psr_value
= read_register_pid (IA64_PSR_REGNUM
, pid
);
582 CORE_ADDR pc_value
= read_register_pid (IA64_IP_REGNUM
, pid
);
583 int slot_num
= (psr_value
>> 41) & 3;
585 return pc_value
| (slot_num
* SLOT_MULTIPLIER
);
589 ia64_write_pc (CORE_ADDR new_pc
, int pid
)
591 int slot_num
= (int) (new_pc
& 0xf) / SLOT_MULTIPLIER
;
592 CORE_ADDR psr_value
= read_register_pid (IA64_PSR_REGNUM
, pid
);
593 psr_value
&= ~(3LL << 41);
594 psr_value
|= (CORE_ADDR
)(slot_num
& 0x3) << 41;
598 write_register_pid (IA64_PSR_REGNUM
, psr_value
, pid
);
599 write_register_pid (IA64_IP_REGNUM
, new_pc
, pid
);
602 #define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
604 /* Returns the address of the slot that's NSLOTS slots away from
605 the address ADDR. NSLOTS may be positive or negative. */
607 rse_address_add(CORE_ADDR addr
, int nslots
)
610 int mandatory_nat_slots
= nslots
/ 63;
611 int direction
= nslots
< 0 ? -1 : 1;
613 new_addr
= addr
+ 8 * (nslots
+ mandatory_nat_slots
);
615 if ((new_addr
>> 9) != ((addr
+ 8 * 64 * mandatory_nat_slots
) >> 9))
616 new_addr
+= 8 * direction
;
618 if (IS_NaT_COLLECTION_ADDR(new_addr
))
619 new_addr
+= 8 * direction
;
624 /* The IA-64 frame chain is a bit odd. We won't always have a frame
625 pointer, so we use the SP value as the FP for the purpose of
626 creating a frame. There is sometimes a register (not fixed) which
627 is used as a frame pointer. When this register exists, it is not
628 especially hard to determine which one is being used. It isn't
629 even really hard to compute the frame chain, but it can be
630 computationally expensive. So, instead of making life difficult
631 (and slow), we pick a more convenient representation of the frame
632 chain, knowing that we'll have to make some small adjustments
633 in other places. (E.g, note that read_fp() and write_fp() are
634 actually read_sp() and write_sp() below in ia64_gdbarch_init()
637 Okay, so what is the frame chain exactly? It'll be the SP value
638 at the time that the function in question was entered.
640 Note that this *should* actually the frame pointer for the current
641 function! But as I note above, if we were to attempt to find the
642 address of the beginning of the previous frame, we'd waste a lot
643 of cycles for no good reason. So instead, we simply choose to
644 represent the frame chain as the end of the previous frame instead
648 ia64_frame_chain (struct frame_info
*frame
)
650 if (frame
->signal_handler_caller
)
651 return read_sigcontext_register (frame
, sp_regnum
);
652 else if (PC_IN_CALL_DUMMY (frame
->pc
, frame
->frame
, frame
->frame
))
656 FRAME_INIT_SAVED_REGS (frame
);
657 if (frame
->saved_regs
[IA64_VFP_REGNUM
])
658 return read_memory_integer (frame
->saved_regs
[IA64_VFP_REGNUM
], 8);
660 return frame
->frame
+ frame
->extra_info
->mem_stack_frame_size
;
665 ia64_frame_saved_pc (struct frame_info
*frame
)
667 if (frame
->signal_handler_caller
)
668 return read_sigcontext_register (frame
, pc_regnum
);
669 else if (PC_IN_CALL_DUMMY (frame
->pc
, frame
->frame
, frame
->frame
))
670 return generic_read_register_dummy (frame
->pc
, frame
->frame
, pc_regnum
);
673 FRAME_INIT_SAVED_REGS (frame
);
675 if (frame
->saved_regs
[IA64_VRAP_REGNUM
])
676 return read_memory_integer (frame
->saved_regs
[IA64_VRAP_REGNUM
], 8);
677 else if (frame
->next
&& frame
->next
->signal_handler_caller
)
678 return read_sigcontext_register (frame
->next
, IA64_BR0_REGNUM
);
679 else /* either frameless, or not far enough along in the prologue... */
680 return ia64_saved_pc_after_call (frame
);
684 #define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
685 || (8 <= (_regnum_) && (_regnum_) <= 11) \
686 || (14 <= (_regnum_) && (_regnum_) <= 31))
687 #define imm9(_instr_) \
688 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
689 | (((_instr_) & 0x00008000000LL) >> 20) \
690 | (((_instr_) & 0x00000001fc0LL) >> 6))
693 examine_prologue (CORE_ADDR pc
, CORE_ADDR lim_pc
, struct frame_info
*frame
)
696 CORE_ADDR last_prologue_pc
= pc
;
699 int do_fsr_stuff
= 0;
704 int unat_save_reg
= 0;
706 int mem_stack_frame_size
= 0;
708 CORE_ADDR spill_addr
= 0;
712 memset (instores
, 0, sizeof instores
);
713 memset (infpstores
, 0, sizeof infpstores
);
715 if (frame
&& !frame
->saved_regs
)
717 frame_saved_regs_zalloc (frame
);
723 && frame
->extra_info
->after_prologue
!= 0
724 && frame
->extra_info
->after_prologue
<= lim_pc
)
725 return frame
->extra_info
->after_prologue
;
727 /* Must start with an alloc instruction */
728 next_pc
= fetch_instruction (pc
, &it
, &instr
);
729 if (pc
< lim_pc
&& next_pc
730 && it
== M
&& ((instr
& 0x1ee0000003fLL
) == 0x02c00000000LL
))
733 int sor
= (int) ((instr
& 0x00078000000LL
) >> 27);
734 int sol
= (int) ((instr
& 0x00007f00000LL
) >> 20);
735 int sof
= (int) ((instr
& 0x000000fe000LL
) >> 13);
736 /* Okay, so sor, sol, and sof aren't used right now; but perhaps
737 we could compare against the size given to us via the cfm as
738 either a sanity check or possibly to see if the frame has been
739 changed by a later alloc instruction... */
740 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
742 last_prologue_pc
= next_pc
;
746 pc
= lim_pc
; /* We're done early */
748 /* Loop, looking for prologue instructions, keeping track of
749 where preserved registers were spilled. */
752 next_pc
= fetch_instruction (pc
, &it
, &instr
);
756 if (it
== B
|| ((instr
& 0x3fLL
) != 0LL))
758 /* Exit loop upon hitting a branch instruction or a predicated
762 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00188000000LL
))
765 int b2
= (int) ((instr
& 0x0000000e000LL
) >> 13);
766 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
767 int qp
= (int) (instr
& 0x0000000003f);
769 if (qp
== 0 && b2
== 0 && rN
>= 32 && ret_reg
== 0)
772 last_prologue_pc
= next_pc
;
775 else if ((it
== I
|| it
== M
)
776 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
778 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
779 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
780 | ((instr
& 0x001f8000000LL
) >> 20)
781 | ((instr
& 0x000000fe000LL
) >> 13));
782 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
783 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
784 int qp
= (int) (instr
& 0x0000000003fLL
);
786 if (qp
== 0 && rN
>= 32 && imm
== 0 && rM
== 12 && fp_reg
== 0)
790 last_prologue_pc
= next_pc
;
792 else if (qp
== 0 && rN
== 12 && rM
== 12)
794 /* adds r12, -mem_stack_frame_size, r12 */
795 mem_stack_frame_size
-= imm
;
796 last_prologue_pc
= next_pc
;
798 else if (qp
== 0 && rN
== 2
799 && ((rM
== fp_reg
&& fp_reg
!= 0) || rM
== 12))
801 /* adds r2, spilloffset, rFramePointer
803 adds r2, spilloffset, r12
805 Get ready for stf.spill or st8.spill instructions.
806 The address to start spilling at is loaded into r2.
807 FIXME: Why r2? That's what gcc currently uses; it
808 could well be different for other compilers. */
810 /* Hmm... whether or not this will work will depend on
811 where the pc is. If it's still early in the prologue
812 this'll be wrong. FIXME */
813 spill_addr
= (frame
? frame
->frame
: 0)
814 + (rM
== 12 ? 0 : mem_stack_frame_size
)
817 last_prologue_pc
= next_pc
;
821 && ( ((instr
& 0x1efc0000000LL
) == 0x0eec0000000LL
)
822 || ((instr
& 0x1ffc8000000LL
) == 0x0cec0000000LL
) ))
824 /* stf.spill [rN] = fM, imm9
826 stf.spill [rN] = fM */
828 int imm
= imm9(instr
);
829 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
830 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
831 int qp
= (int) (instr
& 0x0000000003fLL
);
832 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
833 && ((2 <= fM
&& fM
<= 5) || (16 <= fM
&& fM
<= 31)))
836 frame
->saved_regs
[IA64_FR0_REGNUM
+ fM
] = spill_addr
;
838 if ((instr
& 0x1efc0000000) == 0x0eec0000000)
841 spill_addr
= 0; /* last one; must be done */
842 last_prologue_pc
= next_pc
;
845 else if ((it
== M
&& ((instr
& 0x1eff8000000LL
) == 0x02110000000LL
))
846 || (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00050000000LL
)) )
852 int arM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
853 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
854 int qp
= (int) (instr
& 0x0000000003fLL
);
855 if (qp
== 0 && isScratch (rN
) && arM
== 36 /* ar.unat */)
857 /* We have something like "mov.m r3 = ar.unat". Remember the
858 r3 (or whatever) and watch for a store of this register... */
860 last_prologue_pc
= next_pc
;
863 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00198000000LL
))
866 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
867 int qp
= (int) (instr
& 0x0000000003fLL
);
868 if (qp
== 0 && isScratch (rN
))
871 last_prologue_pc
= next_pc
;
875 && ( ((instr
& 0x1ffc8000000LL
) == 0x08cc0000000LL
)
876 || ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)))
880 st8 [rN] = rM, imm9 */
881 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
882 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
883 int qp
= (int) (instr
& 0x0000000003fLL
);
884 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
885 && (rM
== unat_save_reg
|| rM
== pr_save_reg
))
887 /* We've found a spill of either the UNAT register or the PR
888 register. (Well, not exactly; what we've actually found is
889 a spill of the register that UNAT or PR was moved to).
890 Record that fact and move on... */
891 if (rM
== unat_save_reg
)
893 /* Track UNAT register */
895 frame
->saved_regs
[IA64_UNAT_REGNUM
] = spill_addr
;
900 /* Track PR register */
902 frame
->saved_regs
[IA64_PR_REGNUM
] = spill_addr
;
905 if ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)
906 /* st8 [rN] = rM, imm9 */
907 spill_addr
+= imm9(instr
);
909 spill_addr
= 0; /* must be done spilling */
910 last_prologue_pc
= next_pc
;
912 else if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
914 /* Allow up to one store of each input register. */
916 last_prologue_pc
= next_pc
;
919 else if (it
== M
&& ((instr
& 0x1ff08000000LL
) == 0x08c00000000LL
))
926 Note that the st8 case is handled in the clause above.
928 Advance over stores of input registers. One store per input
929 register is permitted. */
930 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
931 int qp
= (int) (instr
& 0x0000000003fLL
);
932 if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
935 last_prologue_pc
= next_pc
;
938 else if (it
== M
&& ((instr
& 0x1ff88000000LL
) == 0x0cc80000000LL
))
945 Advance over stores of floating point input registers. Again
946 one store per register is permitted */
947 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
948 int qp
= (int) (instr
& 0x0000000003fLL
);
949 if (qp
== 0 && 8 <= fM
&& fM
< 16 && !infpstores
[fM
- 8])
951 infpstores
[fM
-8] = 1;
952 last_prologue_pc
= next_pc
;
956 && ( ((instr
& 0x1ffc8000000LL
) == 0x08ec0000000LL
)
957 || ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)))
959 /* st8.spill [rN] = rM
961 st8.spill [rN] = rM, imm9 */
962 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
963 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
964 int qp
= (int) (instr
& 0x0000000003fLL
);
965 if (qp
== 0 && rN
== spill_reg
&& 4 <= rM
&& rM
<= 7)
967 /* We've found a spill of one of the preserved general purpose
968 regs. Record the spill address and advance the spill
969 register if appropriate. */
971 frame
->saved_regs
[IA64_GR0_REGNUM
+ rM
] = spill_addr
;
972 if ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)
973 /* st8.spill [rN] = rM, imm9 */
974 spill_addr
+= imm9(instr
);
976 spill_addr
= 0; /* Done spilling */
977 last_prologue_pc
= next_pc
;
989 /* Extract the size of the rotating portion of the stack
990 frame and the register rename base from the current
992 sor
= ((frame
->extra_info
->cfm
>> 14) & 0xf) * 8;
993 rrb_gr
= (frame
->extra_info
->cfm
>> 18) & 0x7f;
995 for (i
= 0, addr
= frame
->extra_info
->bsp
;
996 i
< frame
->extra_info
->sof
;
999 if (IS_NaT_COLLECTION_ADDR (addr
))
1004 frame
->saved_regs
[IA64_GR32_REGNUM
+ ((i
+ (sor
- rrb_gr
)) % sor
)]
1007 frame
->saved_regs
[IA64_GR32_REGNUM
+ i
] = addr
;
1009 if (i
+32 == cfm_reg
)
1010 frame
->saved_regs
[IA64_CFM_REGNUM
] = addr
;
1011 if (i
+32 == ret_reg
)
1012 frame
->saved_regs
[IA64_VRAP_REGNUM
] = addr
;
1014 frame
->saved_regs
[IA64_VFP_REGNUM
] = addr
;
1018 if (frame
&& frame
->extra_info
) {
1019 frame
->extra_info
->after_prologue
= last_prologue_pc
;
1020 frame
->extra_info
->mem_stack_frame_size
= mem_stack_frame_size
;
1021 frame
->extra_info
->fp_reg
= fp_reg
;
1024 return last_prologue_pc
;
1028 ia64_skip_prologue (CORE_ADDR pc
)
1030 return examine_prologue (pc
, pc
+1024, 0);
1034 ia64_frame_init_saved_regs (struct frame_info
*frame
)
1036 if (frame
->saved_regs
)
1039 if (frame
->signal_handler_caller
&& SIGCONTEXT_REGISTER_ADDRESS
)
1043 frame_saved_regs_zalloc (frame
);
1045 frame
->saved_regs
[IA64_VRAP_REGNUM
] =
1046 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, IA64_IP_REGNUM
);
1047 frame
->saved_regs
[IA64_CFM_REGNUM
] =
1048 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, IA64_CFM_REGNUM
);
1049 frame
->saved_regs
[IA64_PSR_REGNUM
] =
1050 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, IA64_PSR_REGNUM
);
1052 frame
->saved_regs
[IA64_BSP_REGNUM
] =
1053 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, IA64_BSP_REGNUM
);
1055 frame
->saved_regs
[IA64_RNAT_REGNUM
] =
1056 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, IA64_RNAT_REGNUM
);
1057 frame
->saved_regs
[IA64_CCV_REGNUM
] =
1058 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, IA64_CCV_REGNUM
);
1059 frame
->saved_regs
[IA64_UNAT_REGNUM
] =
1060 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, IA64_UNAT_REGNUM
);
1061 frame
->saved_regs
[IA64_FPSR_REGNUM
] =
1062 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, IA64_FPSR_REGNUM
);
1063 frame
->saved_regs
[IA64_PFS_REGNUM
] =
1064 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, IA64_PFS_REGNUM
);
1065 frame
->saved_regs
[IA64_LC_REGNUM
] =
1066 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, IA64_LC_REGNUM
);
1067 for (regno
= IA64_GR1_REGNUM
; regno
<= IA64_GR31_REGNUM
; regno
++)
1068 if (regno
!= sp_regnum
)
1069 frame
->saved_regs
[regno
] =
1070 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, regno
);
1071 for (regno
= IA64_BR0_REGNUM
; regno
<= IA64_BR7_REGNUM
; regno
++)
1072 frame
->saved_regs
[regno
] =
1073 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, regno
);
1074 for (regno
= IA64_FR2_REGNUM
; regno
<= IA64_BR7_REGNUM
; regno
++)
1075 frame
->saved_regs
[regno
] =
1076 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, regno
);
1080 CORE_ADDR func_start
;
1082 func_start
= get_pc_function_start (frame
->pc
);
1083 examine_prologue (func_start
, frame
->pc
, frame
);
1088 ia64_get_saved_register (char *raw_buffer
,
1091 struct frame_info
*frame
,
1093 enum lval_type
*lval
)
1097 if (!target_has_registers
)
1098 error ("No registers.");
1100 if (optimized
!= NULL
)
1109 is_dummy_frame
= PC_IN_CALL_DUMMY (frame
->pc
, frame
->frame
, frame
->frame
);
1111 if (regnum
== SP_REGNUM
&& frame
->next
)
1113 /* Handle SP values for all frames but the topmost. */
1114 store_address (raw_buffer
, REGISTER_RAW_SIZE (regnum
), frame
->frame
);
1116 else if (regnum
== IA64_BSP_REGNUM
)
1118 store_address (raw_buffer
, REGISTER_RAW_SIZE (regnum
),
1119 frame
->extra_info
->bsp
);
1121 else if (regnum
== IA64_VFP_REGNUM
)
1123 /* If the function in question uses an automatic register (r32-r127)
1124 for the frame pointer, it'll be found by ia64_find_saved_register()
1125 above. If the function lacks one of these frame pointers, we can
1126 still provide a value since we know the size of the frame */
1127 CORE_ADDR vfp
= frame
->frame
+ frame
->extra_info
->mem_stack_frame_size
;
1128 store_address (raw_buffer
, REGISTER_RAW_SIZE (IA64_VFP_REGNUM
), vfp
);
1130 else if (IA64_PR0_REGNUM
<= regnum
&& regnum
<= IA64_PR63_REGNUM
)
1132 char pr_raw_buffer
[MAX_REGISTER_RAW_SIZE
];
1134 enum lval_type pr_lval
;
1137 ia64_get_saved_register (pr_raw_buffer
, &pr_optim
, &pr_addr
,
1138 frame
, IA64_PR_REGNUM
, &pr_lval
);
1139 if (IA64_PR16_REGNUM
<= regnum
&& regnum
<= IA64_PR63_REGNUM
)
1141 /* Fetch predicate register rename base from current frame
1142 marker for this frame. */
1143 int rrb_pr
= (frame
->extra_info
->cfm
>> 32) & 0x3f;
1145 /* Adjust the register number to account for register rotation. */
1146 regnum
= IA64_PR16_REGNUM
1147 + ((regnum
- IA64_PR16_REGNUM
) + rrb_pr
) % 48;
1149 prN_val
= extract_bit_field ((unsigned char *) pr_raw_buffer
,
1150 regnum
- IA64_PR0_REGNUM
, 1);
1151 store_unsigned_integer (raw_buffer
, REGISTER_RAW_SIZE (regnum
), prN_val
);
1153 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
1155 char unat_raw_buffer
[MAX_REGISTER_RAW_SIZE
];
1157 enum lval_type unat_lval
;
1158 CORE_ADDR unat_addr
;
1160 ia64_get_saved_register (unat_raw_buffer
, &unat_optim
, &unat_addr
,
1161 frame
, IA64_UNAT_REGNUM
, &unat_lval
);
1162 unatN_val
= extract_bit_field ((unsigned char *) unat_raw_buffer
,
1163 regnum
- IA64_NAT0_REGNUM
, 1);
1164 store_unsigned_integer (raw_buffer
, REGISTER_RAW_SIZE (regnum
),
1167 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
1170 /* Find address of general register corresponding to nat bit we're
1172 CORE_ADDR gr_addr
= 0;
1174 if (!is_dummy_frame
)
1176 FRAME_INIT_SAVED_REGS (frame
);
1177 gr_addr
= frame
->saved_regs
[ regnum
- IA64_NAT0_REGNUM
1182 /* Compute address of nat collection bits */
1183 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
1184 CORE_ADDR bsp
= read_register (IA64_BSP_REGNUM
);
1185 CORE_ADDR nat_collection
;
1187 /* If our nat collection address is bigger than bsp, we have to get
1188 the nat collection from rnat. Otherwise, we fetch the nat
1189 collection from the computed address. */
1190 if (nat_addr
>= bsp
)
1191 nat_collection
= read_register (IA64_RNAT_REGNUM
);
1193 nat_collection
= read_memory_integer (nat_addr
, 8);
1194 nat_bit
= (gr_addr
>> 3) & 0x3f;
1195 natval
= (nat_collection
>> nat_bit
) & 1;
1197 store_unsigned_integer (raw_buffer
, REGISTER_RAW_SIZE (regnum
), natval
);
1199 else if (regnum
== IA64_IP_REGNUM
)
1204 /* FIXME: Set *addrp, *lval when possible. */
1205 pc
= ia64_frame_saved_pc (frame
->next
);
1211 store_address (raw_buffer
, REGISTER_RAW_SIZE (IA64_IP_REGNUM
), pc
);
1213 else if (IA64_GR32_REGNUM
<= regnum
&& regnum
<= IA64_GR127_REGNUM
)
1216 if (!is_dummy_frame
)
1218 FRAME_INIT_SAVED_REGS (frame
);
1219 addr
= frame
->saved_regs
[regnum
];
1225 *lval
= lval_memory
;
1228 read_memory (addr
, raw_buffer
, REGISTER_RAW_SIZE (regnum
));
1232 /* r32 - r127 must be fetchable via memory. If they aren't,
1233 then the register is unavailable */
1234 memset (raw_buffer
, 0, REGISTER_RAW_SIZE (regnum
));
1239 if (IA64_FR32_REGNUM
<= regnum
&& regnum
<= IA64_FR127_REGNUM
)
1241 /* Fetch floating point register rename base from current
1242 frame marker for this frame. */
1243 int rrb_fr
= (frame
->extra_info
->cfm
>> 25) & 0x7f;
1245 /* Adjust the floating point register number to account for
1246 register rotation. */
1247 regnum
= IA64_FR32_REGNUM
1248 + ((regnum
- IA64_FR32_REGNUM
) + rrb_fr
) % 96;
1251 generic_get_saved_register (raw_buffer
, optimized
, addrp
, frame
,
1256 /* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
1257 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
1258 and TYPE is the type (which is known to be struct, union or array). */
1260 ia64_use_struct_convention (int gcc_p
, struct type
*type
)
1262 struct type
*float_elt_type
;
1264 /* HFAs are structures (or arrays) consisting entirely of floating
1265 point values of the same length. Up to 8 of these are returned
1266 in registers. Don't use the struct convention when this is the
1268 float_elt_type
= is_float_or_hfa_type (type
);
1269 if (float_elt_type
!= NULL
1270 && TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
) <= 8)
1273 /* Other structs of length 32 or less are returned in r8-r11.
1274 Don't use the struct convention for those either. */
1275 return TYPE_LENGTH (type
) > 32;
1279 ia64_extract_return_value (struct type
*type
, char *regbuf
, char *valbuf
)
1281 struct type
*float_elt_type
;
1283 float_elt_type
= is_float_or_hfa_type (type
);
1284 if (float_elt_type
!= NULL
)
1287 int regnum
= IA64_FR8_REGNUM
;
1288 int n
= TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
);
1292 ia64_register_convert_to_virtual (regnum
, float_elt_type
,
1293 ®buf
[REGISTER_BYTE (regnum
)], valbuf
+ offset
);
1294 offset
+= TYPE_LENGTH (float_elt_type
);
1299 memcpy (valbuf
, ®buf
[REGISTER_BYTE (IA64_GR8_REGNUM
)],
1300 TYPE_LENGTH (type
));
1303 /* FIXME: Turn this into a stack of some sort. Unfortunately, something
1304 like this is necessary though since the IA-64 calling conventions specify
1305 that r8 is not preserved. */
1306 static CORE_ADDR struct_return_address
;
1309 ia64_extract_struct_value_address (char *regbuf
)
1311 /* FIXME: See above. */
1312 return struct_return_address
;
1316 ia64_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
1318 /* FIXME: See above. */
1319 /* Note that most of the work was done in ia64_push_arguments() */
1320 struct_return_address
= addr
;
1324 ia64_frameless_function_invocation (struct frame_info
*frame
)
1326 /* FIXME: Implement */
1331 ia64_saved_pc_after_call (struct frame_info
*frame
)
1333 return read_register (IA64_BR0_REGNUM
);
1337 ia64_frame_args_address (struct frame_info
*frame
)
1339 /* frame->frame points at the SP for this frame; But we want the start
1340 of the frame, not the end. Calling frame chain will get his for us. */
1341 return ia64_frame_chain (frame
);
1345 ia64_frame_locals_address (struct frame_info
*frame
)
1347 /* frame->frame points at the SP for this frame; But we want the start
1348 of the frame, not the end. Calling frame chain will get his for us. */
1349 return ia64_frame_chain (frame
);
1353 ia64_init_extra_frame_info (int fromleaf
, struct frame_info
*frame
)
1356 int next_frame_is_call_dummy
= ((frame
->next
!= NULL
)
1357 && PC_IN_CALL_DUMMY (frame
->next
->pc
, frame
->next
->frame
,
1358 frame
->next
->frame
));
1360 frame
->extra_info
= (struct frame_extra_info
*)
1361 frame_obstack_alloc (sizeof (struct frame_extra_info
));
1363 if (frame
->next
== 0)
1365 bsp
= read_register (IA64_BSP_REGNUM
);
1366 cfm
= read_register (IA64_CFM_REGNUM
);
1369 else if (frame
->next
->signal_handler_caller
)
1371 bsp
= read_sigcontext_register (frame
->next
, IA64_BSP_REGNUM
);
1372 cfm
= read_sigcontext_register (frame
->next
, IA64_CFM_REGNUM
);
1374 else if (next_frame_is_call_dummy
)
1376 bsp
= generic_read_register_dummy (frame
->next
->pc
, frame
->next
->frame
,
1378 cfm
= generic_read_register_dummy (frame
->next
->pc
, frame
->next
->frame
,
1383 struct frame_info
*frn
= frame
->next
;
1385 FRAME_INIT_SAVED_REGS (frn
);
1387 if (frn
->saved_regs
[IA64_CFM_REGNUM
] != 0)
1388 cfm
= read_memory_integer (frn
->saved_regs
[IA64_CFM_REGNUM
], 8);
1389 else if (frn
->next
&& frn
->next
->signal_handler_caller
)
1390 cfm
= read_sigcontext_register (frn
->next
, IA64_PFS_REGNUM
);
1392 && PC_IN_CALL_DUMMY (frn
->next
->pc
, frn
->next
->frame
,
1394 cfm
= generic_read_register_dummy (frn
->next
->pc
, frn
->next
->frame
,
1397 cfm
= read_register (IA64_PFS_REGNUM
);
1399 bsp
= frn
->extra_info
->bsp
;
1401 frame
->extra_info
->cfm
= cfm
;
1402 frame
->extra_info
->sof
= cfm
& 0x7f;
1403 frame
->extra_info
->sol
= (cfm
>> 7) & 0x7f;
1404 if (frame
->next
== 0
1405 || frame
->next
->signal_handler_caller
1406 || next_frame_is_call_dummy
)
1407 frame
->extra_info
->bsp
= rse_address_add (bsp
, -frame
->extra_info
->sof
);
1409 frame
->extra_info
->bsp
= rse_address_add (bsp
, -frame
->extra_info
->sol
);
1411 frame
->extra_info
->after_prologue
= 0;
1412 frame
->extra_info
->mem_stack_frame_size
= -1; /* Not yet determined */
1413 frame
->extra_info
->fp_reg
= 0;
1417 is_float_or_hfa_type_recurse (struct type
*t
, struct type
**etp
)
1419 switch (TYPE_CODE (t
))
1423 return TYPE_LENGTH (*etp
) == TYPE_LENGTH (t
);
1430 case TYPE_CODE_ARRAY
:
1431 return is_float_or_hfa_type_recurse (TYPE_TARGET_TYPE (t
), etp
);
1433 case TYPE_CODE_STRUCT
:
1437 for (i
= 0; i
< TYPE_NFIELDS (t
); i
++)
1438 if (!is_float_or_hfa_type_recurse (TYPE_FIELD_TYPE (t
, i
), etp
))
1449 /* Determine if the given type is one of the floating point types or
1450 and HFA (which is a struct, array, or combination thereof whose
1451 bottom-most elements are all of the same floating point type.) */
1453 static struct type
*
1454 is_float_or_hfa_type (struct type
*t
)
1456 struct type
*et
= 0;
1458 return is_float_or_hfa_type_recurse (t
, &et
) ? et
: 0;
1462 /* Attempt to find (and return) the global pointer for the given
1465 This is a rather nasty bit of code searchs for the .dynamic section
1466 in the objfile corresponding to the pc of the function we're trying
1467 to call. Once it finds the addresses at which the .dynamic section
1468 lives in the child process, it scans the Elf64_Dyn entries for a
1469 DT_PLTGOT tag. If it finds one of these, the corresponding
1470 d_un.d_ptr value is the global pointer. */
1473 find_global_pointer (CORE_ADDR faddr
)
1475 struct obj_section
*faddr_sect
;
1477 faddr_sect
= find_pc_section (faddr
);
1478 if (faddr_sect
!= NULL
)
1480 struct obj_section
*osect
;
1482 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
1484 if (strcmp (osect
->the_bfd_section
->name
, ".dynamic") == 0)
1488 if (osect
< faddr_sect
->objfile
->sections_end
)
1493 while (addr
< osect
->endaddr
)
1499 status
= target_read_memory (addr
, buf
, sizeof (buf
));
1502 tag
= extract_signed_integer (buf
, sizeof (buf
));
1504 if (tag
== DT_PLTGOT
)
1506 CORE_ADDR global_pointer
;
1508 status
= target_read_memory (addr
+ 8, buf
, sizeof (buf
));
1511 global_pointer
= extract_address (buf
, sizeof (buf
));
1514 return global_pointer
;
1527 /* Given a function's address, attempt to find (and return) the
1528 corresponding (canonical) function descriptor. Return 0 if
1531 find_extant_func_descr (CORE_ADDR faddr
)
1533 struct obj_section
*faddr_sect
;
1535 /* Return early if faddr is already a function descriptor */
1536 faddr_sect
= find_pc_section (faddr
);
1537 if (faddr_sect
&& strcmp (faddr_sect
->the_bfd_section
->name
, ".opd") == 0)
1540 if (faddr_sect
!= NULL
)
1542 struct obj_section
*osect
;
1543 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
1545 if (strcmp (osect
->the_bfd_section
->name
, ".opd") == 0)
1549 if (osect
< faddr_sect
->objfile
->sections_end
)
1554 while (addr
< osect
->endaddr
)
1560 status
= target_read_memory (addr
, buf
, sizeof (buf
));
1563 faddr2
= extract_signed_integer (buf
, sizeof (buf
));
1565 if (faddr
== faddr2
)
1575 /* Attempt to find a function descriptor corresponding to the
1576 given address. If none is found, construct one on the
1577 stack using the address at fdaptr */
1580 find_func_descr (CORE_ADDR faddr
, CORE_ADDR
*fdaptr
)
1584 fdesc
= find_extant_func_descr (faddr
);
1588 CORE_ADDR global_pointer
;
1594 global_pointer
= find_global_pointer (faddr
);
1596 if (global_pointer
== 0)
1597 global_pointer
= read_register (IA64_GR1_REGNUM
);
1599 store_address (buf
, 8, faddr
);
1600 store_address (buf
+ 8, 8, global_pointer
);
1602 write_memory (fdesc
, buf
, 16);
1609 ia64_push_arguments (int nargs
, value_ptr
*args
, CORE_ADDR sp
,
1610 int struct_return
, CORE_ADDR struct_addr
)
1616 int nslots
, rseslots
, memslots
, slotnum
, nfuncargs
;
1618 CORE_ADDR bsp
, cfm
, pfs
, new_bsp
, funcdescaddr
;
1622 /* Count the number of slots needed for the arguments */
1623 for (argno
= 0; argno
< nargs
; argno
++)
1626 type
= check_typedef (VALUE_TYPE (arg
));
1627 len
= TYPE_LENGTH (type
);
1629 /* FIXME: This is crude and it is wrong (IMO), but it matches
1630 what gcc does, I think. */
1631 if (len
> 8 && (nslots
& 1))
1634 if (TYPE_CODE (type
) == TYPE_CODE_FUNC
)
1637 nslots
+= (len
+ 7) / 8;
1640 /* Divvy up the slots between the RSE and the memory stack */
1641 rseslots
= (nslots
> 8) ? 8 : nslots
;
1642 memslots
= nslots
- rseslots
;
1644 /* Allocate a new RSE frame */
1645 cfm
= read_register (IA64_CFM_REGNUM
);
1647 bsp
= read_register (IA64_BSP_REGNUM
);
1648 bsp
= rse_address_add (bsp
, cfm
& 0x7f);
1649 new_bsp
= rse_address_add (bsp
, rseslots
);
1650 write_register (IA64_BSP_REGNUM
, new_bsp
);
1652 pfs
= read_register (IA64_PFS_REGNUM
);
1653 pfs
&= 0xc000000000000000LL
;
1654 pfs
|= (cfm
& 0xffffffffffffLL
);
1655 write_register (IA64_PFS_REGNUM
, pfs
);
1657 cfm
&= 0xc000000000000000LL
;
1659 write_register (IA64_CFM_REGNUM
, cfm
);
1661 /* We will attempt to find function descriptors in the .opd segment,
1662 but if we can't we'll construct them ourselves. That being the
1663 case, we'll need to reserve space on the stack for them. */
1664 funcdescaddr
= sp
- nfuncargs
* 16;
1665 funcdescaddr
&= ~0xfLL
;
1667 /* Adjust the stack pointer to it's new value. The calling conventions
1668 require us to have 16 bytes of scratch, plus whatever space is
1669 necessary for the memory slots and our function descriptors */
1670 sp
= sp
- 16 - (memslots
+ nfuncargs
) * 8;
1671 sp
&= ~0xfLL
; /* Maintain 16 byte alignment */
1673 /* Place the arguments where they belong. The arguments will be
1674 either placed in the RSE backing store or on the memory stack.
1675 In addition, floating point arguments or HFAs are placed in
1676 floating point registers. */
1678 floatreg
= IA64_FR8_REGNUM
;
1679 for (argno
= 0; argno
< nargs
; argno
++)
1681 struct type
*float_elt_type
;
1684 type
= check_typedef (VALUE_TYPE (arg
));
1685 len
= TYPE_LENGTH (type
);
1687 /* Special handling for function parameters */
1689 && TYPE_CODE (type
) == TYPE_CODE_PTR
1690 && TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_FUNC
)
1694 store_address (val_buf
, 8,
1695 find_func_descr (extract_address (VALUE_CONTENTS (arg
), 8),
1697 if (slotnum
< rseslots
)
1698 write_memory (rse_address_add (bsp
, slotnum
), val_buf
, 8);
1700 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
1706 if (len
> 8 && (slotnum
& 1))
1713 memset (val_buf
, 0, 8);
1714 memcpy (val_buf
, VALUE_CONTENTS (arg
) + argoffset
, (len
> 8) ? 8 : len
);
1716 if (slotnum
< rseslots
)
1717 write_memory (rse_address_add (bsp
, slotnum
), val_buf
, 8);
1719 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
1726 /* Handle floating point types (including HFAs) */
1727 float_elt_type
= is_float_or_hfa_type (type
);
1728 if (float_elt_type
!= NULL
)
1731 len
= TYPE_LENGTH (type
);
1732 while (len
> 0 && floatreg
< IA64_FR16_REGNUM
)
1734 ia64_register_convert_to_raw (
1737 VALUE_CONTENTS (arg
) + argoffset
,
1738 ®isters
[REGISTER_BYTE (floatreg
)]);
1740 argoffset
+= TYPE_LENGTH (float_elt_type
);
1741 len
-= TYPE_LENGTH (float_elt_type
);
1746 /* Store the struct return value in r8 if necessary. */
1749 store_address (®isters
[REGISTER_BYTE (IA64_GR8_REGNUM
)],
1750 REGISTER_RAW_SIZE (IA64_GR8_REGNUM
),
1754 /* Sync gdb's idea of what the registers are with the target. */
1755 target_store_registers (-1);
1757 /* FIXME: This doesn't belong here! Instead, SAVE_DUMMY_FRAME_TOS needs
1758 to be defined to call generic_save_dummy_frame_tos(). But at the
1759 time of this writing, SAVE_DUMMY_FRAME_TOS wasn't gdbarch'd, so
1760 I chose to put this call here instead of using the old mechanisms.
1761 Once SAVE_DUMMY_FRAME_TOS is gdbarch'd, all we need to do is add the
1764 set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
1766 to ia64_gdbarch_init() and remove the line below. */
1767 generic_save_dummy_frame_tos (sp
);
1773 ia64_push_return_address (CORE_ADDR pc
, CORE_ADDR sp
)
1775 CORE_ADDR global_pointer
= find_global_pointer (pc
);
1777 if (global_pointer
!= 0)
1778 write_register (IA64_GR1_REGNUM
, global_pointer
);
1780 write_register (IA64_BR0_REGNUM
, CALL_DUMMY_ADDRESS ());
1785 ia64_store_return_value (struct type
*type
, char *valbuf
)
1787 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1789 ia64_register_convert_to_raw (type
, IA64_FR8_REGNUM
, valbuf
,
1790 ®isters
[REGISTER_BYTE (IA64_FR8_REGNUM
)]);
1791 target_store_registers (IA64_FR8_REGNUM
);
1794 write_register_bytes (REGISTER_BYTE (IA64_GR8_REGNUM
),
1795 valbuf
, TYPE_LENGTH (type
));
1799 ia64_pop_frame (void)
1801 generic_pop_current_frame (ia64_pop_frame_regular
);
1805 ia64_pop_frame_regular (struct frame_info
*frame
)
1808 CORE_ADDR bsp
, cfm
, pfs
;
1810 FRAME_INIT_SAVED_REGS (frame
);
1812 for (regno
= 0; regno
< ia64_num_regs
; regno
++)
1814 if (frame
->saved_regs
[regno
]
1815 && (!(IA64_GR32_REGNUM
<= regno
&& regno
<= IA64_GR127_REGNUM
))
1816 && regno
!= pc_regnum
1817 && regno
!= sp_regnum
1818 && regno
!= IA64_PFS_REGNUM
1819 && regno
!= IA64_CFM_REGNUM
1820 && regno
!= IA64_BSP_REGNUM
1821 && regno
!= IA64_BSPSTORE_REGNUM
)
1823 write_register (regno
,
1824 read_memory_integer (frame
->saved_regs
[regno
],
1825 REGISTER_RAW_SIZE (regno
)));
1829 write_register (sp_regnum
, FRAME_CHAIN (frame
));
1830 write_pc (FRAME_SAVED_PC (frame
));
1832 cfm
= read_register (IA64_CFM_REGNUM
);
1834 if (frame
->saved_regs
[IA64_PFS_REGNUM
])
1836 pfs
= read_memory_integer (frame
->saved_regs
[IA64_PFS_REGNUM
],
1837 REGISTER_RAW_SIZE (IA64_PFS_REGNUM
));
1840 pfs
= read_register (IA64_PFS_REGNUM
);
1842 /* Compute the new bsp by *adding* the difference between the
1843 size of the frame and the size of the locals (both wrt the
1844 frame that we're going back to). This seems kind of strange,
1845 especially since it seems like we ought to be subtracting the
1846 size of the locals... and we should; but the linux kernel
1847 wants bsp to be set at the end of all used registers. It's
1848 likely that this code will need to be revised to accomodate
1849 other operating systems. */
1850 bsp
= rse_address_add (frame
->extra_info
->bsp
,
1851 (pfs
& 0x7f) - ((pfs
>> 7) & 0x7f));
1852 write_register (IA64_BSP_REGNUM
, bsp
);
1854 /* FIXME: What becomes of the epilog count in the PFS? */
1855 cfm
= (cfm
& ~0xffffffffffffLL
) | (pfs
& 0xffffffffffffLL
);
1856 write_register (IA64_CFM_REGNUM
, cfm
);
1858 flush_cached_frames ();
1862 ia64_remote_translate_xfer_address (CORE_ADDR memaddr
, int nr_bytes
,
1863 CORE_ADDR
*targ_addr
, int *targ_len
)
1865 *targ_addr
= memaddr
;
1866 *targ_len
= nr_bytes
;
1870 process_note_abi_tag_sections (bfd
*abfd
, asection
*sect
, void *obj
)
1872 int *os_ident_ptr
= obj
;
1874 unsigned int sectsize
;
1876 name
= bfd_get_section_name (abfd
, sect
);
1877 sectsize
= bfd_section_size (abfd
, sect
);
1878 if (strcmp (name
, ".note.ABI-tag") == 0 && sectsize
> 0)
1880 unsigned int name_length
, data_length
, note_type
;
1881 char *note
= alloca (sectsize
);
1883 bfd_get_section_contents (abfd
, sect
, note
,
1884 (file_ptr
) 0, (bfd_size_type
) sectsize
);
1886 name_length
= bfd_h_get_32 (abfd
, note
);
1887 data_length
= bfd_h_get_32 (abfd
, note
+ 4);
1888 note_type
= bfd_h_get_32 (abfd
, note
+ 8);
1890 if (name_length
== 4 && data_length
== 16 && note_type
== 1
1891 && strcmp (note
+ 12, "GNU") == 0)
1893 int os_number
= bfd_h_get_32 (abfd
, note
+ 16);
1895 /* The case numbers are from abi-tags in glibc */
1899 *os_ident_ptr
= ELFOSABI_LINUX
;
1901 #if 0 /* FIXME: Enable after internal repository is synced with sourceware */
1903 *os_ident_ptr
= ELFOSABI_HURD
;
1906 *os_ident_ptr
= ELFOSABI_SOLARIS
;
1911 "process_note_abi_sections: unknown OS number %d", os_number
);
1918 static struct gdbarch
*
1919 ia64_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1921 struct gdbarch
*gdbarch
;
1922 struct gdbarch_tdep
*tdep
;
1925 if (info
.abfd
!= NULL
1926 && bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
)
1928 os_ident
= elf_elfheader (info
.abfd
)->e_ident
[EI_OSABI
];
1930 /* If os_ident is 0, it is not necessarily the case that we're on a
1931 SYSV system. (ELFOSABI_NONE is defined to be 0.) GNU/Linux uses
1932 a note section to record OS/ABI info, but leaves e_ident[EI_OSABI]
1933 zero. So we have to check for note sections too. */
1936 bfd_map_over_sections (info
.abfd
,
1937 process_note_abi_tag_sections
,
1944 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1946 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
1948 if (gdbarch_tdep (current_gdbarch
)->os_ident
!= os_ident
)
1950 return arches
->gdbarch
;
1953 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
1954 gdbarch
= gdbarch_alloc (&info
, tdep
);
1955 tdep
->os_ident
= os_ident
;
1957 if (os_ident
== ELFOSABI_LINUX
)
1958 tdep
->sigcontext_register_address
= ia64_linux_sigcontext_register_address
;
1960 tdep
->sigcontext_register_address
= 0;
1962 set_gdbarch_short_bit (gdbarch
, 16);
1963 set_gdbarch_int_bit (gdbarch
, 32);
1964 set_gdbarch_long_bit (gdbarch
, 64);
1965 set_gdbarch_long_long_bit (gdbarch
, 64);
1966 set_gdbarch_float_bit (gdbarch
, 32);
1967 set_gdbarch_double_bit (gdbarch
, 64);
1968 set_gdbarch_long_double_bit (gdbarch
, 64);
1969 set_gdbarch_ptr_bit (gdbarch
, 64);
1971 set_gdbarch_num_regs (gdbarch
, ia64_num_regs
);
1972 set_gdbarch_sp_regnum (gdbarch
, sp_regnum
);
1973 set_gdbarch_fp_regnum (gdbarch
, fp_regnum
);
1974 set_gdbarch_pc_regnum (gdbarch
, pc_regnum
);
1976 set_gdbarch_register_name (gdbarch
, ia64_register_name
);
1977 set_gdbarch_register_size (gdbarch
, 8);
1978 set_gdbarch_register_bytes (gdbarch
, ia64_num_regs
* 8 + 128*8);
1979 set_gdbarch_register_byte (gdbarch
, ia64_register_byte
);
1980 set_gdbarch_register_raw_size (gdbarch
, ia64_register_raw_size
);
1981 set_gdbarch_max_register_raw_size (gdbarch
, 16);
1982 set_gdbarch_register_virtual_size (gdbarch
, ia64_register_virtual_size
);
1983 set_gdbarch_max_register_virtual_size (gdbarch
, 16);
1984 set_gdbarch_register_virtual_type (gdbarch
, ia64_register_virtual_type
);
1986 set_gdbarch_skip_prologue (gdbarch
, ia64_skip_prologue
);
1988 set_gdbarch_frame_num_args (gdbarch
, frame_num_args_unknown
);
1989 set_gdbarch_frameless_function_invocation (gdbarch
, ia64_frameless_function_invocation
);
1991 set_gdbarch_saved_pc_after_call (gdbarch
, ia64_saved_pc_after_call
);
1993 set_gdbarch_frame_chain (gdbarch
, ia64_frame_chain
);
1994 set_gdbarch_frame_chain_valid (gdbarch
, generic_func_frame_chain_valid
);
1995 set_gdbarch_frame_saved_pc (gdbarch
, ia64_frame_saved_pc
);
1997 set_gdbarch_frame_init_saved_regs (gdbarch
, ia64_frame_init_saved_regs
);
1998 set_gdbarch_get_saved_register (gdbarch
, ia64_get_saved_register
);
2000 set_gdbarch_register_convertible (gdbarch
, ia64_register_convertible
);
2001 set_gdbarch_register_convert_to_virtual (gdbarch
, ia64_register_convert_to_virtual
);
2002 set_gdbarch_register_convert_to_raw (gdbarch
, ia64_register_convert_to_raw
);
2004 set_gdbarch_use_struct_convention (gdbarch
, ia64_use_struct_convention
);
2005 set_gdbarch_extract_return_value (gdbarch
, ia64_extract_return_value
);
2007 set_gdbarch_store_struct_return (gdbarch
, ia64_store_struct_return
);
2008 set_gdbarch_store_return_value (gdbarch
, ia64_store_return_value
);
2009 set_gdbarch_extract_struct_value_address (gdbarch
, ia64_extract_struct_value_address
);
2011 set_gdbarch_memory_insert_breakpoint (gdbarch
, ia64_memory_insert_breakpoint
);
2012 set_gdbarch_memory_remove_breakpoint (gdbarch
, ia64_memory_remove_breakpoint
);
2013 set_gdbarch_breakpoint_from_pc (gdbarch
, ia64_breakpoint_from_pc
);
2014 set_gdbarch_read_pc (gdbarch
, ia64_read_pc
);
2015 set_gdbarch_write_pc (gdbarch
, ia64_write_pc
);
2017 /* Settings for calling functions in the inferior. */
2018 set_gdbarch_use_generic_dummy_frames (gdbarch
, 1);
2019 set_gdbarch_call_dummy_length (gdbarch
, 0);
2020 set_gdbarch_push_arguments (gdbarch
, ia64_push_arguments
);
2021 set_gdbarch_push_return_address (gdbarch
, ia64_push_return_address
);
2022 set_gdbarch_pop_frame (gdbarch
, ia64_pop_frame
);
2024 set_gdbarch_call_dummy_p (gdbarch
, 1);
2025 set_gdbarch_call_dummy_words (gdbarch
, ia64_call_dummy_words
);
2026 set_gdbarch_sizeof_call_dummy_words (gdbarch
, sizeof (ia64_call_dummy_words
));
2027 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch
, 1);
2028 set_gdbarch_init_extra_frame_info (gdbarch
, ia64_init_extra_frame_info
);
2029 set_gdbarch_frame_args_address (gdbarch
, ia64_frame_args_address
);
2030 set_gdbarch_frame_locals_address (gdbarch
, ia64_frame_locals_address
);
2032 /* We won't necessarily have a frame pointer and even if we do,
2033 it winds up being extraordinarly messy when attempting to find
2034 the frame chain. So for the purposes of creating frames (which
2035 is all read_fp() is used for), simply use the stack pointer value
2037 set_gdbarch_read_fp (gdbarch
, generic_target_read_sp
);
2038 set_gdbarch_write_fp (gdbarch
, generic_target_write_sp
);
2040 /* Settings that should be unnecessary. */
2041 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2043 set_gdbarch_read_sp (gdbarch
, generic_target_read_sp
);
2044 set_gdbarch_write_sp (gdbarch
, generic_target_write_sp
);
2046 set_gdbarch_call_dummy_location (gdbarch
, AT_ENTRY_POINT
);
2047 set_gdbarch_call_dummy_address (gdbarch
, entry_point_address
);
2048 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 0);
2049 set_gdbarch_call_dummy_start_offset (gdbarch
, 0);
2050 set_gdbarch_pc_in_call_dummy (gdbarch
, generic_pc_in_call_dummy
);
2051 set_gdbarch_call_dummy_stack_adjust_p (gdbarch
, 0);
2052 set_gdbarch_push_dummy_frame (gdbarch
, generic_push_dummy_frame
);
2053 set_gdbarch_fix_call_dummy (gdbarch
, generic_fix_call_dummy
);
2055 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
2056 set_gdbarch_function_start_offset (gdbarch
, 0);
2058 set_gdbarch_remote_translate_xfer_address (
2059 gdbarch
, ia64_remote_translate_xfer_address
);
2065 _initialize_ia64_tdep (void)
2067 register_gdbarch_init (bfd_arch_ia64
, ia64_gdbarch_init
);
2069 tm_print_insn
= print_insn_ia64
;
2070 tm_print_insn_info
.bytes_per_line
= SLOT_MULTIPLIER
;