gdb/irix5-nat.c

   1 /* Native support for the SGI Iris running IRIX version 5, for GDB.
   2
   3    Copyright (C) 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998,
   4    1999, 2000, 2001, 2002, 2004, 2006, 2007 Free Software Foundation, Inc.
   5
   6    Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU
   7    and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin.
   8    Implemented for Irix 4.x by Garrett A. Wollman.
   9    Modified for Irix 5.x by Ian Lance Taylor.
  10
  11    This file is part of GDB.
  12
  13    This program is free software; you can redistribute it and/or modify
  14    it under the terms of the GNU General Public License as published by
  15    the Free Software Foundation; either version 2 of the License, or
  16    (at your option) any later version.
  17
  18    This program is distributed in the hope that it will be useful,
  19    but WITHOUT ANY WARRANTY; without even the implied warranty of
  20    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  21    GNU General Public License for more details.
  22
  23    You should have received a copy of the GNU General Public License
  24    along with this program; if not, write to the Free Software
  25    Foundation, Inc., 51 Franklin Street, Fifth Floor,
  26    Boston, MA 02110-1301, USA.  */
  27
  28 #include "defs.h"
  29 #include "inferior.h"
  30 #include "gdbcore.h"
  31 #include "target.h"
  32 #include "regcache.h"
  33
  34 #include "gdb_string.h"
  35 #include <sys/time.h>
  36 #include <sys/procfs.h>
  37 #include <setjmp.h>             /* For JB_XXX.  */
  38
  39 /* Prototypes for supply_gregset etc. */
  40 #include "gregset.h"
  41 #include "mips-tdep.h"
  42
  43 static void fetch_core_registers (struct regcache *, char *,
  44                                   unsigned int, int, CORE_ADDR);
  45
  46
  47 /*
  48  * See the comment in m68k-tdep.c regarding the utility of these functions.
  49  *
  50  * These definitions are from the MIPS SVR4 ABI, so they may work for
  51  * any MIPS SVR4 target.
  52  */
  53
  54 void
  55 supply_gregset (struct regcache *regcache, const gregset_t *gregsetp)
  56 {
  57   int regi;
  58   const greg_t *regp = &(*gregsetp)[0];
  59   int gregoff = sizeof (greg_t) - mips_isa_regsize (current_gdbarch);
  60   static char zerobuf[32] = {0};
  61
  62   for (regi = 0; regi <= CTX_RA; regi++)
  63     regcache_raw_supply (regcache, regi,
  64                          (const char *) (regp + regi) + gregoff);
  65
  66   regcache_raw_supply (regcache, mips_regnum (current_gdbarch)->pc,
  67                        (const char *) (regp + CTX_EPC) + gregoff);
  68   regcache_raw_supply (regcache, mips_regnum (current_gdbarch)->hi,
  69                        (const char *) (regp + CTX_MDHI) + gregoff);
  70   regcache_raw_supply (regcache, mips_regnum (current_gdbarch)->lo,
  71                        (const char *) (regp + CTX_MDLO) + gregoff);
  72   regcache_raw_supply (regcache, mips_regnum (current_gdbarch)->cause,
  73                        (const char *) (regp + CTX_CAUSE) + gregoff);
  74
  75   /* Fill inaccessible registers with zero.  */
  76   regcache_raw_supply (regcache, mips_regnum (current_gdbarch)->badvaddr, zerobuf);
  77 }
  78
  79 void
  80 fill_gregset (const struct regcache *regcache, gregset_t *gregsetp, int regno)
  81 {
  82   int regi, size;
  83   greg_t *regp = &(*gregsetp)[0];
  84   gdb_byte buf[MAX_REGISTER_SIZE];
  85
  86   /* Under Irix6, if GDB is built with N32 ABI and is debugging an O32
  87      executable, we have to sign extend the registers to 64 bits before
  88      filling in the gregset structure.  */
  89
  90   for (regi = 0; regi <= CTX_RA; regi++)
  91     if ((regno == -1) || (regno == regi))
  92       {
  93         size = register_size (current_gdbarch, regi);
  94         regcache_raw_collect (regcache, regi, buf);
  95         *(regp + regi) = extract_signed_integer (buf, size);
  96       }
  97
  98   if ((regno == -1) || (regno == PC_REGNUM))
  99     {
 100       regi = mips_regnum (current_gdbarch)->pc;
 101       size = register_size (current_gdbarch, regi);
 102       regcache_raw_collect (regcache, regi, buf);
 103       *(regp + CTX_EPC) = extract_signed_integer (buf, size);
 104     }
 105
 106   if ((regno == -1) || (regno == mips_regnum (current_gdbarch)->cause))
 107     {
 108       regi = mips_regnum (current_gdbarch)->cause;
 109       size = register_size (current_gdbarch, regi);
 110       regcache_raw_collect (regcache, regi, buf);
 111       *(regp + CTX_CAUSE) = extract_signed_integer (buf, size);
 112     }
 113
 114   if ((regno == -1) || (regno == mips_regnum (current_gdbarch)->hi))
 115     {
 116       regi = mips_regnum (current_gdbarch)->hi;
 117       size = register_size (current_gdbarch, regi);
 118       regcache_raw_collect (regcache, regi, buf);
 119       *(regp + CTX_MDHI) = extract_signed_integer (buf, size);
 120     }
 121
 122   if ((regno == -1) || (regno == mips_regnum (current_gdbarch)->lo))
 123     {
 124       regi = mips_regnum (current_gdbarch)->lo;
 125       size = register_size (current_gdbarch, regi);
 126       regcache_raw_collect (regcache, regi, buf);
 127       *(regp + CTX_MDLO) = extract_signed_integer (buf, size);
 128     }
 129 }
 130
 131 /*
 132  * Now we do the same thing for floating-point registers.
 133  * We don't bother to condition on FP0_REGNUM since any
 134  * reasonable MIPS configuration has an R3010 in it.
 135  *
 136  * Again, see the comments in m68k-tdep.c.
 137  */
 138
 139 void
 140 supply_fpregset (struct regcache *regcache, const fpregset_t *fpregsetp)
 141 {
 142   int regi;
 143   static char zerobuf[32] = {0};
 144   char fsrbuf[8];
 145
 146   /* FIXME, this is wrong for the N32 ABI which has 64 bit FP regs. */
 147
 148   for (regi = 0; regi < 32; regi++)
 149     regcache_raw_supply (regcache, FP0_REGNUM + regi,
 150                          (const char *) &fpregsetp->fp_r.fp_regs[regi]);
 151
 152   /* We can't supply the FSR register directly to the regcache,
 153      because there is a size issue: On one hand, fpregsetp->fp_csr
 154      is 32bits long, while the regcache expects a 64bits long value.
 155      So we use a buffer of the correct size and copy into it the register
 156      value at the proper location.  */
 157   memset (fsrbuf, 0, 4);
 158   memcpy (fsrbuf + 4, &fpregsetp->fp_csr, 4);
 159
 160   regcache_raw_supply (regcache,
 161                        mips_regnum (current_gdbarch)->fp_control_status,
 162                        fsrbuf);
 163
 164   /* FIXME: how can we supply FCRIR?  SGI doesn't tell us. */
 165   regcache_raw_supply (regcache,
 166                        mips_regnum (current_gdbarch)->fp_implementation_revision,
 167                        zerobuf);
 168 }
 169
 170 void
 171 fill_fpregset (const struct regcache *regcache, fpregset_t *fpregsetp, int regno)
 172 {
 173   int regi;
 174   char *from, *to;
 175
 176   /* FIXME, this is wrong for the N32 ABI which has 64 bit FP regs. */
 177
 178   for (regi = FP0_REGNUM; regi < FP0_REGNUM + 32; regi++)
 179     {
 180       if ((regno == -1) || (regno == regi))
 181         {
 182           to = (char *) &(fpregsetp->fp_r.fp_regs[regi - FP0_REGNUM]);
 183           regcache_raw_collect (regcache, regi, to);
 184         }
 185     }
 186
 187   if (regno == -1
 188       || regno == mips_regnum (current_gdbarch)->fp_control_status)
 189     {
 190       char fsrbuf[8];
 191
 192       /* We can't fill the FSR register directly from the regcache,
 193          because there is a size issue: On one hand, fpregsetp->fp_csr
 194          is 32bits long, while the regcache expects a 64bits long buffer.
 195          So we use a buffer of the correct size and copy the register
 196          value from that buffer.  */
 197       regcache_raw_collect (regcache,
 198                             mips_regnum (current_gdbarch)->fp_control_status,
 199                             fsrbuf);
 200
 201       memcpy (&fpregsetp->fp_csr, fsrbuf + 4, 4);
 202     }
 203 }
 204
 205
 206 /* Provide registers to GDB from a core file.
 207
 208    CORE_REG_SECT points to an array of bytes, which were obtained from
 209    a core file which BFD thinks might contain register contents.
 210    CORE_REG_SIZE is its size.
 211
 212    Normally, WHICH says which register set corelow suspects this is:
 213      0 --- the general-purpose register set
 214      2 --- the floating-point register set
 215    However, for Irix 5, WHICH isn't used.
 216
 217    REG_ADDR is also unused.  */
 218
 219 static void
 220 fetch_core_registers (struct regcache *regcache,
 221                       char *core_reg_sect, unsigned core_reg_size,
 222                       int which, CORE_ADDR reg_addr)
 223 {
 224   char *srcp = core_reg_sect;
 225   int regsize = mips_isa_regsize (current_gdbarch);
 226   int regno;
 227
 228   /* If regsize is 8, this is a N32 or N64 core file.
 229      If regsize is 4, this is an O32 core file.  */
 230   if (core_reg_size != regsize * gdbarch_num_regs (current_gdbarch))
 231     {
 232       warning (_("wrong size gregset struct in core file"));
 233       return;
 234     }
 235
 236   for (regno = 0; regno < gdbarch_num_regs (current_gdbarch); regno++)
 237     {
 238       regcache_raw_supply (regcache, regno, srcp);
 239       srcp += regsize;
 240     }
 241 }
 242
 243 /* Register that we are able to handle irix5 core file formats.
 244    This really is bfd_target_unknown_flavour */
 245
 246 static struct core_fns irix5_core_fns =
 247 {
 248   bfd_target_unknown_flavour,           /* core_flavour */
 249   default_check_format,                 /* check_format */
 250   default_core_sniffer,                 /* core_sniffer */
 251   fetch_core_registers,                 /* core_read_registers */
 252   NULL                                  /* next */
 253 };
 254
 255 void
 256 _initialize_core_irix5 (void)
 257 {
 258   deprecated_add_core_fns (&irix5_core_fns);
 259 }