gdb/lynx-nat.c

   1 /* Native-dependent code for LynxOS.
   2    Copyright 1993, 1994 Free Software Foundation, Inc.
   3
   4 This file is part of GDB.
   5
   6 This program is free software; you can redistribute it and/or modify
   7 it under the terms of the GNU General Public License as published by
   8 the Free Software Foundation; either version 2 of the License, or
   9 (at your option) any later version.
  10
  11 This program is distributed in the hope that it will be useful,
  12 but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14 GNU General Public License for more details.
  15
  16 You should have received a copy of the GNU General Public License
  17 along with this program; if not, write to the Free Software
  18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.  */
  19
  20 #include "defs.h"
  21 #include "frame.h"
  22 #include "inferior.h"
  23 #include "target.h"
  24
  25 #include <sys/ptrace.h>
  26 #include <sys/wait.h>
  27 #include <sys/fpp.h>
  28
  29 static unsigned long registers_addr PARAMS ((int pid));
  30
  31 #define X(ENTRY)(offsetof(struct econtext, ENTRY))
  32
  33 #ifdef I386
  34 /* Mappings from tm-i386v.h */
  35
  36 static int regmap[] =
  37 {
  38   X(eax),
  39   X(ecx),
  40   X(edx),
  41   X(ebx),
  42   X(esp),                       /* sp */
  43   X(ebp),                       /* fp */
  44   X(esi),
  45   X(edi),
  46   X(eip),                       /* pc */
  47   X(flags),                     /* ps */
  48   X(cs),
  49   X(ss),
  50   X(ds),
  51   X(es),
  52   X(ecode),                     /* Lynx doesn't give us either fs or gs, so */
  53   X(fault),                     /* we just substitute these two in the hopes
  54                                    that they are useful. */
  55 };
  56 #endif /* I386 */
  57
  58 #ifdef M68K
  59 /* Mappings from tm-m68k.h */
  60
  61 static int regmap[] =
  62 {
  63   X(regs[0]),                   /* d0 */
  64   X(regs[1]),                   /* d1 */
  65   X(regs[2]),                   /* d2 */
  66   X(regs[3]),                   /* d3 */
  67   X(regs[4]),                   /* d4 */
  68   X(regs[5]),                   /* d5 */
  69   X(regs[6]),                   /* d6 */
  70   X(regs[7]),                   /* d7 */
  71   X(regs[8]),                   /* a0 */
  72   X(regs[9]),                   /* a1 */
  73   X(regs[10]),                  /* a2 */
  74   X(regs[11]),                  /* a3 */
  75   X(regs[12]),                  /* a4 */
  76   X(regs[13]),                  /* a5 */
  77   X(regs[14]),                  /* fp */
  78   offsetof (st_t, usp) - offsetof (st_t, ec), /* sp */
  79   X(status),                    /* ps */
  80   X(pc),
  81
  82   X(fregs[0*3]),                /* fp0 */
  83   X(fregs[1*3]),                /* fp1 */
  84   X(fregs[2*3]),                /* fp2 */
  85   X(fregs[3*3]),                /* fp3 */
  86   X(fregs[4*3]),                /* fp4 */
  87   X(fregs[5*3]),                /* fp5 */
  88   X(fregs[6*3]),                /* fp6 */
  89   X(fregs[7*3]),                /* fp7 */
  90
  91   X(fcregs[0]),                 /* fpcontrol */
  92   X(fcregs[1]),                 /* fpstatus */
  93   X(fcregs[2]),                 /* fpiaddr */
  94   X(ssw),                       /* fpcode */
  95   X(fault),                     /* fpflags */
  96 };
  97 #endif /* M68K */
  98
  99 #ifdef SPARC
 100 /* Mappings from tm-sparc.h */
 101
 102 #define FX(ENTRY)(offsetof(struct fcontext, ENTRY))
 103
 104 static int regmap[] =
 105 {
 106   -1,                           /* g0 */
 107   X(g1),
 108   X(g2),
 109   X(g3),
 110   X(g4),
 111   -1,                           /* g5->g7 aren't saved by Lynx */
 112   -1,
 113   -1,
 114
 115   X(o[0]),
 116   X(o[1]),
 117   X(o[2]),
 118   X(o[3]),
 119   X(o[4]),
 120   X(o[5]),
 121   X(o[6]),                      /* sp */
 122   X(o[7]),                      /* ra */
 123
 124   -1,-1,-1,-1,-1,-1,-1,-1,      /* l0 -> l7 */
 125
 126   -1,-1,-1,-1,-1,-1,-1,-1,      /* i0 -> i7 */
 127
 128   FX(f.fregs[0]),               /* f0 */
 129   FX(f.fregs[1]),
 130   FX(f.fregs[2]),
 131   FX(f.fregs[3]),
 132   FX(f.fregs[4]),
 133   FX(f.fregs[5]),
 134   FX(f.fregs[6]),
 135   FX(f.fregs[7]),
 136   FX(f.fregs[8]),
 137   FX(f.fregs[9]),
 138   FX(f.fregs[10]),
 139   FX(f.fregs[11]),
 140   FX(f.fregs[12]),
 141   FX(f.fregs[13]),
 142   FX(f.fregs[14]),
 143   FX(f.fregs[15]),
 144   FX(f.fregs[16]),
 145   FX(f.fregs[17]),
 146   FX(f.fregs[18]),
 147   FX(f.fregs[19]),
 148   FX(f.fregs[20]),
 149   FX(f.fregs[21]),
 150   FX(f.fregs[22]),
 151   FX(f.fregs[23]),
 152   FX(f.fregs[24]),
 153   FX(f.fregs[25]),
 154   FX(f.fregs[26]),
 155   FX(f.fregs[27]),
 156   FX(f.fregs[28]),
 157   FX(f.fregs[29]),
 158   FX(f.fregs[30]),
 159   FX(f.fregs[31]),
 160
 161   X(y),
 162   X(psr),
 163   X(wim),
 164   X(tbr),
 165   X(pc),
 166   X(npc),
 167   FX(fsr),                      /* fpsr */
 168   -1,                           /* cpsr */
 169 };
 170 #endif /* SPARC */
 171
 172 #ifdef rs6000
 173
 174 static int regmap[] =
 175 {
 176   X(iregs[0]),                  /* r0 */
 177   X(iregs[1]),
 178   X(iregs[2]),
 179   X(iregs[3]),
 180   X(iregs[4]),
 181   X(iregs[5]),
 182   X(iregs[6]),
 183   X(iregs[7]),
 184   X(iregs[8]),
 185   X(iregs[9]),
 186   X(iregs[10]),
 187   X(iregs[11]),
 188   X(iregs[12]),
 189   X(iregs[13]),
 190   X(iregs[14]),
 191   X(iregs[15]),
 192   X(iregs[16]),
 193   X(iregs[17]),
 194   X(iregs[18]),
 195   X(iregs[19]),
 196   X(iregs[20]),
 197   X(iregs[21]),
 198   X(iregs[22]),
 199   X(iregs[23]),
 200   X(iregs[24]),
 201   X(iregs[25]),
 202   X(iregs[26]),
 203   X(iregs[27]),
 204   X(iregs[28]),
 205   X(iregs[29]),
 206   X(iregs[30]),
 207   X(iregs[31]),
 208
 209   X(fregs[0]),                  /* f0 */
 210   X(fregs[1]),
 211   X(fregs[2]),
 212   X(fregs[3]),
 213   X(fregs[4]),
 214   X(fregs[5]),
 215   X(fregs[6]),
 216   X(fregs[7]),
 217   X(fregs[8]),
 218   X(fregs[9]),
 219   X(fregs[10]),
 220   X(fregs[11]),
 221   X(fregs[12]),
 222   X(fregs[13]),
 223   X(fregs[14]),
 224   X(fregs[15]),
 225   X(fregs[16]),
 226   X(fregs[17]),
 227   X(fregs[18]),
 228   X(fregs[19]),
 229   X(fregs[20]),
 230   X(fregs[21]),
 231   X(fregs[22]),
 232   X(fregs[23]),
 233   X(fregs[24]),
 234   X(fregs[25]),
 235   X(fregs[26]),
 236   X(fregs[27]),
 237   X(fregs[28]),
 238   X(fregs[29]),
 239   X(fregs[30]),
 240   X(fregs[31]),
 241
 242   X(srr0),                      /* IAR (PC) */
 243   X(srr1),                      /* MSR (PS) */
 244   X(cr),                        /* CR */
 245   X(lr),                        /* LR */
 246   X(ctr),                       /* CTR */
 247   X(xer),                       /* XER */
 248   X(mq)                         /* MQ */
 249 };
 250
 251 #endif /* rs6000 */
 252
 253 #ifdef SPARC
 254
 255 /* This routine handles some oddball cases for Sparc registers and LynxOS.
 256    In partucular, it causes refs to G0, g5->7, and all fp regs to return zero.
 257    It also handles knows where to find the I & L regs on the stack.  */
 258
 259 void
 260 fetch_inferior_registers (regno)
 261      int regno;
 262 {
 263   int whatregs = 0;
 264
 265 #define WHATREGS_FLOAT 1
 266 #define WHATREGS_GEN 2
 267 #define WHATREGS_STACK 4
 268
 269   if (regno == -1)
 270     whatregs = WHATREGS_FLOAT | WHATREGS_GEN | WHATREGS_STACK;
 271   else if (regno >= L0_REGNUM && regno <= I7_REGNUM)
 272     whatregs = WHATREGS_STACK;
 273   else if (regno >= FP0_REGNUM && regno < FP0_REGNUM + 32)
 274     whatregs = WHATREGS_FLOAT;
 275   else
 276     whatregs = WHATREGS_GEN;
 277
 278   if (whatregs & WHATREGS_GEN)
 279     {
 280       struct econtext ec;               /* general regs */
 281       char buf[MAX_REGISTER_RAW_SIZE];
 282       int retval;
 283       int i;
 284
 285       errno = 0;
 286       retval = ptrace (PTRACE_GETREGS, inferior_pid, (PTRACE_ARG3_TYPE) &ec,
 287                        0);
 288       if (errno)
 289         perror_with_name ("ptrace(PTRACE_GETREGS)");
 290
 291       memset (buf, 0, REGISTER_RAW_SIZE (G0_REGNUM));
 292       supply_register (G0_REGNUM, buf);
 293       supply_register (TBR_REGNUM, (char *)&ec.tbr);
 294
 295       memcpy (&registers[REGISTER_BYTE (G1_REGNUM)], &ec.g1,
 296               4 * REGISTER_RAW_SIZE (G1_REGNUM));
 297       for (i = G1_REGNUM; i <= G1_REGNUM + 3; i++)
 298         register_valid[i] = 1;
 299
 300       supply_register (PS_REGNUM, (char *)&ec.psr);
 301       supply_register (Y_REGNUM, (char *)&ec.y);
 302       supply_register (PC_REGNUM, (char *)&ec.pc);
 303       supply_register (NPC_REGNUM, (char *)&ec.npc);
 304       supply_register (WIM_REGNUM, (char *)&ec.wim);
 305
 306       memcpy (&registers[REGISTER_BYTE (O0_REGNUM)], ec.o,
 307               8 * REGISTER_RAW_SIZE (O0_REGNUM));
 308       for (i = O0_REGNUM; i <= O0_REGNUM + 7; i++)
 309         register_valid[i] = 1;
 310     }
 311
 312   if (whatregs & WHATREGS_STACK)
 313     {
 314       CORE_ADDR sp;
 315       int i;
 316
 317       sp = read_register (SP_REGNUM);
 318
 319       target_xfer_memory (sp + FRAME_SAVED_I0,
 320                           &registers[REGISTER_BYTE(I0_REGNUM)],
 321                           8 * REGISTER_RAW_SIZE (I0_REGNUM), 0);
 322       for (i = I0_REGNUM; i <= I7_REGNUM; i++)
 323         register_valid[i] = 1;
 324
 325       target_xfer_memory (sp + FRAME_SAVED_L0,
 326                           &registers[REGISTER_BYTE(L0_REGNUM)],
 327                           8 * REGISTER_RAW_SIZE (L0_REGNUM), 0);
 328       for (i = L0_REGNUM; i <= L0_REGNUM + 7; i++)
 329         register_valid[i] = 1;
 330     }
 331
 332   if (whatregs & WHATREGS_FLOAT)
 333     {
 334       struct fcontext fc;               /* fp regs */
 335       int retval;
 336       int i;
 337
 338       errno = 0;
 339       retval = ptrace (PTRACE_GETFPREGS, inferior_pid, (PTRACE_ARG3_TYPE) &fc,
 340                        0);
 341       if (errno)
 342         perror_with_name ("ptrace(PTRACE_GETFPREGS)");
 343
 344       memcpy (&registers[REGISTER_BYTE (FP0_REGNUM)], fc.f.fregs,
 345               32 * REGISTER_RAW_SIZE (FP0_REGNUM));
 346       for (i = FP0_REGNUM; i <= FP0_REGNUM + 31; i++)
 347         register_valid[i] = 1;
 348
 349       supply_register (FPS_REGNUM, (char *)&fc.fsr);
 350     }
 351 }
 352
 353 /* This routine handles storing of the I & L regs for the Sparc.  The trick
 354    here is that they actually live on the stack.  The really tricky part is
 355    that when changing the stack pointer, the I & L regs must be written to
 356    where the new SP points, otherwise the regs will be incorrect when the
 357    process is started up again.   We assume that the I & L regs are valid at
 358    this point.  */
 359
 360 void
 361 store_inferior_registers (regno)
 362      int regno;
 363 {
 364   int whatregs = 0;
 365
 366   if (regno == -1)
 367     whatregs = WHATREGS_FLOAT | WHATREGS_GEN | WHATREGS_STACK;
 368   else if (regno >= L0_REGNUM && regno <= I7_REGNUM)
 369     whatregs = WHATREGS_STACK;
 370   else if (regno >= FP0_REGNUM && regno < FP0_REGNUM + 32)
 371     whatregs = WHATREGS_FLOAT;
 372   else if (regno == SP_REGNUM)
 373     whatregs = WHATREGS_STACK | WHATREGS_GEN;
 374   else
 375     whatregs = WHATREGS_GEN;
 376
 377   if (whatregs & WHATREGS_GEN)
 378     {
 379       struct econtext ec;               /* general regs */
 380       int retval;
 381
 382       ec.tbr = read_register (TBR_REGNUM);
 383       memcpy (&ec.g1, &registers[REGISTER_BYTE (G1_REGNUM)],
 384               4 * REGISTER_RAW_SIZE (G1_REGNUM));
 385
 386       ec.psr = read_register (PS_REGNUM);
 387       ec.y = read_register (Y_REGNUM);
 388       ec.pc = read_register (PC_REGNUM);
 389       ec.npc = read_register (NPC_REGNUM);
 390       ec.wim = read_register (WIM_REGNUM);
 391
 392       memcpy (ec.o, &registers[REGISTER_BYTE (O0_REGNUM)],
 393               8 * REGISTER_RAW_SIZE (O0_REGNUM));
 394
 395       errno = 0;
 396       retval = ptrace (PTRACE_SETREGS, inferior_pid, (PTRACE_ARG3_TYPE) &ec,
 397                        0);
 398       if (errno)
 399         perror_with_name ("ptrace(PTRACE_SETREGS)");
 400     }
 401
 402   if (whatregs & WHATREGS_STACK)
 403     {
 404       int regoffset;
 405       CORE_ADDR sp;
 406
 407       sp = read_register (SP_REGNUM);
 408
 409       if (regno == -1 || regno == SP_REGNUM)
 410         {
 411           if (!register_valid[L0_REGNUM+5])
 412             abort();
 413           target_xfer_memory (sp + FRAME_SAVED_I0,
 414                               &registers[REGISTER_BYTE (I0_REGNUM)],
 415                               8 * REGISTER_RAW_SIZE (I0_REGNUM), 1);
 416
 417           target_xfer_memory (sp + FRAME_SAVED_L0,
 418                               &registers[REGISTER_BYTE (L0_REGNUM)],
 419                               8 * REGISTER_RAW_SIZE (L0_REGNUM), 1);
 420         }
 421       else if (regno >= L0_REGNUM && regno <= I7_REGNUM)
 422         {
 423           if (!register_valid[regno])
 424             abort();
 425           if (regno >= L0_REGNUM && regno <= L0_REGNUM + 7)
 426             regoffset = REGISTER_BYTE (regno) - REGISTER_BYTE (L0_REGNUM)
 427               + FRAME_SAVED_L0;
 428           else
 429             regoffset = REGISTER_BYTE (regno) - REGISTER_BYTE (I0_REGNUM)
 430               + FRAME_SAVED_I0;
 431           target_xfer_memory (sp + regoffset, &registers[REGISTER_BYTE (regno)],
 432                               REGISTER_RAW_SIZE (regno), 1);
 433         }
 434     }
 435
 436   if (whatregs & WHATREGS_FLOAT)
 437     {
 438       struct fcontext fc;               /* fp regs */
 439       int retval;
 440
 441 /* We read fcontext first so that we can get good values for fq_t... */
 442       errno = 0;
 443       retval = ptrace (PTRACE_GETFPREGS, inferior_pid, (PTRACE_ARG3_TYPE) &fc,
 444                        0);
 445       if (errno)
 446         perror_with_name ("ptrace(PTRACE_GETFPREGS)");
 447
 448       memcpy (fc.f.fregs, &registers[REGISTER_BYTE (FP0_REGNUM)],
 449               32 * REGISTER_RAW_SIZE (FP0_REGNUM));
 450
 451       fc.fsr = read_register (FPS_REGNUM);
 452
 453       errno = 0;
 454       retval = ptrace (PTRACE_SETFPREGS, inferior_pid, (PTRACE_ARG3_TYPE) &fc,
 455                        0);
 456       if (errno)
 457         perror_with_name ("ptrace(PTRACE_SETFPREGS)");
 458       }
 459 }
 460 #endif /* SPARC */
 461
 462 #if defined (I386) || defined (M68K) || defined (rs6000)
 463
 464 /* Return the offset relative to the start of the per-thread data to the
 465    saved context block.  */
 466
 467 static unsigned long
 468 registers_addr(pid)
 469      int pid;
 470 {
 471   CORE_ADDR stblock;
 472   int ecpoff = offsetof(st_t, ecp);
 473   CORE_ADDR ecp;
 474
 475   errno = 0;
 476   stblock = (CORE_ADDR) ptrace (PTRACE_THREADUSER, pid, (PTRACE_ARG3_TYPE)0,
 477                                 0);
 478   if (errno)
 479     perror_with_name ("ptrace(PTRACE_THREADUSER)");
 480
 481   ecp = (CORE_ADDR) ptrace (PTRACE_PEEKTHREAD, pid, (PTRACE_ARG3_TYPE)ecpoff,
 482                             0);
 483   if (errno)
 484     perror_with_name ("ptrace(PTRACE_PEEKTHREAD)");
 485
 486   return ecp - stblock;
 487 }
 488
 489 /* Fetch one or more registers from the inferior.  REGNO == -1 to get
 490    them all.  We actually fetch more than requested, when convenient,
 491    marking them as valid so we won't fetch them again.  */
 492
 493 void
 494 fetch_inferior_registers (regno)
 495      int regno;
 496 {
 497   int reglo, reghi;
 498   int i;
 499   unsigned long ecp;
 500
 501   if (regno == -1)
 502     {
 503       reglo = 0;
 504       reghi = NUM_REGS - 1;
 505     }
 506   else
 507     reglo = reghi = regno;
 508
 509   ecp = registers_addr (inferior_pid);
 510
 511   for (regno = reglo; regno <= reghi; regno++)
 512     {
 513       char buf[MAX_REGISTER_RAW_SIZE];
 514       int ptrace_fun = PTRACE_PEEKTHREAD;
 515
 516 #ifdef M68K
 517       ptrace_fun = regno == SP_REGNUM ? PTRACE_PEEKUSP : PTRACE_PEEKTHREAD;
 518 #endif
 519
 520       for (i = 0; i < REGISTER_RAW_SIZE (regno); i += sizeof (int))
 521         {
 522           unsigned int reg;
 523
 524           errno = 0;
 525           reg = ptrace (ptrace_fun, inferior_pid,
 526                         (PTRACE_ARG3_TYPE) (ecp + regmap[regno] + i), 0);
 527           if (errno)
 528             perror_with_name ("ptrace(PTRACE_PEEKUSP)");
 529
 530           *(int *)&buf[i] = reg;
 531         }
 532       supply_register (regno, buf);
 533     }
 534 }
 535
 536 /* Store our register values back into the inferior.
 537    If REGNO is -1, do this for all registers.
 538    Otherwise, REGNO specifies which register (so we can save time).  */
 539
 540 /* Registers we shouldn't try to store.  */
 541 #if !defined (CANNOT_STORE_REGISTER)
 542 #define CANNOT_STORE_REGISTER(regno) 0
 543 #endif
 544
 545 void
 546 store_inferior_registers (regno)
 547      int regno;
 548 {
 549   int reglo, reghi;
 550   int i;
 551   unsigned long ecp;
 552
 553   if (regno == -1)
 554     {
 555       reglo = 0;
 556       reghi = NUM_REGS - 1;
 557     }
 558   else
 559     reglo = reghi = regno;
 560
 561   ecp = registers_addr (inferior_pid);
 562
 563   for (regno = reglo; regno <= reghi; regno++)
 564     {
 565       int ptrace_fun = PTRACE_POKEUSER;
 566
 567       if (CANNOT_STORE_REGISTER (regno))
 568         continue;
 569
 570 #ifdef M68K
 571       ptrace_fun = regno == SP_REGNUM ? PTRACE_POKEUSP : PTRACE_POKEUSER;
 572 #endif
 573
 574       for (i = 0; i < REGISTER_RAW_SIZE (regno); i += sizeof (int))
 575         {
 576           unsigned int reg;
 577
 578           reg = *(unsigned int *)&registers[REGISTER_BYTE (regno) + i];
 579
 580           errno = 0;
 581           ptrace (ptrace_fun, inferior_pid,
 582                   (PTRACE_ARG3_TYPE) (ecp + regmap[regno] + i), reg);
 583           if (errno)
 584             perror_with_name ("ptrace(PTRACE_POKEUSP)");
 585         }
 586     }
 587 }
 588 #endif /* defined (I386) || defined (M68K) || defined (rs6000) */
 589
 590 /* Wait for child to do something.  Return pid of child, or -1 in case
 591    of error; store status through argument pointer OURSTATUS.  */
 592
 593 int
 594 child_wait (pid, ourstatus)
 595      int pid;
 596      struct target_waitstatus *ourstatus;
 597 {
 598   int save_errno;
 599   int thread;
 600   union wait status;
 601
 602   while (1)
 603     {
 604       int sig;
 605
 606       set_sigint_trap();        /* Causes SIGINT to be passed on to the
 607                                    attached process. */
 608       pid = wait (&status);
 609 #ifdef SPARC
 610 /* Swap halves of status so that the rest of GDB can understand it */
 611       status = (status << 16) | ((unsigned)status >> 16);
 612 #endif
 613
 614       save_errno = errno;
 615
 616       clear_sigint_trap();
 617
 618       if (pid == -1)
 619         {
 620           if (save_errno == EINTR)
 621             continue;
 622           fprintf_unfiltered (gdb_stderr, "Child process unexpectedly missing: %s.\n",
 623                    safe_strerror (save_errno));
 624           /* Claim it exited with unknown signal.  */
 625           ourstatus->kind = TARGET_WAITKIND_SIGNALLED;
 626           ourstatus->value.sig = TARGET_SIGNAL_UNKNOWN;
 627           return -1;
 628         }
 629
 630       if (pid != PIDGET (inferior_pid)) /* Some other process?!? */
 631         continue;
 632
 633       thread = status.w_tid;    /* Get thread id from status */
 634
 635       /* Initial thread value can only be acquired via wait, so we have to
 636          resort to this hack.  */
 637
 638       if (TIDGET (inferior_pid) == 0)
 639         {
 640           inferior_pid = BUILDPID (inferior_pid, thread);
 641           add_thread (inferior_pid);
 642         }
 643
 644       pid = BUILDPID (pid, thread);
 645
 646       if (WIFSTOPPED(status)
 647           && WSTOPSIG(status) == SIGTRAP
 648           && !in_thread_list (pid))
 649         {
 650           int realsig;
 651
 652           realsig = ptrace (PTRACE_GETTRACESIG, pid, 0);
 653
 654           if (realsig == SIGNEWTHREAD)
 655             {
 656               /* Simply ignore new thread notification, as we can't do anything
 657                  useful with such threads.  All ptrace calls at this point just
 658                  fail for no apparent reason.  The thread will eventually get a
 659                  real signal when it becomes real.  */
 660               child_resume (pid, 0, TARGET_SIGNAL_0);
 661               continue;
 662             }
 663         }
 664
 665       store_waitstatus (ourstatus, status.w_status);
 666
 667       return pid;
 668     }
 669 }
 670
 671 /* Resume execution of the inferior process.
 672    If STEP is nonzero, single-step it.
 673    If SIGNAL is nonzero, give it that signal.  */
 674
 675 void
 676 child_resume (pid, step, signal)
 677      int pid;
 678      int step;
 679      enum target_signal signal;
 680 {
 681   int func;
 682
 683   errno = 0;
 684
 685   if (pid == -1)
 686     {
 687       /* Resume all threads.  */
 688
 689       pid = inferior_pid;
 690     }
 691
 692   func = step ? PTRACE_SINGLESTEP_ONE : PTRACE_CONT;
 693
 694   /* An address of (PTRACE_ARG3_TYPE)1 tells ptrace to continue from where
 695      it was.  (If GDB wanted it to start some other way, we have already
 696      written a new PC value to the child.)
 697
 698      If this system does not support PT_STEP, a higher level function will
 699      have called single_step() to transmute the step request into a
 700      continue request (by setting breakpoints on all possible successor
 701      instructions), so we don't have to worry about that here.  */
 702
 703   ptrace (func, pid, (PTRACE_ARG3_TYPE) 1, target_signal_to_host (signal));
 704
 705   if (errno)
 706     perror_with_name ("ptrace");
 707 }
 708
 709 /* Convert a Lynx process ID to a string.  Returns the string in a static
 710    buffer.  */
 711
 712 char *
 713 lynx_pid_to_str (pid)
 714      int pid;
 715 {
 716   static char buf[40];
 717
 718   sprintf (buf, "process %d thread %d", PIDGET (pid), TIDGET (pid));
 719
 720   return buf;
 721 }
 722
 723 /* Extract the register values out of the core file and store
 724    them where `read_register' will find them.
 725
 726    CORE_REG_SECT points to the register values themselves, read into memory.
 727    CORE_REG_SIZE is the size of that area.
 728    WHICH says which set of registers we are handling (0 = int, 2 = float
 729          on machines where they are discontiguous).
 730    REG_ADDR is the offset from u.u_ar0 to the register values relative to
 731             core_reg_sect.  This is used with old-fashioned core files to
 732             locate the registers in a large upage-plus-stack ".reg" section.
 733             Original upage address X is at location core_reg_sect+x+reg_addr.
 734  */
 735
 736 void
 737 fetch_core_registers (core_reg_sect, core_reg_size, which, reg_addr)
 738      char *core_reg_sect;
 739      unsigned core_reg_size;
 740      int which;
 741      unsigned reg_addr;
 742 {
 743   struct st_entry s;
 744   unsigned int regno;
 745
 746   for (regno = 0; regno < NUM_REGS; regno++)
 747     supply_register (regno, core_reg_sect + offsetof (st_t, ec)
 748                      + regmap[regno]);
 749
 750 #ifdef SPARC
 751 /* Fetching this register causes all of the I & L regs to be read from the
 752    stack and validated.  */
 753
 754   fetch_inferior_registers (I0_REGNUM);
 755 #endif
 756 }