1 /* Renesas M32C target-dependent code for GDB, the GNU debugger.
3 Copyright (C) 2004-2014 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
22 #include "gdb_assert.h"
25 #include "gdb/sim-m32c.h"
29 #include "arch-utils.h"
31 #include "frame-unwind.h"
32 #include "dwarf2-frame.h"
33 #include "dwarf2expr.h"
37 #include "reggroups.h"
38 #include "prologue-value.h"
43 /* The m32c tdep structure. */
45 static struct reggroup
*m32c_dma_reggroup
;
49 /* The type of a function that moves the value of REG between CACHE or
50 BUF --- in either direction. */
51 typedef enum register_status (m32c_move_reg_t
) (struct m32c_reg
*reg
,
52 struct regcache
*cache
,
57 /* The name of this register. */
63 /* The architecture this register belongs to. */
66 /* Its GDB register number. */
69 /* Its sim register number. */
72 /* Its DWARF register number, or -1 if it doesn't have one. */
75 /* Register group memberships. */
76 unsigned int general_p
: 1;
77 unsigned int dma_p
: 1;
78 unsigned int system_p
: 1;
79 unsigned int save_restore_p
: 1;
81 /* Functions to read its value from a regcache, and write its value
83 m32c_move_reg_t
*read
, *write
;
85 /* Data for READ and WRITE functions. The exact meaning depends on
86 the specific functions selected; see the comments for those
88 struct m32c_reg
*rx
, *ry
;
93 /* An overestimate of the number of raw and pseudoregisters we will
94 have. The exact answer depends on the variant of the architecture
95 at hand, but we can use this to declare statically allocated
96 arrays, and bump it up when needed. */
97 #define M32C_MAX_NUM_REGS (75)
99 /* The largest assigned DWARF register number. */
100 #define M32C_MAX_DWARF_REGNUM (40)
105 /* All the registers for this variant, indexed by GDB register
106 number, and the number of registers present. */
107 struct m32c_reg regs
[M32C_MAX_NUM_REGS
];
109 /* The number of valid registers. */
112 /* Interesting registers. These are pointers into REGS. */
113 struct m32c_reg
*pc
, *flg
;
114 struct m32c_reg
*r0
, *r1
, *r2
, *r3
, *a0
, *a1
;
115 struct m32c_reg
*r2r0
, *r3r2r1r0
, *r3r1r2r0
;
116 struct m32c_reg
*sb
, *fb
, *sp
;
118 /* A table indexed by DWARF register numbers, pointing into
120 struct m32c_reg
*dwarf_regs
[M32C_MAX_DWARF_REGNUM
+ 1];
122 /* Types for this architecture. We can't use the builtin_type_foo
123 types, because they're not initialized when building a gdbarch
125 struct type
*voyd
, *ptr_voyd
, *func_voyd
;
126 struct type
*uint8
, *uint16
;
127 struct type
*int8
, *int16
, *int32
, *int64
;
129 /* The types for data address and code address registers. */
130 struct type
*data_addr_reg_type
, *code_addr_reg_type
;
132 /* The number of bytes a return address pushed by a 'jsr' instruction
133 occupies on the stack. */
136 /* The number of bytes an address register occupies on the stack
137 when saved by an 'enter' or 'pushm' instruction. */
145 make_types (struct gdbarch
*arch
)
147 struct gdbarch_tdep
*tdep
= gdbarch_tdep (arch
);
148 unsigned long mach
= gdbarch_bfd_arch_info (arch
)->mach
;
149 int data_addr_reg_bits
, code_addr_reg_bits
;
153 /* This is used to clip CORE_ADDR values, so this value is
154 appropriate both on the m32c, where pointers are 32 bits long,
155 and on the m16c, where pointers are sixteen bits long, but there
156 may be code above the 64k boundary. */
157 set_gdbarch_addr_bit (arch
, 24);
159 /* GCC uses 32 bits for addrs in the dwarf info, even though
160 only 16/24 bits are used. Setting addr_bit to 24 causes
161 errors in reading the dwarf addresses. */
162 set_gdbarch_addr_bit (arch
, 32);
165 set_gdbarch_int_bit (arch
, 16);
169 data_addr_reg_bits
= 16;
170 code_addr_reg_bits
= 24;
171 set_gdbarch_ptr_bit (arch
, 16);
172 tdep
->ret_addr_bytes
= 3;
173 tdep
->push_addr_bytes
= 2;
177 data_addr_reg_bits
= 24;
178 code_addr_reg_bits
= 24;
179 set_gdbarch_ptr_bit (arch
, 32);
180 tdep
->ret_addr_bytes
= 4;
181 tdep
->push_addr_bytes
= 4;
185 gdb_assert_not_reached ("unexpected mach");
188 /* The builtin_type_mumble variables are sometimes uninitialized when
189 this is called, so we avoid using them. */
190 tdep
->voyd
= arch_type (arch
, TYPE_CODE_VOID
, 1, "void");
192 = arch_type (arch
, TYPE_CODE_PTR
, gdbarch_ptr_bit (arch
) / TARGET_CHAR_BIT
,
194 TYPE_TARGET_TYPE (tdep
->ptr_voyd
) = tdep
->voyd
;
195 TYPE_UNSIGNED (tdep
->ptr_voyd
) = 1;
196 tdep
->func_voyd
= lookup_function_type (tdep
->voyd
);
198 xsnprintf (type_name
, sizeof (type_name
), "%s_data_addr_t",
199 gdbarch_bfd_arch_info (arch
)->printable_name
);
200 tdep
->data_addr_reg_type
201 = arch_type (arch
, TYPE_CODE_PTR
, data_addr_reg_bits
/ TARGET_CHAR_BIT
,
202 xstrdup (type_name
));
203 TYPE_TARGET_TYPE (tdep
->data_addr_reg_type
) = tdep
->voyd
;
204 TYPE_UNSIGNED (tdep
->data_addr_reg_type
) = 1;
206 xsnprintf (type_name
, sizeof (type_name
), "%s_code_addr_t",
207 gdbarch_bfd_arch_info (arch
)->printable_name
);
208 tdep
->code_addr_reg_type
209 = arch_type (arch
, TYPE_CODE_PTR
, code_addr_reg_bits
/ TARGET_CHAR_BIT
,
210 xstrdup (type_name
));
211 TYPE_TARGET_TYPE (tdep
->code_addr_reg_type
) = tdep
->func_voyd
;
212 TYPE_UNSIGNED (tdep
->code_addr_reg_type
) = 1;
214 tdep
->uint8
= arch_integer_type (arch
, 8, 1, "uint8_t");
215 tdep
->uint16
= arch_integer_type (arch
, 16, 1, "uint16_t");
216 tdep
->int8
= arch_integer_type (arch
, 8, 0, "int8_t");
217 tdep
->int16
= arch_integer_type (arch
, 16, 0, "int16_t");
218 tdep
->int32
= arch_integer_type (arch
, 32, 0, "int32_t");
219 tdep
->int64
= arch_integer_type (arch
, 64, 0, "int64_t");
227 m32c_register_name (struct gdbarch
*gdbarch
, int num
)
229 return gdbarch_tdep (gdbarch
)->regs
[num
].name
;
234 m32c_register_type (struct gdbarch
*arch
, int reg_nr
)
236 return gdbarch_tdep (arch
)->regs
[reg_nr
].type
;
241 m32c_register_sim_regno (struct gdbarch
*gdbarch
, int reg_nr
)
243 return gdbarch_tdep (gdbarch
)->regs
[reg_nr
].sim_num
;
248 m32c_debug_info_reg_to_regnum (struct gdbarch
*gdbarch
, int reg_nr
)
250 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
251 if (0 <= reg_nr
&& reg_nr
<= M32C_MAX_DWARF_REGNUM
252 && tdep
->dwarf_regs
[reg_nr
])
253 return tdep
->dwarf_regs
[reg_nr
]->num
;
255 /* The DWARF CFI code expects to see -1 for invalid register
262 m32c_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
263 struct reggroup
*group
)
265 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
266 struct m32c_reg
*reg
= &tdep
->regs
[regnum
];
268 /* The anonymous raw registers aren't in any groups. */
272 if (group
== all_reggroup
)
275 if (group
== general_reggroup
279 if (group
== m32c_dma_reggroup
283 if (group
== system_reggroup
287 /* Since the m32c DWARF register numbers refer to cooked registers, not
288 raw registers, and frame_pop depends on the save and restore groups
289 containing registers the DWARF CFI will actually mention, our save
290 and restore groups are cooked registers, not raw registers. (This is
291 why we can't use the default reggroup function.) */
292 if ((group
== save_reggroup
293 || group
== restore_reggroup
)
294 && reg
->save_restore_p
)
301 /* Register move functions. We declare them here using
302 m32c_move_reg_t to check the types. */
303 static m32c_move_reg_t m32c_raw_read
, m32c_raw_write
;
304 static m32c_move_reg_t m32c_banked_read
, m32c_banked_write
;
305 static m32c_move_reg_t m32c_sb_read
, m32c_sb_write
;
306 static m32c_move_reg_t m32c_part_read
, m32c_part_write
;
307 static m32c_move_reg_t m32c_cat_read
, m32c_cat_write
;
308 static m32c_move_reg_t m32c_r3r2r1r0_read
, m32c_r3r2r1r0_write
;
311 /* Copy the value of the raw register REG from CACHE to BUF. */
312 static enum register_status
313 m32c_raw_read (struct m32c_reg
*reg
, struct regcache
*cache
, void *buf
)
315 return regcache_raw_read (cache
, reg
->num
, buf
);
319 /* Copy the value of the raw register REG from BUF to CACHE. */
320 static enum register_status
321 m32c_raw_write (struct m32c_reg
*reg
, struct regcache
*cache
, void *buf
)
323 regcache_raw_write (cache
, reg
->num
, (const void *) buf
);
329 /* Return the value of the 'flg' register in CACHE. */
331 m32c_read_flg (struct regcache
*cache
)
333 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (cache
));
335 regcache_raw_read_unsigned (cache
, tdep
->flg
->num
, &flg
);
340 /* Evaluate the real register number of a banked register. */
341 static struct m32c_reg
*
342 m32c_banked_register (struct m32c_reg
*reg
, struct regcache
*cache
)
344 return ((m32c_read_flg (cache
) & reg
->n
) ? reg
->ry
: reg
->rx
);
348 /* Move the value of a banked register from CACHE to BUF.
349 If the value of the 'flg' register in CACHE has any of the bits
350 masked in REG->n set, then read REG->ry. Otherwise, read
352 static enum register_status
353 m32c_banked_read (struct m32c_reg
*reg
, struct regcache
*cache
, void *buf
)
355 struct m32c_reg
*bank_reg
= m32c_banked_register (reg
, cache
);
356 return regcache_raw_read (cache
, bank_reg
->num
, buf
);
360 /* Move the value of a banked register from BUF to CACHE.
361 If the value of the 'flg' register in CACHE has any of the bits
362 masked in REG->n set, then write REG->ry. Otherwise, write
364 static enum register_status
365 m32c_banked_write (struct m32c_reg
*reg
, struct regcache
*cache
, void *buf
)
367 struct m32c_reg
*bank_reg
= m32c_banked_register (reg
, cache
);
368 regcache_raw_write (cache
, bank_reg
->num
, (const void *) buf
);
374 /* Move the value of SB from CACHE to BUF. On bfd_mach_m32c, SB is a
375 banked register; on bfd_mach_m16c, it's not. */
376 static enum register_status
377 m32c_sb_read (struct m32c_reg
*reg
, struct regcache
*cache
, void *buf
)
379 if (gdbarch_bfd_arch_info (reg
->arch
)->mach
== bfd_mach_m16c
)
380 return m32c_raw_read (reg
->rx
, cache
, buf
);
382 return m32c_banked_read (reg
, cache
, buf
);
386 /* Move the value of SB from BUF to CACHE. On bfd_mach_m32c, SB is a
387 banked register; on bfd_mach_m16c, it's not. */
388 static enum register_status
389 m32c_sb_write (struct m32c_reg
*reg
, struct regcache
*cache
, void *buf
)
391 if (gdbarch_bfd_arch_info (reg
->arch
)->mach
== bfd_mach_m16c
)
392 m32c_raw_write (reg
->rx
, cache
, buf
);
394 m32c_banked_write (reg
, cache
, buf
);
400 /* Assuming REG uses m32c_part_read and m32c_part_write, set *OFFSET_P
401 and *LEN_P to the offset and length, in bytes, of the part REG
402 occupies in its underlying register. The offset is from the
403 lower-addressed end, regardless of the architecture's endianness.
404 (The M32C family is always little-endian, but let's keep those
405 assumptions out of here.) */
407 m32c_find_part (struct m32c_reg
*reg
, int *offset_p
, int *len_p
)
409 /* The length of the containing register, of which REG is one part. */
410 int containing_len
= TYPE_LENGTH (reg
->rx
->type
);
412 /* The length of one "element" in our imaginary array. */
413 int elt_len
= TYPE_LENGTH (reg
->type
);
415 /* The offset of REG's "element" from the least significant end of
416 the containing register. */
417 int elt_offset
= reg
->n
* elt_len
;
419 /* If we extend off the end, trim the length of the element. */
420 if (elt_offset
+ elt_len
> containing_len
)
422 elt_len
= containing_len
- elt_offset
;
423 /* We shouldn't be declaring partial registers that go off the
424 end of their containing registers. */
425 gdb_assert (elt_len
> 0);
428 /* Flip the offset around if we're big-endian. */
429 if (gdbarch_byte_order (reg
->arch
) == BFD_ENDIAN_BIG
)
430 elt_offset
= TYPE_LENGTH (reg
->rx
->type
) - elt_offset
- elt_len
;
432 *offset_p
= elt_offset
;
437 /* Move the value of a partial register (r0h, intbl, etc.) from CACHE
438 to BUF. Treating the value of the register REG->rx as an array of
439 REG->type values, where higher indices refer to more significant
440 bits, read the value of the REG->n'th element. */
441 static enum register_status
442 m32c_part_read (struct m32c_reg
*reg
, struct regcache
*cache
, void *buf
)
446 memset (buf
, 0, TYPE_LENGTH (reg
->type
));
447 m32c_find_part (reg
, &offset
, &len
);
448 return regcache_cooked_read_part (cache
, reg
->rx
->num
, offset
, len
, buf
);
452 /* Move the value of a banked register from BUF to CACHE.
453 Treating the value of the register REG->rx as an array of REG->type
454 values, where higher indices refer to more significant bits, write
455 the value of the REG->n'th element. */
456 static enum register_status
457 m32c_part_write (struct m32c_reg
*reg
, struct regcache
*cache
, void *buf
)
461 m32c_find_part (reg
, &offset
, &len
);
462 regcache_cooked_write_part (cache
, reg
->rx
->num
, offset
, len
, buf
);
468 /* Move the value of REG from CACHE to BUF. REG's value is the
469 concatenation of the values of the registers REG->rx and REG->ry,
470 with REG->rx contributing the more significant bits. */
471 static enum register_status
472 m32c_cat_read (struct m32c_reg
*reg
, struct regcache
*cache
, void *buf
)
474 int high_bytes
= TYPE_LENGTH (reg
->rx
->type
);
475 int low_bytes
= TYPE_LENGTH (reg
->ry
->type
);
476 /* For address arithmetic. */
477 unsigned char *cbuf
= buf
;
478 enum register_status status
;
480 gdb_assert (TYPE_LENGTH (reg
->type
) == high_bytes
+ low_bytes
);
482 if (gdbarch_byte_order (reg
->arch
) == BFD_ENDIAN_BIG
)
484 status
= regcache_cooked_read (cache
, reg
->rx
->num
, cbuf
);
485 if (status
== REG_VALID
)
486 status
= regcache_cooked_read (cache
, reg
->ry
->num
, cbuf
+ high_bytes
);
490 status
= regcache_cooked_read (cache
, reg
->rx
->num
, cbuf
+ low_bytes
);
491 if (status
== REG_VALID
)
492 status
= regcache_cooked_read (cache
, reg
->ry
->num
, cbuf
);
499 /* Move the value of REG from CACHE to BUF. REG's value is the
500 concatenation of the values of the registers REG->rx and REG->ry,
501 with REG->rx contributing the more significant bits. */
502 static enum register_status
503 m32c_cat_write (struct m32c_reg
*reg
, struct regcache
*cache
, void *buf
)
505 int high_bytes
= TYPE_LENGTH (reg
->rx
->type
);
506 int low_bytes
= TYPE_LENGTH (reg
->ry
->type
);
507 /* For address arithmetic. */
508 unsigned char *cbuf
= buf
;
510 gdb_assert (TYPE_LENGTH (reg
->type
) == high_bytes
+ low_bytes
);
512 if (gdbarch_byte_order (reg
->arch
) == BFD_ENDIAN_BIG
)
514 regcache_cooked_write (cache
, reg
->rx
->num
, cbuf
);
515 regcache_cooked_write (cache
, reg
->ry
->num
, cbuf
+ high_bytes
);
519 regcache_cooked_write (cache
, reg
->rx
->num
, cbuf
+ low_bytes
);
520 regcache_cooked_write (cache
, reg
->ry
->num
, cbuf
);
527 /* Copy the value of the raw register REG from CACHE to BUF. REG is
528 the concatenation (from most significant to least) of r3, r2, r1,
530 static enum register_status
531 m32c_r3r2r1r0_read (struct m32c_reg
*reg
, struct regcache
*cache
, void *buf
)
533 struct gdbarch_tdep
*tdep
= gdbarch_tdep (reg
->arch
);
534 int len
= TYPE_LENGTH (tdep
->r0
->type
);
535 enum register_status status
;
537 /* For address arithmetic. */
538 unsigned char *cbuf
= buf
;
540 if (gdbarch_byte_order (reg
->arch
) == BFD_ENDIAN_BIG
)
542 status
= regcache_cooked_read (cache
, tdep
->r0
->num
, cbuf
+ len
* 3);
543 if (status
== REG_VALID
)
544 status
= regcache_cooked_read (cache
, tdep
->r1
->num
, cbuf
+ len
* 2);
545 if (status
== REG_VALID
)
546 status
= regcache_cooked_read (cache
, tdep
->r2
->num
, cbuf
+ len
* 1);
547 if (status
== REG_VALID
)
548 status
= regcache_cooked_read (cache
, tdep
->r3
->num
, cbuf
);
552 status
= regcache_cooked_read (cache
, tdep
->r0
->num
, cbuf
);
553 if (status
== REG_VALID
)
554 status
= regcache_cooked_read (cache
, tdep
->r1
->num
, cbuf
+ len
* 1);
555 if (status
== REG_VALID
)
556 status
= regcache_cooked_read (cache
, tdep
->r2
->num
, cbuf
+ len
* 2);
557 if (status
== REG_VALID
)
558 status
= regcache_cooked_read (cache
, tdep
->r3
->num
, cbuf
+ len
* 3);
565 /* Copy the value of the raw register REG from BUF to CACHE. REG is
566 the concatenation (from most significant to least) of r3, r2, r1,
568 static enum register_status
569 m32c_r3r2r1r0_write (struct m32c_reg
*reg
, struct regcache
*cache
, void *buf
)
571 struct gdbarch_tdep
*tdep
= gdbarch_tdep (reg
->arch
);
572 int len
= TYPE_LENGTH (tdep
->r0
->type
);
574 /* For address arithmetic. */
575 unsigned char *cbuf
= buf
;
577 if (gdbarch_byte_order (reg
->arch
) == BFD_ENDIAN_BIG
)
579 regcache_cooked_write (cache
, tdep
->r0
->num
, cbuf
+ len
* 3);
580 regcache_cooked_write (cache
, tdep
->r1
->num
, cbuf
+ len
* 2);
581 regcache_cooked_write (cache
, tdep
->r2
->num
, cbuf
+ len
* 1);
582 regcache_cooked_write (cache
, tdep
->r3
->num
, cbuf
);
586 regcache_cooked_write (cache
, tdep
->r0
->num
, cbuf
);
587 regcache_cooked_write (cache
, tdep
->r1
->num
, cbuf
+ len
* 1);
588 regcache_cooked_write (cache
, tdep
->r2
->num
, cbuf
+ len
* 2);
589 regcache_cooked_write (cache
, tdep
->r3
->num
, cbuf
+ len
* 3);
596 static enum register_status
597 m32c_pseudo_register_read (struct gdbarch
*arch
,
598 struct regcache
*cache
,
602 struct gdbarch_tdep
*tdep
= gdbarch_tdep (arch
);
603 struct m32c_reg
*reg
;
605 gdb_assert (0 <= cookednum
&& cookednum
< tdep
->num_regs
);
606 gdb_assert (arch
== get_regcache_arch (cache
));
607 gdb_assert (arch
== tdep
->regs
[cookednum
].arch
);
608 reg
= &tdep
->regs
[cookednum
];
610 return reg
->read (reg
, cache
, buf
);
615 m32c_pseudo_register_write (struct gdbarch
*arch
,
616 struct regcache
*cache
,
620 struct gdbarch_tdep
*tdep
= gdbarch_tdep (arch
);
621 struct m32c_reg
*reg
;
623 gdb_assert (0 <= cookednum
&& cookednum
< tdep
->num_regs
);
624 gdb_assert (arch
== get_regcache_arch (cache
));
625 gdb_assert (arch
== tdep
->regs
[cookednum
].arch
);
626 reg
= &tdep
->regs
[cookednum
];
628 reg
->write (reg
, cache
, (void *) buf
);
632 /* Add a register with the given fields to the end of ARCH's table.
633 Return a pointer to the newly added register. */
634 static struct m32c_reg
*
635 add_reg (struct gdbarch
*arch
,
639 m32c_move_reg_t
*read
,
640 m32c_move_reg_t
*write
,
645 struct gdbarch_tdep
*tdep
= gdbarch_tdep (arch
);
646 struct m32c_reg
*r
= &tdep
->regs
[tdep
->num_regs
];
648 gdb_assert (tdep
->num_regs
< M32C_MAX_NUM_REGS
);
653 r
->num
= tdep
->num_regs
;
654 r
->sim_num
= sim_num
;
659 r
->save_restore_p
= 0;
672 /* Record NUM as REG's DWARF register number. */
674 set_dwarf_regnum (struct m32c_reg
*reg
, int num
)
676 gdb_assert (num
< M32C_MAX_NUM_REGS
);
678 /* Update the reg->DWARF mapping. Only count the first number
679 assigned to this register. */
680 if (reg
->dwarf_num
== -1)
681 reg
->dwarf_num
= num
;
683 /* Update the DWARF->reg mapping. */
684 gdbarch_tdep (reg
->arch
)->dwarf_regs
[num
] = reg
;
688 /* Mark REG as a general-purpose register, and return it. */
689 static struct m32c_reg
*
690 mark_general (struct m32c_reg
*reg
)
697 /* Mark REG as a DMA register, and return it. */
698 static struct m32c_reg
*
699 mark_dma (struct m32c_reg
*reg
)
706 /* Mark REG as a SYSTEM register, and return it. */
707 static struct m32c_reg
*
708 mark_system (struct m32c_reg
*reg
)
715 /* Mark REG as a save-restore register, and return it. */
716 static struct m32c_reg
*
717 mark_save_restore (struct m32c_reg
*reg
)
719 reg
->save_restore_p
= 1;
724 #define FLAGBIT_B 0x0010
725 #define FLAGBIT_U 0x0080
727 /* Handy macros for declaring registers. These all evaluate to
728 pointers to the register declared. Macros that define two
729 registers evaluate to a pointer to the first. */
731 /* A raw register named NAME, with type TYPE and sim number SIM_NUM. */
732 #define R(name, type, sim_num) \
733 (add_reg (arch, (name), (type), (sim_num), \
734 m32c_raw_read, m32c_raw_write, NULL, NULL, 0))
736 /* The simulator register number for a raw register named NAME. */
737 #define SIM(name) (m32c_sim_reg_ ## name)
739 /* A raw unsigned 16-bit data register named NAME.
740 NAME should be an identifier, not a string. */
742 (R(#name, tdep->uint16, SIM (name)))
744 /* A raw data address register named NAME.
745 NAME should be an identifier, not a string. */
747 (R(#name, tdep->data_addr_reg_type, SIM (name)))
749 /* A raw code address register named NAME. NAME should
750 be an identifier, not a string. */
752 (R(#name, tdep->code_addr_reg_type, SIM (name)))
754 /* A pair of raw registers named NAME0 and NAME1, with type TYPE.
755 NAME should be an identifier, not a string. */
756 #define RP(name, type) \
757 (R(#name "0", (type), SIM (name ## 0)), \
758 R(#name "1", (type), SIM (name ## 1)) - 1)
760 /* A raw banked general-purpose data register named NAME.
761 NAME should be an identifier, not a string. */
763 (R(NULL, tdep->int16, SIM (name ## _bank0)), \
764 R(NULL, tdep->int16, SIM (name ## _bank1)) - 1)
766 /* A raw banked data address register named NAME.
767 NAME should be an identifier, not a string. */
769 (R(NULL, tdep->data_addr_reg_type, SIM (name ## _bank0)), \
770 R(NULL, tdep->data_addr_reg_type, SIM (name ## _bank1)) - 1)
772 /* A cooked register named NAME referring to a raw banked register
773 from the bank selected by the current value of FLG. RAW_PAIR
774 should be a pointer to the first register in the banked pair.
775 NAME must be an identifier, not a string. */
776 #define CB(name, raw_pair) \
777 (add_reg (arch, #name, (raw_pair)->type, 0, \
778 m32c_banked_read, m32c_banked_write, \
779 (raw_pair), (raw_pair + 1), FLAGBIT_B))
781 /* A pair of registers named NAMEH and NAMEL, of type TYPE, that
782 access the top and bottom halves of the register pointed to by
783 NAME. NAME should be an identifier. */
784 #define CHL(name, type) \
785 (add_reg (arch, #name "h", (type), 0, \
786 m32c_part_read, m32c_part_write, name, NULL, 1), \
787 add_reg (arch, #name "l", (type), 0, \
788 m32c_part_read, m32c_part_write, name, NULL, 0) - 1)
790 /* A register constructed by concatenating the two registers HIGH and
791 LOW, whose name is HIGHLOW and whose type is TYPE. */
792 #define CCAT(high, low, type) \
793 (add_reg (arch, #high #low, (type), 0, \
794 m32c_cat_read, m32c_cat_write, (high), (low), 0))
796 /* Abbreviations for marking register group membership. */
797 #define G(reg) (mark_general (reg))
798 #define S(reg) (mark_system (reg))
799 #define DMA(reg) (mark_dma (reg))
802 /* Construct the register set for ARCH. */
804 make_regs (struct gdbarch
*arch
)
806 struct gdbarch_tdep
*tdep
= gdbarch_tdep (arch
);
807 int mach
= gdbarch_bfd_arch_info (arch
)->mach
;
820 struct m32c_reg
*r0hl
;
821 struct m32c_reg
*r1hl
;
822 struct m32c_reg
*r2hl
;
823 struct m32c_reg
*r3hl
;
824 struct m32c_reg
*intbhl
;
825 struct m32c_reg
*r2r0
;
826 struct m32c_reg
*r3r1
;
827 struct m32c_reg
*r3r1r2r0
;
828 struct m32c_reg
*r3r2r1r0
;
829 struct m32c_reg
*a1a0
;
831 struct m32c_reg
*raw_r0_pair
= RBD (r0
);
832 struct m32c_reg
*raw_r1_pair
= RBD (r1
);
833 struct m32c_reg
*raw_r2_pair
= RBD (r2
);
834 struct m32c_reg
*raw_r3_pair
= RBD (r3
);
835 struct m32c_reg
*raw_a0_pair
= RBA (a0
);
836 struct m32c_reg
*raw_a1_pair
= RBA (a1
);
837 struct m32c_reg
*raw_fb_pair
= RBA (fb
);
839 /* sb is banked on the bfd_mach_m32c, but not on bfd_mach_m16c.
840 We always declare both raw registers, and deal with the distinction
841 in the pseudoregister. */
842 struct m32c_reg
*raw_sb_pair
= RBA (sb
);
844 struct m32c_reg
*usp
= S (RA (usp
));
845 struct m32c_reg
*isp
= S (RA (isp
));
846 struct m32c_reg
*intb
= S (RC (intb
));
847 struct m32c_reg
*pc
= G (RC (pc
));
848 struct m32c_reg
*flg
= G (R16U (flg
));
850 if (mach
== bfd_mach_m32c
)
852 struct m32c_reg
*svf
= S (R16U (svf
));
853 struct m32c_reg
*svp
= S (RC (svp
));
854 struct m32c_reg
*vct
= S (RC (vct
));
856 struct m32c_reg
*dmd01
= DMA (RP (dmd
, tdep
->uint8
));
857 struct m32c_reg
*dct01
= DMA (RP (dct
, tdep
->uint16
));
858 struct m32c_reg
*drc01
= DMA (RP (drc
, tdep
->uint16
));
859 struct m32c_reg
*dma01
= DMA (RP (dma
, tdep
->data_addr_reg_type
));
860 struct m32c_reg
*dsa01
= DMA (RP (dsa
, tdep
->data_addr_reg_type
));
861 struct m32c_reg
*dra01
= DMA (RP (dra
, tdep
->data_addr_reg_type
));
864 num_raw_regs
= tdep
->num_regs
;
866 r0
= G (CB (r0
, raw_r0_pair
));
867 r1
= G (CB (r1
, raw_r1_pair
));
868 r2
= G (CB (r2
, raw_r2_pair
));
869 r3
= G (CB (r3
, raw_r3_pair
));
870 a0
= G (CB (a0
, raw_a0_pair
));
871 a1
= G (CB (a1
, raw_a1_pair
));
872 fb
= G (CB (fb
, raw_fb_pair
));
874 /* sb is banked on the bfd_mach_m32c, but not on bfd_mach_m16c.
875 Specify custom read/write functions that do the right thing. */
876 sb
= G (add_reg (arch
, "sb", raw_sb_pair
->type
, 0,
877 m32c_sb_read
, m32c_sb_write
,
878 raw_sb_pair
, raw_sb_pair
+ 1, 0));
880 /* The current sp is either usp or isp, depending on the value of
881 the FLG register's U bit. */
882 sp
= G (add_reg (arch
, "sp", usp
->type
, 0,
883 m32c_banked_read
, m32c_banked_write
,
884 isp
, usp
, FLAGBIT_U
));
886 r0hl
= CHL (r0
, tdep
->int8
);
887 r1hl
= CHL (r1
, tdep
->int8
);
888 r2hl
= CHL (r2
, tdep
->int8
);
889 r3hl
= CHL (r3
, tdep
->int8
);
890 intbhl
= CHL (intb
, tdep
->int16
);
892 r2r0
= CCAT (r2
, r0
, tdep
->int32
);
893 r3r1
= CCAT (r3
, r1
, tdep
->int32
);
894 r3r1r2r0
= CCAT (r3r1
, r2r0
, tdep
->int64
);
897 = add_reg (arch
, "r3r2r1r0", tdep
->int64
, 0,
898 m32c_r3r2r1r0_read
, m32c_r3r2r1r0_write
, NULL
, NULL
, 0);
900 if (mach
== bfd_mach_m16c
)
901 a1a0
= CCAT (a1
, a0
, tdep
->int32
);
905 num_cooked_regs
= tdep
->num_regs
- num_raw_regs
;
914 tdep
->r3r2r1r0
= r3r2r1r0
;
915 tdep
->r3r1r2r0
= r3r1r2r0
;
922 /* Set up the DWARF register table. */
923 memset (tdep
->dwarf_regs
, 0, sizeof (tdep
->dwarf_regs
));
924 set_dwarf_regnum (r0hl
+ 1, 0x01);
925 set_dwarf_regnum (r0hl
+ 0, 0x02);
926 set_dwarf_regnum (r1hl
+ 1, 0x03);
927 set_dwarf_regnum (r1hl
+ 0, 0x04);
928 set_dwarf_regnum (r0
, 0x05);
929 set_dwarf_regnum (r1
, 0x06);
930 set_dwarf_regnum (r2
, 0x07);
931 set_dwarf_regnum (r3
, 0x08);
932 set_dwarf_regnum (a0
, 0x09);
933 set_dwarf_regnum (a1
, 0x0a);
934 set_dwarf_regnum (fb
, 0x0b);
935 set_dwarf_regnum (sp
, 0x0c);
936 set_dwarf_regnum (pc
, 0x0d); /* GCC's invention */
937 set_dwarf_regnum (sb
, 0x13);
938 set_dwarf_regnum (r2r0
, 0x15);
939 set_dwarf_regnum (r3r1
, 0x16);
941 set_dwarf_regnum (a1a0
, 0x17);
943 /* Enumerate the save/restore register group.
945 The regcache_save and regcache_restore functions apply their read
946 function to each register in this group.
948 Since frame_pop supplies frame_unwind_register as its read
949 function, the registers meaningful to the Dwarf unwinder need to
952 On the other hand, when we make inferior calls, save_inferior_status
953 and restore_inferior_status use them to preserve the current register
954 values across the inferior call. For this, you'd kind of like to
955 preserve all the raw registers, to protect the interrupted code from
956 any sort of bank switching the callee might have done. But we handle
957 those cases so badly anyway --- for example, it matters whether we
958 restore FLG before or after we restore the general-purpose registers,
959 but there's no way to express that --- that it isn't worth worrying
962 We omit control registers like inthl: if you call a function that
963 changes those, it's probably because you wanted that change to be
964 visible to the interrupted code. */
965 mark_save_restore (r0
);
966 mark_save_restore (r1
);
967 mark_save_restore (r2
);
968 mark_save_restore (r3
);
969 mark_save_restore (a0
);
970 mark_save_restore (a1
);
971 mark_save_restore (sb
);
972 mark_save_restore (fb
);
973 mark_save_restore (sp
);
974 mark_save_restore (pc
);
975 mark_save_restore (flg
);
977 set_gdbarch_num_regs (arch
, num_raw_regs
);
978 set_gdbarch_num_pseudo_regs (arch
, num_cooked_regs
);
979 set_gdbarch_pc_regnum (arch
, pc
->num
);
980 set_gdbarch_sp_regnum (arch
, sp
->num
);
981 set_gdbarch_register_name (arch
, m32c_register_name
);
982 set_gdbarch_register_type (arch
, m32c_register_type
);
983 set_gdbarch_pseudo_register_read (arch
, m32c_pseudo_register_read
);
984 set_gdbarch_pseudo_register_write (arch
, m32c_pseudo_register_write
);
985 set_gdbarch_register_sim_regno (arch
, m32c_register_sim_regno
);
986 set_gdbarch_stab_reg_to_regnum (arch
, m32c_debug_info_reg_to_regnum
);
987 set_gdbarch_dwarf2_reg_to_regnum (arch
, m32c_debug_info_reg_to_regnum
);
988 set_gdbarch_register_reggroup_p (arch
, m32c_register_reggroup_p
);
990 reggroup_add (arch
, general_reggroup
);
991 reggroup_add (arch
, all_reggroup
);
992 reggroup_add (arch
, save_reggroup
);
993 reggroup_add (arch
, restore_reggroup
);
994 reggroup_add (arch
, system_reggroup
);
995 reggroup_add (arch
, m32c_dma_reggroup
);
1002 static const unsigned char *
1003 m32c_breakpoint_from_pc (struct gdbarch
*gdbarch
, CORE_ADDR
*pc
, int *len
)
1005 static unsigned char break_insn
[] = { 0x00 }; /* brk */
1007 *len
= sizeof (break_insn
);
1013 /* Prologue analysis. */
1015 struct m32c_prologue
1017 /* For consistency with the DWARF 2 .debug_frame info generated by
1018 GCC, a frame's CFA is the address immediately after the saved
1021 /* The architecture for which we generated this prologue info. */
1022 struct gdbarch
*arch
;
1025 /* This function uses a frame pointer. */
1026 prologue_with_frame_ptr
,
1028 /* This function has no frame pointer. */
1029 prologue_sans_frame_ptr
,
1031 /* This function sets up the stack, so its frame is the first
1032 frame on the stack. */
1033 prologue_first_frame
1037 /* If KIND is prologue_with_frame_ptr, this is the offset from the
1038 CFA to where the frame pointer points. This is always zero or
1040 LONGEST frame_ptr_offset
;
1042 /* If KIND is prologue_sans_frame_ptr, the offset from the CFA to
1043 the stack pointer --- always zero or negative.
1045 Calling this a "size" is a bit misleading, but given that the
1046 stack grows downwards, using offsets for everything keeps one
1047 from going completely sign-crazy: you never change anything's
1048 sign for an ADD instruction; always change the second operand's
1049 sign for a SUB instruction; and everything takes care of
1052 Functions that use alloca don't have a constant frame size. But
1053 they always have frame pointers, so we must use that to find the
1054 CFA (and perhaps to unwind the stack pointer). */
1057 /* The address of the first instruction at which the frame has been
1058 set up and the arguments are where the debug info says they are
1059 --- as best as we can tell. */
1060 CORE_ADDR prologue_end
;
1062 /* reg_offset[R] is the offset from the CFA at which register R is
1063 saved, or 1 if register R has not been saved. (Real values are
1064 always zero or negative.) */
1065 LONGEST reg_offset
[M32C_MAX_NUM_REGS
];
1069 /* The longest I've seen, anyway. */
1070 #define M32C_MAX_INSN_LEN (9)
1072 /* Processor state, for the prologue analyzer. */
1073 struct m32c_pv_state
1075 struct gdbarch
*arch
;
1076 pv_t r0
, r1
, r2
, r3
;
1080 struct pv_area
*stack
;
1082 /* Bytes from the current PC, the address they were read from,
1083 and the address of the next unconsumed byte. */
1084 gdb_byte insn
[M32C_MAX_INSN_LEN
];
1085 CORE_ADDR scan_pc
, next_addr
;
1089 /* Push VALUE on STATE's stack, occupying SIZE bytes. Return zero if
1090 all went well, or non-zero if simulating the action would trash our
1093 m32c_pv_push (struct m32c_pv_state
*state
, pv_t value
, int size
)
1095 if (pv_area_store_would_trash (state
->stack
, state
->sp
))
1098 state
->sp
= pv_add_constant (state
->sp
, -size
);
1099 pv_area_store (state
->stack
, state
->sp
, size
, value
);
1105 /* A source or destination location for an m16c or m32c
1109 /* If srcdest_reg, the location is a register pointed to by REG.
1110 If srcdest_partial_reg, the location is part of a register pointed
1111 to by REG. We don't try to handle this too well.
1112 If srcdest_mem, the location is memory whose address is ADDR. */
1113 enum { srcdest_reg
, srcdest_partial_reg
, srcdest_mem
} kind
;
1118 /* Return the SIZE-byte value at LOC in STATE. */
1120 m32c_srcdest_fetch (struct m32c_pv_state
*state
, struct srcdest loc
, int size
)
1122 if (loc
.kind
== srcdest_mem
)
1123 return pv_area_fetch (state
->stack
, loc
.addr
, size
);
1124 else if (loc
.kind
== srcdest_partial_reg
)
1125 return pv_unknown ();
1131 /* Write VALUE, a SIZE-byte value, to LOC in STATE. Return zero if
1132 all went well, or non-zero if simulating the store would trash our
1135 m32c_srcdest_store (struct m32c_pv_state
*state
, struct srcdest loc
,
1136 pv_t value
, int size
)
1138 if (loc
.kind
== srcdest_mem
)
1140 if (pv_area_store_would_trash (state
->stack
, loc
.addr
))
1142 pv_area_store (state
->stack
, loc
.addr
, size
, value
);
1144 else if (loc
.kind
== srcdest_partial_reg
)
1145 *loc
.reg
= pv_unknown ();
1154 m32c_sign_ext (int v
, int bits
)
1156 int mask
= 1 << (bits
- 1);
1157 return (v
^ mask
) - mask
;
1161 m32c_next_byte (struct m32c_pv_state
*st
)
1163 gdb_assert (st
->next_addr
- st
->scan_pc
< sizeof (st
->insn
));
1164 return st
->insn
[st
->next_addr
++ - st
->scan_pc
];
1168 m32c_udisp8 (struct m32c_pv_state
*st
)
1170 return m32c_next_byte (st
);
1175 m32c_sdisp8 (struct m32c_pv_state
*st
)
1177 return m32c_sign_ext (m32c_next_byte (st
), 8);
1182 m32c_udisp16 (struct m32c_pv_state
*st
)
1184 int low
= m32c_next_byte (st
);
1185 int high
= m32c_next_byte (st
);
1187 return low
+ (high
<< 8);
1192 m32c_sdisp16 (struct m32c_pv_state
*st
)
1194 int low
= m32c_next_byte (st
);
1195 int high
= m32c_next_byte (st
);
1197 return m32c_sign_ext (low
+ (high
<< 8), 16);
1202 m32c_udisp24 (struct m32c_pv_state
*st
)
1204 int low
= m32c_next_byte (st
);
1205 int mid
= m32c_next_byte (st
);
1206 int high
= m32c_next_byte (st
);
1208 return low
+ (mid
<< 8) + (high
<< 16);
1212 /* Extract the 'source' field from an m32c MOV.size:G-format instruction. */
1214 m32c_get_src23 (unsigned char *i
)
1216 return (((i
[0] & 0x70) >> 2)
1217 | ((i
[1] & 0x30) >> 4));
1221 /* Extract the 'dest' field from an m32c MOV.size:G-format instruction. */
1223 m32c_get_dest23 (unsigned char *i
)
1225 return (((i
[0] & 0x0e) << 1)
1226 | ((i
[1] & 0xc0) >> 6));
1230 static struct srcdest
1231 m32c_decode_srcdest4 (struct m32c_pv_state
*st
,
1237 sd
.kind
= (size
== 2 ? srcdest_reg
: srcdest_partial_reg
);
1239 sd
.kind
= srcdest_mem
;
1241 sd
.addr
= pv_unknown ();
1246 case 0x0: sd
.reg
= (size
== 1 ? &st
->r0
: &st
->r0
); break;
1247 case 0x1: sd
.reg
= (size
== 1 ? &st
->r0
: &st
->r1
); break;
1248 case 0x2: sd
.reg
= (size
== 1 ? &st
->r1
: &st
->r2
); break;
1249 case 0x3: sd
.reg
= (size
== 1 ? &st
->r1
: &st
->r3
); break;
1251 case 0x4: sd
.reg
= &st
->a0
; break;
1252 case 0x5: sd
.reg
= &st
->a1
; break;
1254 case 0x6: sd
.addr
= st
->a0
; break;
1255 case 0x7: sd
.addr
= st
->a1
; break;
1257 case 0x8: sd
.addr
= pv_add_constant (st
->a0
, m32c_udisp8 (st
)); break;
1258 case 0x9: sd
.addr
= pv_add_constant (st
->a1
, m32c_udisp8 (st
)); break;
1259 case 0xa: sd
.addr
= pv_add_constant (st
->sb
, m32c_udisp8 (st
)); break;
1260 case 0xb: sd
.addr
= pv_add_constant (st
->fb
, m32c_sdisp8 (st
)); break;
1262 case 0xc: sd
.addr
= pv_add_constant (st
->a0
, m32c_udisp16 (st
)); break;
1263 case 0xd: sd
.addr
= pv_add_constant (st
->a1
, m32c_udisp16 (st
)); break;
1264 case 0xe: sd
.addr
= pv_add_constant (st
->sb
, m32c_udisp16 (st
)); break;
1265 case 0xf: sd
.addr
= pv_constant (m32c_udisp16 (st
)); break;
1268 gdb_assert_not_reached ("unexpected srcdest4");
1275 static struct srcdest
1276 m32c_decode_sd23 (struct m32c_pv_state
*st
, int code
, int size
, int ind
)
1280 sd
.addr
= pv_unknown ();
1289 sd
.kind
= (size
== 1) ? srcdest_partial_reg
: srcdest_reg
;
1294 sd
.kind
= (size
== 4) ? srcdest_reg
: srcdest_partial_reg
;
1298 sd
.kind
= srcdest_mem
;
1305 case 0x12: sd
.reg
= &st
->r0
; break;
1306 case 0x13: sd
.reg
= &st
->r1
; break;
1307 case 0x10: sd
.reg
= ((size
== 1) ? &st
->r0
: &st
->r2
); break;
1308 case 0x11: sd
.reg
= ((size
== 1) ? &st
->r1
: &st
->r3
); break;
1309 case 0x02: sd
.reg
= &st
->a0
; break;
1310 case 0x03: sd
.reg
= &st
->a1
; break;
1312 case 0x00: sd
.addr
= st
->a0
; break;
1313 case 0x01: sd
.addr
= st
->a1
; break;
1314 case 0x04: sd
.addr
= pv_add_constant (st
->a0
, m32c_udisp8 (st
)); break;
1315 case 0x05: sd
.addr
= pv_add_constant (st
->a1
, m32c_udisp8 (st
)); break;
1316 case 0x06: sd
.addr
= pv_add_constant (st
->sb
, m32c_udisp8 (st
)); break;
1317 case 0x07: sd
.addr
= pv_add_constant (st
->fb
, m32c_sdisp8 (st
)); break;
1318 case 0x08: sd
.addr
= pv_add_constant (st
->a0
, m32c_udisp16 (st
)); break;
1319 case 0x09: sd
.addr
= pv_add_constant (st
->a1
, m32c_udisp16 (st
)); break;
1320 case 0x0a: sd
.addr
= pv_add_constant (st
->sb
, m32c_udisp16 (st
)); break;
1321 case 0x0b: sd
.addr
= pv_add_constant (st
->fb
, m32c_sdisp16 (st
)); break;
1322 case 0x0c: sd
.addr
= pv_add_constant (st
->a0
, m32c_udisp24 (st
)); break;
1323 case 0x0d: sd
.addr
= pv_add_constant (st
->a1
, m32c_udisp24 (st
)); break;
1324 case 0x0f: sd
.addr
= pv_constant (m32c_udisp16 (st
)); break;
1325 case 0x0e: sd
.addr
= pv_constant (m32c_udisp24 (st
)); break;
1327 gdb_assert_not_reached ("unexpected sd23");
1332 sd
.addr
= m32c_srcdest_fetch (st
, sd
, 4);
1333 sd
.kind
= srcdest_mem
;
1340 /* The r16c and r32c machines have instructions with similar
1341 semantics, but completely different machine language encodings. So
1342 we break out the semantics into their own functions, and leave
1343 machine-specific decoding in m32c_analyze_prologue.
1345 The following functions all expect their arguments already decoded,
1346 and they all return zero if analysis should continue past this
1347 instruction, or non-zero if analysis should stop. */
1350 /* Simulate an 'enter SIZE' instruction in STATE. */
1352 m32c_pv_enter (struct m32c_pv_state
*state
, int size
)
1354 struct gdbarch_tdep
*tdep
= gdbarch_tdep (state
->arch
);
1356 /* If simulating this store would require us to forget
1357 everything we know about the stack frame in the name of
1358 accuracy, it would be better to just quit now. */
1359 if (pv_area_store_would_trash (state
->stack
, state
->sp
))
1362 if (m32c_pv_push (state
, state
->fb
, tdep
->push_addr_bytes
))
1364 state
->fb
= state
->sp
;
1365 state
->sp
= pv_add_constant (state
->sp
, -size
);
1372 m32c_pv_pushm_one (struct m32c_pv_state
*state
, pv_t reg
,
1373 int bit
, int src
, int size
)
1377 if (m32c_pv_push (state
, reg
, size
))
1385 /* Simulate a 'pushm SRC' instruction in STATE. */
1387 m32c_pv_pushm (struct m32c_pv_state
*state
, int src
)
1389 struct gdbarch_tdep
*tdep
= gdbarch_tdep (state
->arch
);
1391 /* The bits in SRC indicating which registers to save are:
1392 r0 r1 r2 r3 a0 a1 sb fb */
1394 ( m32c_pv_pushm_one (state
, state
->fb
, 0x01, src
, tdep
->push_addr_bytes
)
1395 || m32c_pv_pushm_one (state
, state
->sb
, 0x02, src
, tdep
->push_addr_bytes
)
1396 || m32c_pv_pushm_one (state
, state
->a1
, 0x04, src
, tdep
->push_addr_bytes
)
1397 || m32c_pv_pushm_one (state
, state
->a0
, 0x08, src
, tdep
->push_addr_bytes
)
1398 || m32c_pv_pushm_one (state
, state
->r3
, 0x10, src
, 2)
1399 || m32c_pv_pushm_one (state
, state
->r2
, 0x20, src
, 2)
1400 || m32c_pv_pushm_one (state
, state
->r1
, 0x40, src
, 2)
1401 || m32c_pv_pushm_one (state
, state
->r0
, 0x80, src
, 2));
1404 /* Return non-zero if VALUE is the first incoming argument register. */
1407 m32c_is_1st_arg_reg (struct m32c_pv_state
*state
, pv_t value
)
1409 struct gdbarch_tdep
*tdep
= gdbarch_tdep (state
->arch
);
1410 return (value
.kind
== pvk_register
1411 && (gdbarch_bfd_arch_info (state
->arch
)->mach
== bfd_mach_m16c
1412 ? (value
.reg
== tdep
->r1
->num
)
1413 : (value
.reg
== tdep
->r0
->num
))
1417 /* Return non-zero if VALUE is an incoming argument register. */
1420 m32c_is_arg_reg (struct m32c_pv_state
*state
, pv_t value
)
1422 struct gdbarch_tdep
*tdep
= gdbarch_tdep (state
->arch
);
1423 return (value
.kind
== pvk_register
1424 && (gdbarch_bfd_arch_info (state
->arch
)->mach
== bfd_mach_m16c
1425 ? (value
.reg
== tdep
->r1
->num
|| value
.reg
== tdep
->r2
->num
)
1426 : (value
.reg
== tdep
->r0
->num
))
1430 /* Return non-zero if a store of VALUE to LOC is probably spilling an
1431 argument register to its stack slot in STATE. Such instructions
1432 should be included in the prologue, if possible.
1434 The store is a spill if:
1435 - the value being stored is the original value of an argument register;
1436 - the value has not already been stored somewhere in STACK; and
1437 - LOC is a stack slot (e.g., a memory location whose address is
1438 relative to the original value of the SP). */
1441 m32c_is_arg_spill (struct m32c_pv_state
*st
,
1445 struct gdbarch_tdep
*tdep
= gdbarch_tdep (st
->arch
);
1447 return (m32c_is_arg_reg (st
, value
)
1448 && loc
.kind
== srcdest_mem
1449 && pv_is_register (loc
.addr
, tdep
->sp
->num
)
1450 && ! pv_area_find_reg (st
->stack
, st
->arch
, value
.reg
, 0));
1453 /* Return non-zero if a store of VALUE to LOC is probably
1454 copying the struct return address into an address register
1455 for immediate use. This is basically a "spill" into the
1456 address register, instead of onto the stack.
1458 The prerequisites are:
1459 - value being stored is original value of the FIRST arg register;
1460 - value has not already been stored on stack; and
1461 - LOC is an address register (a0 or a1). */
1464 m32c_is_struct_return (struct m32c_pv_state
*st
,
1468 struct gdbarch_tdep
*tdep
= gdbarch_tdep (st
->arch
);
1470 return (m32c_is_1st_arg_reg (st
, value
)
1471 && !pv_area_find_reg (st
->stack
, st
->arch
, value
.reg
, 0)
1472 && loc
.kind
== srcdest_reg
1473 && (pv_is_register (*loc
.reg
, tdep
->a0
->num
)
1474 || pv_is_register (*loc
.reg
, tdep
->a1
->num
)));
1477 /* Return non-zero if a 'pushm' saving the registers indicated by SRC
1478 was a register save:
1479 - all the named registers should have their original values, and
1480 - the stack pointer should be at a constant offset from the
1481 original stack pointer. */
1483 m32c_pushm_is_reg_save (struct m32c_pv_state
*st
, int src
)
1485 struct gdbarch_tdep
*tdep
= gdbarch_tdep (st
->arch
);
1486 /* The bits in SRC indicating which registers to save are:
1487 r0 r1 r2 r3 a0 a1 sb fb */
1489 (pv_is_register (st
->sp
, tdep
->sp
->num
)
1490 && (! (src
& 0x01) || pv_is_register_k (st
->fb
, tdep
->fb
->num
, 0))
1491 && (! (src
& 0x02) || pv_is_register_k (st
->sb
, tdep
->sb
->num
, 0))
1492 && (! (src
& 0x04) || pv_is_register_k (st
->a1
, tdep
->a1
->num
, 0))
1493 && (! (src
& 0x08) || pv_is_register_k (st
->a0
, tdep
->a0
->num
, 0))
1494 && (! (src
& 0x10) || pv_is_register_k (st
->r3
, tdep
->r3
->num
, 0))
1495 && (! (src
& 0x20) || pv_is_register_k (st
->r2
, tdep
->r2
->num
, 0))
1496 && (! (src
& 0x40) || pv_is_register_k (st
->r1
, tdep
->r1
->num
, 0))
1497 && (! (src
& 0x80) || pv_is_register_k (st
->r0
, tdep
->r0
->num
, 0)));
1501 /* Function for finding saved registers in a 'struct pv_area'; we pass
1502 this to pv_area_scan.
1504 If VALUE is a saved register, ADDR says it was saved at a constant
1505 offset from the frame base, and SIZE indicates that the whole
1506 register was saved, record its offset in RESULT_UNTYPED. */
1508 check_for_saved (void *prologue_untyped
, pv_t addr
, CORE_ADDR size
, pv_t value
)
1510 struct m32c_prologue
*prologue
= (struct m32c_prologue
*) prologue_untyped
;
1511 struct gdbarch
*arch
= prologue
->arch
;
1512 struct gdbarch_tdep
*tdep
= gdbarch_tdep (arch
);
1514 /* Is this the unchanged value of some register being saved on the
1516 if (value
.kind
== pvk_register
1518 && pv_is_register (addr
, tdep
->sp
->num
))
1520 /* Some registers require special handling: they're saved as a
1521 larger value than the register itself. */
1522 CORE_ADDR saved_size
= register_size (arch
, value
.reg
);
1524 if (value
.reg
== tdep
->pc
->num
)
1525 saved_size
= tdep
->ret_addr_bytes
;
1526 else if (register_type (arch
, value
.reg
)
1527 == tdep
->data_addr_reg_type
)
1528 saved_size
= tdep
->push_addr_bytes
;
1530 if (size
== saved_size
)
1532 /* Find which end of the saved value corresponds to our
1534 if (gdbarch_byte_order (arch
) == BFD_ENDIAN_BIG
)
1535 prologue
->reg_offset
[value
.reg
]
1536 = (addr
.k
+ saved_size
- register_size (arch
, value
.reg
));
1538 prologue
->reg_offset
[value
.reg
] = addr
.k
;
1544 /* Analyze the function prologue for ARCH at START, going no further
1545 than LIMIT, and place a description of what we found in
1548 m32c_analyze_prologue (struct gdbarch
*arch
,
1549 CORE_ADDR start
, CORE_ADDR limit
,
1550 struct m32c_prologue
*prologue
)
1552 struct gdbarch_tdep
*tdep
= gdbarch_tdep (arch
);
1553 unsigned long mach
= gdbarch_bfd_arch_info (arch
)->mach
;
1554 CORE_ADDR after_last_frame_related_insn
;
1555 struct cleanup
*back_to
;
1556 struct m32c_pv_state st
;
1559 st
.r0
= pv_register (tdep
->r0
->num
, 0);
1560 st
.r1
= pv_register (tdep
->r1
->num
, 0);
1561 st
.r2
= pv_register (tdep
->r2
->num
, 0);
1562 st
.r3
= pv_register (tdep
->r3
->num
, 0);
1563 st
.a0
= pv_register (tdep
->a0
->num
, 0);
1564 st
.a1
= pv_register (tdep
->a1
->num
, 0);
1565 st
.sb
= pv_register (tdep
->sb
->num
, 0);
1566 st
.fb
= pv_register (tdep
->fb
->num
, 0);
1567 st
.sp
= pv_register (tdep
->sp
->num
, 0);
1568 st
.pc
= pv_register (tdep
->pc
->num
, 0);
1569 st
.stack
= make_pv_area (tdep
->sp
->num
, gdbarch_addr_bit (arch
));
1570 back_to
= make_cleanup_free_pv_area (st
.stack
);
1572 /* Record that the call instruction has saved the return address on
1574 m32c_pv_push (&st
, st
.pc
, tdep
->ret_addr_bytes
);
1576 memset (prologue
, 0, sizeof (*prologue
));
1577 prologue
->arch
= arch
;
1580 for (i
= 0; i
< M32C_MAX_NUM_REGS
; i
++)
1581 prologue
->reg_offset
[i
] = 1;
1584 st
.scan_pc
= after_last_frame_related_insn
= start
;
1586 while (st
.scan_pc
< limit
)
1588 pv_t pre_insn_fb
= st
.fb
;
1589 pv_t pre_insn_sp
= st
.sp
;
1591 /* In theory we could get in trouble by trying to read ahead
1592 here, when we only know we're expecting one byte. In
1593 practice I doubt anyone will care, and it makes the rest of
1595 if (target_read_memory (st
.scan_pc
, st
.insn
, sizeof (st
.insn
)))
1596 /* If we can't fetch the instruction from memory, stop here
1597 and hope for the best. */
1599 st
.next_addr
= st
.scan_pc
;
1601 /* The assembly instructions are written as they appear in the
1602 section of the processor manuals that describe the
1603 instruction encodings.
1605 When a single assembly language instruction has several
1606 different machine-language encodings, the manual
1607 distinguishes them by a number in parens, before the
1608 mnemonic. Those numbers are included, as well.
1610 The srcdest decoding instructions have the same names as the
1611 analogous functions in the simulator. */
1612 if (mach
== bfd_mach_m16c
)
1614 /* (1) ENTER #imm8 */
1615 if (st
.insn
[0] == 0x7c && st
.insn
[1] == 0xf2)
1617 if (m32c_pv_enter (&st
, st
.insn
[2]))
1622 else if (st
.insn
[0] == 0xec)
1624 int src
= st
.insn
[1];
1625 if (m32c_pv_pushm (&st
, src
))
1629 if (m32c_pushm_is_reg_save (&st
, src
))
1630 after_last_frame_related_insn
= st
.next_addr
;
1633 /* (6) MOV.size:G src, dest */
1634 else if ((st
.insn
[0] & 0xfe) == 0x72)
1636 int size
= (st
.insn
[0] & 0x01) ? 2 : 1;
1638 struct srcdest dest
;
1643 = m32c_decode_srcdest4 (&st
, (st
.insn
[1] >> 4) & 0xf, size
);
1645 = m32c_decode_srcdest4 (&st
, st
.insn
[1] & 0xf, size
);
1646 src_value
= m32c_srcdest_fetch (&st
, src
, size
);
1648 if (m32c_is_arg_spill (&st
, dest
, src_value
))
1649 after_last_frame_related_insn
= st
.next_addr
;
1650 else if (m32c_is_struct_return (&st
, dest
, src_value
))
1651 after_last_frame_related_insn
= st
.next_addr
;
1653 if (m32c_srcdest_store (&st
, dest
, src_value
, size
))
1657 /* (1) LDC #IMM16, sp */
1658 else if (st
.insn
[0] == 0xeb
1659 && st
.insn
[1] == 0x50)
1662 st
.sp
= pv_constant (m32c_udisp16 (&st
));
1666 /* We've hit some instruction we don't know how to simulate.
1667 Strictly speaking, we should set every value we're
1668 tracking to "unknown". But we'll be optimistic, assume
1669 that we have enough information already, and stop
1675 int src_indirect
= 0;
1676 int dest_indirect
= 0;
1679 gdb_assert (mach
== bfd_mach_m32c
);
1681 /* Check for prefix bytes indicating indirect addressing. */
1682 if (st
.insn
[0] == 0x41)
1687 else if (st
.insn
[0] == 0x09)
1692 else if (st
.insn
[0] == 0x49)
1694 src_indirect
= dest_indirect
= 1;
1698 /* (1) ENTER #imm8 */
1699 if (st
.insn
[i
] == 0xec)
1701 if (m32c_pv_enter (&st
, st
.insn
[i
+ 1]))
1707 else if (st
.insn
[i
] == 0x8f)
1709 int src
= st
.insn
[i
+ 1];
1710 if (m32c_pv_pushm (&st
, src
))
1714 if (m32c_pushm_is_reg_save (&st
, src
))
1715 after_last_frame_related_insn
= st
.next_addr
;
1718 /* (7) MOV.size:G src, dest */
1719 else if ((st
.insn
[i
] & 0x80) == 0x80
1720 && (st
.insn
[i
+ 1] & 0x0f) == 0x0b
1721 && m32c_get_src23 (&st
.insn
[i
]) < 20
1722 && m32c_get_dest23 (&st
.insn
[i
]) < 20)
1725 struct srcdest dest
;
1727 int bw
= st
.insn
[i
] & 0x01;
1728 int size
= bw
? 2 : 1;
1732 = m32c_decode_sd23 (&st
, m32c_get_src23 (&st
.insn
[i
]),
1733 size
, src_indirect
);
1735 = m32c_decode_sd23 (&st
, m32c_get_dest23 (&st
.insn
[i
]),
1736 size
, dest_indirect
);
1737 src_value
= m32c_srcdest_fetch (&st
, src
, size
);
1739 if (m32c_is_arg_spill (&st
, dest
, src_value
))
1740 after_last_frame_related_insn
= st
.next_addr
;
1742 if (m32c_srcdest_store (&st
, dest
, src_value
, size
))
1745 /* (2) LDC #IMM24, sp */
1746 else if (st
.insn
[i
] == 0xd5
1747 && st
.insn
[i
+ 1] == 0x29)
1750 st
.sp
= pv_constant (m32c_udisp24 (&st
));
1753 /* We've hit some instruction we don't know how to simulate.
1754 Strictly speaking, we should set every value we're
1755 tracking to "unknown". But we'll be optimistic, assume
1756 that we have enough information already, and stop
1761 /* If this instruction changed the FB or decreased the SP (i.e.,
1762 allocated more stack space), then this may be a good place to
1763 declare the prologue finished. However, there are some
1766 - If the instruction just changed the FB back to its original
1767 value, then that's probably a restore instruction. The
1768 prologue should definitely end before that.
1770 - If the instruction increased the value of the SP (that is,
1771 shrunk the frame), then it's probably part of a frame
1772 teardown sequence, and the prologue should end before
1775 if (! pv_is_identical (st
.fb
, pre_insn_fb
))
1777 if (! pv_is_register_k (st
.fb
, tdep
->fb
->num
, 0))
1778 after_last_frame_related_insn
= st
.next_addr
;
1780 else if (! pv_is_identical (st
.sp
, pre_insn_sp
))
1782 /* The comparison of the constants looks odd, there, because
1783 .k is unsigned. All it really means is that the SP is
1784 lower than it was before the instruction. */
1785 if ( pv_is_register (pre_insn_sp
, tdep
->sp
->num
)
1786 && pv_is_register (st
.sp
, tdep
->sp
->num
)
1787 && ((pre_insn_sp
.k
- st
.sp
.k
) < (st
.sp
.k
- pre_insn_sp
.k
)))
1788 after_last_frame_related_insn
= st
.next_addr
;
1791 st
.scan_pc
= st
.next_addr
;
1794 /* Did we load a constant value into the stack pointer? */
1795 if (pv_is_constant (st
.sp
))
1796 prologue
->kind
= prologue_first_frame
;
1798 /* Alternatively, did we initialize the frame pointer? Remember
1799 that the CFA is the address after the return address. */
1800 if (pv_is_register (st
.fb
, tdep
->sp
->num
))
1802 prologue
->kind
= prologue_with_frame_ptr
;
1803 prologue
->frame_ptr_offset
= st
.fb
.k
;
1806 /* Is the frame size a known constant? Remember that frame_size is
1807 actually the offset from the CFA to the SP (i.e., a negative
1809 else if (pv_is_register (st
.sp
, tdep
->sp
->num
))
1811 prologue
->kind
= prologue_sans_frame_ptr
;
1812 prologue
->frame_size
= st
.sp
.k
;
1815 /* We haven't been able to make sense of this function's frame. Treat
1816 it as the first frame. */
1818 prologue
->kind
= prologue_first_frame
;
1820 /* Record where all the registers were saved. */
1821 pv_area_scan (st
.stack
, check_for_saved
, (void *) prologue
);
1823 prologue
->prologue_end
= after_last_frame_related_insn
;
1825 do_cleanups (back_to
);
1830 m32c_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR ip
)
1833 CORE_ADDR func_addr
, func_end
, sal_end
;
1834 struct m32c_prologue p
;
1836 /* Try to find the extent of the function that contains IP. */
1837 if (! find_pc_partial_function (ip
, &name
, &func_addr
, &func_end
))
1840 /* Find end by prologue analysis. */
1841 m32c_analyze_prologue (gdbarch
, ip
, func_end
, &p
);
1842 /* Find end by line info. */
1843 sal_end
= skip_prologue_using_sal (gdbarch
, ip
);
1844 /* Return whichever is lower. */
1845 if (sal_end
!= 0 && sal_end
!= ip
&& sal_end
< p
.prologue_end
)
1848 return p
.prologue_end
;
1853 /* Stack unwinding. */
1855 static struct m32c_prologue
*
1856 m32c_analyze_frame_prologue (struct frame_info
*this_frame
,
1857 void **this_prologue_cache
)
1859 if (! *this_prologue_cache
)
1861 CORE_ADDR func_start
= get_frame_func (this_frame
);
1862 CORE_ADDR stop_addr
= get_frame_pc (this_frame
);
1864 /* If we couldn't find any function containing the PC, then
1865 just initialize the prologue cache, but don't do anything. */
1867 stop_addr
= func_start
;
1869 *this_prologue_cache
= FRAME_OBSTACK_ZALLOC (struct m32c_prologue
);
1870 m32c_analyze_prologue (get_frame_arch (this_frame
),
1871 func_start
, stop_addr
, *this_prologue_cache
);
1874 return *this_prologue_cache
;
1879 m32c_frame_base (struct frame_info
*this_frame
,
1880 void **this_prologue_cache
)
1882 struct m32c_prologue
*p
1883 = m32c_analyze_frame_prologue (this_frame
, this_prologue_cache
);
1884 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (this_frame
));
1886 /* In functions that use alloca, the distance between the stack
1887 pointer and the frame base varies dynamically, so we can't use
1888 the SP plus static information like prologue analysis to find the
1889 frame base. However, such functions must have a frame pointer,
1890 to be able to restore the SP on exit. So whenever we do have a
1891 frame pointer, use that to find the base. */
1894 case prologue_with_frame_ptr
:
1897 = get_frame_register_unsigned (this_frame
, tdep
->fb
->num
);
1898 return fb
- p
->frame_ptr_offset
;
1901 case prologue_sans_frame_ptr
:
1904 = get_frame_register_unsigned (this_frame
, tdep
->sp
->num
);
1905 return sp
- p
->frame_size
;
1908 case prologue_first_frame
:
1912 gdb_assert_not_reached ("unexpected prologue kind");
1918 m32c_this_id (struct frame_info
*this_frame
,
1919 void **this_prologue_cache
,
1920 struct frame_id
*this_id
)
1922 CORE_ADDR base
= m32c_frame_base (this_frame
, this_prologue_cache
);
1925 *this_id
= frame_id_build (base
, get_frame_func (this_frame
));
1926 /* Otherwise, leave it unset, and that will terminate the backtrace. */
1930 static struct value
*
1931 m32c_prev_register (struct frame_info
*this_frame
,
1932 void **this_prologue_cache
, int regnum
)
1934 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (this_frame
));
1935 struct m32c_prologue
*p
1936 = m32c_analyze_frame_prologue (this_frame
, this_prologue_cache
);
1937 CORE_ADDR frame_base
= m32c_frame_base (this_frame
, this_prologue_cache
);
1938 int reg_size
= register_size (get_frame_arch (this_frame
), regnum
);
1940 if (regnum
== tdep
->sp
->num
)
1941 return frame_unwind_got_constant (this_frame
, regnum
, frame_base
);
1943 /* If prologue analysis says we saved this register somewhere,
1944 return a description of the stack slot holding it. */
1945 if (p
->reg_offset
[regnum
] != 1)
1946 return frame_unwind_got_memory (this_frame
, regnum
,
1947 frame_base
+ p
->reg_offset
[regnum
]);
1949 /* Otherwise, presume we haven't changed the value of this
1950 register, and get it from the next frame. */
1951 return frame_unwind_got_register (this_frame
, regnum
, regnum
);
1955 static const struct frame_unwind m32c_unwind
= {
1957 default_frame_unwind_stop_reason
,
1961 default_frame_sniffer
1966 m32c_unwind_pc (struct gdbarch
*arch
, struct frame_info
*next_frame
)
1968 struct gdbarch_tdep
*tdep
= gdbarch_tdep (arch
);
1969 return frame_unwind_register_unsigned (next_frame
, tdep
->pc
->num
);
1974 m32c_unwind_sp (struct gdbarch
*arch
, struct frame_info
*next_frame
)
1976 struct gdbarch_tdep
*tdep
= gdbarch_tdep (arch
);
1977 return frame_unwind_register_unsigned (next_frame
, tdep
->sp
->num
);
1981 /* Inferior calls. */
1983 /* The calling conventions, according to GCC:
1987 First arg may be passed in r1l or r1 if it (1) fits (QImode or
1988 HImode), (2) is named, and (3) is an integer or pointer type (no
1989 structs, floats, etc). Otherwise, it's passed on the stack.
1991 Second arg may be passed in r2, same restrictions (but not QImode),
1992 even if the first arg is passed on the stack.
1994 Third and further args are passed on the stack. No padding is
1995 used, stack "alignment" is 8 bits.
2000 First arg may be passed in r0l or r0, same restrictions as above.
2002 Second and further args are passed on the stack. Padding is used
2003 after QImode parameters (i.e. lower-addressed byte is the value,
2004 higher-addressed byte is the padding), stack "alignment" is 16
2008 /* Return true if TYPE is a type that can be passed in registers. (We
2009 ignore the size, and pay attention only to the type code;
2010 acceptable sizes depends on which register is being considered to
2013 m32c_reg_arg_type (struct type
*type
)
2015 enum type_code code
= TYPE_CODE (type
);
2017 return (code
== TYPE_CODE_INT
2018 || code
== TYPE_CODE_ENUM
2019 || code
== TYPE_CODE_PTR
2020 || code
== TYPE_CODE_REF
2021 || code
== TYPE_CODE_BOOL
2022 || code
== TYPE_CODE_CHAR
);
2027 m32c_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
2028 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
2029 struct value
**args
, CORE_ADDR sp
, int struct_return
,
2030 CORE_ADDR struct_addr
)
2032 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2033 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2034 unsigned long mach
= gdbarch_bfd_arch_info (gdbarch
)->mach
;
2038 /* The number of arguments given in this function's prototype, or
2039 zero if it has a non-prototyped function type. The m32c ABI
2040 passes arguments mentioned in the prototype differently from
2041 those in the ellipsis of a varargs function, or from those passed
2042 to a non-prototyped function. */
2043 int num_prototyped_args
= 0;
2046 struct type
*func_type
= value_type (function
);
2048 /* Dereference function pointer types. */
2049 if (TYPE_CODE (func_type
) == TYPE_CODE_PTR
)
2050 func_type
= TYPE_TARGET_TYPE (func_type
);
2052 gdb_assert (TYPE_CODE (func_type
) == TYPE_CODE_FUNC
||
2053 TYPE_CODE (func_type
) == TYPE_CODE_METHOD
);
2056 /* The ABI description in gcc/config/m32c/m32c.abi says that
2057 we need to handle prototyped and non-prototyped functions
2058 separately, but the code in GCC doesn't actually do so. */
2059 if (TYPE_PROTOTYPED (func_type
))
2061 num_prototyped_args
= TYPE_NFIELDS (func_type
);
2064 /* First, if the function returns an aggregate by value, push a
2065 pointer to a buffer for it. This doesn't affect the way
2066 subsequent arguments are allocated to registers. */
2069 int ptr_len
= TYPE_LENGTH (tdep
->ptr_voyd
);
2071 write_memory_unsigned_integer (sp
, ptr_len
, byte_order
, struct_addr
);
2074 /* Push the arguments. */
2075 for (i
= nargs
- 1; i
>= 0; i
--)
2077 struct value
*arg
= args
[i
];
2078 const gdb_byte
*arg_bits
= value_contents (arg
);
2079 struct type
*arg_type
= value_type (arg
);
2080 ULONGEST arg_size
= TYPE_LENGTH (arg_type
);
2082 /* Can it go in r1 or r1l (for m16c) or r0 or r0l (for m32c)? */
2085 && i
< num_prototyped_args
2086 && m32c_reg_arg_type (arg_type
))
2088 /* Extract and re-store as an integer as a terse way to make
2089 sure it ends up in the least significant end of r1. (GDB
2090 should avoid assuming endianness, even on uni-endian
2092 ULONGEST u
= extract_unsigned_integer (arg_bits
, arg_size
,
2094 struct m32c_reg
*reg
= (mach
== bfd_mach_m16c
) ? tdep
->r1
: tdep
->r0
;
2095 regcache_cooked_write_unsigned (regcache
, reg
->num
, u
);
2098 /* Can it go in r2? */
2099 else if (mach
== bfd_mach_m16c
2102 && i
< num_prototyped_args
2103 && m32c_reg_arg_type (arg_type
))
2104 regcache_cooked_write (regcache
, tdep
->r2
->num
, arg_bits
);
2106 /* Everything else goes on the stack. */
2111 /* Align the stack. */
2112 if (mach
== bfd_mach_m32c
)
2115 write_memory (sp
, arg_bits
, arg_size
);
2119 /* This is the CFA we use to identify the dummy frame. */
2122 /* Push the return address. */
2123 sp
-= tdep
->ret_addr_bytes
;
2124 write_memory_unsigned_integer (sp
, tdep
->ret_addr_bytes
, byte_order
,
2127 /* Update the stack pointer. */
2128 regcache_cooked_write_unsigned (regcache
, tdep
->sp
->num
, sp
);
2130 /* We need to borrow an odd trick from the i386 target here.
2132 The value we return from this function gets used as the stack
2133 address (the CFA) for the dummy frame's ID. The obvious thing is
2134 to return the new TOS. However, that points at the return
2135 address, saved on the stack, which is inconsistent with the CFA's
2136 described by GCC's DWARF 2 .debug_frame information: DWARF 2
2137 .debug_frame info uses the address immediately after the saved
2138 return address. So you end up with a dummy frame whose CFA
2139 points at the return address, but the frame for the function
2140 being called has a CFA pointing after the return address: the
2141 younger CFA is *greater than* the older CFA. The sanity checks
2142 in frame.c don't like that.
2144 So we try to be consistent with the CFA's used by DWARF 2.
2145 Having a dummy frame and a real frame with the *same* CFA is
2151 static struct frame_id
2152 m32c_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
2154 /* This needs to return a frame ID whose PC is the return address
2155 passed to m32c_push_dummy_call, and whose stack_addr is the SP
2156 m32c_push_dummy_call returned.
2158 m32c_unwind_sp gives us the CFA, which is the value the SP had
2159 before the return address was pushed. */
2160 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2161 CORE_ADDR sp
= get_frame_register_unsigned (this_frame
, tdep
->sp
->num
);
2162 return frame_id_build (sp
, get_frame_pc (this_frame
));
2167 /* Return values. */
2169 /* Return value conventions, according to GCC:
2180 Aggregate values (regardless of size) are returned by pushing a
2181 pointer to a temporary area on the stack after the args are pushed.
2182 The function fills in this area with the value. Note that this
2183 pointer on the stack does not affect how register arguments, if any,
2190 /* Return non-zero if values of type TYPE are returned by storing them
2191 in a buffer whose address is passed on the stack, ahead of the
2194 m32c_return_by_passed_buf (struct type
*type
)
2196 enum type_code code
= TYPE_CODE (type
);
2198 return (code
== TYPE_CODE_STRUCT
2199 || code
== TYPE_CODE_UNION
);
2202 static enum return_value_convention
2203 m32c_return_value (struct gdbarch
*gdbarch
,
2204 struct value
*function
,
2205 struct type
*valtype
,
2206 struct regcache
*regcache
,
2208 const gdb_byte
*writebuf
)
2210 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2211 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2212 enum return_value_convention conv
;
2213 ULONGEST valtype_len
= TYPE_LENGTH (valtype
);
2215 if (m32c_return_by_passed_buf (valtype
))
2216 conv
= RETURN_VALUE_STRUCT_CONVENTION
;
2218 conv
= RETURN_VALUE_REGISTER_CONVENTION
;
2222 /* We should never be called to find values being returned by
2223 RETURN_VALUE_STRUCT_CONVENTION. Those can't be located,
2224 unless we made the call ourselves. */
2225 gdb_assert (conv
== RETURN_VALUE_REGISTER_CONVENTION
);
2227 gdb_assert (valtype_len
<= 8);
2229 /* Anything that fits in r0 is returned there. */
2230 if (valtype_len
<= TYPE_LENGTH (tdep
->r0
->type
))
2233 regcache_cooked_read_unsigned (regcache
, tdep
->r0
->num
, &u
);
2234 store_unsigned_integer (readbuf
, valtype_len
, byte_order
, u
);
2238 /* Everything else is passed in mem0, using as many bytes as
2239 needed. This is not what the Renesas tools do, but it's
2240 what GCC does at the moment. */
2241 struct bound_minimal_symbol mem0
2242 = lookup_minimal_symbol ("mem0", NULL
, NULL
);
2245 error (_("The return value is stored in memory at 'mem0', "
2246 "but GDB cannot find\n"
2248 read_memory (BMSYMBOL_VALUE_ADDRESS (mem0
), readbuf
, valtype_len
);
2254 /* We should never be called to store values to be returned
2255 using RETURN_VALUE_STRUCT_CONVENTION. We have no way of
2256 finding the buffer, unless we made the call ourselves. */
2257 gdb_assert (conv
== RETURN_VALUE_REGISTER_CONVENTION
);
2259 gdb_assert (valtype_len
<= 8);
2261 /* Anything that fits in r0 is returned there. */
2262 if (valtype_len
<= TYPE_LENGTH (tdep
->r0
->type
))
2264 ULONGEST u
= extract_unsigned_integer (writebuf
, valtype_len
,
2266 regcache_cooked_write_unsigned (regcache
, tdep
->r0
->num
, u
);
2270 /* Everything else is passed in mem0, using as many bytes as
2271 needed. This is not what the Renesas tools do, but it's
2272 what GCC does at the moment. */
2273 struct bound_minimal_symbol mem0
2274 = lookup_minimal_symbol ("mem0", NULL
, NULL
);
2277 error (_("The return value is stored in memory at 'mem0', "
2278 "but GDB cannot find\n"
2280 write_memory (BMSYMBOL_VALUE_ADDRESS (mem0
), writebuf
, valtype_len
);
2291 /* The m16c and m32c use a trampoline function for indirect function
2292 calls. An indirect call looks like this:
2294 ... push arguments ...
2295 ... push target function address ...
2298 The code for m32c_jsri16 looks like this:
2302 # Save return address.
2304 pop.b m32c_jsri_ret+2
2306 # Store target function address.
2307 pop.w m32c_jsri_addr
2309 # Re-push return address.
2310 push.b m32c_jsri_ret+2
2311 push.w m32c_jsri_ret
2313 # Call the target function.
2314 jmpi.a m32c_jsri_addr
2316 Without further information, GDB will treat calls to m32c_jsri16
2317 like calls to any other function. Since m32c_jsri16 doesn't have
2318 debugging information, that normally means that GDB sets a step-
2319 resume breakpoint and lets the program continue --- which is not
2320 what the user wanted. (Giving the trampoline debugging info
2321 doesn't help: the user expects the program to stop in the function
2322 their program is calling, not in some trampoline code they've never
2325 The gdbarch_skip_trampoline_code method tells GDB how to step
2326 through such trampoline functions transparently to the user. When
2327 given the address of a trampoline function's first instruction,
2328 gdbarch_skip_trampoline_code should return the address of the first
2329 instruction of the function really being called. If GDB decides it
2330 wants to step into that function, it will set a breakpoint there
2331 and silently continue to it.
2333 We recognize the trampoline by name, and extract the target address
2334 directly from the stack. This isn't great, but recognizing by its
2335 code sequence seems more fragile. */
2338 m32c_skip_trampoline_code (struct frame_info
*frame
, CORE_ADDR stop_pc
)
2340 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
2341 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2342 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2344 /* It would be nicer to simply look up the addresses of known
2345 trampolines once, and then compare stop_pc with them. However,
2346 we'd need to ensure that that cached address got invalidated when
2347 someone loaded a new executable, and I'm not quite sure of the
2348 best way to do that. find_pc_partial_function does do some
2349 caching, so we'll see how this goes. */
2351 CORE_ADDR start
, end
;
2353 if (find_pc_partial_function (stop_pc
, &name
, &start
, &end
))
2355 /* Are we stopped at the beginning of the trampoline function? */
2356 if (strcmp (name
, "m32c_jsri16") == 0
2357 && stop_pc
== start
)
2359 /* Get the stack pointer. The return address is at the top,
2360 and the target function's address is just below that. We
2361 know it's a two-byte address, since the trampoline is
2363 CORE_ADDR sp
= get_frame_sp (get_current_frame ());
2365 = read_memory_unsigned_integer (sp
+ tdep
->ret_addr_bytes
,
2368 /* What we have now is the address of a jump instruction.
2369 What we need is the destination of that jump.
2370 The opcode is 1 byte, and the destination is the next 3 bytes. */
2372 target
= read_memory_unsigned_integer (target
+ 1, 3, byte_order
);
2381 /* Address/pointer conversions. */
2383 /* On the m16c, there is a 24-bit address space, but only a very few
2384 instructions can generate addresses larger than 0xffff: jumps,
2385 jumps to subroutines, and the lde/std (load/store extended)
2388 Since GCC can only support one size of pointer, we can't have
2389 distinct 'near' and 'far' pointer types; we have to pick one size
2390 for everything. If we wanted to use 24-bit pointers, then GCC
2391 would have to use lde and ste for all memory references, which
2392 would be terrible for performance and code size. So the GNU
2393 toolchain uses 16-bit pointers for everything, and gives up the
2394 ability to have pointers point outside the first 64k of memory.
2396 However, as a special hack, we let the linker place functions at
2397 addresses above 0xffff, as long as it also places a trampoline in
2398 the low 64k for every function whose address is taken. Each
2399 trampoline consists of a single jmp.a instruction that jumps to the
2400 function's real entry point. Pointers to functions can be 16 bits
2401 long, even though the functions themselves are at higher addresses:
2402 the pointers refer to the trampolines, not the functions.
2404 This complicates things for GDB, however: given the address of a
2405 function (from debug info or linker symbols, say) which could be
2406 anywhere in the 24-bit address space, how can we find an
2407 appropriate 16-bit value to use as a pointer to it?
2409 If the linker has not generated a trampoline for the function,
2410 we're out of luck. Well, I guess we could malloc some space and
2411 write a jmp.a instruction to it, but I'm not going to get into that
2414 If the linker has generated a trampoline for the function, then it
2415 also emitted a symbol for the trampoline: if the function's linker
2416 symbol is named NAME, then the function's trampoline's linker
2417 symbol is named NAME.plt.
2419 So, given a code address:
2420 - We try to find a linker symbol at that address.
2421 - If we find such a symbol named NAME, we look for a linker symbol
2423 - If we find such a symbol, we assume it is a trampoline, and use
2424 its address as the pointer value.
2426 And, given a function pointer:
2427 - We try to find a linker symbol at that address named NAME.plt.
2428 - If we find such a symbol, we look for a linker symbol named NAME.
2429 - If we find that, we provide that as the function's address.
2430 - If any of the above steps fail, we return the original address
2431 unchanged; it might really be a function in the low 64k.
2433 See? You *knew* there was a reason you wanted to be a computer
2437 m32c_m16c_address_to_pointer (struct gdbarch
*gdbarch
,
2438 struct type
*type
, gdb_byte
*buf
, CORE_ADDR addr
)
2440 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2441 enum type_code target_code
;
2442 gdb_assert (TYPE_CODE (type
) == TYPE_CODE_PTR
||
2443 TYPE_CODE (type
) == TYPE_CODE_REF
);
2445 target_code
= TYPE_CODE (TYPE_TARGET_TYPE (type
));
2447 if (target_code
== TYPE_CODE_FUNC
|| target_code
== TYPE_CODE_METHOD
)
2449 const char *func_name
;
2451 struct bound_minimal_symbol tramp_msym
;
2453 /* Try to find a linker symbol at this address. */
2454 struct bound_minimal_symbol func_msym
2455 = lookup_minimal_symbol_by_pc (addr
);
2457 if (! func_msym
.minsym
)
2458 error (_("Cannot convert code address %s to function pointer:\n"
2459 "couldn't find a symbol at that address, to find trampoline."),
2460 paddress (gdbarch
, addr
));
2462 func_name
= MSYMBOL_LINKAGE_NAME (func_msym
.minsym
);
2463 tramp_name
= xmalloc (strlen (func_name
) + 5);
2464 strcpy (tramp_name
, func_name
);
2465 strcat (tramp_name
, ".plt");
2467 /* Try to find a linker symbol for the trampoline. */
2468 tramp_msym
= lookup_minimal_symbol (tramp_name
, NULL
, NULL
);
2470 /* We've either got another copy of the name now, or don't need
2471 the name any more. */
2474 if (! tramp_msym
.minsym
)
2478 /* No PLT entry found. Mask off the upper bits of the address
2479 to make a pointer. As noted in the warning to the user
2480 below, this value might be useful if converted back into
2481 an address by GDB, but will otherwise, almost certainly,
2484 Using this masked result does seem to be useful
2485 in gdb.cp/cplusfuncs.exp in which ~40 FAILs turn into
2486 PASSes. These results appear to be correct as well.
2488 We print a warning here so that the user can make a
2489 determination about whether the result is useful or not. */
2490 ptrval
= addr
& 0xffff;
2492 warning (_("Cannot convert code address %s to function pointer:\n"
2493 "couldn't find trampoline named '%s.plt'.\n"
2494 "Returning pointer value %s instead; this may produce\n"
2495 "a useful result if converted back into an address by GDB,\n"
2496 "but will most likely not be useful otherwise.\n"),
2497 paddress (gdbarch
, addr
), func_name
,
2498 paddress (gdbarch
, ptrval
));
2505 /* The trampoline's address is our pointer. */
2506 addr
= BMSYMBOL_VALUE_ADDRESS (tramp_msym
);
2510 store_unsigned_integer (buf
, TYPE_LENGTH (type
), byte_order
, addr
);
2515 m32c_m16c_pointer_to_address (struct gdbarch
*gdbarch
,
2516 struct type
*type
, const gdb_byte
*buf
)
2518 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2520 enum type_code target_code
;
2522 gdb_assert (TYPE_CODE (type
) == TYPE_CODE_PTR
||
2523 TYPE_CODE (type
) == TYPE_CODE_REF
);
2525 ptr
= extract_unsigned_integer (buf
, TYPE_LENGTH (type
), byte_order
);
2527 target_code
= TYPE_CODE (TYPE_TARGET_TYPE (type
));
2529 if (target_code
== TYPE_CODE_FUNC
|| target_code
== TYPE_CODE_METHOD
)
2531 /* See if there is a minimal symbol at that address whose name is
2533 struct bound_minimal_symbol ptr_msym
= lookup_minimal_symbol_by_pc (ptr
);
2535 if (ptr_msym
.minsym
)
2537 const char *ptr_msym_name
= MSYMBOL_LINKAGE_NAME (ptr_msym
.minsym
);
2538 int len
= strlen (ptr_msym_name
);
2541 && strcmp (ptr_msym_name
+ len
- 4, ".plt") == 0)
2543 struct bound_minimal_symbol func_msym
;
2544 /* We have a .plt symbol; try to find the symbol for the
2545 corresponding function.
2547 Since the trampoline contains a jump instruction, we
2548 could also just extract the jump's target address. I
2549 don't see much advantage one way or the other. */
2550 char *func_name
= xmalloc (len
- 4 + 1);
2551 memcpy (func_name
, ptr_msym_name
, len
- 4);
2552 func_name
[len
- 4] = '\0';
2554 = lookup_minimal_symbol (func_name
, NULL
, NULL
);
2556 /* If we do have such a symbol, return its value as the
2557 function's true address. */
2558 if (func_msym
.minsym
)
2559 ptr
= BMSYMBOL_VALUE_ADDRESS (func_msym
);
2566 for (aspace
= 1; aspace
<= 15; aspace
++)
2568 ptr_msym
= lookup_minimal_symbol_by_pc ((aspace
<< 16) | ptr
);
2570 if (ptr_msym
.minsym
)
2571 ptr
|= aspace
<< 16;
2580 m32c_virtual_frame_pointer (struct gdbarch
*gdbarch
, CORE_ADDR pc
,
2582 LONGEST
*frame_offset
)
2585 CORE_ADDR func_addr
, func_end
;
2586 struct m32c_prologue p
;
2588 struct regcache
*regcache
= get_current_regcache ();
2589 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2591 if (!find_pc_partial_function (pc
, &name
, &func_addr
, &func_end
))
2592 internal_error (__FILE__
, __LINE__
,
2593 _("No virtual frame pointer available"));
2595 m32c_analyze_prologue (gdbarch
, func_addr
, pc
, &p
);
2598 case prologue_with_frame_ptr
:
2599 *frame_regnum
= m32c_banked_register (tdep
->fb
, regcache
)->num
;
2600 *frame_offset
= p
.frame_ptr_offset
;
2602 case prologue_sans_frame_ptr
:
2603 *frame_regnum
= m32c_banked_register (tdep
->sp
, regcache
)->num
;
2604 *frame_offset
= p
.frame_size
;
2607 *frame_regnum
= m32c_banked_register (tdep
->sp
, regcache
)->num
;
2612 if (*frame_regnum
> gdbarch_num_regs (gdbarch
))
2613 internal_error (__FILE__
, __LINE__
,
2614 _("No virtual frame pointer available"));
2618 /* Initialization. */
2620 static struct gdbarch
*
2621 m32c_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
2623 struct gdbarch
*arch
;
2624 struct gdbarch_tdep
*tdep
;
2625 unsigned long mach
= info
.bfd_arch_info
->mach
;
2627 /* Find a candidate among the list of architectures we've created
2629 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
2631 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
2632 return arches
->gdbarch
;
2634 tdep
= xcalloc (1, sizeof (*tdep
));
2635 arch
= gdbarch_alloc (&info
, tdep
);
2637 /* Essential types. */
2640 /* Address/pointer conversions. */
2641 if (mach
== bfd_mach_m16c
)
2643 set_gdbarch_address_to_pointer (arch
, m32c_m16c_address_to_pointer
);
2644 set_gdbarch_pointer_to_address (arch
, m32c_m16c_pointer_to_address
);
2651 set_gdbarch_print_insn (arch
, print_insn_m32c
);
2654 set_gdbarch_breakpoint_from_pc (arch
, m32c_breakpoint_from_pc
);
2656 /* Prologue analysis and unwinding. */
2657 set_gdbarch_inner_than (arch
, core_addr_lessthan
);
2658 set_gdbarch_skip_prologue (arch
, m32c_skip_prologue
);
2659 set_gdbarch_unwind_pc (arch
, m32c_unwind_pc
);
2660 set_gdbarch_unwind_sp (arch
, m32c_unwind_sp
);
2662 /* I'm dropping the dwarf2 sniffer because it has a few problems.
2663 They may be in the dwarf2 cfi code in GDB, or they may be in
2664 the debug info emitted by the upstream toolchain. I don't
2665 know which, but I do know that the prologue analyzer works better.
2667 dwarf2_append_sniffers (arch
);
2669 frame_unwind_append_unwinder (arch
, &m32c_unwind
);
2671 /* Inferior calls. */
2672 set_gdbarch_push_dummy_call (arch
, m32c_push_dummy_call
);
2673 set_gdbarch_return_value (arch
, m32c_return_value
);
2674 set_gdbarch_dummy_id (arch
, m32c_dummy_id
);
2677 set_gdbarch_skip_trampoline_code (arch
, m32c_skip_trampoline_code
);
2679 set_gdbarch_virtual_frame_pointer (arch
, m32c_virtual_frame_pointer
);
2681 /* m32c function boundary addresses are not necessarily even.
2682 Therefore, the `vbit', which indicates a pointer to a virtual
2683 member function, is stored in the delta field, rather than as
2684 the low bit of a function pointer address.
2686 In order to verify this, see the definition of
2687 TARGET_PTRMEMFUNC_VBIT_LOCATION in gcc/defaults.h along with the
2688 definition of FUNCTION_BOUNDARY in gcc/config/m32c/m32c.h. */
2689 set_gdbarch_vbit_in_delta (arch
, 1);
2694 /* Provide a prototype to silence -Wmissing-prototypes. */
2695 extern initialize_file_ftype _initialize_m32c_tdep
;
2698 _initialize_m32c_tdep (void)
2700 register_gdbarch_init (bfd_arch_m32c
, m32c_gdbarch_init
);
2702 m32c_dma_reggroup
= reggroup_new ("dma", USER_REGGROUP
);