1 /* Target-dependent code for Renesas M32R, for GDB.
3 Copyright 1996, 1998, 1999, 2000, 2001, 2002, 2003 Free Software
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
25 #include "frame-unwind.h"
26 #include "frame-base.h"
31 #include "gdb_string.h"
37 #include "arch-utils.h"
39 #include "trad-frame.h"
42 #include "gdb_assert.h"
44 #include "m32r-tdep.h"
48 extern void _initialize_m32r_tdep (void);
51 m32r_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
53 /* Align to the size of an instruction (so that they can safely be
54 pushed onto the stack. */
60 #define M32R_BE_BREAKPOINT32 {0x10, 0xf1, 0x70, 0x00}
61 #define M32R_LE_BREAKPOINT32 {0xf1, 0x10, 0x00, 0x70}
62 #define M32R_BE_BREAKPOINT16 {0x10, 0xf1}
63 #define M32R_LE_BREAKPOINT16 {0xf1, 0x10}
66 m32r_memory_insert_breakpoint (CORE_ADDR addr
, char *contents_cache
)
72 bplen
= (addr
& 3) ? 2 : 4;
74 /* Save the memory contents. */
75 val
= target_read_memory (addr
, contents_cache
, bplen
);
77 return val
; /* return error */
79 /* Determine appropriate breakpoint contents and size for this address. */
80 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
83 && ((contents_cache
[0] & 0x80) || (contents_cache
[2] & 0x80)))
85 static unsigned char insn
[] = M32R_BE_BREAKPOINT32
;
87 bplen
= sizeof (insn
);
91 static unsigned char insn
[] = M32R_BE_BREAKPOINT16
;
93 bplen
= sizeof (insn
);
99 && ((contents_cache
[1] & 0x80) || (contents_cache
[3] & 0x80)))
101 static unsigned char insn
[] = M32R_LE_BREAKPOINT32
;
103 bplen
= sizeof (insn
);
107 static unsigned char insn
[] = M32R_LE_BREAKPOINT16
;
109 bplen
= sizeof (insn
);
113 /* Write the breakpoint. */
114 val
= target_write_memory (addr
, (char *) bp
, bplen
);
119 m32r_memory_remove_breakpoint (CORE_ADDR addr
, char *contents_cache
)
124 /* Determine appropriate breakpoint contents and size for this address. */
125 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
127 if (((addr
& 3) == 0)
128 && ((contents_cache
[0] & 0x80) || (contents_cache
[2] & 0x80)))
130 static unsigned char insn
[] = M32R_BE_BREAKPOINT32
;
131 bplen
= sizeof (insn
);
135 static unsigned char insn
[] = M32R_BE_BREAKPOINT16
;
136 bplen
= sizeof (insn
);
142 if (((addr
& 3) == 0)
143 && ((contents_cache
[1] & 0x80) || (contents_cache
[3] & 0x80)))
145 static unsigned char insn
[] = M32R_BE_BREAKPOINT32
;
146 bplen
= sizeof (insn
);
150 static unsigned char insn
[] = M32R_BE_BREAKPOINT16
;
151 bplen
= sizeof (insn
);
155 /* Write contents. */
156 val
= target_write_memory (addr
, contents_cache
, bplen
);
160 static const unsigned char *
161 m32r_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
165 /* Determine appropriate breakpoint. */
166 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
168 if ((*pcptr
& 3) == 0)
170 static unsigned char insn
[] = M32R_BE_BREAKPOINT32
;
172 *lenptr
= sizeof (insn
);
176 static unsigned char insn
[] = M32R_BE_BREAKPOINT16
;
178 *lenptr
= sizeof (insn
);
183 if ((*pcptr
& 3) == 0)
185 static unsigned char insn
[] = M32R_LE_BREAKPOINT32
;
187 *lenptr
= sizeof (insn
);
191 static unsigned char insn
[] = M32R_LE_BREAKPOINT16
;
193 *lenptr
= sizeof (insn
);
201 char *m32r_register_names
[] = {
202 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
203 "r8", "r9", "r10", "r11", "r12", "fp", "lr", "sp",
204 "psw", "cbr", "spi", "spu", "bpc", "pc", "accl", "acch",
209 m32r_register_name (int reg_nr
)
213 if (reg_nr
>= M32R_NUM_REGS
)
215 return m32r_register_names
[reg_nr
];
219 /* Return the GDB type object for the "standard" data type
220 of data in register N. */
223 m32r_register_type (struct gdbarch
*gdbarch
, int reg_nr
)
225 if (reg_nr
== M32R_PC_REGNUM
)
226 return builtin_type_void_func_ptr
;
227 else if (reg_nr
== M32R_SP_REGNUM
|| reg_nr
== M32R_FP_REGNUM
)
228 return builtin_type_void_data_ptr
;
230 return builtin_type_int32
;
234 /* Write into appropriate registers a function return value
235 of type TYPE, given in virtual format.
237 Things always get returned in RET1_REGNUM, RET2_REGNUM. */
240 m32r_store_return_value (struct type
*type
, struct regcache
*regcache
,
244 int len
= TYPE_LENGTH (type
);
246 regval
= extract_unsigned_integer (valbuf
, len
> 4 ? 4 : len
);
247 regcache_cooked_write_unsigned (regcache
, RET1_REGNUM
, regval
);
251 regval
= extract_unsigned_integer ((char *) valbuf
+ 4, len
- 4);
252 regcache_cooked_write_unsigned (regcache
, RET1_REGNUM
+ 1, regval
);
256 /* This is required by skip_prologue. The results of decoding a prologue
257 should be cached because this thrashing is getting nuts. */
260 decode_prologue (CORE_ADDR start_pc
, CORE_ADDR scan_limit
,
261 CORE_ADDR
*pl_endptr
)
263 unsigned long framesize
;
266 int maybe_one_more
= 0;
267 CORE_ADDR after_prologue
= 0;
268 CORE_ADDR after_stack_adjust
= 0;
269 CORE_ADDR current_pc
;
274 for (current_pc
= start_pc
; current_pc
< scan_limit
; current_pc
+= 2)
276 insn
= read_memory_unsigned_integer (current_pc
, 2);
278 /* If this is a 32 bit instruction, we dont want to examine its
279 immediate data as though it were an instruction */
280 if (current_pc
& 0x02)
282 /* Clear the parallel execution bit from 16 bit instruction */
285 /* The last instruction was a branch, usually terminates
286 the series, but if this is a parallel instruction,
287 it may be a stack framing instruction */
288 if (!(insn
& 0x8000))
290 /* nope, we are really done */
294 /* decode this instruction further */
300 break; /* This isnt the one more */
303 if (current_pc
== scan_limit
)
304 scan_limit
+= 2; /* extend the search */
305 current_pc
+= 2; /* skip the immediate data */
306 if (insn
== 0x8faf) /* add3 sp, sp, xxxx */
307 /* add 16 bit sign-extended offset */
310 -((short) read_memory_unsigned_integer (current_pc
, 2));
314 if (((insn
>> 8) == 0xe4) /* ld24 r4, xxxxxx; sub sp, r4 */
315 && read_memory_unsigned_integer (current_pc
+ 2,
317 /* subtract 24 bit sign-extended negative-offset */
319 insn
= read_memory_unsigned_integer (current_pc
- 2, 4);
320 if (insn
& 0x00800000) /* sign extend */
321 insn
|= 0xff000000; /* negative */
323 insn
&= 0x00ffffff; /* positive */
327 after_prologue
= current_pc
;
331 op1
= insn
& 0xf000; /* isolate just the first nibble */
333 if ((insn
& 0xf0ff) == 0x207f)
337 regno
= ((insn
>> 8) & 0xf);
341 if ((insn
>> 8) == 0x4f) /* addi sp, xx */
342 /* add 8 bit sign-extended offset */
344 int stack_adjust
= (char) (insn
& 0xff);
346 /* there are probably two of these stack adjustments:
347 1) A negative one in the prologue, and
348 2) A positive one in the epilogue.
349 We are only interested in the first one. */
351 if (stack_adjust
< 0)
353 framesize
-= stack_adjust
;
355 /* A frameless function may have no "mv fp, sp".
356 In that case, this is the end of the prologue. */
357 after_stack_adjust
= current_pc
+ 2;
363 after_prologue
= current_pc
+ 2;
364 break; /* end of stack adjustments */
366 /* Nop looks like a branch, continue explicitly */
369 after_prologue
= current_pc
+ 2;
370 continue; /* nop occurs between pushes */
372 /* End of prolog if any of these are branch instructions */
373 if ((op1
== 0x7000) || (op1
== 0xb000) || (op1
== 0xf000))
375 after_prologue
= current_pc
;
379 /* Some of the branch instructions are mixed with other types */
382 int subop
= insn
& 0x0ff0;
383 if ((subop
== 0x0ec0) || (subop
== 0x0fc0))
385 after_prologue
= current_pc
;
387 continue; /* jmp , jl */
392 if (current_pc
>= scan_limit
)
396 if (after_stack_adjust
!= 0)
397 /* We did not find a "mv fp,sp", but we DID find
398 a stack_adjust. Is it safe to use that as the
399 end of the prologue? I just don't know. */
401 *pl_endptr
= after_stack_adjust
;
404 /* We reached the end of the loop without finding the end
405 of the prologue. No way to win -- we should report failure.
406 The way we do that is to return the original start_pc.
407 GDB will set a breakpoint at the start of the function (etc.) */
408 *pl_endptr
= start_pc
;
412 if (after_prologue
== 0)
413 after_prologue
= current_pc
;
416 *pl_endptr
= after_prologue
;
417 } /* decode_prologue */
419 /* Function: skip_prologue
420 Find end of function prologue */
422 #define DEFAULT_SEARCH_LIMIT 44
425 m32r_skip_prologue (CORE_ADDR pc
)
427 CORE_ADDR func_addr
, func_end
;
428 struct symtab_and_line sal
;
430 /* See what the symbol table says */
432 if (find_pc_partial_function (pc
, NULL
, &func_addr
, &func_end
))
434 sal
= find_pc_line (func_addr
, 0);
436 if (sal
.line
!= 0 && sal
.end
<= func_end
)
441 /* Either there's no line info, or the line after the prologue is after
442 the end of the function. In this case, there probably isn't a
445 func_end
= min (func_end
, func_addr
+ DEFAULT_SEARCH_LIMIT
);
449 func_end
= pc
+ DEFAULT_SEARCH_LIMIT
;
450 decode_prologue (pc
, func_end
, &sal
.end
);
455 struct m32r_unwind_cache
457 /* The previous frame's inner most stack address. Used as this
458 frame ID's stack_addr. */
460 /* The frame's base, optionally used by the high-level debug info. */
463 /* How far the SP and r13 (FP) have been offset from the start of
464 the stack frame (as defined by the previous frame's stack
469 /* Table indicating the location of each and every register. */
470 struct trad_frame_saved_reg
*saved_regs
;
473 /* Put here the code to store, into fi->saved_regs, the addresses of
474 the saved registers of frame described by FRAME_INFO. This
475 includes special registers such as pc and fp saved in special ways
476 in the stack frame. sp is even more special: the address we return
477 for it IS the sp for the next frame. */
479 static struct m32r_unwind_cache
*
480 m32r_frame_unwind_cache (struct frame_info
*next_frame
,
481 void **this_prologue_cache
)
488 struct m32r_unwind_cache
*info
;
490 if ((*this_prologue_cache
))
491 return (*this_prologue_cache
);
493 info
= FRAME_OBSTACK_ZALLOC (struct m32r_unwind_cache
);
494 (*this_prologue_cache
) = info
;
495 info
->saved_regs
= trad_frame_alloc_saved_regs (next_frame
);
500 info
->uses_frame
= 0;
501 for (pc
= frame_func_unwind (next_frame
);
502 pc
> 0 && pc
< frame_pc_unwind (next_frame
); pc
+= 2)
506 op
= get_frame_memory_unsigned (next_frame
, pc
, 4);
507 if ((op
& 0x80000000) == 0x80000000)
509 /* 32-bit instruction */
510 if ((op
& 0xffff0000) == 0x8faf0000)
512 /* add3 sp,sp,xxxx */
513 short n
= op
& 0xffff;
514 info
->sp_offset
+= n
;
516 else if (((op
>> 8) == 0xe4) /* ld24 r4, xxxxxx; sub sp, r4 */
517 && get_frame_memory_unsigned (next_frame
, pc
+ 4,
520 unsigned long n
= op
& 0xffffff;
521 info
->sp_offset
+= n
;
532 /* 16-bit instructions */
533 op
= get_frame_memory_unsigned (next_frame
, pc
, 2) & 0x7fff;
534 if ((op
& 0xf0ff) == 0x207f)
537 int regno
= ((op
>> 8) & 0xf);
538 info
->sp_offset
-= 4;
539 info
->saved_regs
[regno
].addr
= info
->sp_offset
;
541 else if ((op
& 0xff00) == 0x4f00)
544 int n
= (char) (op
& 0xff);
545 info
->sp_offset
+= n
;
547 else if (op
== 0x1d8f)
550 info
->uses_frame
= 1;
551 info
->r13_offset
= info
->sp_offset
;
553 else if (op
== 0x7000)
560 info
->size
= -info
->sp_offset
;
562 /* Compute the previous frame's stack pointer (which is also the
563 frame's ID's stack address), and this frame's base pointer. */
564 if (info
->uses_frame
)
566 /* The SP was moved to the FP. This indicates that a new frame
567 was created. Get THIS frame's FP value by unwinding it from
569 this_base
= frame_unwind_register_unsigned (next_frame
, M32R_FP_REGNUM
);
570 /* The FP points at the last saved register. Adjust the FP back
571 to before the first saved register giving the SP. */
572 prev_sp
= this_base
+ info
->size
;
576 /* Assume that the FP is this frame's SP but with that pushed
577 stack space added back. */
578 this_base
= frame_unwind_register_unsigned (next_frame
, M32R_SP_REGNUM
);
579 prev_sp
= this_base
+ info
->size
;
582 /* Convert that SP/BASE into real addresses. */
583 info
->prev_sp
= prev_sp
;
584 info
->base
= this_base
;
586 /* Adjust all the saved registers so that they contain addresses and
588 for (i
= 0; i
< NUM_REGS
- 1; i
++)
589 if (trad_frame_addr_p (info
->saved_regs
, i
))
590 info
->saved_regs
[i
].addr
= (info
->prev_sp
+ info
->saved_regs
[i
].addr
);
592 /* The call instruction moves the caller's PC in the callee's LR.
593 Since this is an unwind, do the reverse. Copy the location of LR
594 into PC (the address / regnum) so that a request for PC will be
595 converted into a request for the LR. */
596 info
->saved_regs
[M32R_PC_REGNUM
] = info
->saved_regs
[LR_REGNUM
];
598 /* The previous frame's SP needed to be computed. Save the computed
600 trad_frame_set_value (info
->saved_regs
, M32R_SP_REGNUM
, prev_sp
);
606 m32r_read_pc (ptid_t ptid
)
611 save_ptid
= inferior_ptid
;
612 inferior_ptid
= ptid
;
613 regcache_cooked_read_unsigned (current_regcache
, M32R_PC_REGNUM
, &pc
);
614 inferior_ptid
= save_ptid
;
619 m32r_write_pc (CORE_ADDR val
, ptid_t ptid
)
623 save_ptid
= inferior_ptid
;
624 inferior_ptid
= ptid
;
625 write_register (M32R_PC_REGNUM
, val
);
626 inferior_ptid
= save_ptid
;
630 m32r_unwind_sp (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
632 return frame_unwind_register_unsigned (next_frame
, M32R_SP_REGNUM
);
637 m32r_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
638 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
639 struct value
**args
, CORE_ADDR sp
, int struct_return
,
640 CORE_ADDR struct_addr
)
642 int stack_offset
, stack_alloc
;
643 int argreg
= ARG1_REGNUM
;
646 enum type_code typecode
;
649 char valbuf
[MAX_REGISTER_SIZE
];
651 int odd_sized_struct
;
653 /* first force sp to a 4-byte alignment */
656 /* Set the return address. For the m32r, the return breakpoint is
657 always at BP_ADDR. */
658 regcache_cooked_write_unsigned (regcache
, LR_REGNUM
, bp_addr
);
660 /* If STRUCT_RETURN is true, then the struct return address (in
661 STRUCT_ADDR) will consume the first argument-passing register.
662 Both adjust the register count and store that value. */
665 regcache_cooked_write_unsigned (regcache
, argreg
, struct_addr
);
669 /* Now make sure there's space on the stack */
670 for (argnum
= 0, stack_alloc
= 0; argnum
< nargs
; argnum
++)
671 stack_alloc
+= ((TYPE_LENGTH (VALUE_TYPE (args
[argnum
])) + 3) & ~3);
672 sp
-= stack_alloc
; /* make room on stack for args */
674 for (argnum
= 0, stack_offset
= 0; argnum
< nargs
; argnum
++)
676 type
= VALUE_TYPE (args
[argnum
]);
677 typecode
= TYPE_CODE (type
);
678 len
= TYPE_LENGTH (type
);
680 memset (valbuf
, 0, sizeof (valbuf
));
682 /* Passes structures that do not fit in 2 registers by reference. */
684 && (typecode
== TYPE_CODE_STRUCT
|| typecode
== TYPE_CODE_UNION
))
686 store_unsigned_integer (valbuf
, 4, VALUE_ADDRESS (args
[argnum
]));
687 typecode
= TYPE_CODE_PTR
;
693 /* value gets right-justified in the register or stack word */
694 memcpy (valbuf
+ (register_size (gdbarch
, argreg
) - len
),
695 (char *) VALUE_CONTENTS (args
[argnum
]), len
);
699 val
= (char *) VALUE_CONTENTS (args
[argnum
]);
703 if (argreg
> ARGN_REGNUM
)
705 /* must go on the stack */
706 write_memory (sp
+ stack_offset
, val
, 4);
709 else if (argreg
<= ARGN_REGNUM
)
711 /* there's room in a register */
713 extract_unsigned_integer (val
,
714 register_size (gdbarch
, argreg
));
715 regcache_cooked_write_unsigned (regcache
, argreg
++, regval
);
718 /* Store the value 4 bytes at a time. This means that things
719 larger than 4 bytes may go partly in registers and partly
721 len
-= register_size (gdbarch
, argreg
);
722 val
+= register_size (gdbarch
, argreg
);
726 /* Finally, update the SP register. */
727 regcache_cooked_write_unsigned (regcache
, M32R_SP_REGNUM
, sp
);
733 /* Given a return value in `regbuf' with a type `valtype',
734 extract and copy its value into `valbuf'. */
737 m32r_extract_return_value (struct type
*type
, struct regcache
*regcache
,
740 bfd_byte
*valbuf
= dst
;
741 int len
= TYPE_LENGTH (type
);
744 /* By using store_unsigned_integer we avoid having to do
745 anything special for small big-endian values. */
746 regcache_cooked_read_unsigned (regcache
, RET1_REGNUM
, &tmp
);
747 store_unsigned_integer (valbuf
, (len
> 4 ? len
- 4 : len
), tmp
);
749 /* Ignore return values more than 8 bytes in size because the m32r
750 returns anything more than 8 bytes in the stack. */
753 regcache_cooked_read_unsigned (regcache
, RET1_REGNUM
+ 1, &tmp
);
754 store_unsigned_integer (valbuf
+ len
- 4, 4, tmp
);
758 enum return_value_convention
759 m32r_return_value (struct gdbarch
*gdbarch
, struct type
*valtype
,
760 struct regcache
*regcache
, void *readbuf
,
761 const void *writebuf
)
763 if (TYPE_LENGTH (valtype
) > 8)
764 return RETURN_VALUE_STRUCT_CONVENTION
;
768 m32r_extract_return_value (valtype
, regcache
, readbuf
);
769 if (writebuf
!= NULL
)
770 m32r_store_return_value (valtype
, regcache
, writebuf
);
771 return RETURN_VALUE_REGISTER_CONVENTION
;
778 m32r_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
780 return frame_unwind_register_unsigned (next_frame
, M32R_PC_REGNUM
);
783 /* Given a GDB frame, determine the address of the calling function's
784 frame. This will be used to create a new GDB frame struct. */
787 m32r_frame_this_id (struct frame_info
*next_frame
,
788 void **this_prologue_cache
, struct frame_id
*this_id
)
790 struct m32r_unwind_cache
*info
791 = m32r_frame_unwind_cache (next_frame
, this_prologue_cache
);
794 struct minimal_symbol
*msym_stack
;
797 /* The FUNC is easy. */
798 func
= frame_func_unwind (next_frame
);
800 /* Check if the stack is empty. */
801 msym_stack
= lookup_minimal_symbol ("_stack", NULL
, NULL
);
802 if (msym_stack
&& info
->base
== SYMBOL_VALUE_ADDRESS (msym_stack
))
805 /* Hopefully the prologue analysis either correctly determined the
806 frame's base (which is the SP from the previous frame), or set
807 that base to "NULL". */
808 base
= info
->prev_sp
;
812 id
= frame_id_build (base
, func
);
817 m32r_frame_prev_register (struct frame_info
*next_frame
,
818 void **this_prologue_cache
,
819 int regnum
, int *optimizedp
,
820 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
821 int *realnump
, void *bufferp
)
823 struct m32r_unwind_cache
*info
824 = m32r_frame_unwind_cache (next_frame
, this_prologue_cache
);
825 trad_frame_get_prev_register (next_frame
, info
->saved_regs
, regnum
,
826 optimizedp
, lvalp
, addrp
, realnump
, bufferp
);
829 static const struct frame_unwind m32r_frame_unwind
= {
832 m32r_frame_prev_register
835 static const struct frame_unwind
*
836 m32r_frame_sniffer (struct frame_info
*next_frame
)
838 return &m32r_frame_unwind
;
842 m32r_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
844 struct m32r_unwind_cache
*info
845 = m32r_frame_unwind_cache (next_frame
, this_cache
);
849 static const struct frame_base m32r_frame_base
= {
851 m32r_frame_base_address
,
852 m32r_frame_base_address
,
853 m32r_frame_base_address
856 /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
857 dummy frame. The frame ID's base needs to match the TOS value
858 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
861 static struct frame_id
862 m32r_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
864 return frame_id_build (m32r_unwind_sp (gdbarch
, next_frame
),
865 frame_pc_unwind (next_frame
));
869 static gdbarch_init_ftype m32r_gdbarch_init
;
871 static struct gdbarch
*
872 m32r_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
874 struct gdbarch
*gdbarch
;
875 struct gdbarch_tdep
*tdep
;
877 /* If there is already a candidate, use it. */
878 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
880 return arches
->gdbarch
;
882 /* Allocate space for the new architecture. */
883 tdep
= XMALLOC (struct gdbarch_tdep
);
884 gdbarch
= gdbarch_alloc (&info
, tdep
);
886 set_gdbarch_read_pc (gdbarch
, m32r_read_pc
);
887 set_gdbarch_write_pc (gdbarch
, m32r_write_pc
);
888 set_gdbarch_unwind_sp (gdbarch
, m32r_unwind_sp
);
890 set_gdbarch_num_regs (gdbarch
, M32R_NUM_REGS
);
891 set_gdbarch_sp_regnum (gdbarch
, M32R_SP_REGNUM
);
892 set_gdbarch_register_name (gdbarch
, m32r_register_name
);
893 set_gdbarch_register_type (gdbarch
, m32r_register_type
);
895 set_gdbarch_push_dummy_call (gdbarch
, m32r_push_dummy_call
);
896 set_gdbarch_return_value (gdbarch
, m32r_return_value
);
898 set_gdbarch_skip_prologue (gdbarch
, m32r_skip_prologue
);
899 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
900 set_gdbarch_breakpoint_from_pc (gdbarch
, m32r_breakpoint_from_pc
);
901 set_gdbarch_memory_insert_breakpoint (gdbarch
,
902 m32r_memory_insert_breakpoint
);
903 set_gdbarch_memory_remove_breakpoint (gdbarch
,
904 m32r_memory_remove_breakpoint
);
906 set_gdbarch_frame_align (gdbarch
, m32r_frame_align
);
908 frame_unwind_append_sniffer (gdbarch
, m32r_frame_sniffer
);
909 frame_base_set_default (gdbarch
, &m32r_frame_base
);
911 /* Methods for saving / extracting a dummy frame's ID. The ID's
912 stack address must match the SP value returned by
913 PUSH_DUMMY_CALL, and saved by generic_save_dummy_frame_tos. */
914 set_gdbarch_unwind_dummy_id (gdbarch
, m32r_unwind_dummy_id
);
916 /* Return the unwound PC value. */
917 set_gdbarch_unwind_pc (gdbarch
, m32r_unwind_pc
);
919 set_gdbarch_print_insn (gdbarch
, print_insn_m32r
);
925 _initialize_m32r_tdep (void)
927 register_gdbarch_init (bfd_arch_m32r
, m32r_gdbarch_init
);