* m68hc11-tdep.c (struct m68hc11_unwind_cache): New struct to hold
[deliverable/binutils-gdb.git] / gdb / m68hc11-tdep.c
1 /* Target-dependent code for Motorola 68HC11 & 68HC12
2 Copyright 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
3 Contributed by Stephane Carrez, stcarrez@nerim.fr
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
20
21
22 #include "defs.h"
23 #include "frame.h"
24 #include "frame-unwind.h"
25 #include "frame-base.h"
26 #include "dwarf2-frame.h"
27 #include "trad-frame.h"
28 #include "symtab.h"
29 #include "gdbtypes.h"
30 #include "gdbcmd.h"
31 #include "gdbcore.h"
32 #include "gdb_string.h"
33 #include "value.h"
34 #include "inferior.h"
35 #include "dis-asm.h"
36 #include "symfile.h"
37 #include "objfiles.h"
38 #include "arch-utils.h"
39 #include "regcache.h"
40 #include "reggroups.h"
41
42 #include "target.h"
43 #include "opcode/m68hc11.h"
44 #include "elf/m68hc11.h"
45 #include "elf-bfd.h"
46
47 /* Macros for setting and testing a bit in a minimal symbol.
48 For 68HC11/68HC12 we have two flags that tell which return
49 type the function is using. This is used for prologue and frame
50 analysis to compute correct stack frame layout.
51
52 The MSB of the minimal symbol's "info" field is used for this purpose.
53 This field is already being used to store the symbol size, so the
54 assumption is that the symbol size cannot exceed 2^30.
55
56 MSYMBOL_SET_RTC Actually sets the "RTC" bit.
57 MSYMBOL_SET_RTI Actually sets the "RTI" bit.
58 MSYMBOL_IS_RTC Tests the "RTC" bit in a minimal symbol.
59 MSYMBOL_IS_RTI Tests the "RTC" bit in a minimal symbol.
60 MSYMBOL_SIZE Returns the size of the minimal symbol,
61 i.e. the "info" field with the "special" bit
62 masked out. */
63
64 #define MSYMBOL_SET_RTC(msym) \
65 MSYMBOL_INFO (msym) = (char *) (((long) MSYMBOL_INFO (msym)) \
66 | 0x80000000)
67
68 #define MSYMBOL_SET_RTI(msym) \
69 MSYMBOL_INFO (msym) = (char *) (((long) MSYMBOL_INFO (msym)) \
70 | 0x40000000)
71
72 #define MSYMBOL_IS_RTC(msym) \
73 (((long) MSYMBOL_INFO (msym) & 0x80000000) != 0)
74
75 #define MSYMBOL_IS_RTI(msym) \
76 (((long) MSYMBOL_INFO (msym) & 0x40000000) != 0)
77
78 #define MSYMBOL_SIZE(msym) \
79 ((long) MSYMBOL_INFO (msym) & 0x3fffffff)
80
81 enum insn_return_kind {
82 RETURN_RTS,
83 RETURN_RTC,
84 RETURN_RTI
85 };
86
87
88 /* Register numbers of various important registers.
89 Note that some of these values are "real" register numbers,
90 and correspond to the general registers of the machine,
91 and some are "phony" register numbers which are too large
92 to be actual register numbers as far as the user is concerned
93 but do serve to get the desired values when passed to read_register. */
94
95 #define HARD_X_REGNUM 0
96 #define HARD_D_REGNUM 1
97 #define HARD_Y_REGNUM 2
98 #define HARD_SP_REGNUM 3
99 #define HARD_PC_REGNUM 4
100
101 #define HARD_A_REGNUM 5
102 #define HARD_B_REGNUM 6
103 #define HARD_CCR_REGNUM 7
104
105 /* 68HC12 page number register.
106 Note: to keep a compatibility with gcc register naming, we must
107 not have to rename FP and other soft registers. The page register
108 is a real hard register and must therefore be counted by NUM_REGS.
109 For this it has the same number as Z register (which is not used). */
110 #define HARD_PAGE_REGNUM 8
111 #define M68HC11_LAST_HARD_REG (HARD_PAGE_REGNUM)
112
113 /* Z is replaced by X or Y by gcc during machine reorg.
114 ??? There is no way to get it and even know whether
115 it's in X or Y or in ZS. */
116 #define SOFT_Z_REGNUM 8
117
118 /* Soft registers. These registers are special. There are treated
119 like normal hard registers by gcc and gdb (ie, within dwarf2 info).
120 They are physically located in memory. */
121 #define SOFT_FP_REGNUM 9
122 #define SOFT_TMP_REGNUM 10
123 #define SOFT_ZS_REGNUM 11
124 #define SOFT_XY_REGNUM 12
125 #define SOFT_UNUSED_REGNUM 13
126 #define SOFT_D1_REGNUM 14
127 #define SOFT_D32_REGNUM (SOFT_D1_REGNUM+31)
128 #define M68HC11_MAX_SOFT_REGS 32
129
130 #define M68HC11_NUM_REGS (8)
131 #define M68HC11_NUM_PSEUDO_REGS (M68HC11_MAX_SOFT_REGS+5)
132 #define M68HC11_ALL_REGS (M68HC11_NUM_REGS+M68HC11_NUM_PSEUDO_REGS)
133
134 #define M68HC11_REG_SIZE (2)
135
136 #define M68HC12_NUM_REGS (9)
137 #define M68HC12_NUM_PSEUDO_REGS ((M68HC11_MAX_SOFT_REGS+5)+1-1)
138 #define M68HC12_HARD_PC_REGNUM (SOFT_D32_REGNUM+1)
139
140 struct insn_sequence;
141 struct gdbarch_tdep
142 {
143 /* Stack pointer correction value. For 68hc11, the stack pointer points
144 to the next push location. An offset of 1 must be applied to obtain
145 the address where the last value is saved. For 68hc12, the stack
146 pointer points to the last value pushed. No offset is necessary. */
147 int stack_correction;
148
149 /* Description of instructions in the prologue. */
150 struct insn_sequence *prologue;
151
152 /* True if the page memory bank register is available
153 and must be used. */
154 int use_page_register;
155
156 /* ELF flags for ABI. */
157 int elf_flags;
158 };
159
160 #define M6811_TDEP gdbarch_tdep (current_gdbarch)
161 #define STACK_CORRECTION (M6811_TDEP->stack_correction)
162 #define USE_PAGE_REGISTER (M6811_TDEP->use_page_register)
163
164 struct m68hc11_unwind_cache
165 {
166 /* The previous frame's inner most stack address. Used as this
167 frame ID's stack_addr. */
168 CORE_ADDR prev_sp;
169 /* The frame's base, optionally used by the high-level debug info. */
170 CORE_ADDR base;
171 CORE_ADDR pc;
172 int size;
173 int prologue_type;
174 CORE_ADDR return_pc;
175 CORE_ADDR sp_offset;
176 int frameless;
177 enum insn_return_kind return_kind;
178
179 /* Table indicating the location of each and every register. */
180 struct trad_frame_saved_reg *saved_regs;
181 };
182
183 struct frame_extra_info
184 {
185 CORE_ADDR return_pc;
186 int frameless;
187 int size;
188 enum insn_return_kind return_kind;
189 };
190
191 /* Table of registers for 68HC11. This includes the hard registers
192 and the soft registers used by GCC. */
193 static char *
194 m68hc11_register_names[] =
195 {
196 "x", "d", "y", "sp", "pc", "a", "b",
197 "ccr", "page", "frame","tmp", "zs", "xy", 0,
198 "d1", "d2", "d3", "d4", "d5", "d6", "d7",
199 "d8", "d9", "d10", "d11", "d12", "d13", "d14",
200 "d15", "d16", "d17", "d18", "d19", "d20", "d21",
201 "d22", "d23", "d24", "d25", "d26", "d27", "d28",
202 "d29", "d30", "d31", "d32"
203 };
204
205 struct m68hc11_soft_reg
206 {
207 const char *name;
208 CORE_ADDR addr;
209 };
210
211 static struct m68hc11_soft_reg soft_regs[M68HC11_ALL_REGS];
212
213 #define M68HC11_FP_ADDR soft_regs[SOFT_FP_REGNUM].addr
214
215 static int soft_min_addr;
216 static int soft_max_addr;
217 static int soft_reg_initialized = 0;
218
219 /* Look in the symbol table for the address of a pseudo register
220 in memory. If we don't find it, pretend the register is not used
221 and not available. */
222 static void
223 m68hc11_get_register_info (struct m68hc11_soft_reg *reg, const char *name)
224 {
225 struct minimal_symbol *msymbol;
226
227 msymbol = lookup_minimal_symbol (name, NULL, NULL);
228 if (msymbol)
229 {
230 reg->addr = SYMBOL_VALUE_ADDRESS (msymbol);
231 reg->name = xstrdup (name);
232
233 /* Keep track of the address range for soft registers. */
234 if (reg->addr < (CORE_ADDR) soft_min_addr)
235 soft_min_addr = reg->addr;
236 if (reg->addr > (CORE_ADDR) soft_max_addr)
237 soft_max_addr = reg->addr;
238 }
239 else
240 {
241 reg->name = 0;
242 reg->addr = 0;
243 }
244 }
245
246 /* Initialize the table of soft register addresses according
247 to the symbol table. */
248 static void
249 m68hc11_initialize_register_info (void)
250 {
251 int i;
252
253 if (soft_reg_initialized)
254 return;
255
256 soft_min_addr = INT_MAX;
257 soft_max_addr = 0;
258 for (i = 0; i < M68HC11_ALL_REGS; i++)
259 {
260 soft_regs[i].name = 0;
261 }
262
263 m68hc11_get_register_info (&soft_regs[SOFT_FP_REGNUM], "_.frame");
264 m68hc11_get_register_info (&soft_regs[SOFT_TMP_REGNUM], "_.tmp");
265 m68hc11_get_register_info (&soft_regs[SOFT_ZS_REGNUM], "_.z");
266 soft_regs[SOFT_Z_REGNUM] = soft_regs[SOFT_ZS_REGNUM];
267 m68hc11_get_register_info (&soft_regs[SOFT_XY_REGNUM], "_.xy");
268
269 for (i = SOFT_D1_REGNUM; i < M68HC11_MAX_SOFT_REGS; i++)
270 {
271 char buf[10];
272
273 sprintf (buf, "_.d%d", i - SOFT_D1_REGNUM + 1);
274 m68hc11_get_register_info (&soft_regs[i], buf);
275 }
276
277 if (soft_regs[SOFT_FP_REGNUM].name == 0)
278 {
279 warning ("No frame soft register found in the symbol table.\n");
280 warning ("Stack backtrace will not work.\n");
281 }
282 soft_reg_initialized = 1;
283 }
284
285 /* Given an address in memory, return the soft register number if
286 that address corresponds to a soft register. Returns -1 if not. */
287 static int
288 m68hc11_which_soft_register (CORE_ADDR addr)
289 {
290 int i;
291
292 if (addr < soft_min_addr || addr > soft_max_addr)
293 return -1;
294
295 for (i = SOFT_FP_REGNUM; i < M68HC11_ALL_REGS; i++)
296 {
297 if (soft_regs[i].name && soft_regs[i].addr == addr)
298 return i;
299 }
300 return -1;
301 }
302
303 /* Fetch a pseudo register. The 68hc11 soft registers are treated like
304 pseudo registers. They are located in memory. Translate the register
305 fetch into a memory read. */
306 static void
307 m68hc11_pseudo_register_read (struct gdbarch *gdbarch,
308 struct regcache *regcache,
309 int regno, void *buf)
310 {
311 /* The PC is a pseudo reg only for 68HC12 with the memory bank
312 addressing mode. */
313 if (regno == M68HC12_HARD_PC_REGNUM)
314 {
315 ULONGEST pc;
316 const int regsize = TYPE_LENGTH (builtin_type_uint32);
317
318 regcache_cooked_read_unsigned (regcache, HARD_PC_REGNUM, &pc);
319 if (pc >= 0x8000 && pc < 0xc000)
320 {
321 ULONGEST page;
322
323 regcache_cooked_read_unsigned (regcache, HARD_PAGE_REGNUM, &page);
324 pc -= 0x8000;
325 pc += (page << 14);
326 pc += 0x1000000;
327 }
328 store_unsigned_integer (buf, regsize, pc);
329 return;
330 }
331
332 m68hc11_initialize_register_info ();
333
334 /* Fetch a soft register: translate into a memory read. */
335 if (soft_regs[regno].name)
336 {
337 target_read_memory (soft_regs[regno].addr, buf, 2);
338 }
339 else
340 {
341 memset (buf, 0, 2);
342 }
343 }
344
345 /* Store a pseudo register. Translate the register store
346 into a memory write. */
347 static void
348 m68hc11_pseudo_register_write (struct gdbarch *gdbarch,
349 struct regcache *regcache,
350 int regno, const void *buf)
351 {
352 /* The PC is a pseudo reg only for 68HC12 with the memory bank
353 addressing mode. */
354 if (regno == M68HC12_HARD_PC_REGNUM)
355 {
356 const int regsize = TYPE_LENGTH (builtin_type_uint32);
357 char *tmp = alloca (regsize);
358 CORE_ADDR pc;
359
360 memcpy (tmp, buf, regsize);
361 pc = extract_unsigned_integer (tmp, regsize);
362 if (pc >= 0x1000000)
363 {
364 pc -= 0x1000000;
365 regcache_cooked_write_unsigned (regcache, HARD_PAGE_REGNUM,
366 (pc >> 14) & 0x0ff);
367 pc &= 0x03fff;
368 regcache_cooked_write_unsigned (regcache, HARD_PC_REGNUM,
369 pc + 0x8000);
370 }
371 else
372 regcache_cooked_write_unsigned (regcache, HARD_PC_REGNUM, pc);
373 return;
374 }
375
376 m68hc11_initialize_register_info ();
377
378 /* Store a soft register: translate into a memory write. */
379 if (soft_regs[regno].name)
380 {
381 const int regsize = 2;
382 char *tmp = alloca (regsize);
383 memcpy (tmp, buf, regsize);
384 target_write_memory (soft_regs[regno].addr, tmp, regsize);
385 }
386 }
387
388 static const char *
389 m68hc11_register_name (int reg_nr)
390 {
391 if (reg_nr == M68HC12_HARD_PC_REGNUM && USE_PAGE_REGISTER)
392 return "pc";
393 if (reg_nr == HARD_PC_REGNUM && USE_PAGE_REGISTER)
394 return "ppc";
395
396 if (reg_nr < 0)
397 return NULL;
398 if (reg_nr >= M68HC11_ALL_REGS)
399 return NULL;
400
401 /* If we don't know the address of a soft register, pretend it
402 does not exist. */
403 if (reg_nr > M68HC11_LAST_HARD_REG && soft_regs[reg_nr].name == 0)
404 return NULL;
405 return m68hc11_register_names[reg_nr];
406 }
407
408 static const unsigned char *
409 m68hc11_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
410 {
411 static unsigned char breakpoint[] = {0x0};
412
413 *lenptr = sizeof (breakpoint);
414 return breakpoint;
415 }
416
417 /* Immediately after a function call, return the saved pc before the frame
418 is setup. */
419
420 static CORE_ADDR
421 m68hc11_saved_pc_after_call (struct frame_info *frame)
422 {
423 CORE_ADDR addr;
424 ULONGEST sp;
425
426 regcache_cooked_read_unsigned (current_regcache, HARD_SP_REGNUM, &sp);
427 sp += STACK_CORRECTION;
428 addr = sp & 0x0ffff;
429 return read_memory_integer (addr, 2) & 0x0FFFF;
430 }
431
432 static CORE_ADDR
433 m68hc11_frame_saved_pc (struct frame_info *frame)
434 {
435 return get_frame_extra_info (frame)->return_pc;
436 }
437
438 /* Discard from the stack the innermost frame, restoring all saved
439 registers. */
440
441 static void
442 m68hc11_pop_frame (void)
443 {
444 register struct frame_info *frame = get_current_frame ();
445 register CORE_ADDR fp, sp;
446 register int regnum;
447
448 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
449 get_frame_base (frame),
450 get_frame_base (frame)))
451 generic_pop_dummy_frame ();
452 else
453 {
454 fp = get_frame_base (frame);
455 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
456
457 /* Copy regs from where they were saved in the frame. */
458 for (regnum = 0; regnum < M68HC11_ALL_REGS; regnum++)
459 if (get_frame_saved_regs (frame)[regnum])
460 write_register (regnum,
461 read_memory_integer (get_frame_saved_regs (frame)[regnum], 2));
462
463 write_register (HARD_PC_REGNUM, get_frame_extra_info (frame)->return_pc);
464 sp = (fp + get_frame_extra_info (frame)->size + 2) & 0x0ffff;
465 write_register (HARD_SP_REGNUM, sp);
466 }
467 flush_cached_frames ();
468 }
469
470 \f
471 /* 68HC11 & 68HC12 prologue analysis.
472
473 */
474 #define MAX_CODES 12
475
476 /* 68HC11 opcodes. */
477 #undef M6811_OP_PAGE2
478 #define M6811_OP_PAGE2 (0x18)
479 #define M6811_OP_LDX (0xde)
480 #define M6811_OP_LDX_EXT (0xfe)
481 #define M6811_OP_PSHX (0x3c)
482 #define M6811_OP_STS (0x9f)
483 #define M6811_OP_STS_EXT (0xbf)
484 #define M6811_OP_TSX (0x30)
485 #define M6811_OP_XGDX (0x8f)
486 #define M6811_OP_ADDD (0xc3)
487 #define M6811_OP_TXS (0x35)
488 #define M6811_OP_DES (0x34)
489
490 /* 68HC12 opcodes. */
491 #define M6812_OP_PAGE2 (0x18)
492 #define M6812_OP_MOVW (0x01)
493 #define M6812_PB_PSHW (0xae)
494 #define M6812_OP_STS (0x5f)
495 #define M6812_OP_STS_EXT (0x7f)
496 #define M6812_OP_LEAS (0x1b)
497 #define M6812_OP_PSHX (0x34)
498 #define M6812_OP_PSHY (0x35)
499
500 /* Operand extraction. */
501 #define OP_DIRECT (0x100) /* 8-byte direct addressing. */
502 #define OP_IMM_LOW (0x200) /* Low part of 16-bit constant/address. */
503 #define OP_IMM_HIGH (0x300) /* High part of 16-bit constant/address. */
504 #define OP_PBYTE (0x400) /* 68HC12 indexed operand. */
505
506 /* Identification of the sequence. */
507 enum m6811_seq_type
508 {
509 P_LAST = 0,
510 P_SAVE_REG, /* Save a register on the stack. */
511 P_SET_FRAME, /* Setup the frame pointer. */
512 P_LOCAL_1, /* Allocate 1 byte for locals. */
513 P_LOCAL_2, /* Allocate 2 bytes for locals. */
514 P_LOCAL_N /* Allocate N bytes for locals. */
515 };
516
517 struct insn_sequence {
518 enum m6811_seq_type type;
519 unsigned length;
520 unsigned short code[MAX_CODES];
521 };
522
523 /* Sequence of instructions in the 68HC11 function prologue. */
524 static struct insn_sequence m6811_prologue[] = {
525 /* Sequences to save a soft-register. */
526 { P_SAVE_REG, 3, { M6811_OP_LDX, OP_DIRECT,
527 M6811_OP_PSHX } },
528 { P_SAVE_REG, 5, { M6811_OP_PAGE2, M6811_OP_LDX, OP_DIRECT,
529 M6811_OP_PAGE2, M6811_OP_PSHX } },
530 { P_SAVE_REG, 4, { M6811_OP_LDX_EXT, OP_IMM_HIGH, OP_IMM_LOW,
531 M6811_OP_PSHX } },
532 { P_SAVE_REG, 6, { M6811_OP_PAGE2, M6811_OP_LDX_EXT, OP_IMM_HIGH, OP_IMM_LOW,
533 M6811_OP_PAGE2, M6811_OP_PSHX } },
534
535 /* Sequences to allocate local variables. */
536 { P_LOCAL_N, 7, { M6811_OP_TSX,
537 M6811_OP_XGDX,
538 M6811_OP_ADDD, OP_IMM_HIGH, OP_IMM_LOW,
539 M6811_OP_XGDX,
540 M6811_OP_TXS } },
541 { P_LOCAL_N, 11, { M6811_OP_PAGE2, M6811_OP_TSX,
542 M6811_OP_PAGE2, M6811_OP_XGDX,
543 M6811_OP_ADDD, OP_IMM_HIGH, OP_IMM_LOW,
544 M6811_OP_PAGE2, M6811_OP_XGDX,
545 M6811_OP_PAGE2, M6811_OP_TXS } },
546 { P_LOCAL_1, 1, { M6811_OP_DES } },
547 { P_LOCAL_2, 1, { M6811_OP_PSHX } },
548 { P_LOCAL_2, 2, { M6811_OP_PAGE2, M6811_OP_PSHX } },
549
550 /* Initialize the frame pointer. */
551 { P_SET_FRAME, 2, { M6811_OP_STS, OP_DIRECT } },
552 { P_SET_FRAME, 3, { M6811_OP_STS_EXT, OP_IMM_HIGH, OP_IMM_LOW } },
553 { P_LAST, 0, { 0 } }
554 };
555
556
557 /* Sequence of instructions in the 68HC12 function prologue. */
558 static struct insn_sequence m6812_prologue[] = {
559 { P_SAVE_REG, 5, { M6812_OP_PAGE2, M6812_OP_MOVW, M6812_PB_PSHW,
560 OP_IMM_HIGH, OP_IMM_LOW } },
561 { P_SET_FRAME, 2, { M6812_OP_STS, OP_DIRECT } },
562 { P_SET_FRAME, 3, { M6812_OP_STS_EXT, OP_IMM_HIGH, OP_IMM_LOW } },
563 { P_LOCAL_N, 2, { M6812_OP_LEAS, OP_PBYTE } },
564 { P_LOCAL_2, 1, { M6812_OP_PSHX } },
565 { P_LOCAL_2, 1, { M6812_OP_PSHY } },
566 { P_LAST, 0 }
567 };
568
569
570 /* Analyze the sequence of instructions starting at the given address.
571 Returns a pointer to the sequence when it is recognized and
572 the optional value (constant/address) associated with it. */
573 static struct insn_sequence *
574 m68hc11_analyze_instruction (struct insn_sequence *seq, CORE_ADDR pc,
575 CORE_ADDR *val)
576 {
577 unsigned char buffer[MAX_CODES];
578 unsigned bufsize;
579 unsigned j;
580 CORE_ADDR cur_val;
581 short v = 0;
582
583 bufsize = 0;
584 for (; seq->type != P_LAST; seq++)
585 {
586 cur_val = 0;
587 for (j = 0; j < seq->length; j++)
588 {
589 if (bufsize < j + 1)
590 {
591 buffer[bufsize] = read_memory_unsigned_integer (pc + bufsize,
592 1);
593 bufsize++;
594 }
595 /* Continue while we match the opcode. */
596 if (seq->code[j] == buffer[j])
597 continue;
598
599 if ((seq->code[j] & 0xf00) == 0)
600 break;
601
602 /* Extract a sequence parameter (address or constant). */
603 switch (seq->code[j])
604 {
605 case OP_DIRECT:
606 cur_val = (CORE_ADDR) buffer[j];
607 break;
608
609 case OP_IMM_HIGH:
610 cur_val = cur_val & 0x0ff;
611 cur_val |= (buffer[j] << 8);
612 break;
613
614 case OP_IMM_LOW:
615 cur_val &= 0x0ff00;
616 cur_val |= buffer[j];
617 break;
618
619 case OP_PBYTE:
620 if ((buffer[j] & 0xE0) == 0x80)
621 {
622 v = buffer[j] & 0x1f;
623 if (v & 0x10)
624 v |= 0xfff0;
625 }
626 else if ((buffer[j] & 0xfe) == 0xf0)
627 {
628 v = read_memory_unsigned_integer (pc + j + 1, 1);
629 if (buffer[j] & 1)
630 v |= 0xff00;
631 }
632 else if (buffer[j] == 0xf2)
633 {
634 v = read_memory_unsigned_integer (pc + j + 1, 2);
635 }
636 cur_val = v;
637 break;
638 }
639 }
640
641 /* We have a full match. */
642 if (j == seq->length)
643 {
644 *val = cur_val;
645 return seq;
646 }
647 }
648 return 0;
649 }
650
651 /* Return the instruction that the function at the PC is using. */
652 static enum insn_return_kind
653 m68hc11_get_return_insn (CORE_ADDR pc)
654 {
655 struct minimal_symbol *sym;
656
657 /* A flag indicating that this is a STO_M68HC12_FAR or STO_M68HC12_INTERRUPT
658 function is stored by elfread.c in the high bit of the info field.
659 Use this to decide which instruction the function uses to return. */
660 sym = lookup_minimal_symbol_by_pc (pc);
661 if (sym == 0)
662 return RETURN_RTS;
663
664 if (MSYMBOL_IS_RTC (sym))
665 return RETURN_RTC;
666 else if (MSYMBOL_IS_RTI (sym))
667 return RETURN_RTI;
668 else
669 return RETURN_RTS;
670 }
671
672 /* Analyze the function prologue to find some information
673 about the function:
674 - the PC of the first line (for m68hc11_skip_prologue)
675 - the offset of the previous frame saved address (from current frame)
676 - the soft registers which are pushed. */
677 static CORE_ADDR
678 m68hc11_scan_prologue (CORE_ADDR pc, CORE_ADDR current_pc,
679 struct m68hc11_unwind_cache *info)
680 {
681 LONGEST save_addr;
682 CORE_ADDR func_end;
683 int size;
684 int found_frame_point;
685 int saved_reg;
686 int done = 0;
687 struct insn_sequence *seq_table;
688
689 info->size = 0;
690 info->sp_offset = 0;
691 if (pc >= current_pc)
692 return current_pc;
693
694 size = 0;
695
696 m68hc11_initialize_register_info ();
697 if (pc == 0)
698 {
699 info->size = 0;
700 return pc;
701 }
702
703 seq_table = gdbarch_tdep (current_gdbarch)->prologue;
704
705 /* The 68hc11 stack is as follows:
706
707
708 | |
709 +-----------+
710 | |
711 | args |
712 | |
713 +-----------+
714 | PC-return |
715 +-----------+
716 | Old frame |
717 +-----------+
718 | |
719 | Locals |
720 | |
721 +-----------+ <--- current frame
722 | |
723
724 With most processors (like 68K) the previous frame can be computed
725 easily because it is always at a fixed offset (see link/unlink).
726 That is, locals are accessed with negative offsets, arguments are
727 accessed with positive ones. Since 68hc11 only supports offsets
728 in the range [0..255], the frame is defined at the bottom of
729 locals (see picture).
730
731 The purpose of the analysis made here is to find out the size
732 of locals in this function. An alternative to this is to use
733 DWARF2 info. This would be better but I don't know how to
734 access dwarf2 debug from this function.
735
736 Walk from the function entry point to the point where we save
737 the frame. While walking instructions, compute the size of bytes
738 which are pushed. This gives us the index to access the previous
739 frame.
740
741 We limit the search to 128 bytes so that the algorithm is bounded
742 in case of random and wrong code. We also stop and abort if
743 we find an instruction which is not supposed to appear in the
744 prologue (as generated by gcc 2.95, 2.96).
745 */
746 func_end = pc + 128;
747 found_frame_point = 0;
748 info->size = 0;
749 save_addr = 0;
750 while (!done && pc + 2 < func_end)
751 {
752 struct insn_sequence *seq;
753 CORE_ADDR val;
754
755 seq = m68hc11_analyze_instruction (seq_table, pc, &val);
756 if (seq == 0)
757 break;
758
759 /* If we are within the instruction group, we can't advance the
760 pc nor the stack offset. Otherwise the caller's stack computed
761 from the current stack can be wrong. */
762 if (pc + seq->length > current_pc)
763 break;
764
765 pc = pc + seq->length;
766 if (seq->type == P_SAVE_REG)
767 {
768 if (found_frame_point)
769 {
770 saved_reg = m68hc11_which_soft_register (val);
771 if (saved_reg < 0)
772 break;
773
774 save_addr -= 2;
775 info->saved_regs[saved_reg].addr = save_addr;
776 }
777 else
778 {
779 size += 2;
780 }
781 }
782 else if (seq->type == P_SET_FRAME)
783 {
784 found_frame_point = 1;
785 info->size = size;
786 }
787 else if (seq->type == P_LOCAL_1)
788 {
789 size += 1;
790 }
791 else if (seq->type == P_LOCAL_2)
792 {
793 size += 2;
794 }
795 else if (seq->type == P_LOCAL_N)
796 {
797 /* Stack pointer is decremented for the allocation. */
798 if (val & 0x8000)
799 size -= (int) (val) | 0xffff0000;
800 else
801 size -= val;
802 }
803 }
804 if (found_frame_point == 0)
805 info->sp_offset = size;
806 else
807 info->sp_offset = -1;
808 return pc;
809 }
810
811 static CORE_ADDR
812 m68hc11_skip_prologue (CORE_ADDR pc)
813 {
814 CORE_ADDR func_addr, func_end;
815 struct symtab_and_line sal;
816 struct m68hc11_unwind_cache tmp_cache = { 0 };
817
818 /* If we have line debugging information, then the end of the
819 prologue should be the first assembly instruction of the
820 first source line. */
821 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
822 {
823 sal = find_pc_line (func_addr, 0);
824 if (sal.end && sal.end < func_end)
825 return sal.end;
826 }
827
828 pc = m68hc11_scan_prologue (pc, (CORE_ADDR) -1, &tmp_cache);
829 return pc;
830 }
831
832 /* Given a GDB frame, determine the address of the calling function's
833 frame. This will be used to create a new GDB frame struct, and
834 then DEPRECATED_INIT_EXTRA_FRAME_INFO and DEPRECATED_INIT_FRAME_PC
835 will be called for the new frame. */
836
837 static CORE_ADDR
838 m68hc11_frame_chain (struct frame_info *frame)
839 {
840 CORE_ADDR addr;
841
842 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
843 get_frame_base (frame),
844 get_frame_base (frame)))
845 return get_frame_base (frame); /* dummy frame same as caller's frame */
846
847 if (get_frame_extra_info (frame)->return_pc == 0
848 || inside_entry_file (get_frame_extra_info (frame)->return_pc))
849 return (CORE_ADDR) 0;
850
851 if (get_frame_base (frame) == 0)
852 {
853 return (CORE_ADDR) 0;
854 }
855
856 addr = get_frame_base (frame) + get_frame_extra_info (frame)->size + STACK_CORRECTION - 2;
857 addr = read_memory_unsigned_integer (addr, 2) & 0x0FFFF;
858 return addr;
859 }
860 #if 0
861 /* Put here the code to store, into a struct frame_saved_regs, the
862 addresses of the saved registers of frame described by FRAME_INFO.
863 This includes special registers such as pc and fp saved in special
864 ways in the stack frame. sp is even more special: the address we
865 return for it IS the sp for the next frame. */
866 static void
867 m68hc11_frame_init_saved_regs (struct frame_info *fi)
868 {
869 CORE_ADDR pc;
870 CORE_ADDR addr;
871
872 if (get_frame_saved_regs (fi) == NULL)
873 frame_saved_regs_zalloc (fi);
874 else
875 memset (get_frame_saved_regs (fi), 0, SIZEOF_FRAME_SAVED_REGS);
876
877 pc = get_frame_pc (fi);
878 get_frame_extra_info (fi)->return_kind = m68hc11_get_return_insn (pc);
879 m68hc11_guess_from_prologue (pc, pc, get_frame_base (fi), &pc,
880 &get_frame_extra_info (fi)->size,
881 get_frame_saved_regs (fi));
882
883 addr = get_frame_base (fi) + get_frame_extra_info (fi)->size + STACK_CORRECTION;
884 if (soft_regs[SOFT_FP_REGNUM].name)
885 get_frame_saved_regs (fi)[SOFT_FP_REGNUM] = addr - 2;
886
887 /* Take into account how the function was called/returns. */
888 if (get_frame_extra_info (fi)->return_kind == RETURN_RTC)
889 {
890 get_frame_saved_regs (fi)[HARD_PAGE_REGNUM] = addr;
891 addr++;
892 }
893 else if (get_frame_extra_info (fi)->return_kind == RETURN_RTI)
894 {
895 get_frame_saved_regs (fi)[HARD_CCR_REGNUM] = addr;
896 get_frame_saved_regs (fi)[HARD_D_REGNUM] = addr + 1;
897 get_frame_saved_regs (fi)[HARD_X_REGNUM] = addr + 3;
898 get_frame_saved_regs (fi)[HARD_Y_REGNUM] = addr + 5;
899 addr += 7;
900 }
901 get_frame_saved_regs (fi)[HARD_SP_REGNUM] = addr;
902 get_frame_saved_regs (fi)[HARD_PC_REGNUM] = get_frame_saved_regs (fi)[HARD_SP_REGNUM];
903 }
904
905 static void
906 m68hc11_init_extra_frame_info (int fromleaf, struct frame_info *fi)
907 {
908 CORE_ADDR addr;
909
910 frame_extra_info_zalloc (fi, sizeof (struct frame_extra_info));
911
912 if (get_next_frame (fi))
913 deprecated_update_frame_pc_hack (fi, DEPRECATED_FRAME_SAVED_PC (get_next_frame (fi)));
914
915 m68hc11_frame_init_saved_regs (fi);
916
917 if (fromleaf)
918 {
919 get_frame_extra_info (fi)->return_kind = m68hc11_get_return_insn (get_frame_pc (fi));
920 get_frame_extra_info (fi)->return_pc = m68hc11_saved_pc_after_call (fi);
921 }
922 else
923 {
924 addr = get_frame_saved_regs (fi)[HARD_PC_REGNUM];
925 addr = read_memory_unsigned_integer (addr, 2) & 0x0ffff;
926
927 /* Take into account the 68HC12 specific call (PC + page). */
928 if (get_frame_extra_info (fi)->return_kind == RETURN_RTC
929 && addr >= 0x08000 && addr < 0x0c000
930 && USE_PAGE_REGISTER)
931 {
932 CORE_ADDR page_addr = get_frame_saved_regs (fi)[HARD_PAGE_REGNUM];
933
934 unsigned page = read_memory_unsigned_integer (page_addr, 1);
935 addr -= 0x08000;
936 addr += ((page & 0x0ff) << 14);
937 addr += 0x1000000;
938 }
939 get_frame_extra_info (fi)->return_pc = addr;
940 }
941 }
942 #endif
943
944 static CORE_ADDR
945 m68hc11_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
946 {
947 ULONGEST pc;
948
949 frame_unwind_unsigned_register (next_frame, gdbarch_pc_regnum (gdbarch),
950 &pc);
951 return pc;
952 }
953
954 /* Put here the code to store, into fi->saved_regs, the addresses of
955 the saved registers of frame described by FRAME_INFO. This
956 includes special registers such as pc and fp saved in special ways
957 in the stack frame. sp is even more special: the address we return
958 for it IS the sp for the next frame. */
959
960 struct m68hc11_unwind_cache *
961 m68hc11_frame_unwind_cache (struct frame_info *next_frame,
962 void **this_prologue_cache)
963 {
964 ULONGEST prev_sp;
965 ULONGEST this_base;
966 struct m68hc11_unwind_cache *info;
967 CORE_ADDR current_pc;
968 int i;
969
970 if ((*this_prologue_cache))
971 return (*this_prologue_cache);
972
973 info = FRAME_OBSTACK_ZALLOC (struct m68hc11_unwind_cache);
974 (*this_prologue_cache) = info;
975 info->saved_regs = trad_frame_alloc_saved_regs (next_frame);
976
977 info->pc = frame_func_unwind (next_frame);
978
979 info->size = 0;
980 info->return_kind = m68hc11_get_return_insn (info->pc);
981
982 /* The SP was moved to the FP. This indicates that a new frame
983 was created. Get THIS frame's FP value by unwinding it from
984 the next frame. */
985 frame_unwind_unsigned_register (next_frame, SOFT_FP_REGNUM, &this_base);
986 if (this_base == 0)
987 {
988 info->base = 0;
989 return info;
990 }
991
992 current_pc = frame_pc_unwind (next_frame);
993 if (info->pc != 0)
994 m68hc11_scan_prologue (info->pc, current_pc, info);
995
996 info->saved_regs[HARD_PC_REGNUM].addr = info->size;
997
998 if (info->sp_offset != (CORE_ADDR) -1)
999 {
1000 info->saved_regs[HARD_PC_REGNUM].addr = info->sp_offset;
1001 frame_unwind_unsigned_register (next_frame, HARD_SP_REGNUM, &this_base);
1002 prev_sp = this_base + info->sp_offset + 2;
1003 this_base += STACK_CORRECTION;
1004 }
1005 else
1006 {
1007 /* The FP points at the last saved register. Adjust the FP back
1008 to before the first saved register giving the SP. */
1009 prev_sp = this_base + info->size + 2;
1010
1011 this_base += STACK_CORRECTION;
1012 if (soft_regs[SOFT_FP_REGNUM].name)
1013 info->saved_regs[SOFT_FP_REGNUM].addr = info->size - 2;
1014 }
1015
1016 if (info->return_kind == RETURN_RTC)
1017 {
1018 prev_sp += 1;
1019 info->saved_regs[HARD_PAGE_REGNUM].addr = info->size;
1020 info->saved_regs[HARD_PC_REGNUM].addr = info->size + 1;
1021 }
1022 else if (info->return_kind == RETURN_RTI)
1023 {
1024 prev_sp += 7;
1025 info->saved_regs[HARD_CCR_REGNUM].addr = info->size;
1026 info->saved_regs[HARD_D_REGNUM].addr = info->size + 1;
1027 info->saved_regs[HARD_X_REGNUM].addr = info->size + 3;
1028 info->saved_regs[HARD_Y_REGNUM].addr = info->size + 5;
1029 info->saved_regs[HARD_PC_REGNUM].addr = info->size + 7;
1030 }
1031
1032 /* Add 1 here to adjust for the post-decrement nature of the push
1033 instruction.*/
1034 info->prev_sp = prev_sp;
1035
1036 info->base = this_base;
1037
1038 /* Adjust all the saved registers so that they contain addresses and not
1039 offsets. */
1040 for (i = 0; i < NUM_REGS + NUM_PSEUDO_REGS - 1; i++)
1041 if (trad_frame_addr_p (info->saved_regs, i))
1042 {
1043 info->saved_regs[i].addr += this_base;
1044 }
1045
1046 /* The previous frame's SP needed to be computed. Save the computed
1047 value. */
1048 trad_frame_set_value (info->saved_regs, HARD_SP_REGNUM, info->prev_sp);
1049
1050 return info;
1051 }
1052
1053 /* Given a GDB frame, determine the address of the calling function's
1054 frame. This will be used to create a new GDB frame struct. */
1055
1056 static void
1057 m68hc11_frame_this_id (struct frame_info *next_frame,
1058 void **this_prologue_cache,
1059 struct frame_id *this_id)
1060 {
1061 struct m68hc11_unwind_cache *info
1062 = m68hc11_frame_unwind_cache (next_frame, this_prologue_cache);
1063 CORE_ADDR base;
1064 CORE_ADDR func;
1065 struct frame_id id;
1066
1067 /* The FUNC is easy. */
1068 func = frame_func_unwind (next_frame);
1069
1070 /* This is meant to halt the backtrace at "_start". Make sure we
1071 don't halt it at a generic dummy frame. */
1072 if (inside_entry_file (func))
1073 return;
1074
1075 /* Hopefully the prologue analysis either correctly determined the
1076 frame's base (which is the SP from the previous frame), or set
1077 that base to "NULL". */
1078 base = info->prev_sp;
1079 if (base == 0)
1080 return;
1081
1082 id = frame_id_build (base, func);
1083 #if 0
1084 /* Check that we're not going round in circles with the same frame
1085 ID (but avoid applying the test to sentinel frames which do go
1086 round in circles). Can't use frame_id_eq() as that doesn't yet
1087 compare the frame's PC value. */
1088 if (frame_relative_level (next_frame) >= 0
1089 && get_frame_type (next_frame) != DUMMY_FRAME
1090 && frame_id_eq (get_frame_id (next_frame), id))
1091 return;
1092 #endif
1093 (*this_id) = id;
1094 }
1095
1096 static void
1097 m68hc11_frame_prev_register (struct frame_info *next_frame,
1098 void **this_prologue_cache,
1099 int regnum, int *optimizedp,
1100 enum lval_type *lvalp, CORE_ADDR *addrp,
1101 int *realnump, void *bufferp)
1102 {
1103 struct m68hc11_unwind_cache *info
1104 = m68hc11_frame_unwind_cache (next_frame, this_prologue_cache);
1105
1106 trad_frame_prev_register (next_frame, info->saved_regs, regnum,
1107 optimizedp, lvalp, addrp, realnump, bufferp);
1108
1109 if (regnum == HARD_PC_REGNUM)
1110 {
1111 /* Take into account the 68HC12 specific call (PC + page). */
1112 if (info->return_kind == RETURN_RTC
1113 && *addrp >= 0x08000 && *addrp < 0x0c000
1114 && USE_PAGE_REGISTER)
1115 {
1116 int page_optimized;
1117
1118 CORE_ADDR page;
1119
1120 trad_frame_prev_register (next_frame, info->saved_regs,
1121 HARD_PAGE_REGNUM, &page_optimized,
1122 0, &page, 0, 0);
1123 *addrp -= 0x08000;
1124 *addrp += ((page & 0x0ff) << 14);
1125 *addrp += 0x1000000;
1126 }
1127 }
1128 }
1129
1130 static const struct frame_unwind m68hc11_frame_unwind = {
1131 NORMAL_FRAME,
1132 m68hc11_frame_this_id,
1133 m68hc11_frame_prev_register
1134 };
1135
1136 const struct frame_unwind *
1137 m68hc11_frame_p (CORE_ADDR pc)
1138 {
1139 return &m68hc11_frame_unwind;
1140 }
1141
1142 static CORE_ADDR
1143 m68hc11_frame_base_address (struct frame_info *next_frame, void **this_cache)
1144 {
1145 struct m68hc11_unwind_cache *info
1146 = m68hc11_frame_unwind_cache (next_frame, this_cache);
1147
1148 return info->base;
1149 }
1150
1151 static CORE_ADDR
1152 m68hc11_frame_args_address (struct frame_info *next_frame, void **this_cache)
1153 {
1154 CORE_ADDR addr;
1155 struct m68hc11_unwind_cache *info
1156 = m68hc11_frame_unwind_cache (next_frame, this_cache);
1157
1158 addr = info->base + info->size;
1159 if (info->return_kind == RETURN_RTC)
1160 addr += 1;
1161 else if (info->return_kind == RETURN_RTI)
1162 addr += 7;
1163
1164 return addr;
1165 }
1166
1167 static const struct frame_base m68hc11_frame_base = {
1168 &m68hc11_frame_unwind,
1169 m68hc11_frame_base_address,
1170 m68hc11_frame_base_address,
1171 m68hc11_frame_args_address
1172 };
1173
1174 static CORE_ADDR
1175 m68hc11_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
1176 {
1177 ULONGEST sp;
1178 frame_unwind_unsigned_register (next_frame, HARD_SP_REGNUM, &sp);
1179 return sp;
1180 }
1181
1182 /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
1183 dummy frame. The frame ID's base needs to match the TOS value
1184 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
1185 breakpoint. */
1186
1187 static struct frame_id
1188 m68hc11_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
1189 {
1190 ULONGEST tos;
1191 CORE_ADDR pc = frame_pc_unwind (next_frame);
1192
1193 frame_unwind_unsigned_register (next_frame, SOFT_FP_REGNUM, &tos);
1194 tos += 2;
1195 return frame_id_build (tos, pc);
1196 }
1197
1198 \f
1199 /* Get and print the register from the given frame. */
1200 static void
1201 m68hc11_print_register (struct gdbarch *gdbarch, struct ui_file *file,
1202 struct frame_info *frame, int regno)
1203 {
1204 LONGEST rval;
1205
1206 if (regno == HARD_PC_REGNUM || regno == HARD_SP_REGNUM
1207 || regno == SOFT_FP_REGNUM || regno == M68HC12_HARD_PC_REGNUM)
1208 frame_read_unsigned_register (frame, regno, &rval);
1209 else
1210 frame_read_signed_register (frame, regno, &rval);
1211
1212 if (regno == HARD_A_REGNUM || regno == HARD_B_REGNUM
1213 || regno == HARD_CCR_REGNUM || regno == HARD_PAGE_REGNUM)
1214 {
1215 fprintf_filtered (file, "0x%02x ", (unsigned char) rval);
1216 if (regno != HARD_CCR_REGNUM)
1217 print_longest (file, 'd', 1, rval);
1218 }
1219 else
1220 {
1221 if (regno == HARD_PC_REGNUM && gdbarch_tdep (gdbarch)->use_page_register)
1222 {
1223 ULONGEST page;
1224
1225 frame_read_unsigned_register (frame, HARD_PAGE_REGNUM, &page);
1226 fprintf_filtered (file, "0x%02x:%04x ", (unsigned) page,
1227 (unsigned) rval);
1228 }
1229 else
1230 {
1231 fprintf_filtered (file, "0x%04x ", (unsigned) rval);
1232 if (regno != HARD_PC_REGNUM && regno != HARD_SP_REGNUM
1233 && regno != SOFT_FP_REGNUM && regno != M68HC12_HARD_PC_REGNUM)
1234 print_longest (file, 'd', 1, rval);
1235 }
1236 }
1237
1238 if (regno == HARD_CCR_REGNUM)
1239 {
1240 /* CCR register */
1241 int C, Z, N, V;
1242 unsigned char l = rval & 0xff;
1243
1244 fprintf_filtered (file, "%c%c%c%c%c%c%c%c ",
1245 l & M6811_S_BIT ? 'S' : '-',
1246 l & M6811_X_BIT ? 'X' : '-',
1247 l & M6811_H_BIT ? 'H' : '-',
1248 l & M6811_I_BIT ? 'I' : '-',
1249 l & M6811_N_BIT ? 'N' : '-',
1250 l & M6811_Z_BIT ? 'Z' : '-',
1251 l & M6811_V_BIT ? 'V' : '-',
1252 l & M6811_C_BIT ? 'C' : '-');
1253 N = (l & M6811_N_BIT) != 0;
1254 Z = (l & M6811_Z_BIT) != 0;
1255 V = (l & M6811_V_BIT) != 0;
1256 C = (l & M6811_C_BIT) != 0;
1257
1258 /* Print flags following the h8300 */
1259 if ((C | Z) == 0)
1260 fprintf_filtered (file, "u> ");
1261 else if ((C | Z) == 1)
1262 fprintf_filtered (file, "u<= ");
1263 else if (C == 0)
1264 fprintf_filtered (file, "u< ");
1265
1266 if (Z == 0)
1267 fprintf_filtered (file, "!= ");
1268 else
1269 fprintf_filtered (file, "== ");
1270
1271 if ((N ^ V) == 0)
1272 fprintf_filtered (file, ">= ");
1273 else
1274 fprintf_filtered (file, "< ");
1275
1276 if ((Z | (N ^ V)) == 0)
1277 fprintf_filtered (file, "> ");
1278 else
1279 fprintf_filtered (file, "<= ");
1280 }
1281 }
1282
1283 /* Same as 'info reg' but prints the registers in a different way. */
1284 static void
1285 m68hc11_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file,
1286 struct frame_info *frame, int regno, int cpregs)
1287 {
1288 if (regno >= 0)
1289 {
1290 const char *name = gdbarch_register_name (gdbarch, regno);
1291
1292 if (!name || !*name)
1293 return;
1294
1295 fprintf_filtered (file, "%-10s ", name);
1296 m68hc11_print_register (gdbarch, file, frame, regno);
1297 fprintf_filtered (file, "\n");
1298 }
1299 else
1300 {
1301 int i, nr;
1302
1303 fprintf_filtered (file, "PC=");
1304 m68hc11_print_register (gdbarch, file, frame, HARD_PC_REGNUM);
1305
1306 fprintf_filtered (file, " SP=");
1307 m68hc11_print_register (gdbarch, file, frame, HARD_SP_REGNUM);
1308
1309 fprintf_filtered (file, " FP=");
1310 m68hc11_print_register (gdbarch, file, frame, SOFT_FP_REGNUM);
1311
1312 fprintf_filtered (file, "\nCCR=");
1313 m68hc11_print_register (gdbarch, file, frame, HARD_CCR_REGNUM);
1314
1315 fprintf_filtered (file, "\nD=");
1316 m68hc11_print_register (gdbarch, file, frame, HARD_D_REGNUM);
1317
1318 fprintf_filtered (file, " X=");
1319 m68hc11_print_register (gdbarch, file, frame, HARD_X_REGNUM);
1320
1321 fprintf_filtered (file, " Y=");
1322 m68hc11_print_register (gdbarch, file, frame, HARD_Y_REGNUM);
1323
1324 if (gdbarch_tdep (gdbarch)->use_page_register)
1325 {
1326 fprintf_filtered (file, "\nPage=");
1327 m68hc11_print_register (gdbarch, file, frame, HARD_PAGE_REGNUM);
1328 }
1329 fprintf_filtered (file, "\n");
1330
1331 nr = 0;
1332 for (i = SOFT_D1_REGNUM; i < M68HC11_ALL_REGS; i++)
1333 {
1334 /* Skip registers which are not defined in the symbol table. */
1335 if (soft_regs[i].name == 0)
1336 continue;
1337
1338 fprintf_filtered (file, "D%d=", i - SOFT_D1_REGNUM + 1);
1339 m68hc11_print_register (gdbarch, file, frame, i);
1340 nr++;
1341 if ((nr % 8) == 7)
1342 fprintf_filtered (file, "\n");
1343 else
1344 fprintf_filtered (file, " ");
1345 }
1346 if (nr && (nr % 8) != 7)
1347 fprintf_filtered (file, "\n");
1348 }
1349 }
1350
1351 /* Same as 'info reg' but prints the registers in a different way. */
1352 static void
1353 show_regs (char *args, int from_tty)
1354 {
1355 m68hc11_print_registers_info (current_gdbarch, gdb_stdout,
1356 get_current_frame (), -1, 1);
1357 }
1358
1359 static CORE_ADDR
1360 m68hc11_stack_align (CORE_ADDR addr)
1361 {
1362 return ((addr + 1) & -2);
1363 }
1364
1365 static CORE_ADDR
1366 m68hc11_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
1367 struct regcache *regcache, CORE_ADDR bp_addr,
1368 int nargs, struct value **args, CORE_ADDR sp,
1369 int struct_return, CORE_ADDR struct_addr)
1370 {
1371 int argnum;
1372 int first_stack_argnum;
1373 struct type *type;
1374 char *val;
1375 int len;
1376 char buf[2];
1377
1378 first_stack_argnum = 0;
1379 if (struct_return)
1380 {
1381 /* The struct is allocated on the stack and gdb used the stack
1382 pointer for the address of that struct. We must apply the
1383 stack offset on the address. */
1384 regcache_cooked_write_unsigned (regcache, HARD_D_REGNUM,
1385 struct_addr + STACK_CORRECTION);
1386 }
1387 else if (nargs > 0)
1388 {
1389 type = VALUE_TYPE (args[0]);
1390 len = TYPE_LENGTH (type);
1391
1392 /* First argument is passed in D and X registers. */
1393 if (len <= 4)
1394 {
1395 ULONGEST v;
1396
1397 v = extract_unsigned_integer (VALUE_CONTENTS (args[0]), len);
1398 first_stack_argnum = 1;
1399
1400 regcache_cooked_write_unsigned (regcache, HARD_D_REGNUM, v);
1401 if (len > 2)
1402 {
1403 v >>= 16;
1404 regcache_cooked_write_unsigned (regcache, HARD_X_REGNUM, v);
1405 }
1406 }
1407 }
1408
1409 for (argnum = nargs - 1; argnum >= first_stack_argnum; argnum--)
1410 {
1411 type = VALUE_TYPE (args[argnum]);
1412 len = TYPE_LENGTH (type);
1413
1414 if (len & 1)
1415 {
1416 static char zero = 0;
1417
1418 sp--;
1419 write_memory (sp, &zero, 1);
1420 }
1421 val = (char*) VALUE_CONTENTS (args[argnum]);
1422 sp -= len;
1423 write_memory (sp, val, len);
1424 }
1425
1426 /* Store return address. */
1427 sp -= 2;
1428 store_unsigned_integer (buf, 2, bp_addr);
1429 write_memory (sp, buf, 2);
1430
1431 /* Finally, update the stack pointer... */
1432 sp -= STACK_CORRECTION;
1433 regcache_cooked_write_unsigned (regcache, HARD_SP_REGNUM, sp);
1434
1435 /* ...and fake a frame pointer. */
1436 regcache_cooked_write_unsigned (regcache, SOFT_FP_REGNUM, sp);
1437
1438 /* DWARF2/GCC uses the stack address *before* the function call as a
1439 frame's CFA. */
1440 return sp + 2;
1441 }
1442
1443
1444 /* Return the GDB type object for the "standard" data type
1445 of data in register N. */
1446
1447 static struct type *
1448 m68hc11_register_type (struct gdbarch *gdbarch, int reg_nr)
1449 {
1450 switch (reg_nr)
1451 {
1452 case HARD_PAGE_REGNUM:
1453 case HARD_A_REGNUM:
1454 case HARD_B_REGNUM:
1455 case HARD_CCR_REGNUM:
1456 return builtin_type_uint8;
1457
1458 case M68HC12_HARD_PC_REGNUM:
1459 return builtin_type_uint32;
1460
1461 default:
1462 return builtin_type_uint16;
1463 }
1464 }
1465
1466 static void
1467 m68hc11_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
1468 {
1469 /* The struct address computed by gdb is on the stack.
1470 It uses the stack pointer so we must apply the stack
1471 correction offset. */
1472 write_register (HARD_D_REGNUM, addr + STACK_CORRECTION);
1473 }
1474
1475 static void
1476 m68hc11_store_return_value (struct type *type, struct regcache *regcache,
1477 const void *valbuf)
1478 {
1479 int len;
1480
1481 len = TYPE_LENGTH (type);
1482
1483 /* First argument is passed in D and X registers. */
1484 if (len <= 2)
1485 regcache_raw_write_part (regcache, HARD_D_REGNUM, 2 - len, len, valbuf);
1486 else if (len <= 4)
1487 {
1488 regcache_raw_write_part (regcache, HARD_X_REGNUM, 4 - len,
1489 len - 2, valbuf);
1490 regcache_raw_write (regcache, HARD_D_REGNUM, (char*) valbuf + (len - 2));
1491 }
1492 else
1493 error ("return of value > 4 is not supported.");
1494 }
1495
1496
1497 /* Given a return value in `regcache' with a type `type',
1498 extract and copy its value into `valbuf'. */
1499
1500 static void
1501 m68hc11_extract_return_value (struct type *type, struct regcache *regcache,
1502 void *valbuf)
1503 {
1504 int len = TYPE_LENGTH (type);
1505 char buf[M68HC11_REG_SIZE];
1506
1507 regcache_raw_read (regcache, HARD_D_REGNUM, buf);
1508 switch (len)
1509 {
1510 case 1:
1511 memcpy (valbuf, buf + 1, 1);
1512 break;
1513
1514 case 2:
1515 memcpy (valbuf, buf, 2);
1516 break;
1517
1518 case 3:
1519 memcpy ((char*) valbuf + 1, buf, 2);
1520 regcache_raw_read (regcache, HARD_X_REGNUM, buf);
1521 memcpy (valbuf, buf + 1, 1);
1522 break;
1523
1524 case 4:
1525 memcpy ((char*) valbuf + 2, buf, 2);
1526 regcache_raw_read (regcache, HARD_X_REGNUM, buf);
1527 memcpy (valbuf, buf, 2);
1528 break;
1529
1530 default:
1531 error ("bad size for return value");
1532 }
1533 }
1534
1535 /* Should call_function allocate stack space for a struct return? */
1536 static int
1537 m68hc11_use_struct_convention (int gcc_p, struct type *type)
1538 {
1539 return (TYPE_CODE (type) == TYPE_CODE_STRUCT
1540 || TYPE_CODE (type) == TYPE_CODE_UNION
1541 || TYPE_LENGTH (type) > 4);
1542 }
1543
1544 static int
1545 m68hc11_return_value_on_stack (struct type *type)
1546 {
1547 return TYPE_LENGTH (type) > 4;
1548 }
1549
1550 /* Extract from an array REGBUF containing the (raw) register state
1551 the address in which a function should return its structure value,
1552 as a CORE_ADDR (or an expression that can be used as one). */
1553 static CORE_ADDR
1554 m68hc11_extract_struct_value_address (struct regcache *regcache)
1555 {
1556 char buf[M68HC11_REG_SIZE];
1557
1558 regcache_cooked_read (regcache, HARD_D_REGNUM, buf);
1559 return extract_unsigned_integer (buf, M68HC11_REG_SIZE);
1560 }
1561
1562 /* Test whether the ELF symbol corresponds to a function using rtc or
1563 rti to return. */
1564
1565 static void
1566 m68hc11_elf_make_msymbol_special (asymbol *sym, struct minimal_symbol *msym)
1567 {
1568 unsigned char flags;
1569
1570 flags = ((elf_symbol_type *)sym)->internal_elf_sym.st_other;
1571 if (flags & STO_M68HC12_FAR)
1572 MSYMBOL_SET_RTC (msym);
1573 if (flags & STO_M68HC12_INTERRUPT)
1574 MSYMBOL_SET_RTI (msym);
1575 }
1576
1577 static int
1578 gdb_print_insn_m68hc11 (bfd_vma memaddr, disassemble_info *info)
1579 {
1580 if (TARGET_ARCHITECTURE->arch == bfd_arch_m68hc11)
1581 return print_insn_m68hc11 (memaddr, info);
1582 else
1583 return print_insn_m68hc12 (memaddr, info);
1584 }
1585
1586 \f
1587
1588 /* 68HC11/68HC12 register groups.
1589 Identify real hard registers and soft registers used by gcc. */
1590
1591 static struct reggroup *m68hc11_soft_reggroup;
1592 static struct reggroup *m68hc11_hard_reggroup;
1593
1594 static void
1595 m68hc11_init_reggroups (void)
1596 {
1597 m68hc11_hard_reggroup = reggroup_new ("hard", USER_REGGROUP);
1598 m68hc11_soft_reggroup = reggroup_new ("soft", USER_REGGROUP);
1599 }
1600
1601 static void
1602 m68hc11_add_reggroups (struct gdbarch *gdbarch)
1603 {
1604 reggroup_add (gdbarch, m68hc11_hard_reggroup);
1605 reggroup_add (gdbarch, m68hc11_soft_reggroup);
1606 reggroup_add (gdbarch, general_reggroup);
1607 reggroup_add (gdbarch, float_reggroup);
1608 reggroup_add (gdbarch, all_reggroup);
1609 reggroup_add (gdbarch, save_reggroup);
1610 reggroup_add (gdbarch, restore_reggroup);
1611 reggroup_add (gdbarch, vector_reggroup);
1612 reggroup_add (gdbarch, system_reggroup);
1613 }
1614
1615 static int
1616 m68hc11_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
1617 struct reggroup *group)
1618 {
1619 /* We must save the real hard register as well as gcc
1620 soft registers including the frame pointer. */
1621 if (group == save_reggroup || group == restore_reggroup)
1622 {
1623 return (regnum <= gdbarch_num_regs (gdbarch)
1624 || ((regnum == SOFT_FP_REGNUM
1625 || regnum == SOFT_TMP_REGNUM
1626 || regnum == SOFT_ZS_REGNUM
1627 || regnum == SOFT_XY_REGNUM)
1628 && m68hc11_register_name (regnum)));
1629 }
1630
1631 /* Group to identify gcc soft registers (d1..dN). */
1632 if (group == m68hc11_soft_reggroup)
1633 {
1634 return regnum >= SOFT_D1_REGNUM && m68hc11_register_name (regnum);
1635 }
1636
1637 if (group == m68hc11_hard_reggroup)
1638 {
1639 return regnum == HARD_PC_REGNUM || regnum == HARD_SP_REGNUM
1640 || regnum == HARD_X_REGNUM || regnum == HARD_D_REGNUM
1641 || regnum == HARD_Y_REGNUM || regnum == HARD_CCR_REGNUM;
1642 }
1643 return default_register_reggroup_p (gdbarch, regnum, group);
1644 }
1645
1646 static struct gdbarch *
1647 m68hc11_gdbarch_init (struct gdbarch_info info,
1648 struct gdbarch_list *arches)
1649 {
1650 struct gdbarch *gdbarch;
1651 struct gdbarch_tdep *tdep;
1652 int elf_flags;
1653
1654 soft_reg_initialized = 0;
1655
1656 /* Extract the elf_flags if available. */
1657 if (info.abfd != NULL
1658 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
1659 elf_flags = elf_elfheader (info.abfd)->e_flags;
1660 else
1661 elf_flags = 0;
1662
1663 /* try to find a pre-existing architecture */
1664 for (arches = gdbarch_list_lookup_by_info (arches, &info);
1665 arches != NULL;
1666 arches = gdbarch_list_lookup_by_info (arches->next, &info))
1667 {
1668 if (gdbarch_tdep (arches->gdbarch)->elf_flags != elf_flags)
1669 continue;
1670
1671 return arches->gdbarch;
1672 }
1673
1674 /* Need a new architecture. Fill in a target specific vector. */
1675 tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
1676 gdbarch = gdbarch_alloc (&info, tdep);
1677 tdep->elf_flags = elf_flags;
1678
1679 switch (info.bfd_arch_info->arch)
1680 {
1681 case bfd_arch_m68hc11:
1682 tdep->stack_correction = 1;
1683 tdep->use_page_register = 0;
1684 tdep->prologue = m6811_prologue;
1685 set_gdbarch_addr_bit (gdbarch, 16);
1686 set_gdbarch_num_pseudo_regs (gdbarch, M68HC11_NUM_PSEUDO_REGS);
1687 set_gdbarch_pc_regnum (gdbarch, HARD_PC_REGNUM);
1688 set_gdbarch_num_regs (gdbarch, M68HC11_NUM_REGS);
1689 break;
1690
1691 case bfd_arch_m68hc12:
1692 tdep->stack_correction = 0;
1693 tdep->use_page_register = elf_flags & E_M68HC12_BANKS;
1694 tdep->prologue = m6812_prologue;
1695 set_gdbarch_addr_bit (gdbarch, elf_flags & E_M68HC12_BANKS ? 32 : 16);
1696 set_gdbarch_num_pseudo_regs (gdbarch,
1697 elf_flags & E_M68HC12_BANKS
1698 ? M68HC12_NUM_PSEUDO_REGS
1699 : M68HC11_NUM_PSEUDO_REGS);
1700 set_gdbarch_pc_regnum (gdbarch, elf_flags & E_M68HC12_BANKS
1701 ? M68HC12_HARD_PC_REGNUM : HARD_PC_REGNUM);
1702 set_gdbarch_num_regs (gdbarch, elf_flags & E_M68HC12_BANKS
1703 ? M68HC12_NUM_REGS : M68HC11_NUM_REGS);
1704 break;
1705
1706 default:
1707 break;
1708 }
1709
1710 /* Initially set everything according to the ABI.
1711 Use 16-bit integers since it will be the case for most
1712 programs. The size of these types should normally be set
1713 according to the dwarf2 debug information. */
1714 set_gdbarch_short_bit (gdbarch, 16);
1715 set_gdbarch_int_bit (gdbarch, elf_flags & E_M68HC11_I32 ? 32 : 16);
1716 set_gdbarch_float_bit (gdbarch, 32);
1717 set_gdbarch_double_bit (gdbarch, elf_flags & E_M68HC11_F64 ? 64 : 32);
1718 set_gdbarch_long_double_bit (gdbarch, 64);
1719 set_gdbarch_long_bit (gdbarch, 32);
1720 set_gdbarch_ptr_bit (gdbarch, 16);
1721 set_gdbarch_long_long_bit (gdbarch, 64);
1722
1723 /* Characters are unsigned. */
1724 set_gdbarch_char_signed (gdbarch, 0);
1725
1726 set_gdbarch_unwind_pc (gdbarch, m68hc11_unwind_pc);
1727 set_gdbarch_unwind_sp (gdbarch, m68hc11_unwind_sp);
1728
1729 /* Set register info. */
1730 set_gdbarch_fp0_regnum (gdbarch, -1);
1731 set_gdbarch_frame_args_skip (gdbarch, 0);
1732
1733 set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
1734
1735 set_gdbarch_sp_regnum (gdbarch, HARD_SP_REGNUM);
1736 set_gdbarch_register_name (gdbarch, m68hc11_register_name);
1737 set_gdbarch_register_type (gdbarch, m68hc11_register_type);
1738 set_gdbarch_pseudo_register_read (gdbarch, m68hc11_pseudo_register_read);
1739 set_gdbarch_pseudo_register_write (gdbarch, m68hc11_pseudo_register_write);
1740
1741 set_gdbarch_push_dummy_call (gdbarch, m68hc11_push_dummy_call);
1742
1743 set_gdbarch_extract_return_value (gdbarch, m68hc11_extract_return_value);
1744 set_gdbarch_return_value_on_stack (gdbarch, m68hc11_return_value_on_stack);
1745
1746 set_gdbarch_store_return_value (gdbarch, m68hc11_store_return_value);
1747 set_gdbarch_extract_struct_value_address (gdbarch, m68hc11_extract_struct_value_address);
1748
1749 set_gdbarch_store_return_value (gdbarch, m68hc11_store_return_value);
1750 set_gdbarch_extract_struct_value_address (gdbarch, m68hc11_extract_struct_value_address);
1751 set_gdbarch_use_struct_convention (gdbarch, m68hc11_use_struct_convention);
1752 set_gdbarch_skip_prologue (gdbarch, m68hc11_skip_prologue);
1753 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1754 set_gdbarch_decr_pc_after_break (gdbarch, 0);
1755 set_gdbarch_function_start_offset (gdbarch, 0);
1756 set_gdbarch_breakpoint_from_pc (gdbarch, m68hc11_breakpoint_from_pc);
1757 set_gdbarch_stack_align (gdbarch, m68hc11_stack_align);
1758 set_gdbarch_print_insn (gdbarch, gdb_print_insn_m68hc11);
1759
1760 m68hc11_add_reggroups (gdbarch);
1761 set_gdbarch_register_reggroup_p (gdbarch, m68hc11_register_reggroup_p);
1762 set_gdbarch_print_registers_info (gdbarch, m68hc11_print_registers_info);
1763
1764 /* Hook in the DWARF CFI frame unwinder. */
1765 frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer);
1766 set_gdbarch_dwarf2_build_frame_info (gdbarch, dwarf2_build_frame_info);
1767
1768 frame_unwind_append_predicate (gdbarch, m68hc11_frame_p);
1769 frame_base_set_default (gdbarch, &m68hc11_frame_base);
1770
1771 /* Methods for saving / extracting a dummy frame's ID. The ID's
1772 stack address must match the SP value returned by
1773 PUSH_DUMMY_CALL, and saved by generic_save_dummy_frame_tos. */
1774 set_gdbarch_unwind_dummy_id (gdbarch, m68hc11_unwind_dummy_id);
1775
1776 /* Return the unwound PC value. */
1777 set_gdbarch_unwind_pc (gdbarch, m68hc11_unwind_pc);
1778
1779 /* Minsymbol frobbing. */
1780 set_gdbarch_elf_make_msymbol_special (gdbarch,
1781 m68hc11_elf_make_msymbol_special);
1782
1783 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
1784
1785 return gdbarch;
1786 }
1787
1788 extern initialize_file_ftype _initialize_m68hc11_tdep; /* -Wmissing-prototypes */
1789
1790 void
1791 _initialize_m68hc11_tdep (void)
1792 {
1793 register_gdbarch_init (bfd_arch_m68hc11, m68hc11_gdbarch_init);
1794 register_gdbarch_init (bfd_arch_m68hc12, m68hc11_gdbarch_init);
1795 m68hc11_init_reggroups ();
1796
1797 deprecate_cmd (add_com ("regs", class_vars, show_regs,
1798 "Print all registers"),
1799 "info registers");
1800 }
1801
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