1 /* Target-machine dependent code for Motorola 88000 series, for GDB.
2 Copyright (C) 1988, 1990, 1991 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
27 #include <sys/types.h>
30 #include <sys/param.h>
35 #ifndef USER /* added to support BCS ptrace_user */
37 #define USER ptrace_user
39 #include <sys/ioctl.h>
49 void frame_find_saved_regs ();
52 /* Given a GDB frame, determine the address of the calling function's frame.
53 This will be used to create a new GDB frame struct, and then
54 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
56 For us, the frame address is its stack pointer value, so we look up
57 the function prologue to determine the caller's sp value, and return it. */
60 frame_chain (thisframe
)
64 frame_find_saved_regs (thisframe
, (struct frame_saved_regs
*) 0);
65 /* NOTE: this depends on frame_find_saved_regs returning the VALUE, not
66 the ADDRESS, of SP_REGNUM. It also depends on the cache of
67 frame_find_saved_regs results. */
68 if (thisframe
->fsr
->regs
[SP_REGNUM
])
69 return thisframe
->fsr
->regs
[SP_REGNUM
];
71 return thisframe
->frame
; /* Leaf fn -- next frame up has same SP. */
75 frameless_function_invocation (frame
)
79 frame_find_saved_regs (frame
, (struct frame_saved_regs
*) 0);
80 /* NOTE: this depends on frame_find_saved_regs returning the VALUE, not
81 the ADDRESS, of SP_REGNUM. It also depends on the cache of
82 frame_find_saved_regs results. */
83 if (frame
->fsr
->regs
[SP_REGNUM
])
84 return 0; /* Frameful -- return addr saved somewhere */
86 return 1; /* Frameless -- no saved return address */
90 frame_chain_valid (chain
, thisframe
)
92 struct frame_info
*thisframe
;
95 && outside_startup_file (FRAME_SAVED_PC (thisframe
)));
99 init_extra_frame_info (fromleaf
, fi
)
101 struct frame_info
*fi
;
103 fi
->fsr
= 0; /* Not yet allocated */
104 fi
->args_pointer
= 0; /* Unknown */
105 fi
->locals_pointer
= 0; /* Unknown */
108 /* Examine an m88k function prologue, recording the addresses at which
109 registers are saved explicitly by the prologue code, and returning
110 the address of the first instruction after the prologue (but not
111 after the instruction at address LIMIT, as explained below).
113 LIMIT places an upper bound on addresses of the instructions to be
114 examined. If the prologue code scan reaches LIMIT, the scan is
115 aborted and LIMIT is returned. This is used, when examining the
116 prologue for the current frame, to keep examine_prologue () from
117 claiming that a given register has been saved when in fact the
118 instruction that saves it has not yet been executed. LIMIT is used
119 at other times to stop the scan when we hit code after the true
120 function prologue (e.g. for the first source line) which might
121 otherwise be mistaken for function prologue.
123 The format of the function prologue matched by this routine is
124 derived from examination of the source to gcc 1.95, particularly
125 the routine output_prologue () in config/out-m88k.c.
127 subu r31,r31,n # stack pointer update
129 (st rn,r31,offset)? # save incoming regs
130 (st.d rn,r31,offset)?
132 (addu r30,r31,n)? # frame pointer update
134 (pic sequence)? # PIC code prologue
136 (or rn,rm,0)? # Move parameters to other regs
139 /* Macros for extracting fields from instructions. */
141 #define BITMASK(pos, width) (((0x1 << (width)) - 1) << (pos))
142 #define EXTRACT_FIELD(val, pos, width) ((val) >> (pos) & BITMASK (0, width))
144 /* Prologue code that handles position-independent-code setup. */
146 struct pic_prologue_code
{
147 unsigned long insn
, mask
;
150 static struct pic_prologue_code pic_prologue_code
[] = {
151 /* FIXME -- until this is translated to hex, we won't match it... */
153 /* or r10,r1,0 (if not saved) */
155 /* or.u r25,r0,const */
156 /*LabN: or r25,r25,const2 */
158 /* or r1,r10,0 (if not saved) */
161 /* Fetch the instruction at ADDR, returning 0 if ADDR is beyond LIM or
162 is not the address of a valid instruction, the address of the next
163 instruction beyond ADDR otherwise. *PWORD1 receives the first word
164 of the instruction. PWORD2 is ignored -- a remnant of the original
167 #define NEXT_PROLOGUE_INSN(addr, lim, pword1, pword2) \
168 (((addr) < (lim)) ? next_insn (addr, pword1) : 0)
170 /* Read the m88k instruction at 'memaddr' and return the address of
171 the next instruction after that, or 0 if 'memaddr' is not the
172 address of a valid instruction. The instruction
173 is stored at 'pword1'. */
176 next_insn (memaddr
, pword1
)
177 unsigned long *pword1
;
180 unsigned long buf
[1];
182 read_memory (memaddr
, buf
, sizeof (buf
));
184 SWAP_TARGET_AND_HOST (pword1
, sizeof (long));
189 /* Read a register from frames called by us (or from the hardware regs). */
192 read_next_frame_reg(fi
, regno
)
196 for (; fi
; fi
= fi
->next
) {
197 if (regno
== SP_REGNUM
) return fi
->frame
;
198 else if (fi
->fsr
->regs
[regno
])
199 return read_memory_integer(fi
->fsr
->regs
[regno
], 4);
201 return read_register(regno
);
204 /* Examine the prologue of a function. `ip' points to the first instruction.
205 `limit' is the limit of the prologue (e.g. the addr of the first
206 linenumber, or perhaps the program counter if we're stepping through).
207 `frame_sp' is the stack pointer value in use in this frame.
208 `fsr' is a pointer to a frame_saved_regs structure into which we put
209 info about the registers saved by this frame.
210 `fi' is a struct frame_info pointer; we fill in various fields in it
211 to reflect the offsets of the arg pointer and the locals pointer. */
214 examine_prologue (ip
, limit
, frame_sp
, fsr
, fi
)
215 register CORE_ADDR ip
;
216 register CORE_ADDR limit
;
218 struct frame_saved_regs
*fsr
;
219 struct frame_info
*fi
;
221 register CORE_ADDR next_ip
;
223 register struct pic_prologue_code
*pcode
;
224 unsigned int insn1
, insn2
;
226 char must_adjust
[32]; /* If set, must adjust offsets in fsr */
227 int sp_offset
= -1; /* -1 means not set (valid must be mult of 8) */
228 int fp_offset
= -1; /* -1 means not set */
231 bzero (must_adjust
, sizeof (must_adjust
));
232 next_ip
= NEXT_PROLOGUE_INSN (ip
, limit
, &insn1
, &insn2
);
234 /* Accept move of incoming registers to other registers, using
235 "or rd,rs,0" or "or.u rd,rs,0" or "or rd,r0,rs" or "or rd,rs,r0".
236 We don't have to worry about walking into the first lines of code,
237 since the first line number will stop us (assuming we have symbols).
238 What we have actually seen is "or r10,r0,r12". */
240 #define OR_MOVE_INSN 0x58000000 /* or/or.u with immed of 0 */
241 #define OR_MOVE_MASK 0xF800FFFF
242 #define OR_REG_MOVE1_INSN 0xF4005800 /* or rd,r0,rs */
243 #define OR_REG_MOVE1_MASK 0xFC1FFFE0
244 #define OR_REG_MOVE2_INSN 0xF4005800 /* or rd,rs,r0 */
245 #define OR_REG_MOVE2_MASK 0xFC00FFFF
247 ((insn1
& OR_MOVE_MASK
) == OR_MOVE_INSN
||
248 (insn1
& OR_REG_MOVE1_MASK
) == OR_REG_MOVE1_INSN
||
249 (insn1
& OR_REG_MOVE2_MASK
) == OR_REG_MOVE2_INSN
253 /* We don't care what moves to where. The result of the moves
254 has already been reflected in what the compiler tells us is the
255 location of these parameters. */
257 next_ip
= NEXT_PROLOGUE_INSN (ip
, limit
, &insn1
, &insn2
);
260 /* Accept an optional "subu sp,sp,n" to set up the stack pointer. */
262 #define SUBU_SP_INSN 0x67ff0000
263 #define SUBU_SP_MASK 0xffff0007 /* Note offset must be mult. of 8 */
264 #define SUBU_OFFSET(x) ((unsigned)(x & 0xFFFF))
266 ((insn1
& SUBU_SP_MASK
) == SUBU_SP_INSN
)) /* subu r31, r31, N */
268 sp_offset
= -SUBU_OFFSET (insn1
);
270 next_ip
= NEXT_PROLOGUE_INSN (ip
, limit
, &insn1
, &insn2
);
273 /* The function must start with a stack-pointer adjustment, or
274 we don't know WHAT'S going on... */
278 /* Accept zero or more instances of "st rx,sp,n" or "st.d rx,sp,n".
279 This may cause us to mistake the copying of a register
280 parameter to the frame for the saving of a callee-saved
281 register, but that can't be helped, since with the
282 "-fcall-saved" flag, any register can be made callee-saved.
283 This probably doesn't matter, since the ``saved'' caller's values of
284 non-callee-saved registers are not relevant anyway. */
286 #define STD_STACK_INSN 0x201f0000
287 #define STD_STACK_MASK 0xfc1f0000
288 #define ST_STACK_INSN 0x241f0000
289 #define ST_STACK_MASK 0xfc1f0000
290 #define ST_OFFSET(x) ((unsigned)((x) & 0xFFFF))
291 #define ST_SRC(x) EXTRACT_FIELD ((x), 21, 5)
295 if ((insn1
& ST_STACK_MASK
) == ST_STACK_INSN
)
297 else if ((insn1
& STD_STACK_MASK
) == STD_STACK_INSN
)
302 src
= ST_SRC (insn1
);
303 offset
= ST_OFFSET (insn1
);
306 must_adjust
[src
] = 1;
307 fsr
->regs
[src
++] = offset
; /* Will be adjusted later */
311 next_ip
= NEXT_PROLOGUE_INSN (ip
, limit
, &insn1
, &insn2
);
314 /* Accept an optional "addu r30,r31,n" to set up the frame pointer. */
316 #define ADDU_FP_INSN 0x63df0000
317 #define ADDU_FP_MASK 0xffff0000
318 #define ADDU_OFFSET(x) ((unsigned)(x & 0xFFFF))
320 ((insn1
& ADDU_FP_MASK
) == ADDU_FP_INSN
)) /* addu r30, r31, N */
322 fp_offset
= ADDU_OFFSET (insn1
);
324 next_ip
= NEXT_PROLOGUE_INSN (ip
, limit
, &insn1
, &insn2
);
327 /* Accept the PIC prologue code if present. */
329 pcode
= pic_prologue_code
;
330 size
= sizeof (pic_prologue_code
) / sizeof (*pic_prologue_code
);
331 /* If return addr is saved, we don't use first or last insn of PICstuff. */
332 if (fsr
->regs
[SRP_REGNUM
]) {
337 while (size
-- && next_ip
&& (pcode
->insn
== (pcode
->mask
& insn1
)))
341 next_ip
= NEXT_PROLOGUE_INSN (ip
, limit
, &insn1
, &insn2
);
344 /* Accept moves of parameter registers to other registers, using
345 "or rd,rs,0" or "or.u rd,rs,0" or "or rd,r0,rs" or "or rd,rs,r0".
346 We don't have to worry about walking into the first lines of code,
347 since the first line number will stop us (assuming we have symbols).
348 What gcc actually seems to produce is "or rd,r0,rs". */
350 #define OR_MOVE_INSN 0x58000000 /* or/or.u with immed of 0 */
351 #define OR_MOVE_MASK 0xF800FFFF
352 #define OR_REG_MOVE1_INSN 0xF4005800 /* or rd,r0,rs */
353 #define OR_REG_MOVE1_MASK 0xFC1FFFE0
354 #define OR_REG_MOVE2_INSN 0xF4005800 /* or rd,rs,r0 */
355 #define OR_REG_MOVE2_MASK 0xFC00FFFF
357 ((insn1
& OR_MOVE_MASK
) == OR_MOVE_INSN
||
358 (insn1
& OR_REG_MOVE1_MASK
) == OR_REG_MOVE1_INSN
||
359 (insn1
& OR_REG_MOVE2_MASK
) == OR_REG_MOVE2_INSN
363 /* We don't care what moves to where. The result of the moves
364 has already been reflected in what the compiler tells us is the
365 location of these parameters. */
367 next_ip
= NEXT_PROLOGUE_INSN (ip
, limit
, &insn1
, &insn2
);
370 /* We're done with the prologue. If we don't care about the stack
371 frame itself, just return. (Note that fsr->regs has been trashed,
372 but the one caller who calls with fi==0 passes a dummy there.) */
378 sp_offset original negative displacement of SP
379 fp_offset positive displacement between new SP and new FP, or -1
380 fsr->regs[0..31] offset from original SP where reg is stored
381 must_adjust[0..31] set if corresp. offset was set
383 The current SP (frame_sp) might not be the original new SP as set
384 by the function prologue, if alloca has been called. This can
385 only occur if fp_offset is set, though (the compiler allocates an
386 FP when it sees alloca). In that case, we have the FP,
387 and can calculate the original new SP from the FP.
389 Then, we figure out where the arguments and locals are, and
390 relocate the offsets in fsr->regs to absolute addresses. */
392 if (fp_offset
!= -1) {
393 /* We have a frame pointer, so get it, and base our calc's on it. */
394 frame_fp
= (CORE_ADDR
) read_next_frame_reg (fi
->next
, FP_REGNUM
);
395 frame_sp
= frame_fp
- fp_offset
;
397 /* We have no frame pointer, therefore frame_sp is still the same value
398 as set by prologue. But where is the frame itself? */
399 if (must_adjust
[SRP_REGNUM
]) {
400 /* Function header saved SRP (r1), the return address. Frame starts
401 4 bytes down from where it was saved. */
402 frame_fp
= frame_sp
+ fsr
->regs
[SRP_REGNUM
] - 4;
403 fi
->locals_pointer
= frame_fp
;
405 /* Function header didn't save SRP (r1), so we are in a leaf fn or
406 are otherwise confused. */
411 /* The locals are relative to the FP (whether it exists as an allocated
412 register, or just as an assumed offset from the SP) */
413 fi
->locals_pointer
= frame_fp
;
415 /* The arguments are just above the SP as it was before we adjusted it
417 fi
->args_pointer
= frame_sp
- sp_offset
;
419 /* Now that we know the SP value used by the prologue, we know where
420 it saved all the registers. */
421 for (src
= 0; src
< 32; src
++)
422 if (must_adjust
[src
])
423 fsr
->regs
[src
] += frame_sp
;
425 /* The saved value of the SP is always known. */
427 if (fsr
->regs
[SP_REGNUM
] != 0
428 && fsr
->regs
[SP_REGNUM
] != frame_sp
- sp_offset
)
429 fprintf(stderr
, "Bad saved SP value %x != %x, offset %x!\n",
430 fsr
->regs
[SP_REGNUM
],
431 frame_sp
- sp_offset
, sp_offset
);
433 fsr
->regs
[SP_REGNUM
] = frame_sp
- sp_offset
;
438 /* Given an ip value corresponding to the start of a function,
439 return the ip of the first instruction after the function
446 struct frame_saved_regs saved_regs_dummy
;
447 struct symtab_and_line sal
;
450 sal
= find_pc_line (ip
, 0);
451 limit
= (sal
.end
) ? sal
.end
: 0xffffffff;
453 return (examine_prologue (ip
, limit
, (FRAME_ADDR
) 0, &saved_regs_dummy
,
454 (struct frame_info
*)0 ));
457 /* Put here the code to store, into a struct frame_saved_regs,
458 the addresses of the saved registers of frame described by FRAME_INFO.
459 This includes special registers such as pc and fp saved in special
460 ways in the stack frame. sp is even more special:
461 the address we return for it IS the sp for the next frame.
463 We cache the result of doing this in the frame_cache_obstack, since
464 it is fairly expensive. */
467 frame_find_saved_regs (fi
, fsr
)
468 struct frame_info
*fi
;
469 struct frame_saved_regs
*fsr
;
471 register CORE_ADDR next_addr
;
472 register CORE_ADDR
*saved_regs
;
474 register struct frame_saved_regs
*cache_fsr
;
475 extern struct obstack frame_cache_obstack
;
477 struct symtab_and_line sal
;
482 cache_fsr
= (struct frame_saved_regs
*)
483 obstack_alloc (&frame_cache_obstack
,
484 sizeof (struct frame_saved_regs
));
485 bzero (cache_fsr
, sizeof (struct frame_saved_regs
));
488 /* Find the start and end of the function prologue. If the PC
489 is in the function prologue, we only consider the part that
490 has executed already. */
492 ip
= get_pc_function_start (fi
->pc
);
493 sal
= find_pc_line (ip
, 0);
494 limit
= (sal
.end
&& sal
.end
< fi
->pc
) ? sal
.end
: fi
->pc
;
496 /* This will fill in fields in *fi as well as in cache_fsr. */
497 examine_prologue (ip
, limit
, fi
->frame
, cache_fsr
, fi
);
504 /* Return the address of the locals block for the frame
505 described by FI. Returns 0 if the address is unknown.
506 NOTE! Frame locals are referred to by negative offsets from the
507 argument pointer, so this is the same as frame_args_address(). */
510 frame_locals_address (fi
)
511 struct frame_info
*fi
;
513 register FRAME frame
;
514 struct frame_saved_regs fsr
;
517 if (fi
->args_pointer
) /* Cached value is likely there. */
518 return fi
->args_pointer
;
520 /* Nope, generate it. */
522 get_frame_saved_regs (fi
, &fsr
);
524 return fi
->args_pointer
;
527 /* Return the address of the argument block for the frame
528 described by FI. Returns 0 if the address is unknown. */
531 frame_args_address (fi
)
532 struct frame_info
*fi
;
534 register FRAME frame
;
535 struct frame_saved_regs fsr
;
538 if (fi
->args_pointer
) /* Cached value is likely there. */
539 return fi
->args_pointer
;
541 /* Nope, generate it. */
543 get_frame_saved_regs (fi
, &fsr
);
545 return fi
->args_pointer
;
548 /* Return the saved PC from this frame.
550 If the frame has a memory copy of SRP_REGNUM, use that. If not,
551 just use the register SRP_REGNUM itself. */
554 frame_saved_pc (frame
)
557 return read_next_frame_reg(frame
, SRP_REGNUM
);
561 #if TARGET_BYTE_ORDER != HOST_BYTE_ORDER
563 #else /* Host and target byte order the same. */
564 #define SINGLE_EXP_BITS 8
565 #define DOUBLE_EXP_BITS 11
569 /* fp points to a single precision OR double precision
570 * floating point value; len is the number of bytes, either 4 or 8.
571 * Returns 1 iff fp points to a valid IEEE floating point number.
572 * Returns 0 if fp points to a denormalized number or a NaN
579 exponent
= exponent
<< 1 >> (32 - SINGLE_EXP_BITS
- 1);
580 return ((exponent
== -1) || (! exponent
&& *fp
));
585 exponent
= exponent
<< 1 >> (32 - DOUBLE_EXP_BITS
- 1);
586 return ((exponent
== -1) || (! exponent
&& *fp
* *(fp
+1)));
590 #endif /* Host and target byte order the same. */
593 pushed_size (prev_words
, v
)
597 switch (TYPE_CODE (VALUE_TYPE (v
)))
599 case TYPE_CODE_VOID
: /* Void type (values zero length) */
601 return 0; /* That was easy! */
603 case TYPE_CODE_PTR
: /* Pointer type */
604 case TYPE_CODE_ENUM
: /* Enumeration type */
605 case TYPE_CODE_INT
: /* Integer type */
606 case TYPE_CODE_REF
: /* C++ Reference types */
607 case TYPE_CODE_ARRAY
: /* Array type, lower bound zero */
611 case TYPE_CODE_FLT
: /* Floating type */
613 if (TYPE_LENGTH (VALUE_TYPE (v
)) == 4)
616 /* Assume that it must be a double. */
617 if (prev_words
& 1) /* at an odd-word boundary */
618 return 3; /* round to 8-byte boundary */
622 case TYPE_CODE_STRUCT
: /* C struct or Pascal record */
623 case TYPE_CODE_UNION
: /* C union or Pascal variant part */
625 return (((TYPE_LENGTH (VALUE_TYPE (v
)) + 3) / 4) * 4);
627 case TYPE_CODE_FUNC
: /* Function type */
628 case TYPE_CODE_SET
: /* Pascal sets */
629 case TYPE_CODE_RANGE
: /* Range (integers within bounds) */
630 case TYPE_CODE_PASCAL_ARRAY
: /* Array with explicit type of index */
631 case TYPE_CODE_MEMBER
: /* Member type */
632 case TYPE_CODE_METHOD
: /* Method type */
633 /* Don't know how to pass these yet. */
635 case TYPE_CODE_UNDEF
: /* Not used; catches errors */
642 store_parm_word (address
, val
)
646 write_memory (address
, &val
, 4);
650 store_parm (prev_words
, left_parm_addr
, v
)
651 unsigned int prev_words
;
652 CORE_ADDR left_parm_addr
;
655 CORE_ADDR start
= left_parm_addr
+ (prev_words
* 4);
656 int *val_addr
= (int *)VALUE_CONTENTS(v
);
658 switch (TYPE_CODE (VALUE_TYPE (v
)))
660 case TYPE_CODE_VOID
: /* Void type (values zero length) */
664 case TYPE_CODE_PTR
: /* Pointer type */
665 case TYPE_CODE_ENUM
: /* Enumeration type */
666 case TYPE_CODE_INT
: /* Integer type */
667 case TYPE_CODE_ARRAY
: /* Array type, lower bound zero */
668 case TYPE_CODE_REF
: /* C++ Reference types */
670 store_parm_word (start
, *val_addr
);
673 case TYPE_CODE_FLT
: /* Floating type */
675 if (TYPE_LENGTH (VALUE_TYPE (v
)) == 4)
677 store_parm_word (start
, *val_addr
);
682 store_parm_word (start
+ ((prev_words
& 1) * 4), val_addr
[0]);
683 store_parm_word (start
+ ((prev_words
& 1) * 4) + 4, val_addr
[1]);
684 return 2 + (prev_words
& 1);
687 case TYPE_CODE_STRUCT
: /* C struct or Pascal record */
688 case TYPE_CODE_UNION
: /* C union or Pascal variant part */
691 unsigned int words
= (((TYPE_LENGTH (VALUE_TYPE (v
)) + 3) / 4) * 4);
694 for (word
= 0; word
< words
; word
++)
695 store_parm_word (start
+ (word
* 4), val_addr
[word
]);
704 /* This routine sets up all of the parameter values needed to make a pseudo
705 call. The name "push_parameters" is a misnomer on some archs,
706 because (on the m88k) most parameters generally end up being passed in
707 registers rather than on the stack. In this routine however, we do
708 end up storing *all* parameter values onto the stack (even if we will
709 realize later that some of these stores were unnecessary). */
711 #define FIRST_PARM_REGNUM 2
714 push_parameters (return_type
, struct_conv
, nargs
, args
)
715 struct type
*return_type
;
721 unsigned int p_words
= 0;
722 CORE_ADDR left_parm_addr
;
724 /* Start out by creating a space for the return value (if need be). We
725 only need to do this if the return value is a struct or union. If we
726 do make a space for a struct or union return value, then we must also
727 arrange for the base address of that space to go into r12, which is the
728 standard place to pass the address of the return value area to the
729 callee. Note that only structs and unions are returned in this fashion.
730 Ints, enums, pointers, and floats are returned into r2. Doubles are
731 returned into the register pair {r2,r3}. Note also that the space
732 reserved for a struct or union return value only has to be word aligned
733 (not double-word) but it is double-word aligned here anyway (just in
734 case that becomes important someday). */
736 switch (TYPE_CODE (return_type
))
738 case TYPE_CODE_STRUCT
:
739 case TYPE_CODE_UNION
:
741 int return_bytes
= ((TYPE_LENGTH (return_type
) + 7) / 8) * 8;
744 rv_addr
= read_register (SP_REGNUM
) - return_bytes
;
746 write_register (SP_REGNUM
, rv_addr
); /* push space onto the stack */
747 write_register (SRA_REGNUM
, rv_addr
);/* set return value register */
751 /* Here we make a pre-pass on the whole parameter list to figure out exactly
752 how many words worth of stuff we are going to pass. */
754 for (p_words
= 0, parm_num
= 0; parm_num
< nargs
; parm_num
++)
755 p_words
+= pushed_size (p_words
, value_arg_coerce (args
[parm_num
]));
757 /* Now, check to see if we have to round up the number of parameter words
758 to get up to the next 8-bytes boundary. This may be necessary because
759 of the software convention to always keep the stack aligned on an 8-byte
763 p_words
++; /* round to 8-byte boundary */
765 /* Now figure out the absolute address of the leftmost parameter, and update
766 the stack pointer to point at that address. */
768 left_parm_addr
= read_register (SP_REGNUM
) - (p_words
* 4);
769 write_register (SP_REGNUM
, left_parm_addr
);
771 /* Now we can go through all of the parameters (in left-to-right order)
772 and write them to their parameter stack slots. Note that we are not
773 really "pushing" the parameter values. The stack space for these values
774 was already allocated above. Now we are just filling it up. */
776 for (p_words
= 0, parm_num
= 0; parm_num
< nargs
; parm_num
++)
778 store_parm (p_words
, left_parm_addr
, value_arg_coerce (args
[parm_num
]));
780 /* Now that we are all done storing the parameter values into the stack, we
781 must go back and load up the parameter registers with the values from the
782 corresponding stack slots. Note that in the two cases of (a) gaps in the
783 parameter word sequence causes by (otherwise) misaligned doubles, and (b)
784 slots correcponding to structs or unions, the work we do here in loading
785 some parameter registers may be unnecessary, but who cares? */
787 for (p_words
= 0; p_words
< 8; p_words
++)
789 write_register (FIRST_PARM_REGNUM
+ p_words
,
790 read_memory_integer (left_parm_addr
+ (p_words
* 4), 4));
797 error ("Feature not implemented for the m88k yet.");
802 collect_returned_value (rval
, value_type
, struct_return
, nargs
, args
)
804 struct type
*value_type
;
809 char retbuf
[REGISTER_BYTES
];
811 bcopy (registers
, retbuf
, REGISTER_BYTES
);
812 *rval
= value_being_returned (value_type
, retbuf
, struct_return
);
817 /* Now handled in a machine independent way with CALL_DUMMY_LOCATION. */
818 /* Stuff a breakpoint instruction onto the stack (or elsewhere if the stack
819 is not a good place for it). Return the address at which the instruction
820 got stuffed, or zero if we were unable to stuff it anywhere. */
825 static char breakpoint_insn
[] = BREAKPOINT
;
826 extern CORE_ADDR text_end
; /* of inferior */
827 static char readback_buffer
[] = BREAKPOINT
;
830 /* With a little bit of luck, we can just stash the breakpoint instruction
831 in the word just beyond the end of normal text space. For systems on
832 which the hardware will not allow us to execute out of the stack segment,
833 we have to hope that we *are* at least allowed to effectively extend the
834 text segment by one word. If the actual end of user's the text segment
835 happens to fall right at a page boundary this trick may fail. Note that
836 we check for this by reading after writing, and comparing in order to
837 be sure that the write worked. */
839 write_memory (text_end
, &breakpoint_insn
, 4);
841 /* Fill the readback buffer with some garbage which is certain to be
842 unequal to the breakpoint insn. That way we can tell if the
843 following read doesn't actually succeed. */
845 for (i
= 0; i
< sizeof (readback_buffer
); i
++)
846 readback_buffer
[i
] = ~ readback_buffer
[i
]; /* Invert the bits */
848 /* Now check that the breakpoint insn was successfully installed. */
850 read_memory (text_end
, readback_buffer
, sizeof (readback_buffer
));
851 for (i
= 0; i
< sizeof (readback_buffer
); i
++)
852 if (readback_buffer
[i
] != breakpoint_insn
[i
])
853 return 0; /* Failed to install! */