* gdb.texinfo (Packets): Fix typos "alligned".
[deliverable/binutils-gdb.git] / gdb / mcore-tdep.c
1 /* Target-machine dependent code for Motorola MCore for GDB, the GNU debugger
2 Copyright 1999, 2000, 2001 Free Software Foundation, Inc.
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
19
20 #include "defs.h"
21 #include "frame.h"
22 #include "symtab.h"
23 #include "value.h"
24 #include "gdbcmd.h"
25 #include "regcache.h"
26 #include "symfile.h"
27 #include "gdbcore.h"
28 #include "inferior.h"
29 #include "arch-utils.h"
30 #include "gdb_string.h"
31
32 /* Functions declared and used only in this file */
33
34 static CORE_ADDR mcore_analyze_prologue (struct frame_info *fi, CORE_ADDR pc, int skip_prologue);
35
36 static struct frame_info *analyze_dummy_frame (CORE_ADDR pc, CORE_ADDR frame);
37
38 static int get_insn (CORE_ADDR pc);
39
40 /* Functions exported from this file */
41
42 int mcore_use_struct_convention (int gcc_p, struct type *type);
43
44 void _initialize_mcore (void);
45
46 void mcore_init_extra_frame_info (int fromleaf, struct frame_info *fi);
47
48 CORE_ADDR mcore_frame_saved_pc (struct frame_info *fi);
49
50 CORE_ADDR mcore_find_callers_reg (struct frame_info *fi, int regnum);
51
52 CORE_ADDR mcore_frame_args_address (struct frame_info *fi);
53
54 CORE_ADDR mcore_frame_locals_address (struct frame_info *fi);
55
56 CORE_ADDR mcore_push_return_address (CORE_ADDR pc, CORE_ADDR sp);
57
58 CORE_ADDR mcore_push_arguments (int nargs, struct value ** args, CORE_ADDR sp,
59 int struct_return, CORE_ADDR struct_addr);
60
61 void mcore_pop_frame ();
62
63 CORE_ADDR mcore_skip_prologue (CORE_ADDR pc);
64
65 CORE_ADDR mcore_frame_chain (struct frame_info *fi);
66
67 const unsigned char *mcore_breakpoint_from_pc (CORE_ADDR * bp_addr, int *bp_size);
68
69 int mcore_use_struct_convention (int gcc_p, struct type *type);
70
71 void mcore_store_return_value (struct type *type, char *valbuf);
72
73 CORE_ADDR mcore_extract_struct_value_address (char *regbuf);
74
75 void mcore_extract_return_value (struct type *type, char *regbuf, char *valbuf);
76
77 #ifdef MCORE_DEBUG
78 int mcore_debug = 0;
79 #endif
80
81
82 /* All registers are 4 bytes long. */
83 #define MCORE_REG_SIZE 4
84 #define MCORE_NUM_REGS 65
85
86 /* Some useful register numbers. */
87 #define PR_REGNUM 15
88 #define FIRST_ARGREG 2
89 #define LAST_ARGREG 7
90 #define RETVAL_REGNUM 2
91
92
93 /* Additional info that we use for managing frames */
94 struct frame_extra_info
95 {
96 /* A generic status word */
97 int status;
98
99 /* Size of this frame */
100 int framesize;
101
102 /* The register that is acting as a frame pointer, if
103 it is being used. This is undefined if status
104 does not contain the flag MY_FRAME_IN_FP. */
105 int fp_regnum;
106 };
107
108 /* frame_extra_info status flags */
109
110 /* The base of the current frame is actually in the stack pointer.
111 This happens when there is no frame pointer (MCore ABI does not
112 require a frame pointer) or when we're stopped in the prologue or
113 epilogue itself. In these cases, mcore_analyze_prologue will need
114 to update fi->frame before returning or analyzing the register
115 save instructions. */
116 #define MY_FRAME_IN_SP 0x1
117
118 /* The base of the current frame is in a frame pointer register.
119 This register is noted in frame_extra_info->fp_regnum.
120
121 Note that the existence of an FP might also indicate that the
122 function has called alloca. */
123 #define MY_FRAME_IN_FP 0x2
124
125 /* This flag is set to indicate that this frame is the top-most
126 frame. This tells frame chain not to bother trying to unwind
127 beyond this frame. */
128 #define NO_MORE_FRAMES 0x4
129
130 /* Instruction macros used for analyzing the prologue */
131 #define IS_SUBI0(x) (((x) & 0xfe0f) == 0x2400) /* subi r0,oimm5 */
132 #define IS_STM(x) (((x) & 0xfff0) == 0x0070) /* stm rf-r15,r0 */
133 #define IS_STWx0(x) (((x) & 0xf00f) == 0x9000) /* stw rz,(r0,disp) */
134 #define IS_STWxy(x) (((x) & 0xf000) == 0x9000) /* stw rx,(ry,disp) */
135 #define IS_MOVx0(x) (((x) & 0xfff0) == 0x1200) /* mov rn,r0 */
136 #define IS_LRW1(x) (((x) & 0xff00) == 0x7100) /* lrw r1,literal */
137 #define IS_MOVI1(x) (((x) & 0xf80f) == 0x6001) /* movi r1,imm7 */
138 #define IS_BGENI1(x) (((x) & 0xfe0f) == 0x3201) /* bgeni r1,imm5 */
139 #define IS_BMASKI1(x) (((x) & 0xfe0f) == 0x2C01) /* bmaski r1,imm5 */
140 #define IS_ADDI1(x) (((x) & 0xfe0f) == 0x2001) /* addi r1,oimm5 */
141 #define IS_SUBI1(x) (((x) & 0xfe0f) == 0x2401) /* subi r1,oimm5 */
142 #define IS_RSUBI1(x) (((x) & 0xfe0f) == 0x2801) /* rsubi r1,imm5 */
143 #define IS_NOT1(x) (((x) & 0xffff) == 0x01f1) /* not r1 */
144 #define IS_ROTLI1(x) (((x) & 0xfe0f) == 0x3801) /* rotli r1,imm5 */
145 #define IS_BSETI1(x) (((x) & 0xfe0f) == 0x3401) /* bseti r1,imm5 */
146 #define IS_BCLRI1(x) (((x) & 0xfe0f) == 0x3001) /* bclri r1,imm5 */
147 #define IS_IXH1(x) (((x) & 0xffff) == 0x1d11) /* ixh r1,r1 */
148 #define IS_IXW1(x) (((x) & 0xffff) == 0x1511) /* ixw r1,r1 */
149 #define IS_SUB01(x) (((x) & 0xffff) == 0x0510) /* subu r0,r1 */
150 #define IS_RTS(x) (((x) & 0xffff) == 0x00cf) /* jmp r15 */
151
152 #define IS_R1_ADJUSTER(x) \
153 (IS_ADDI1(x) || IS_SUBI1(x) || IS_ROTLI1(x) || IS_BSETI1(x) \
154 || IS_BCLRI1(x) || IS_RSUBI1(x) || IS_NOT1(x) \
155 || IS_IXH1(x) || IS_IXW1(x))
156 \f
157
158 #ifdef MCORE_DEBUG
159 static void
160 mcore_dump_insn (char *commnt, CORE_ADDR pc, int insn)
161 {
162 if (mcore_debug)
163 {
164 printf_filtered ("MCORE: %s %08x %08x ",
165 commnt, (unsigned int) pc, (unsigned int) insn);
166 TARGET_PRINT_INSN (pc, &tm_print_insn_info);
167 printf_filtered ("\n");
168 }
169 }
170 #define mcore_insn_debug(args) { if (mcore_debug) printf_filtered args; }
171 #else /* !MCORE_DEBUG */
172 #define mcore_dump_insn(a,b,c) {}
173 #define mcore_insn_debug(args) {}
174 #endif
175
176
177 static struct type *
178 mcore_register_virtual_type (int regnum)
179 {
180 if (regnum < 0 || regnum >= MCORE_NUM_REGS)
181 internal_error (__FILE__, __LINE__,
182 "mcore_register_virtual_type: illegal register number %d",
183 regnum);
184 else
185 return builtin_type_int;
186 }
187
188 static int
189 mcore_register_byte (int regnum)
190 {
191 if (regnum < 0 || regnum >= MCORE_NUM_REGS)
192 internal_error (__FILE__, __LINE__,
193 "mcore_register_byte: illegal register number %d",
194 regnum);
195 else
196 return (regnum * MCORE_REG_SIZE);
197 }
198
199 static int
200 mcore_register_size (int regnum)
201 {
202
203 if (regnum < 0 || regnum >= MCORE_NUM_REGS)
204 internal_error (__FILE__, __LINE__,
205 "mcore_register_size: illegal register number %d",
206 regnum);
207 else
208 return MCORE_REG_SIZE;
209 }
210
211 /* The registers of the Motorola MCore processors */
212
213 static const char *
214 mcore_register_name (int regnum)
215 {
216
217 static char *register_names[] = {
218 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
219 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
220 "ar0", "ar1", "ar2", "ar3", "ar4", "ar5", "ar6", "ar7",
221 "ar8", "ar9", "ar10", "ar11", "ar12", "ar13", "ar14", "ar15",
222 "psr", "vbr", "epsr", "fpsr", "epc", "fpc", "ss0", "ss1",
223 "ss2", "ss3", "ss4", "gcr", "gsr", "cr13", "cr14", "cr15",
224 "cr16", "cr17", "cr18", "cr19", "cr20", "cr21", "cr22", "cr23",
225 "cr24", "cr25", "cr26", "cr27", "cr28", "cr29", "cr30", "cr31",
226 "pc"
227 };
228
229 if (regnum < 0 ||
230 regnum >= sizeof (register_names) / sizeof (register_names[0]))
231 internal_error (__FILE__, __LINE__,
232 "mcore_register_name: illegal register number %d",
233 regnum);
234 else
235 return register_names[regnum];
236 }
237
238 /* Given the address at which to insert a breakpoint (BP_ADDR),
239 what will that breakpoint be?
240
241 For MCore, we have a breakpoint instruction. Since all MCore
242 instructions are 16 bits, this is all we need, regardless of
243 address. bpkt = 0x0000 */
244
245 const unsigned char *
246 mcore_breakpoint_from_pc (CORE_ADDR * bp_addr, int *bp_size)
247 {
248 static char breakpoint[] =
249 {0x00, 0x00};
250 *bp_size = 2;
251 return breakpoint;
252 }
253
254 static CORE_ADDR
255 mcore_saved_pc_after_call (struct frame_info *frame)
256 {
257 return read_register (PR_REGNUM);
258 }
259
260 /* This is currently handled by init_extra_frame_info. */
261 static void
262 mcore_frame_init_saved_regs (struct frame_info *frame)
263 {
264
265 }
266
267 /* This is currently handled by mcore_push_arguments */
268 static void
269 mcore_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
270 {
271
272 }
273
274 static int
275 mcore_reg_struct_has_addr (int gcc_p, struct type *type)
276 {
277 return 0;
278 }
279
280
281 /* Helper function for several routines below. This funtion simply
282 sets up a fake, aka dummy, frame (not a _call_ dummy frame) that
283 we can analyze with mcore_analyze_prologue. */
284
285 static struct frame_info *
286 analyze_dummy_frame (CORE_ADDR pc, CORE_ADDR frame)
287 {
288 static struct frame_info *dummy = NULL;
289
290 if (dummy == NULL)
291 {
292 dummy = (struct frame_info *) xmalloc (sizeof (struct frame_info));
293 dummy->saved_regs = (CORE_ADDR *) xmalloc (SIZEOF_FRAME_SAVED_REGS);
294 dummy->extra_info =
295 (struct frame_extra_info *) xmalloc (sizeof (struct frame_extra_info));
296 }
297
298 dummy->next = NULL;
299 dummy->prev = NULL;
300 dummy->pc = pc;
301 dummy->frame = frame;
302 dummy->extra_info->status = 0;
303 dummy->extra_info->framesize = 0;
304 memset (dummy->saved_regs, '\000', SIZEOF_FRAME_SAVED_REGS);
305 mcore_analyze_prologue (dummy, 0, 0);
306 return dummy;
307 }
308
309 /* Function prologues on the Motorola MCore processors consist of:
310
311 - adjustments to the stack pointer (r1 used as scratch register)
312 - store word/multiples that use r0 as the base address
313 - making a copy of r0 into another register (a "frame" pointer)
314
315 Note that the MCore really doesn't have a real frame pointer.
316 Instead, the compiler may copy the SP into a register (usually
317 r8) to act as an arg pointer. For our target-dependent purposes,
318 the frame info's "frame" member will be the beginning of the
319 frame. The SP could, in fact, point below this.
320
321 The prologue ends when an instruction fails to meet either of
322 the first two criteria or when an FP is made. We make a special
323 exception for gcc. When compiling unoptimized code, gcc will
324 setup stack slots. We need to make sure that we skip the filling
325 of these stack slots as much as possible. This is only done
326 when SKIP_PROLOGUE is set, so that it does not mess up
327 backtraces. */
328
329 /* Analyze the prologue of frame FI to determine where registers are saved,
330 the end of the prologue, etc. Return the address of the first line
331 of "real" code (i.e., the end of the prologue). */
332
333 static CORE_ADDR
334 mcore_analyze_prologue (struct frame_info *fi, CORE_ADDR pc, int skip_prologue)
335 {
336 CORE_ADDR func_addr, func_end, addr, stop;
337 CORE_ADDR stack_size;
338 int insn, rn;
339 int status;
340 int fp_regnum = 0; /* dummy, valid when (flags & MY_FRAME_IN_FP) */
341 int flags;
342 int framesize;
343 int register_offsets[NUM_REGS];
344 char *name;
345
346 /* If provided, use the PC in the frame to look up the
347 start of this function. */
348 pc = (fi == NULL ? pc : fi->pc);
349
350 /* Find the start of this function. */
351 status = find_pc_partial_function (pc, &name, &func_addr, &func_end);
352
353 /* If the start of this function could not be found or if the debbuger
354 is stopped at the first instruction of the prologue, do nothing. */
355 if (status == 0)
356 return pc;
357
358 /* If the debugger is entry function, give up. */
359 if (func_addr == entry_point_address ())
360 {
361 if (fi != NULL)
362 fi->extra_info->status |= NO_MORE_FRAMES;
363 return pc;
364 }
365
366 /* At the start of a function, our frame is in the stack pointer. */
367 flags = MY_FRAME_IN_SP;
368
369 /* Start decoding the prologue. We start by checking two special cases:
370
371 1. We're about to return
372 2. We're at the first insn of the prologue.
373
374 If we're about to return, our frame has already been deallocated.
375 If we are stopped at the first instruction of a prologue,
376 then our frame has not yet been set up. */
377
378 /* Get the first insn from memory (all MCore instructions are 16 bits) */
379 mcore_insn_debug (("MCORE: starting prologue decoding\n"));
380 insn = get_insn (pc);
381 mcore_dump_insn ("got 1: ", pc, insn);
382
383 /* Check for return. */
384 if (fi != NULL && IS_RTS (insn))
385 {
386 mcore_insn_debug (("MCORE: got jmp r15"));
387 if (fi->next == NULL)
388 fi->frame = read_sp ();
389 return fi->pc;
390 }
391
392 /* Check for first insn of prologue */
393 if (fi != NULL && fi->pc == func_addr)
394 {
395 if (fi->next == NULL)
396 fi->frame = read_sp ();
397 return fi->pc;
398 }
399
400 /* Figure out where to stop scanning */
401 stop = (fi ? fi->pc : func_end);
402
403 /* Don't walk off the end of the function */
404 stop = (stop > func_end ? func_end : stop);
405
406 /* REGISTER_OFFSETS will contain offsets, from the top of the frame
407 (NOT the frame pointer), for the various saved registers or -1
408 if the register is not saved. */
409 for (rn = 0; rn < NUM_REGS; rn++)
410 register_offsets[rn] = -1;
411
412 /* Analyze the prologue. Things we determine from analyzing the
413 prologue include:
414 * the size of the frame
415 * where saved registers are located (and which are saved)
416 * FP used? */
417 mcore_insn_debug (("MCORE: Scanning prologue: func_addr=0x%x, stop=0x%x\n",
418 (unsigned int) func_addr, (unsigned int) stop));
419
420 framesize = 0;
421 for (addr = func_addr; addr < stop; addr += 2)
422 {
423 /* Get next insn */
424 insn = get_insn (addr);
425 mcore_dump_insn ("got 2: ", addr, insn);
426
427 if (IS_SUBI0 (insn))
428 {
429 int offset = 1 + ((insn >> 4) & 0x1f);
430 mcore_insn_debug (("MCORE: got subi r0,%d; continuing\n", offset));
431 framesize += offset;
432 continue;
433 }
434 else if (IS_STM (insn))
435 {
436 /* Spill register(s) */
437 int offset;
438 int start_register;
439
440 /* BIG WARNING! The MCore ABI does not restrict functions
441 to taking only one stack allocation. Therefore, when
442 we save a register, we record the offset of where it was
443 saved relative to the current framesize. This will
444 then give an offset from the SP upon entry to our
445 function. Remember, framesize is NOT constant until
446 we're done scanning the prologue. */
447 start_register = (insn & 0xf);
448 mcore_insn_debug (("MCORE: got stm r%d-r15,(r0)\n", start_register));
449
450 for (rn = start_register, offset = 0; rn <= 15; rn++, offset += 4)
451 {
452 register_offsets[rn] = framesize - offset;
453 mcore_insn_debug (("MCORE: r%d saved at 0x%x (offset %d)\n", rn,
454 register_offsets[rn], offset));
455 }
456 mcore_insn_debug (("MCORE: continuing\n"));
457 continue;
458 }
459 else if (IS_STWx0 (insn))
460 {
461 /* Spill register: see note for IS_STM above. */
462 int imm;
463
464 rn = (insn >> 8) & 0xf;
465 imm = (insn >> 4) & 0xf;
466 register_offsets[rn] = framesize - (imm << 2);
467 mcore_insn_debug (("MCORE: r%d saved at offset 0x%x\n", rn, register_offsets[rn]));
468 mcore_insn_debug (("MCORE: continuing\n"));
469 continue;
470 }
471 else if (IS_MOVx0 (insn))
472 {
473 /* We have a frame pointer, so this prologue is over. Note
474 the register which is acting as the frame pointer. */
475 flags |= MY_FRAME_IN_FP;
476 flags &= ~MY_FRAME_IN_SP;
477 fp_regnum = insn & 0xf;
478 mcore_insn_debug (("MCORE: Found a frame pointer: r%d\n", fp_regnum));
479
480 /* If we found an FP, we're at the end of the prologue. */
481 mcore_insn_debug (("MCORE: end of prologue\n"));
482 if (skip_prologue)
483 continue;
484
485 /* If we're decoding prologue, stop here. */
486 addr += 2;
487 break;
488 }
489 else if (IS_STWxy (insn) && (flags & MY_FRAME_IN_FP) && ((insn & 0xf) == fp_regnum))
490 {
491 /* Special case. Skip over stack slot allocs, too. */
492 mcore_insn_debug (("MCORE: push arg onto stack.\n"));
493 continue;
494 }
495 else if (IS_LRW1 (insn) || IS_MOVI1 (insn)
496 || IS_BGENI1 (insn) || IS_BMASKI1 (insn))
497 {
498 int adjust = 0;
499 int offset = 0;
500 int insn2;
501
502 mcore_insn_debug (("MCORE: looking at large frame\n"));
503 if (IS_LRW1 (insn))
504 {
505 adjust =
506 read_memory_integer ((addr + 2 + ((insn & 0xff) << 2)) & 0xfffffffc, 4);
507 }
508 else if (IS_MOVI1 (insn))
509 adjust = (insn >> 4) & 0x7f;
510 else if (IS_BGENI1 (insn))
511 adjust = 1 << ((insn >> 4) & 0x1f);
512 else /* IS_BMASKI (insn) */
513 adjust = (1 << (adjust >> 4) & 0x1f) - 1;
514
515 mcore_insn_debug (("MCORE: base framesize=0x%x\n", adjust));
516
517 /* May have zero or more insns which modify r1 */
518 mcore_insn_debug (("MCORE: looking for r1 adjusters...\n"));
519 offset = 2;
520 insn2 = get_insn (addr + offset);
521 while (IS_R1_ADJUSTER (insn2))
522 {
523 int imm;
524
525 imm = (insn2 >> 4) & 0x1f;
526 mcore_dump_insn ("got 3: ", addr + offset, insn);
527 if (IS_ADDI1 (insn2))
528 {
529 adjust += (imm + 1);
530 mcore_insn_debug (("MCORE: addi r1,%d\n", imm + 1));
531 }
532 else if (IS_SUBI1 (insn2))
533 {
534 adjust -= (imm + 1);
535 mcore_insn_debug (("MCORE: subi r1,%d\n", imm + 1));
536 }
537 else if (IS_RSUBI1 (insn2))
538 {
539 adjust = imm - adjust;
540 mcore_insn_debug (("MCORE: rsubi r1,%d\n", imm + 1));
541 }
542 else if (IS_NOT1 (insn2))
543 {
544 adjust = ~adjust;
545 mcore_insn_debug (("MCORE: not r1\n"));
546 }
547 else if (IS_ROTLI1 (insn2))
548 {
549 adjust <<= imm;
550 mcore_insn_debug (("MCORE: rotli r1,%d\n", imm + 1));
551 }
552 else if (IS_BSETI1 (insn2))
553 {
554 adjust |= (1 << imm);
555 mcore_insn_debug (("MCORE: bseti r1,%d\n", imm));
556 }
557 else if (IS_BCLRI1 (insn2))
558 {
559 adjust &= ~(1 << imm);
560 mcore_insn_debug (("MCORE: bclri r1,%d\n", imm));
561 }
562 else if (IS_IXH1 (insn2))
563 {
564 adjust *= 3;
565 mcore_insn_debug (("MCORE: ix.h r1,r1\n"));
566 }
567 else if (IS_IXW1 (insn2))
568 {
569 adjust *= 5;
570 mcore_insn_debug (("MCORE: ix.w r1,r1\n"));
571 }
572
573 offset += 2;
574 insn2 = get_insn (addr + offset);
575 };
576
577 mcore_insn_debug (("MCORE: done looking for r1 adjusters\n"));
578
579 /* If the next insn adjusts the stack pointer, we keep everything;
580 if not, we scrap it and we've found the end of the prologue. */
581 if (IS_SUB01 (insn2))
582 {
583 addr += offset;
584 framesize += adjust;
585 mcore_insn_debug (("MCORE: found stack adjustment of 0x%x bytes.\n", adjust));
586 mcore_insn_debug (("MCORE: skipping to new address 0x%x\n", addr));
587 mcore_insn_debug (("MCORE: continuing\n"));
588 continue;
589 }
590
591 /* None of these instructions are prologue, so don't touch
592 anything. */
593 mcore_insn_debug (("MCORE: no subu r1,r0, NOT altering framesize.\n"));
594 break;
595 }
596
597 /* This is not a prologue insn, so stop here. */
598 mcore_insn_debug (("MCORE: insn is not a prologue insn -- ending scan\n"));
599 break;
600 }
601
602 mcore_insn_debug (("MCORE: done analyzing prologue\n"));
603 mcore_insn_debug (("MCORE: prologue end = 0x%x\n", addr));
604
605 /* Save everything we have learned about this frame into FI. */
606 if (fi != NULL)
607 {
608 fi->extra_info->framesize = framesize;
609 fi->extra_info->fp_regnum = fp_regnum;
610 fi->extra_info->status = flags;
611
612 /* Fix the frame pointer. When gcc uses r8 as a frame pointer,
613 it is really an arg ptr. We adjust fi->frame to be a "real"
614 frame pointer. */
615 if (fi->next == NULL)
616 {
617 if (fi->extra_info->status & MY_FRAME_IN_SP)
618 fi->frame = read_sp () + framesize;
619 else
620 fi->frame = read_register (fp_regnum) + framesize;
621 }
622
623 /* Note where saved registers are stored. The offsets in REGISTER_OFFSETS
624 are computed relative to the top of the frame. */
625 for (rn = 0; rn < NUM_REGS; rn++)
626 {
627 if (register_offsets[rn] >= 0)
628 {
629 fi->saved_regs[rn] = fi->frame - register_offsets[rn];
630 mcore_insn_debug (("Saved register %s stored at 0x%08x, value=0x%08x\n",
631 mcore_register_names[rn], fi->saved_regs[rn],
632 read_memory_integer (fi->saved_regs[rn], 4)));
633 }
634 }
635 }
636
637 /* Return addr of first non-prologue insn. */
638 return addr;
639 }
640
641 /* Given a GDB frame, determine the address of the calling function's frame.
642 This will be used to create a new GDB frame struct, and then
643 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame. */
644
645 CORE_ADDR
646 mcore_frame_chain (struct frame_info * fi)
647 {
648 struct frame_info *dummy;
649 CORE_ADDR callers_addr;
650
651 /* Analyze the prologue of this function. */
652 if (fi->extra_info->status == 0)
653 mcore_analyze_prologue (fi, 0, 0);
654
655 /* If mcore_analyze_prologue set NO_MORE_FRAMES, quit now. */
656 if (fi->extra_info->status & NO_MORE_FRAMES)
657 return 0;
658
659 /* Now that we've analyzed our prologue, we can start to ask
660 for information about our caller. The easiest way to do
661 this is to analyze our caller's prologue.
662
663 If our caller has a frame pointer, then we need to find
664 the value of that register upon entry to our frame.
665 This value is either in fi->saved_regs[rn] if it's saved,
666 or it's still in a register.
667
668 If our caller does not have a frame pointer, then his frame base
669 is <our base> + -<caller's frame size>. */
670 dummy = analyze_dummy_frame (FRAME_SAVED_PC (fi), fi->frame);
671
672 if (dummy->extra_info->status & MY_FRAME_IN_FP)
673 {
674 int fp = dummy->extra_info->fp_regnum;
675
676 /* Our caller has a frame pointer. */
677 if (fi->saved_regs[fp] != 0)
678 {
679 /* The "FP" was saved on the stack. Don't forget to adjust
680 the "FP" with the framesize to get a real FP. */
681 callers_addr = read_memory_integer (fi->saved_regs[fp], REGISTER_SIZE)
682 + dummy->extra_info->framesize;
683 }
684 else
685 {
686 /* It's still in the register. Don't forget to adjust
687 the "FP" with the framesize to get a real FP. */
688 callers_addr = read_register (fp) + dummy->extra_info->framesize;
689 }
690 }
691 else
692 {
693 /* Our caller does not have a frame pointer. */
694 callers_addr = fi->frame + dummy->extra_info->framesize;
695 }
696
697 return callers_addr;
698 }
699
700 /* Skip the prologue of the function at PC. */
701
702 CORE_ADDR
703 mcore_skip_prologue (CORE_ADDR pc)
704 {
705 CORE_ADDR func_addr, func_end;
706 struct symtab_and_line sal;
707
708 /* If we have line debugging information, then the end of the
709 prologue should be the first assembly instruction of the first
710 source line */
711 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
712 {
713 sal = find_pc_line (func_addr, 0);
714 if (sal.end && sal.end < func_end)
715 return sal.end;
716 }
717
718 return mcore_analyze_prologue (NULL, pc, 1);
719 }
720
721 /* Return the address at which function arguments are offset. */
722 CORE_ADDR
723 mcore_frame_args_address (struct frame_info * fi)
724 {
725 return fi->frame - fi->extra_info->framesize;
726 }
727
728 CORE_ADDR
729 mcore_frame_locals_address (struct frame_info * fi)
730 {
731 return fi->frame - fi->extra_info->framesize;
732 }
733
734 /* Return the frame pointer in use at address PC. */
735
736 void
737 mcore_virtual_frame_pointer (CORE_ADDR pc, int *reg, LONGEST *offset)
738 {
739 struct frame_info *dummy = analyze_dummy_frame (pc, 0);
740 if (dummy->extra_info->status & MY_FRAME_IN_SP)
741 {
742 *reg = SP_REGNUM;
743 *offset = 0;
744 }
745 else
746 {
747 *reg = dummy->extra_info->fp_regnum;
748 *offset = 0;
749 }
750 }
751
752 /* Find the value of register REGNUM in frame FI. */
753
754 CORE_ADDR
755 mcore_find_callers_reg (struct frame_info *fi, int regnum)
756 {
757 for (; fi != NULL; fi = fi->next)
758 {
759 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
760 return deprecated_read_register_dummy (fi->pc, fi->frame, regnum);
761 else if (fi->saved_regs[regnum] != 0)
762 return read_memory_integer (fi->saved_regs[regnum],
763 REGISTER_SIZE);
764 }
765
766 return read_register (regnum);
767 }
768
769 /* Find the saved pc in frame FI. */
770
771 CORE_ADDR
772 mcore_frame_saved_pc (struct frame_info * fi)
773 {
774
775 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
776 return deprecated_read_register_dummy (fi->pc, fi->frame, PC_REGNUM);
777 else
778 return mcore_find_callers_reg (fi, PR_REGNUM);
779 }
780 \f
781 /* INFERIOR FUNCTION CALLS */
782
783 /* This routine gets called when either the user uses the "return"
784 command, or the call dummy breakpoint gets hit. */
785
786 void
787 mcore_pop_frame (void)
788 {
789 int rn;
790 struct frame_info *fi = get_current_frame ();
791
792 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
793 generic_pop_dummy_frame ();
794 else
795 {
796 /* Write out the PC we saved. */
797 write_register (PC_REGNUM, FRAME_SAVED_PC (fi));
798
799 /* Restore any saved registers. */
800 for (rn = 0; rn < NUM_REGS; rn++)
801 {
802 if (fi->saved_regs[rn] != 0)
803 {
804 ULONGEST value;
805
806 value = read_memory_unsigned_integer (fi->saved_regs[rn],
807 REGISTER_SIZE);
808 write_register (rn, value);
809 }
810 }
811
812 /* Actually cut back the stack. */
813 write_register (SP_REGNUM, FRAME_FP (fi));
814 }
815
816 /* Finally, throw away any cached frame information. */
817 flush_cached_frames ();
818 }
819
820 /* Setup arguments and PR for a call to the target. First six arguments
821 go in FIRST_ARGREG -> LAST_ARGREG, subsequent args go on to the stack.
822
823 * Types with lengths greater than REGISTER_SIZE may not be split
824 between registers and the stack, and they must start in an even-numbered
825 register. Subsequent args will go onto the stack.
826
827 * Structs may be split between registers and stack, left-aligned.
828
829 * If the function returns a struct which will not fit into registers (it's
830 more than eight bytes), we must allocate for that, too. Gdb will tell
831 us where this buffer is (STRUCT_ADDR), and we simply place it into
832 FIRST_ARGREG, since the MCORE treats struct returns (of less than eight
833 bytes) as hidden first arguments. */
834
835 CORE_ADDR
836 mcore_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
837 int struct_return, CORE_ADDR struct_addr)
838 {
839 int argreg;
840 int argnum;
841 struct stack_arg
842 {
843 int len;
844 char *val;
845 }
846 *stack_args;
847 int nstack_args = 0;
848
849 stack_args = (struct stack_arg *) alloca (nargs * sizeof (struct stack_arg));
850
851 argreg = FIRST_ARGREG;
852
853 /* Align the stack. This is mostly a nop, but not always. It will be needed
854 if we call a function which has argument overflow. */
855 sp &= ~3;
856
857 /* If this function returns a struct which does not fit in the
858 return registers, we must pass a buffer to the function
859 which it can use to save the return value. */
860 if (struct_return)
861 write_register (argreg++, struct_addr);
862
863 /* FIXME: what about unions? */
864 for (argnum = 0; argnum < nargs; argnum++)
865 {
866 char *val = (char *) VALUE_CONTENTS (args[argnum]);
867 int len = TYPE_LENGTH (VALUE_TYPE (args[argnum]));
868 struct type *type = VALUE_TYPE (args[argnum]);
869 int olen;
870
871 mcore_insn_debug (("MCORE PUSH: argreg=%d; len=%d; %s\n",
872 argreg, len, TYPE_CODE (type) == TYPE_CODE_STRUCT ? "struct" : "not struct"));
873 /* Arguments larger than a register must start in an even
874 numbered register. */
875 olen = len;
876
877 if (TYPE_CODE (type) != TYPE_CODE_STRUCT && len > REGISTER_SIZE && argreg % 2)
878 {
879 mcore_insn_debug (("MCORE PUSH: %d > REGISTER_SIZE: and %s is not even\n",
880 len, mcore_register_names[argreg]));
881 argreg++;
882 }
883
884 if ((argreg <= LAST_ARGREG && len <= (LAST_ARGREG - argreg + 1) * REGISTER_SIZE)
885 || (TYPE_CODE (type) == TYPE_CODE_STRUCT))
886 {
887 /* Something that will fit entirely into registers (or a struct
888 which may be split between registers and stack). */
889 mcore_insn_debug (("MCORE PUSH: arg %d going into regs\n", argnum));
890
891 if (TYPE_CODE (type) == TYPE_CODE_STRUCT && olen < REGISTER_SIZE)
892 {
893 /* Small structs must be right aligned within the register,
894 the most significant bits are undefined. */
895 write_register (argreg, extract_unsigned_integer (val, len));
896 argreg++;
897 len = 0;
898 }
899
900 while (len > 0 && argreg <= LAST_ARGREG)
901 {
902 write_register (argreg, extract_unsigned_integer (val, REGISTER_SIZE));
903 argreg++;
904 val += REGISTER_SIZE;
905 len -= REGISTER_SIZE;
906 }
907
908 /* Any remainder for the stack is noted below... */
909 }
910 else if (TYPE_CODE (VALUE_TYPE (args[argnum])) != TYPE_CODE_STRUCT
911 && len > REGISTER_SIZE)
912 {
913 /* All subsequent args go onto the stack. */
914 mcore_insn_debug (("MCORE PUSH: does not fit into regs, going onto stack\n"));
915 argnum = LAST_ARGREG + 1;
916 }
917
918 if (len > 0)
919 {
920 /* Note that this must be saved onto the stack */
921 mcore_insn_debug (("MCORE PUSH: adding arg %d to stack\n", argnum));
922 stack_args[nstack_args].val = val;
923 stack_args[nstack_args].len = len;
924 nstack_args++;
925 }
926
927 }
928
929 /* We're done with registers and stack allocation. Now do the actual
930 stack pushes. */
931 while (nstack_args--)
932 {
933 sp -= stack_args[nstack_args].len;
934 write_memory (sp, stack_args[nstack_args].val, stack_args[nstack_args].len);
935 }
936
937 /* Return adjusted stack pointer. */
938 return sp;
939 }
940
941 /* Store the return address for the call dummy. For MCore, we've
942 opted to use generic call dummies, so we simply store the
943 CALL_DUMMY_ADDRESS into the PR register (r15). */
944
945 CORE_ADDR
946 mcore_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
947 {
948 write_register (PR_REGNUM, CALL_DUMMY_ADDRESS ());
949 return sp;
950 }
951
952 /* Setting/getting return values from functions.
953
954 The Motorola MCore processors use r2/r3 to return anything
955 not larger than 32 bits. Everything else goes into a caller-
956 supplied buffer, which is passed in via a hidden first
957 argument.
958
959 For gdb, this leaves us two routes, based on what
960 USE_STRUCT_CONVENTION (mcore_use_struct_convention) returns.
961 If this macro returns 1, gdb will call STORE_STRUCT_RETURN and
962 EXTRACT_STRUCT_VALUE_ADDRESS.
963
964 If USE_STRUCT_CONVENTION retruns 0, then gdb uses STORE_RETURN_VALUE
965 and EXTRACT_RETURN_VALUE to store/fetch the functions return value. */
966
967 /* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
968 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
969 and TYPE is the type (which is known to be struct, union or array). */
970
971 int
972 mcore_use_struct_convention (int gcc_p, struct type *type)
973 {
974 return (TYPE_LENGTH (type) > 8);
975 }
976
977 /* Where is the return value saved? For MCore, a pointer to
978 this buffer was passed as a hidden first argument, so
979 just return that address. */
980
981 CORE_ADDR
982 mcore_extract_struct_value_address (char *regbuf)
983 {
984 return extract_address (regbuf + REGISTER_BYTE (FIRST_ARGREG), REGISTER_SIZE);
985 }
986
987 /* Given a function which returns a value of type TYPE, extract the
988 the function's return value and place the result into VALBUF.
989 REGBUF is the register contents of the target. */
990
991 void
992 mcore_extract_return_value (struct type *type, char *regbuf, char *valbuf)
993 {
994 /* Copy the return value (starting) in RETVAL_REGNUM to VALBUF. */
995 /* Only getting the first byte! if len = 1, we need the last byte of
996 the register, not the first. */
997 memcpy (valbuf, regbuf + REGISTER_BYTE (RETVAL_REGNUM) +
998 (TYPE_LENGTH (type) < 4 ? 4 - TYPE_LENGTH (type) : 0), TYPE_LENGTH (type));
999 }
1000
1001 /* Store the return value in VALBUF (of type TYPE) where the caller
1002 expects to see it.
1003
1004 Values less than 32 bits are stored in r2, right justified and
1005 sign or zero extended.
1006
1007 Values between 32 and 64 bits are stored in r2 (most
1008 significant word) and r3 (least significant word, left justified).
1009 Note that this includes structures of less than eight bytes, too. */
1010
1011 void
1012 mcore_store_return_value (struct type *type, char *valbuf)
1013 {
1014 int value_size;
1015 int return_size;
1016 int offset;
1017 char *zeros;
1018
1019 value_size = TYPE_LENGTH (type);
1020
1021 /* Return value fits into registers. */
1022 return_size = (value_size + REGISTER_SIZE - 1) & ~(REGISTER_SIZE - 1);
1023 offset = REGISTER_BYTE (RETVAL_REGNUM) + (return_size - value_size);
1024 zeros = alloca (return_size);
1025 memset (zeros, 0, return_size);
1026
1027 write_register_bytes (REGISTER_BYTE (RETVAL_REGNUM), zeros, return_size);
1028 write_register_bytes (offset, valbuf, value_size);
1029 }
1030
1031 /* Initialize our target-dependent "stuff" for this newly created frame.
1032
1033 This includes allocating space for saved registers and analyzing
1034 the prologue of this frame. */
1035
1036 void
1037 mcore_init_extra_frame_info (int fromleaf, struct frame_info *fi)
1038 {
1039 if (fi && fi->next)
1040 fi->pc = FRAME_SAVED_PC (fi->next);
1041
1042 frame_saved_regs_zalloc (fi);
1043
1044 fi->extra_info = (struct frame_extra_info *)
1045 frame_obstack_alloc (sizeof (struct frame_extra_info));
1046 fi->extra_info->status = 0;
1047 fi->extra_info->framesize = 0;
1048
1049 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
1050 {
1051 /* We need to setup fi->frame here because run_stack_dummy gets it wrong
1052 by assuming it's always FP. */
1053 fi->frame = deprecated_read_register_dummy (fi->pc, fi->frame, SP_REGNUM);
1054 }
1055 else
1056 mcore_analyze_prologue (fi, 0, 0);
1057 }
1058
1059 /* Get an insturction from memory. */
1060
1061 static int
1062 get_insn (CORE_ADDR pc)
1063 {
1064 char buf[4];
1065 int status = read_memory_nobpt (pc, buf, 2);
1066 if (status != 0)
1067 return 0;
1068
1069 return extract_unsigned_integer (buf, 2);
1070 }
1071
1072 static struct gdbarch *
1073 mcore_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1074 {
1075 static LONGEST call_dummy_words[7] = { };
1076 struct gdbarch_tdep *tdep = NULL;
1077 struct gdbarch *gdbarch;
1078
1079 /* find a candidate among the list of pre-declared architectures. */
1080 arches = gdbarch_list_lookup_by_info (arches, &info);
1081 if (arches != NULL)
1082 return (arches->gdbarch);
1083
1084 gdbarch = gdbarch_alloc (&info, 0);
1085
1086 /* Registers: */
1087
1088 /* All registers are 32 bits */
1089 set_gdbarch_register_size (gdbarch, MCORE_REG_SIZE);
1090 set_gdbarch_max_register_raw_size (gdbarch, MCORE_REG_SIZE);
1091 set_gdbarch_max_register_virtual_size (gdbarch, MCORE_REG_SIZE);
1092 set_gdbarch_register_name (gdbarch, mcore_register_name);
1093 set_gdbarch_register_virtual_type (gdbarch, mcore_register_virtual_type);
1094 set_gdbarch_register_virtual_size (gdbarch, mcore_register_size);
1095 set_gdbarch_register_raw_size (gdbarch, mcore_register_size);
1096 set_gdbarch_register_byte (gdbarch, mcore_register_byte);
1097 set_gdbarch_register_bytes (gdbarch, MCORE_REG_SIZE * MCORE_NUM_REGS);
1098 set_gdbarch_num_regs (gdbarch, MCORE_NUM_REGS);
1099 set_gdbarch_pc_regnum (gdbarch, 64);
1100 set_gdbarch_sp_regnum (gdbarch, 0);
1101 set_gdbarch_fp_regnum (gdbarch, 0);
1102 set_gdbarch_get_saved_register (gdbarch, generic_unwind_get_saved_register);
1103
1104 /* Call Dummies: */
1105
1106 set_gdbarch_call_dummy_p (gdbarch, 1);
1107 set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
1108 set_gdbarch_call_dummy_words (gdbarch, call_dummy_words);
1109 set_gdbarch_sizeof_call_dummy_words (gdbarch, 0);
1110 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
1111 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
1112 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
1113 set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
1114 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
1115 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
1116 set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
1117 set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy);
1118 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
1119 set_gdbarch_saved_pc_after_call (gdbarch, mcore_saved_pc_after_call);
1120 set_gdbarch_function_start_offset (gdbarch, 0);
1121 set_gdbarch_decr_pc_after_break (gdbarch, 0);
1122 set_gdbarch_breakpoint_from_pc (gdbarch, mcore_breakpoint_from_pc);
1123 set_gdbarch_push_return_address (gdbarch, mcore_push_return_address);
1124 set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
1125 set_gdbarch_push_arguments (gdbarch, mcore_push_arguments);
1126 set_gdbarch_call_dummy_length (gdbarch, 0);
1127
1128 /* Frames: */
1129
1130 set_gdbarch_init_extra_frame_info (gdbarch, mcore_init_extra_frame_info);
1131 set_gdbarch_frame_chain (gdbarch, mcore_frame_chain);
1132 set_gdbarch_frame_chain_valid (gdbarch, generic_func_frame_chain_valid);
1133 set_gdbarch_frame_init_saved_regs (gdbarch, mcore_frame_init_saved_regs);
1134 set_gdbarch_frame_saved_pc (gdbarch, mcore_frame_saved_pc);
1135 set_gdbarch_deprecated_store_return_value (gdbarch, mcore_store_return_value);
1136 set_gdbarch_deprecated_extract_return_value (gdbarch,
1137 mcore_extract_return_value);
1138 set_gdbarch_store_struct_return (gdbarch, mcore_store_struct_return);
1139 set_gdbarch_deprecated_extract_struct_value_address (gdbarch,
1140 mcore_extract_struct_value_address);
1141 set_gdbarch_skip_prologue (gdbarch, mcore_skip_prologue);
1142 set_gdbarch_frame_args_skip (gdbarch, 0);
1143 set_gdbarch_frame_args_address (gdbarch, mcore_frame_args_address);
1144 set_gdbarch_frame_locals_address (gdbarch, mcore_frame_locals_address);
1145 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
1146 set_gdbarch_pop_frame (gdbarch, mcore_pop_frame);
1147 set_gdbarch_virtual_frame_pointer (gdbarch, mcore_virtual_frame_pointer);
1148
1149 /* Misc.: */
1150
1151 /* Stack grows down. */
1152 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1153 set_gdbarch_use_struct_convention (gdbarch, mcore_use_struct_convention);
1154 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
1155 /* MCore will never pass a sturcture by reference. It will always be split
1156 between registers and stack. */
1157 set_gdbarch_reg_struct_has_addr (gdbarch, mcore_reg_struct_has_addr);
1158
1159 return gdbarch;
1160 }
1161
1162 static void
1163 mcore_dump_tdep (struct gdbarch *current_gdbarch, struct ui_file *file)
1164 {
1165
1166 }
1167
1168 void
1169 _initialize_mcore_tdep (void)
1170 {
1171 extern int print_insn_mcore (bfd_vma, disassemble_info *);
1172 gdbarch_register (bfd_arch_mcore, mcore_gdbarch_init, mcore_dump_tdep);
1173 tm_print_insn = print_insn_mcore;
1174
1175 #ifdef MCORE_DEBUG
1176 add_show_from_set (add_set_cmd ("mcoredebug", no_class,
1177 var_boolean, (char *) &mcore_debug,
1178 "Set mcore debugging.\n", &setlist),
1179 &showlist);
1180 #endif
1181 }
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