2002-09-17 Andrew Cagney <cagney@redhat.com>
[deliverable/binutils-gdb.git] / gdb / mcore-tdep.c
1 /* Target-machine dependent code for Motorola MCore for GDB, the GNU debugger
2 Copyright 1999, 2000, 2001 Free Software Foundation, Inc.
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
19
20 #include "defs.h"
21 #include "frame.h"
22 #include "symtab.h"
23 #include "value.h"
24 #include "gdbcmd.h"
25 #include "regcache.h"
26 #include "symfile.h"
27 #include "gdbcore.h"
28 #include "inferior.h"
29 #include "arch-utils.h"
30
31 /* Functions declared and used only in this file */
32
33 static CORE_ADDR mcore_analyze_prologue (struct frame_info *fi, CORE_ADDR pc, int skip_prologue);
34
35 static struct frame_info *analyze_dummy_frame (CORE_ADDR pc, CORE_ADDR frame);
36
37 static int get_insn (CORE_ADDR pc);
38
39 /* Functions exported from this file */
40
41 int mcore_use_struct_convention (int gcc_p, struct type *type);
42
43 void _initialize_mcore (void);
44
45 void mcore_init_extra_frame_info (int fromleaf, struct frame_info *fi);
46
47 CORE_ADDR mcore_frame_saved_pc (struct frame_info *fi);
48
49 CORE_ADDR mcore_find_callers_reg (struct frame_info *fi, int regnum);
50
51 CORE_ADDR mcore_frame_args_address (struct frame_info *fi);
52
53 CORE_ADDR mcore_frame_locals_address (struct frame_info *fi);
54
55 CORE_ADDR mcore_push_return_address (CORE_ADDR pc, CORE_ADDR sp);
56
57 CORE_ADDR mcore_push_arguments (int nargs, struct value ** args, CORE_ADDR sp,
58 int struct_return, CORE_ADDR struct_addr);
59
60 void mcore_pop_frame ();
61
62 CORE_ADDR mcore_skip_prologue (CORE_ADDR pc);
63
64 CORE_ADDR mcore_frame_chain (struct frame_info *fi);
65
66 const unsigned char *mcore_breakpoint_from_pc (CORE_ADDR * bp_addr, int *bp_size);
67
68 int mcore_use_struct_convention (int gcc_p, struct type *type);
69
70 void mcore_store_return_value (struct type *type, char *valbuf);
71
72 CORE_ADDR mcore_extract_struct_value_address (char *regbuf);
73
74 void mcore_extract_return_value (struct type *type, char *regbuf, char *valbuf);
75
76 #ifdef MCORE_DEBUG
77 int mcore_debug = 0;
78 #endif
79
80
81 /* All registers are 4 bytes long. */
82 #define MCORE_REG_SIZE 4
83 #define MCORE_NUM_REGS 65
84
85 /* Some useful register numbers. */
86 #define PR_REGNUM 15
87 #define FIRST_ARGREG 2
88 #define LAST_ARGREG 7
89 #define RETVAL_REGNUM 2
90
91
92 /* Additional info that we use for managing frames */
93 struct frame_extra_info
94 {
95 /* A generic status word */
96 int status;
97
98 /* Size of this frame */
99 int framesize;
100
101 /* The register that is acting as a frame pointer, if
102 it is being used. This is undefined if status
103 does not contain the flag MY_FRAME_IN_FP. */
104 int fp_regnum;
105 };
106
107 /* frame_extra_info status flags */
108
109 /* The base of the current frame is actually in the stack pointer.
110 This happens when there is no frame pointer (MCore ABI does not
111 require a frame pointer) or when we're stopped in the prologue or
112 epilogue itself. In these cases, mcore_analyze_prologue will need
113 to update fi->frame before returning or analyzing the register
114 save instructions. */
115 #define MY_FRAME_IN_SP 0x1
116
117 /* The base of the current frame is in a frame pointer register.
118 This register is noted in frame_extra_info->fp_regnum.
119
120 Note that the existence of an FP might also indicate that the
121 function has called alloca. */
122 #define MY_FRAME_IN_FP 0x2
123
124 /* This flag is set to indicate that this frame is the top-most
125 frame. This tells frame chain not to bother trying to unwind
126 beyond this frame. */
127 #define NO_MORE_FRAMES 0x4
128
129 /* Instruction macros used for analyzing the prologue */
130 #define IS_SUBI0(x) (((x) & 0xfe0f) == 0x2400) /* subi r0,oimm5 */
131 #define IS_STM(x) (((x) & 0xfff0) == 0x0070) /* stm rf-r15,r0 */
132 #define IS_STWx0(x) (((x) & 0xf00f) == 0x9000) /* stw rz,(r0,disp) */
133 #define IS_STWxy(x) (((x) & 0xf000) == 0x9000) /* stw rx,(ry,disp) */
134 #define IS_MOVx0(x) (((x) & 0xfff0) == 0x1200) /* mov rn,r0 */
135 #define IS_LRW1(x) (((x) & 0xff00) == 0x7100) /* lrw r1,literal */
136 #define IS_MOVI1(x) (((x) & 0xf80f) == 0x6001) /* movi r1,imm7 */
137 #define IS_BGENI1(x) (((x) & 0xfe0f) == 0x3201) /* bgeni r1,imm5 */
138 #define IS_BMASKI1(x) (((x) & 0xfe0f) == 0x2C01) /* bmaski r1,imm5 */
139 #define IS_ADDI1(x) (((x) & 0xfe0f) == 0x2001) /* addi r1,oimm5 */
140 #define IS_SUBI1(x) (((x) & 0xfe0f) == 0x2401) /* subi r1,oimm5 */
141 #define IS_RSUBI1(x) (((x) & 0xfe0f) == 0x2801) /* rsubi r1,imm5 */
142 #define IS_NOT1(x) (((x) & 0xffff) == 0x01f1) /* not r1 */
143 #define IS_ROTLI1(x) (((x) & 0xfe0f) == 0x3801) /* rotli r1,imm5 */
144 #define IS_BSETI1(x) (((x) & 0xfe0f) == 0x3401) /* bseti r1,imm5 */
145 #define IS_BCLRI1(x) (((x) & 0xfe0f) == 0x3001) /* bclri r1,imm5 */
146 #define IS_IXH1(x) (((x) & 0xffff) == 0x1d11) /* ixh r1,r1 */
147 #define IS_IXW1(x) (((x) & 0xffff) == 0x1511) /* ixw r1,r1 */
148 #define IS_SUB01(x) (((x) & 0xffff) == 0x0510) /* subu r0,r1 */
149 #define IS_RTS(x) (((x) & 0xffff) == 0x00cf) /* jmp r15 */
150
151 #define IS_R1_ADJUSTER(x) \
152 (IS_ADDI1(x) || IS_SUBI1(x) || IS_ROTLI1(x) || IS_BSETI1(x) \
153 || IS_BCLRI1(x) || IS_RSUBI1(x) || IS_NOT1(x) \
154 || IS_IXH1(x) || IS_IXW1(x))
155 \f
156
157 #ifdef MCORE_DEBUG
158 static void
159 mcore_dump_insn (char *commnt, CORE_ADDR pc, int insn)
160 {
161 if (mcore_debug)
162 {
163 printf_filtered ("MCORE: %s %08x %08x ",
164 commnt, (unsigned int) pc, (unsigned int) insn);
165 TARGET_PRINT_INSN (pc, &tm_print_insn_info);
166 printf_filtered ("\n");
167 }
168 }
169 #define mcore_insn_debug(args) { if (mcore_debug) printf_filtered args; }
170 #else /* !MCORE_DEBUG */
171 #define mcore_dump_insn(a,b,c) {}
172 #define mcore_insn_debug(args) {}
173 #endif
174
175
176 static struct type *
177 mcore_register_virtual_type (int regnum)
178 {
179 if (regnum < 0 || regnum >= MCORE_NUM_REGS)
180 internal_error (__FILE__, __LINE__,
181 "mcore_register_virtual_type: illegal register number %d",
182 regnum);
183 else
184 return builtin_type_int;
185 }
186
187 static int
188 mcore_register_byte (int regnum)
189 {
190 if (regnum < 0 || regnum >= MCORE_NUM_REGS)
191 internal_error (__FILE__, __LINE__,
192 "mcore_register_byte: illegal register number %d",
193 regnum);
194 else
195 return (regnum * MCORE_REG_SIZE);
196 }
197
198 static int
199 mcore_register_size (int regnum)
200 {
201
202 if (regnum < 0 || regnum >= MCORE_NUM_REGS)
203 internal_error (__FILE__, __LINE__,
204 "mcore_register_size: illegal register number %d",
205 regnum);
206 else
207 return MCORE_REG_SIZE;
208 }
209
210 /* The registers of the Motorola MCore processors */
211
212 static const char *
213 mcore_register_name (int regnum)
214 {
215
216 static char *register_names[] = {
217 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
218 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
219 "ar0", "ar1", "ar2", "ar3", "ar4", "ar5", "ar6", "ar7",
220 "ar8", "ar9", "ar10", "ar11", "ar12", "ar13", "ar14", "ar15",
221 "psr", "vbr", "epsr", "fpsr", "epc", "fpc", "ss0", "ss1",
222 "ss2", "ss3", "ss4", "gcr", "gsr", "cr13", "cr14", "cr15",
223 "cr16", "cr17", "cr18", "cr19", "cr20", "cr21", "cr22", "cr23",
224 "cr24", "cr25", "cr26", "cr27", "cr28", "cr29", "cr30", "cr31",
225 "pc"
226 };
227
228 if (regnum < 0 ||
229 regnum >= sizeof (register_names) / sizeof (register_names[0]))
230 internal_error (__FILE__, __LINE__,
231 "mcore_register_name: illegal register number %d",
232 regnum);
233 else
234 return register_names[regnum];
235 }
236
237 /* Given the address at which to insert a breakpoint (BP_ADDR),
238 what will that breakpoint be?
239
240 For MCore, we have a breakpoint instruction. Since all MCore
241 instructions are 16 bits, this is all we need, regardless of
242 address. bpkt = 0x0000 */
243
244 const unsigned char *
245 mcore_breakpoint_from_pc (CORE_ADDR * bp_addr, int *bp_size)
246 {
247 static char breakpoint[] =
248 {0x00, 0x00};
249 *bp_size = 2;
250 return breakpoint;
251 }
252
253 static CORE_ADDR
254 mcore_saved_pc_after_call (struct frame_info *frame)
255 {
256 return read_register (PR_REGNUM);
257 }
258
259 /* This is currently handled by init_extra_frame_info. */
260 static void
261 mcore_frame_init_saved_regs (struct frame_info *frame)
262 {
263
264 }
265
266 /* This is currently handled by mcore_push_arguments */
267 static void
268 mcore_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
269 {
270
271 }
272
273 static int
274 mcore_reg_struct_has_addr (int gcc_p, struct type *type)
275 {
276 return 0;
277 }
278
279
280 /* Helper function for several routines below. This funtion simply
281 sets up a fake, aka dummy, frame (not a _call_ dummy frame) that
282 we can analyze with mcore_analyze_prologue. */
283
284 static struct frame_info *
285 analyze_dummy_frame (CORE_ADDR pc, CORE_ADDR frame)
286 {
287 static struct frame_info *dummy = NULL;
288
289 if (dummy == NULL)
290 {
291 dummy = (struct frame_info *) xmalloc (sizeof (struct frame_info));
292 dummy->saved_regs = (CORE_ADDR *) xmalloc (SIZEOF_FRAME_SAVED_REGS);
293 dummy->extra_info =
294 (struct frame_extra_info *) xmalloc (sizeof (struct frame_extra_info));
295 }
296
297 dummy->next = NULL;
298 dummy->prev = NULL;
299 dummy->pc = pc;
300 dummy->frame = frame;
301 dummy->extra_info->status = 0;
302 dummy->extra_info->framesize = 0;
303 memset (dummy->saved_regs, '\000', SIZEOF_FRAME_SAVED_REGS);
304 mcore_analyze_prologue (dummy, 0, 0);
305 return dummy;
306 }
307
308 /* Function prologues on the Motorola MCore processors consist of:
309
310 - adjustments to the stack pointer (r1 used as scratch register)
311 - store word/multiples that use r0 as the base address
312 - making a copy of r0 into another register (a "frame" pointer)
313
314 Note that the MCore really doesn't have a real frame pointer.
315 Instead, the compiler may copy the SP into a register (usually
316 r8) to act as an arg pointer. For our target-dependent purposes,
317 the frame info's "frame" member will be the beginning of the
318 frame. The SP could, in fact, point below this.
319
320 The prologue ends when an instruction fails to meet either of
321 the first two criteria or when an FP is made. We make a special
322 exception for gcc. When compiling unoptimized code, gcc will
323 setup stack slots. We need to make sure that we skip the filling
324 of these stack slots as much as possible. This is only done
325 when SKIP_PROLOGUE is set, so that it does not mess up
326 backtraces. */
327
328 /* Analyze the prologue of frame FI to determine where registers are saved,
329 the end of the prologue, etc. Return the address of the first line
330 of "real" code (i.e., the end of the prologue). */
331
332 static CORE_ADDR
333 mcore_analyze_prologue (struct frame_info *fi, CORE_ADDR pc, int skip_prologue)
334 {
335 CORE_ADDR func_addr, func_end, addr, stop;
336 CORE_ADDR stack_size;
337 int insn, rn;
338 int status;
339 int fp_regnum = 0; /* dummy, valid when (flags & MY_FRAME_IN_FP) */
340 int flags;
341 int framesize;
342 int register_offsets[NUM_REGS];
343 char *name;
344
345 /* If provided, use the PC in the frame to look up the
346 start of this function. */
347 pc = (fi == NULL ? pc : fi->pc);
348
349 /* Find the start of this function. */
350 status = find_pc_partial_function (pc, &name, &func_addr, &func_end);
351
352 /* If the start of this function could not be found or if the debbuger
353 is stopped at the first instruction of the prologue, do nothing. */
354 if (status == 0)
355 return pc;
356
357 /* If the debugger is entry function, give up. */
358 if (func_addr == entry_point_address ())
359 {
360 if (fi != NULL)
361 fi->extra_info->status |= NO_MORE_FRAMES;
362 return pc;
363 }
364
365 /* At the start of a function, our frame is in the stack pointer. */
366 flags = MY_FRAME_IN_SP;
367
368 /* Start decoding the prologue. We start by checking two special cases:
369
370 1. We're about to return
371 2. We're at the first insn of the prologue.
372
373 If we're about to return, our frame has already been deallocated.
374 If we are stopped at the first instruction of a prologue,
375 then our frame has not yet been set up. */
376
377 /* Get the first insn from memory (all MCore instructions are 16 bits) */
378 mcore_insn_debug (("MCORE: starting prologue decoding\n"));
379 insn = get_insn (pc);
380 mcore_dump_insn ("got 1: ", pc, insn);
381
382 /* Check for return. */
383 if (fi != NULL && IS_RTS (insn))
384 {
385 mcore_insn_debug (("MCORE: got jmp r15"));
386 if (fi->next == NULL)
387 fi->frame = read_sp ();
388 return fi->pc;
389 }
390
391 /* Check for first insn of prologue */
392 if (fi != NULL && fi->pc == func_addr)
393 {
394 if (fi->next == NULL)
395 fi->frame = read_sp ();
396 return fi->pc;
397 }
398
399 /* Figure out where to stop scanning */
400 stop = (fi ? fi->pc : func_end);
401
402 /* Don't walk off the end of the function */
403 stop = (stop > func_end ? func_end : stop);
404
405 /* REGISTER_OFFSETS will contain offsets, from the top of the frame
406 (NOT the frame pointer), for the various saved registers or -1
407 if the register is not saved. */
408 for (rn = 0; rn < NUM_REGS; rn++)
409 register_offsets[rn] = -1;
410
411 /* Analyze the prologue. Things we determine from analyzing the
412 prologue include:
413 * the size of the frame
414 * where saved registers are located (and which are saved)
415 * FP used? */
416 mcore_insn_debug (("MCORE: Scanning prologue: func_addr=0x%x, stop=0x%x\n",
417 (unsigned int) func_addr, (unsigned int) stop));
418
419 framesize = 0;
420 for (addr = func_addr; addr < stop; addr += 2)
421 {
422 /* Get next insn */
423 insn = get_insn (addr);
424 mcore_dump_insn ("got 2: ", addr, insn);
425
426 if (IS_SUBI0 (insn))
427 {
428 int offset = 1 + ((insn >> 4) & 0x1f);
429 mcore_insn_debug (("MCORE: got subi r0,%d; continuing\n", offset));
430 framesize += offset;
431 continue;
432 }
433 else if (IS_STM (insn))
434 {
435 /* Spill register(s) */
436 int offset;
437 int start_register;
438
439 /* BIG WARNING! The MCore ABI does not restrict functions
440 to taking only one stack allocation. Therefore, when
441 we save a register, we record the offset of where it was
442 saved relative to the current framesize. This will
443 then give an offset from the SP upon entry to our
444 function. Remember, framesize is NOT constant until
445 we're done scanning the prologue. */
446 start_register = (insn & 0xf);
447 mcore_insn_debug (("MCORE: got stm r%d-r15,(r0)\n", start_register));
448
449 for (rn = start_register, offset = 0; rn <= 15; rn++, offset += 4)
450 {
451 register_offsets[rn] = framesize - offset;
452 mcore_insn_debug (("MCORE: r%d saved at 0x%x (offset %d)\n", rn,
453 register_offsets[rn], offset));
454 }
455 mcore_insn_debug (("MCORE: continuing\n"));
456 continue;
457 }
458 else if (IS_STWx0 (insn))
459 {
460 /* Spill register: see note for IS_STM above. */
461 int imm;
462
463 rn = (insn >> 8) & 0xf;
464 imm = (insn >> 4) & 0xf;
465 register_offsets[rn] = framesize - (imm << 2);
466 mcore_insn_debug (("MCORE: r%d saved at offset 0x%x\n", rn, register_offsets[rn]));
467 mcore_insn_debug (("MCORE: continuing\n"));
468 continue;
469 }
470 else if (IS_MOVx0 (insn))
471 {
472 /* We have a frame pointer, so this prologue is over. Note
473 the register which is acting as the frame pointer. */
474 flags |= MY_FRAME_IN_FP;
475 flags &= ~MY_FRAME_IN_SP;
476 fp_regnum = insn & 0xf;
477 mcore_insn_debug (("MCORE: Found a frame pointer: r%d\n", fp_regnum));
478
479 /* If we found an FP, we're at the end of the prologue. */
480 mcore_insn_debug (("MCORE: end of prologue\n"));
481 if (skip_prologue)
482 continue;
483
484 /* If we're decoding prologue, stop here. */
485 addr += 2;
486 break;
487 }
488 else if (IS_STWxy (insn) && (flags & MY_FRAME_IN_FP) && ((insn & 0xf) == fp_regnum))
489 {
490 /* Special case. Skip over stack slot allocs, too. */
491 mcore_insn_debug (("MCORE: push arg onto stack.\n"));
492 continue;
493 }
494 else if (IS_LRW1 (insn) || IS_MOVI1 (insn)
495 || IS_BGENI1 (insn) || IS_BMASKI1 (insn))
496 {
497 int adjust = 0;
498 int offset = 0;
499 int insn2;
500
501 mcore_insn_debug (("MCORE: looking at large frame\n"));
502 if (IS_LRW1 (insn))
503 {
504 adjust =
505 read_memory_integer ((addr + 2 + ((insn & 0xff) << 2)) & 0xfffffffc, 4);
506 }
507 else if (IS_MOVI1 (insn))
508 adjust = (insn >> 4) & 0x7f;
509 else if (IS_BGENI1 (insn))
510 adjust = 1 << ((insn >> 4) & 0x1f);
511 else /* IS_BMASKI (insn) */
512 adjust = (1 << (adjust >> 4) & 0x1f) - 1;
513
514 mcore_insn_debug (("MCORE: base framesize=0x%x\n", adjust));
515
516 /* May have zero or more insns which modify r1 */
517 mcore_insn_debug (("MCORE: looking for r1 adjusters...\n"));
518 offset = 2;
519 insn2 = get_insn (addr + offset);
520 while (IS_R1_ADJUSTER (insn2))
521 {
522 int imm;
523
524 imm = (insn2 >> 4) & 0x1f;
525 mcore_dump_insn ("got 3: ", addr + offset, insn);
526 if (IS_ADDI1 (insn2))
527 {
528 adjust += (imm + 1);
529 mcore_insn_debug (("MCORE: addi r1,%d\n", imm + 1));
530 }
531 else if (IS_SUBI1 (insn2))
532 {
533 adjust -= (imm + 1);
534 mcore_insn_debug (("MCORE: subi r1,%d\n", imm + 1));
535 }
536 else if (IS_RSUBI1 (insn2))
537 {
538 adjust = imm - adjust;
539 mcore_insn_debug (("MCORE: rsubi r1,%d\n", imm + 1));
540 }
541 else if (IS_NOT1 (insn2))
542 {
543 adjust = ~adjust;
544 mcore_insn_debug (("MCORE: not r1\n"));
545 }
546 else if (IS_ROTLI1 (insn2))
547 {
548 adjust <<= imm;
549 mcore_insn_debug (("MCORE: rotli r1,%d\n", imm + 1));
550 }
551 else if (IS_BSETI1 (insn2))
552 {
553 adjust |= (1 << imm);
554 mcore_insn_debug (("MCORE: bseti r1,%d\n", imm));
555 }
556 else if (IS_BCLRI1 (insn2))
557 {
558 adjust &= ~(1 << imm);
559 mcore_insn_debug (("MCORE: bclri r1,%d\n", imm));
560 }
561 else if (IS_IXH1 (insn2))
562 {
563 adjust *= 3;
564 mcore_insn_debug (("MCORE: ix.h r1,r1\n"));
565 }
566 else if (IS_IXW1 (insn2))
567 {
568 adjust *= 5;
569 mcore_insn_debug (("MCORE: ix.w r1,r1\n"));
570 }
571
572 offset += 2;
573 insn2 = get_insn (addr + offset);
574 };
575
576 mcore_insn_debug (("MCORE: done looking for r1 adjusters\n"));
577
578 /* If the next insn adjusts the stack pointer, we keep everything;
579 if not, we scrap it and we've found the end of the prologue. */
580 if (IS_SUB01 (insn2))
581 {
582 addr += offset;
583 framesize += adjust;
584 mcore_insn_debug (("MCORE: found stack adjustment of 0x%x bytes.\n", adjust));
585 mcore_insn_debug (("MCORE: skipping to new address 0x%x\n", addr));
586 mcore_insn_debug (("MCORE: continuing\n"));
587 continue;
588 }
589
590 /* None of these instructions are prologue, so don't touch
591 anything. */
592 mcore_insn_debug (("MCORE: no subu r1,r0, NOT altering framesize.\n"));
593 break;
594 }
595
596 /* This is not a prologue insn, so stop here. */
597 mcore_insn_debug (("MCORE: insn is not a prologue insn -- ending scan\n"));
598 break;
599 }
600
601 mcore_insn_debug (("MCORE: done analyzing prologue\n"));
602 mcore_insn_debug (("MCORE: prologue end = 0x%x\n", addr));
603
604 /* Save everything we have learned about this frame into FI. */
605 if (fi != NULL)
606 {
607 fi->extra_info->framesize = framesize;
608 fi->extra_info->fp_regnum = fp_regnum;
609 fi->extra_info->status = flags;
610
611 /* Fix the frame pointer. When gcc uses r8 as a frame pointer,
612 it is really an arg ptr. We adjust fi->frame to be a "real"
613 frame pointer. */
614 if (fi->next == NULL)
615 {
616 if (fi->extra_info->status & MY_FRAME_IN_SP)
617 fi->frame = read_sp () + framesize;
618 else
619 fi->frame = read_register (fp_regnum) + framesize;
620 }
621
622 /* Note where saved registers are stored. The offsets in REGISTER_OFFSETS
623 are computed relative to the top of the frame. */
624 for (rn = 0; rn < NUM_REGS; rn++)
625 {
626 if (register_offsets[rn] >= 0)
627 {
628 fi->saved_regs[rn] = fi->frame - register_offsets[rn];
629 mcore_insn_debug (("Saved register %s stored at 0x%08x, value=0x%08x\n",
630 mcore_register_names[rn], fi->saved_regs[rn],
631 read_memory_integer (fi->saved_regs[rn], 4)));
632 }
633 }
634 }
635
636 /* Return addr of first non-prologue insn. */
637 return addr;
638 }
639
640 /* Given a GDB frame, determine the address of the calling function's frame.
641 This will be used to create a new GDB frame struct, and then
642 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame. */
643
644 CORE_ADDR
645 mcore_frame_chain (struct frame_info * fi)
646 {
647 struct frame_info *dummy;
648 CORE_ADDR callers_addr;
649
650 /* Analyze the prologue of this function. */
651 if (fi->extra_info->status == 0)
652 mcore_analyze_prologue (fi, 0, 0);
653
654 /* If mcore_analyze_prologue set NO_MORE_FRAMES, quit now. */
655 if (fi->extra_info->status & NO_MORE_FRAMES)
656 return 0;
657
658 /* Now that we've analyzed our prologue, we can start to ask
659 for information about our caller. The easiest way to do
660 this is to analyze our caller's prologue.
661
662 If our caller has a frame pointer, then we need to find
663 the value of that register upon entry to our frame.
664 This value is either in fi->saved_regs[rn] if it's saved,
665 or it's still in a register.
666
667 If our caller does not have a frame pointer, then his frame base
668 is <our base> + -<caller's frame size>. */
669 dummy = analyze_dummy_frame (FRAME_SAVED_PC (fi), fi->frame);
670
671 if (dummy->extra_info->status & MY_FRAME_IN_FP)
672 {
673 int fp = dummy->extra_info->fp_regnum;
674
675 /* Our caller has a frame pointer. */
676 if (fi->saved_regs[fp] != 0)
677 {
678 /* The "FP" was saved on the stack. Don't forget to adjust
679 the "FP" with the framesize to get a real FP. */
680 callers_addr = read_memory_integer (fi->saved_regs[fp], REGISTER_SIZE)
681 + dummy->extra_info->framesize;
682 }
683 else
684 {
685 /* It's still in the register. Don't forget to adjust
686 the "FP" with the framesize to get a real FP. */
687 callers_addr = read_register (fp) + dummy->extra_info->framesize;
688 }
689 }
690 else
691 {
692 /* Our caller does not have a frame pointer. */
693 callers_addr = fi->frame + dummy->extra_info->framesize;
694 }
695
696 return callers_addr;
697 }
698
699 /* Skip the prologue of the function at PC. */
700
701 CORE_ADDR
702 mcore_skip_prologue (CORE_ADDR pc)
703 {
704 CORE_ADDR func_addr, func_end;
705 struct symtab_and_line sal;
706
707 /* If we have line debugging information, then the end of the
708 prologue should be the first assembly instruction of the first
709 source line */
710 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
711 {
712 sal = find_pc_line (func_addr, 0);
713 if (sal.end && sal.end < func_end)
714 return sal.end;
715 }
716
717 return mcore_analyze_prologue (NULL, pc, 1);
718 }
719
720 /* Return the address at which function arguments are offset. */
721 CORE_ADDR
722 mcore_frame_args_address (struct frame_info * fi)
723 {
724 return fi->frame - fi->extra_info->framesize;
725 }
726
727 CORE_ADDR
728 mcore_frame_locals_address (struct frame_info * fi)
729 {
730 return fi->frame - fi->extra_info->framesize;
731 }
732
733 /* Return the frame pointer in use at address PC. */
734
735 void
736 mcore_virtual_frame_pointer (CORE_ADDR pc, int *reg, LONGEST *offset)
737 {
738 struct frame_info *dummy = analyze_dummy_frame (pc, 0);
739 if (dummy->extra_info->status & MY_FRAME_IN_SP)
740 {
741 *reg = SP_REGNUM;
742 *offset = 0;
743 }
744 else
745 {
746 *reg = dummy->extra_info->fp_regnum;
747 *offset = 0;
748 }
749 }
750
751 /* Find the value of register REGNUM in frame FI. */
752
753 CORE_ADDR
754 mcore_find_callers_reg (struct frame_info *fi, int regnum)
755 {
756 for (; fi != NULL; fi = fi->next)
757 {
758 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
759 return deprecated_read_register_dummy (fi->pc, fi->frame, regnum);
760 else if (fi->saved_regs[regnum] != 0)
761 return read_memory_integer (fi->saved_regs[regnum],
762 REGISTER_SIZE);
763 }
764
765 return read_register (regnum);
766 }
767
768 /* Find the saved pc in frame FI. */
769
770 CORE_ADDR
771 mcore_frame_saved_pc (struct frame_info * fi)
772 {
773
774 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
775 return deprecated_read_register_dummy (fi->pc, fi->frame, PC_REGNUM);
776 else
777 return mcore_find_callers_reg (fi, PR_REGNUM);
778 }
779 \f
780 /* INFERIOR FUNCTION CALLS */
781
782 /* This routine gets called when either the user uses the "return"
783 command, or the call dummy breakpoint gets hit. */
784
785 void
786 mcore_pop_frame (void)
787 {
788 int rn;
789 struct frame_info *fi = get_current_frame ();
790
791 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
792 generic_pop_dummy_frame ();
793 else
794 {
795 /* Write out the PC we saved. */
796 write_register (PC_REGNUM, FRAME_SAVED_PC (fi));
797
798 /* Restore any saved registers. */
799 for (rn = 0; rn < NUM_REGS; rn++)
800 {
801 if (fi->saved_regs[rn] != 0)
802 {
803 ULONGEST value;
804
805 value = read_memory_unsigned_integer (fi->saved_regs[rn],
806 REGISTER_SIZE);
807 write_register (rn, value);
808 }
809 }
810
811 /* Actually cut back the stack. */
812 write_register (SP_REGNUM, FRAME_FP (fi));
813 }
814
815 /* Finally, throw away any cached frame information. */
816 flush_cached_frames ();
817 }
818
819 /* Setup arguments and PR for a call to the target. First six arguments
820 go in FIRST_ARGREG -> LAST_ARGREG, subsequent args go on to the stack.
821
822 * Types with lengths greater than REGISTER_SIZE may not be split
823 between registers and the stack, and they must start in an even-numbered
824 register. Subsequent args will go onto the stack.
825
826 * Structs may be split between registers and stack, left-aligned.
827
828 * If the function returns a struct which will not fit into registers (it's
829 more than eight bytes), we must allocate for that, too. Gdb will tell
830 us where this buffer is (STRUCT_ADDR), and we simply place it into
831 FIRST_ARGREG, since the MCORE treats struct returns (of less than eight
832 bytes) as hidden first arguments. */
833
834 CORE_ADDR
835 mcore_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
836 int struct_return, CORE_ADDR struct_addr)
837 {
838 int argreg;
839 int argnum;
840 struct stack_arg
841 {
842 int len;
843 char *val;
844 }
845 *stack_args;
846 int nstack_args = 0;
847
848 stack_args = (struct stack_arg *) alloca (nargs * sizeof (struct stack_arg));
849
850 argreg = FIRST_ARGREG;
851
852 /* Align the stack. This is mostly a nop, but not always. It will be needed
853 if we call a function which has argument overflow. */
854 sp &= ~3;
855
856 /* If this function returns a struct which does not fit in the
857 return registers, we must pass a buffer to the function
858 which it can use to save the return value. */
859 if (struct_return)
860 write_register (argreg++, struct_addr);
861
862 /* FIXME: what about unions? */
863 for (argnum = 0; argnum < nargs; argnum++)
864 {
865 char *val = (char *) VALUE_CONTENTS (args[argnum]);
866 int len = TYPE_LENGTH (VALUE_TYPE (args[argnum]));
867 struct type *type = VALUE_TYPE (args[argnum]);
868 int olen;
869
870 mcore_insn_debug (("MCORE PUSH: argreg=%d; len=%d; %s\n",
871 argreg, len, TYPE_CODE (type) == TYPE_CODE_STRUCT ? "struct" : "not struct"));
872 /* Arguments larger than a register must start in an even
873 numbered register. */
874 olen = len;
875
876 if (TYPE_CODE (type) != TYPE_CODE_STRUCT && len > REGISTER_SIZE && argreg % 2)
877 {
878 mcore_insn_debug (("MCORE PUSH: %d > REGISTER_SIZE: and %s is not even\n",
879 len, mcore_register_names[argreg]));
880 argreg++;
881 }
882
883 if ((argreg <= LAST_ARGREG && len <= (LAST_ARGREG - argreg + 1) * REGISTER_SIZE)
884 || (TYPE_CODE (type) == TYPE_CODE_STRUCT))
885 {
886 /* Something that will fit entirely into registers (or a struct
887 which may be split between registers and stack). */
888 mcore_insn_debug (("MCORE PUSH: arg %d going into regs\n", argnum));
889
890 if (TYPE_CODE (type) == TYPE_CODE_STRUCT && olen < REGISTER_SIZE)
891 {
892 /* Small structs must be right aligned within the register,
893 the most significant bits are undefined. */
894 write_register (argreg, extract_unsigned_integer (val, len));
895 argreg++;
896 len = 0;
897 }
898
899 while (len > 0 && argreg <= LAST_ARGREG)
900 {
901 write_register (argreg, extract_unsigned_integer (val, REGISTER_SIZE));
902 argreg++;
903 val += REGISTER_SIZE;
904 len -= REGISTER_SIZE;
905 }
906
907 /* Any remainder for the stack is noted below... */
908 }
909 else if (TYPE_CODE (VALUE_TYPE (args[argnum])) != TYPE_CODE_STRUCT
910 && len > REGISTER_SIZE)
911 {
912 /* All subsequent args go onto the stack. */
913 mcore_insn_debug (("MCORE PUSH: does not fit into regs, going onto stack\n"));
914 argnum = LAST_ARGREG + 1;
915 }
916
917 if (len > 0)
918 {
919 /* Note that this must be saved onto the stack */
920 mcore_insn_debug (("MCORE PUSH: adding arg %d to stack\n", argnum));
921 stack_args[nstack_args].val = val;
922 stack_args[nstack_args].len = len;
923 nstack_args++;
924 }
925
926 }
927
928 /* We're done with registers and stack allocation. Now do the actual
929 stack pushes. */
930 while (nstack_args--)
931 {
932 sp -= stack_args[nstack_args].len;
933 write_memory (sp, stack_args[nstack_args].val, stack_args[nstack_args].len);
934 }
935
936 /* Return adjusted stack pointer. */
937 return sp;
938 }
939
940 /* Store the return address for the call dummy. For MCore, we've
941 opted to use generic call dummies, so we simply store the
942 CALL_DUMMY_ADDRESS into the PR register (r15). */
943
944 CORE_ADDR
945 mcore_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
946 {
947 write_register (PR_REGNUM, CALL_DUMMY_ADDRESS ());
948 return sp;
949 }
950
951 /* Setting/getting return values from functions.
952
953 The Motorola MCore processors use r2/r3 to return anything
954 not larger than 32 bits. Everything else goes into a caller-
955 supplied buffer, which is passed in via a hidden first
956 argument.
957
958 For gdb, this leaves us two routes, based on what
959 USE_STRUCT_CONVENTION (mcore_use_struct_convention) returns.
960 If this macro returns 1, gdb will call STORE_STRUCT_RETURN and
961 EXTRACT_STRUCT_VALUE_ADDRESS.
962
963 If USE_STRUCT_CONVENTION retruns 0, then gdb uses STORE_RETURN_VALUE
964 and EXTRACT_RETURN_VALUE to store/fetch the functions return value. */
965
966 /* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
967 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
968 and TYPE is the type (which is known to be struct, union or array). */
969
970 int
971 mcore_use_struct_convention (int gcc_p, struct type *type)
972 {
973 return (TYPE_LENGTH (type) > 8);
974 }
975
976 /* Where is the return value saved? For MCore, a pointer to
977 this buffer was passed as a hidden first argument, so
978 just return that address. */
979
980 CORE_ADDR
981 mcore_extract_struct_value_address (char *regbuf)
982 {
983 return extract_address (regbuf + REGISTER_BYTE (FIRST_ARGREG), REGISTER_SIZE);
984 }
985
986 /* Given a function which returns a value of type TYPE, extract the
987 the function's return value and place the result into VALBUF.
988 REGBUF is the register contents of the target. */
989
990 void
991 mcore_extract_return_value (struct type *type, char *regbuf, char *valbuf)
992 {
993 /* Copy the return value (starting) in RETVAL_REGNUM to VALBUF. */
994 /* Only getting the first byte! if len = 1, we need the last byte of
995 the register, not the first. */
996 memcpy (valbuf, regbuf + REGISTER_BYTE (RETVAL_REGNUM) +
997 (TYPE_LENGTH (type) < 4 ? 4 - TYPE_LENGTH (type) : 0), TYPE_LENGTH (type));
998 }
999
1000 /* Store the return value in VALBUF (of type TYPE) where the caller
1001 expects to see it.
1002
1003 Values less than 32 bits are stored in r2, right justified and
1004 sign or zero extended.
1005
1006 Values between 32 and 64 bits are stored in r2 (most
1007 significant word) and r3 (least significant word, left justified).
1008 Note that this includes structures of less than eight bytes, too. */
1009
1010 void
1011 mcore_store_return_value (struct type *type, char *valbuf)
1012 {
1013 int value_size;
1014 int return_size;
1015 int offset;
1016 char *zeros;
1017
1018 value_size = TYPE_LENGTH (type);
1019
1020 /* Return value fits into registers. */
1021 return_size = (value_size + REGISTER_SIZE - 1) & ~(REGISTER_SIZE - 1);
1022 offset = REGISTER_BYTE (RETVAL_REGNUM) + (return_size - value_size);
1023 zeros = alloca (return_size);
1024 memset (zeros, 0, return_size);
1025
1026 write_register_bytes (REGISTER_BYTE (RETVAL_REGNUM), zeros, return_size);
1027 write_register_bytes (offset, valbuf, value_size);
1028 }
1029
1030 /* Initialize our target-dependent "stuff" for this newly created frame.
1031
1032 This includes allocating space for saved registers and analyzing
1033 the prologue of this frame. */
1034
1035 void
1036 mcore_init_extra_frame_info (int fromleaf, struct frame_info *fi)
1037 {
1038 if (fi && fi->next)
1039 fi->pc = FRAME_SAVED_PC (fi->next);
1040
1041 frame_saved_regs_zalloc (fi);
1042
1043 fi->extra_info = (struct frame_extra_info *)
1044 frame_obstack_alloc (sizeof (struct frame_extra_info));
1045 fi->extra_info->status = 0;
1046 fi->extra_info->framesize = 0;
1047
1048 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
1049 {
1050 /* We need to setup fi->frame here because run_stack_dummy gets it wrong
1051 by assuming it's always FP. */
1052 fi->frame = deprecated_read_register_dummy (fi->pc, fi->frame, SP_REGNUM);
1053 }
1054 else
1055 mcore_analyze_prologue (fi, 0, 0);
1056 }
1057
1058 /* Get an insturction from memory. */
1059
1060 static int
1061 get_insn (CORE_ADDR pc)
1062 {
1063 char buf[4];
1064 int status = read_memory_nobpt (pc, buf, 2);
1065 if (status != 0)
1066 return 0;
1067
1068 return extract_unsigned_integer (buf, 2);
1069 }
1070
1071 static struct gdbarch *
1072 mcore_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1073 {
1074 static LONGEST call_dummy_words[7] = { };
1075 struct gdbarch_tdep *tdep = NULL;
1076 struct gdbarch *gdbarch;
1077
1078 /* find a candidate among the list of pre-declared architectures. */
1079 arches = gdbarch_list_lookup_by_info (arches, &info);
1080 if (arches != NULL)
1081 return (arches->gdbarch);
1082
1083 gdbarch = gdbarch_alloc (&info, 0);
1084
1085 /* Registers: */
1086
1087 /* All registers are 32 bits */
1088 set_gdbarch_register_size (gdbarch, MCORE_REG_SIZE);
1089 set_gdbarch_max_register_raw_size (gdbarch, MCORE_REG_SIZE);
1090 set_gdbarch_max_register_virtual_size (gdbarch, MCORE_REG_SIZE);
1091 set_gdbarch_register_name (gdbarch, mcore_register_name);
1092 set_gdbarch_register_virtual_type (gdbarch, mcore_register_virtual_type);
1093 set_gdbarch_register_virtual_size (gdbarch, mcore_register_size);
1094 set_gdbarch_register_raw_size (gdbarch, mcore_register_size);
1095 set_gdbarch_register_byte (gdbarch, mcore_register_byte);
1096 set_gdbarch_register_bytes (gdbarch, MCORE_REG_SIZE * MCORE_NUM_REGS);
1097 set_gdbarch_num_regs (gdbarch, MCORE_NUM_REGS);
1098 set_gdbarch_pc_regnum (gdbarch, 64);
1099 set_gdbarch_sp_regnum (gdbarch, 0);
1100 set_gdbarch_fp_regnum (gdbarch, 0);
1101 set_gdbarch_get_saved_register (gdbarch, generic_unwind_get_saved_register);
1102
1103 /* Call Dummies: */
1104
1105 set_gdbarch_call_dummy_p (gdbarch, 1);
1106 set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
1107 set_gdbarch_call_dummy_words (gdbarch, call_dummy_words);
1108 set_gdbarch_sizeof_call_dummy_words (gdbarch, 0);
1109 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
1110 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
1111 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
1112 set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
1113 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
1114 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
1115 set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
1116 set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy);
1117 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
1118 set_gdbarch_saved_pc_after_call (gdbarch, mcore_saved_pc_after_call);
1119 set_gdbarch_function_start_offset (gdbarch, 0);
1120 set_gdbarch_decr_pc_after_break (gdbarch, 0);
1121 set_gdbarch_breakpoint_from_pc (gdbarch, mcore_breakpoint_from_pc);
1122 set_gdbarch_push_return_address (gdbarch, mcore_push_return_address);
1123 set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
1124 set_gdbarch_push_arguments (gdbarch, mcore_push_arguments);
1125 set_gdbarch_call_dummy_length (gdbarch, 0);
1126
1127 /* Frames: */
1128
1129 set_gdbarch_init_extra_frame_info (gdbarch, mcore_init_extra_frame_info);
1130 set_gdbarch_frame_chain (gdbarch, mcore_frame_chain);
1131 set_gdbarch_frame_chain_valid (gdbarch, generic_func_frame_chain_valid);
1132 set_gdbarch_frame_init_saved_regs (gdbarch, mcore_frame_init_saved_regs);
1133 set_gdbarch_frame_saved_pc (gdbarch, mcore_frame_saved_pc);
1134 set_gdbarch_deprecated_store_return_value (gdbarch, mcore_store_return_value);
1135 set_gdbarch_deprecated_extract_return_value (gdbarch,
1136 mcore_extract_return_value);
1137 set_gdbarch_store_struct_return (gdbarch, mcore_store_struct_return);
1138 set_gdbarch_deprecated_extract_struct_value_address (gdbarch,
1139 mcore_extract_struct_value_address);
1140 set_gdbarch_skip_prologue (gdbarch, mcore_skip_prologue);
1141 set_gdbarch_frame_args_skip (gdbarch, 0);
1142 set_gdbarch_frame_args_address (gdbarch, mcore_frame_args_address);
1143 set_gdbarch_frame_locals_address (gdbarch, mcore_frame_locals_address);
1144 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
1145 set_gdbarch_pop_frame (gdbarch, mcore_pop_frame);
1146 set_gdbarch_virtual_frame_pointer (gdbarch, mcore_virtual_frame_pointer);
1147
1148 /* Misc.: */
1149
1150 /* Stack grows down. */
1151 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1152 set_gdbarch_use_struct_convention (gdbarch, mcore_use_struct_convention);
1153 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
1154 /* MCore will never pass a sturcture by reference. It will always be split
1155 between registers and stack. */
1156 set_gdbarch_reg_struct_has_addr (gdbarch, mcore_reg_struct_has_addr);
1157
1158 return gdbarch;
1159 }
1160
1161 static void
1162 mcore_dump_tdep (struct gdbarch *current_gdbarch, struct ui_file *file)
1163 {
1164
1165 }
1166
1167 void
1168 _initialize_mcore_tdep (void)
1169 {
1170 extern int print_insn_mcore (bfd_vma, disassemble_info *);
1171 gdbarch_register (bfd_arch_mcore, mcore_gdbarch_init, mcore_dump_tdep);
1172 tm_print_insn = print_insn_mcore;
1173
1174 #ifdef MCORE_DEBUG
1175 add_show_from_set (add_set_cmd ("mcoredebug", no_class,
1176 var_boolean, (char *) &mcore_debug,
1177 "Set mcore debugging.\n", &setlist),
1178 &showlist);
1179 #endif
1180 }
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