* config/mcore/tm-mcore.h (REGISTER_BYTES, NUM_REGS, PC_REGNUM)
[deliverable/binutils-gdb.git] / gdb / mcore-tdep.c
1 /* Target-machine dependent code for Motorola MCore for GDB, the GNU debugger
2 Copyright 1999, 2000, 2001 Free Software Foundation, Inc.
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
19
20 #include "defs.h"
21 #include "frame.h"
22 #include "symtab.h"
23 #include "value.h"
24 #include "gdbcmd.h"
25 #include "regcache.h"
26 #include "symfile.h"
27 #include "gdbcore.h"
28 #include "inferior.h"
29 #include "arch-utils.h"
30
31 /* Functions declared and used only in this file */
32
33 static CORE_ADDR mcore_analyze_prologue (struct frame_info *fi, CORE_ADDR pc, int skip_prologue);
34
35 static struct frame_info *analyze_dummy_frame (CORE_ADDR pc, CORE_ADDR frame);
36
37 static int get_insn (CORE_ADDR pc);
38
39 /* Functions exported from this file */
40
41 int mcore_use_struct_convention (int gcc_p, struct type *type);
42
43 void _initialize_mcore (void);
44
45 void mcore_init_extra_frame_info (int fromleaf, struct frame_info *fi);
46
47 CORE_ADDR mcore_frame_saved_pc (struct frame_info *fi);
48
49 CORE_ADDR mcore_find_callers_reg (struct frame_info *fi, int regnum);
50
51 CORE_ADDR mcore_frame_args_address (struct frame_info *fi);
52
53 CORE_ADDR mcore_frame_locals_address (struct frame_info *fi);
54
55 CORE_ADDR mcore_push_return_address (CORE_ADDR pc, CORE_ADDR sp);
56
57 CORE_ADDR mcore_push_arguments (int nargs, struct value ** args, CORE_ADDR sp,
58 int struct_return, CORE_ADDR struct_addr);
59
60 void mcore_pop_frame ();
61
62 CORE_ADDR mcore_skip_prologue (CORE_ADDR pc);
63
64 CORE_ADDR mcore_frame_chain (struct frame_info *fi);
65
66 const unsigned char *mcore_breakpoint_from_pc (CORE_ADDR * bp_addr, int *bp_size);
67
68 int mcore_use_struct_convention (int gcc_p, struct type *type);
69
70 void mcore_store_return_value (struct type *type, char *valbuf);
71
72 CORE_ADDR mcore_extract_struct_value_address (char *regbuf);
73
74 void mcore_extract_return_value (struct type *type, char *regbuf, char *valbuf);
75
76 #ifdef MCORE_DEBUG
77 int mcore_debug = 0;
78 #endif
79
80
81 /* All registers are 4 bytes long. */
82 #define MCORE_REG_SIZE 4
83 #define MCORE_NUM_REGS 65
84
85
86 /* Additional info that we use for managing frames */
87 struct frame_extra_info
88 {
89 /* A generic status word */
90 int status;
91
92 /* Size of this frame */
93 int framesize;
94
95 /* The register that is acting as a frame pointer, if
96 it is being used. This is undefined if status
97 does not contain the flag MY_FRAME_IN_FP. */
98 int fp_regnum;
99 };
100
101 /* frame_extra_info status flags */
102
103 /* The base of the current frame is actually in the stack pointer.
104 This happens when there is no frame pointer (MCore ABI does not
105 require a frame pointer) or when we're stopped in the prologue or
106 epilogue itself. In these cases, mcore_analyze_prologue will need
107 to update fi->frame before returning or analyzing the register
108 save instructions. */
109 #define MY_FRAME_IN_SP 0x1
110
111 /* The base of the current frame is in a frame pointer register.
112 This register is noted in frame_extra_info->fp_regnum.
113
114 Note that the existence of an FP might also indicate that the
115 function has called alloca. */
116 #define MY_FRAME_IN_FP 0x2
117
118 /* This flag is set to indicate that this frame is the top-most
119 frame. This tells frame chain not to bother trying to unwind
120 beyond this frame. */
121 #define NO_MORE_FRAMES 0x4
122
123 /* Instruction macros used for analyzing the prologue */
124 #define IS_SUBI0(x) (((x) & 0xfe0f) == 0x2400) /* subi r0,oimm5 */
125 #define IS_STM(x) (((x) & 0xfff0) == 0x0070) /* stm rf-r15,r0 */
126 #define IS_STWx0(x) (((x) & 0xf00f) == 0x9000) /* stw rz,(r0,disp) */
127 #define IS_STWxy(x) (((x) & 0xf000) == 0x9000) /* stw rx,(ry,disp) */
128 #define IS_MOVx0(x) (((x) & 0xfff0) == 0x1200) /* mov rn,r0 */
129 #define IS_LRW1(x) (((x) & 0xff00) == 0x7100) /* lrw r1,literal */
130 #define IS_MOVI1(x) (((x) & 0xf80f) == 0x6001) /* movi r1,imm7 */
131 #define IS_BGENI1(x) (((x) & 0xfe0f) == 0x3201) /* bgeni r1,imm5 */
132 #define IS_BMASKI1(x) (((x) & 0xfe0f) == 0x2C01) /* bmaski r1,imm5 */
133 #define IS_ADDI1(x) (((x) & 0xfe0f) == 0x2001) /* addi r1,oimm5 */
134 #define IS_SUBI1(x) (((x) & 0xfe0f) == 0x2401) /* subi r1,oimm5 */
135 #define IS_RSUBI1(x) (((x) & 0xfe0f) == 0x2801) /* rsubi r1,imm5 */
136 #define IS_NOT1(x) (((x) & 0xffff) == 0x01f1) /* not r1 */
137 #define IS_ROTLI1(x) (((x) & 0xfe0f) == 0x3801) /* rotli r1,imm5 */
138 #define IS_BSETI1(x) (((x) & 0xfe0f) == 0x3401) /* bseti r1,imm5 */
139 #define IS_BCLRI1(x) (((x) & 0xfe0f) == 0x3001) /* bclri r1,imm5 */
140 #define IS_IXH1(x) (((x) & 0xffff) == 0x1d11) /* ixh r1,r1 */
141 #define IS_IXW1(x) (((x) & 0xffff) == 0x1511) /* ixw r1,r1 */
142 #define IS_SUB01(x) (((x) & 0xffff) == 0x0510) /* subu r0,r1 */
143 #define IS_RTS(x) (((x) & 0xffff) == 0x00cf) /* jmp r15 */
144
145 #define IS_R1_ADJUSTER(x) \
146 (IS_ADDI1(x) || IS_SUBI1(x) || IS_ROTLI1(x) || IS_BSETI1(x) \
147 || IS_BCLRI1(x) || IS_RSUBI1(x) || IS_NOT1(x) \
148 || IS_IXH1(x) || IS_IXW1(x))
149 \f
150
151 #ifdef MCORE_DEBUG
152 static void
153 mcore_dump_insn (char *commnt, CORE_ADDR pc, int insn)
154 {
155 if (mcore_debug)
156 {
157 printf_filtered ("MCORE: %s %08x %08x ",
158 commnt, (unsigned int) pc, (unsigned int) insn);
159 TARGET_PRINT_INSN (pc, &tm_print_insn_info);
160 printf_filtered ("\n");
161 }
162 }
163 #define mcore_insn_debug(args) { if (mcore_debug) printf_filtered args; }
164 #else /* !MCORE_DEBUG */
165 #define mcore_dump_insn(a,b,c) {}
166 #define mcore_insn_debug(args) {}
167 #endif
168
169
170 static struct type *
171 mcore_register_virtual_type (int regnum)
172 {
173 if (regnum < 0 || regnum >= MCORE_NUM_REGS)
174 internal_error (__FILE__, __LINE__,
175 "mcore_register_virtual_type: illegal register number %d",
176 regnum);
177 else
178 return builtin_type_int;
179 }
180
181 static int
182 mcore_register_byte (int regnum)
183 {
184 if (regnum < 0 || regnum >= MCORE_NUM_REGS)
185 internal_error (__FILE__, __LINE__,
186 "mcore_register_byte: illegal register number %d",
187 regnum);
188 else
189 return (regnum * MCORE_REG_SIZE);
190 }
191
192 static int
193 mcore_register_size (int regnum)
194 {
195
196 if (regnum < 0 || regnum >= MCORE_NUM_REGS)
197 internal_error (__FILE__, __LINE__,
198 "mcore_register_size: illegal register number %d",
199 regnum);
200 else
201 return MCORE_REG_SIZE;
202 }
203
204 /* The registers of the Motorola MCore processors */
205
206 static const char *
207 mcore_register_name (int regnum)
208 {
209
210 static char *register_names[] = {
211 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
212 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
213 "ar0", "ar1", "ar2", "ar3", "ar4", "ar5", "ar6", "ar7",
214 "ar8", "ar9", "ar10", "ar11", "ar12", "ar13", "ar14", "ar15",
215 "psr", "vbr", "epsr", "fpsr", "epc", "fpc", "ss0", "ss1",
216 "ss2", "ss3", "ss4", "gcr", "gsr", "cr13", "cr14", "cr15",
217 "cr16", "cr17", "cr18", "cr19", "cr20", "cr21", "cr22", "cr23",
218 "cr24", "cr25", "cr26", "cr27", "cr28", "cr29", "cr30", "cr31",
219 "pc"
220 };
221
222 if (regnum < 0 ||
223 regnum >= sizeof (register_names) / sizeof (register_names[0]))
224 internal_error (__FILE__, __LINE__,
225 "mcore_register_name: illegal register number %d",
226 regnum);
227 else
228 return register_names[regnum];
229 }
230
231 /* Given the address at which to insert a breakpoint (BP_ADDR),
232 what will that breakpoint be?
233
234 For MCore, we have a breakpoint instruction. Since all MCore
235 instructions are 16 bits, this is all we need, regardless of
236 address. bpkt = 0x0000 */
237
238 const unsigned char *
239 mcore_breakpoint_from_pc (CORE_ADDR * bp_addr, int *bp_size)
240 {
241 static char breakpoint[] =
242 {0x00, 0x00};
243 *bp_size = 2;
244 return breakpoint;
245 }
246
247 static CORE_ADDR
248 mcore_saved_pc_after_call (struct frame_info *frame)
249 {
250 return read_register (PR_REGNUM);
251 }
252
253 /* This is currently handled by init_extra_frame_info. */
254 static void
255 mcore_frame_init_saved_regs (struct frame_info *frame)
256 {
257
258 }
259
260 /* This is currently handled by mcore_push_arguments */
261 static void
262 mcore_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
263 {
264
265 }
266
267 /* Helper function for several routines below. This funtion simply
268 sets up a fake, aka dummy, frame (not a _call_ dummy frame) that
269 we can analyze with mcore_analyze_prologue. */
270
271 static struct frame_info *
272 analyze_dummy_frame (CORE_ADDR pc, CORE_ADDR frame)
273 {
274 static struct frame_info *dummy = NULL;
275
276 if (dummy == NULL)
277 {
278 dummy = (struct frame_info *) xmalloc (sizeof (struct frame_info));
279 dummy->saved_regs = (CORE_ADDR *) xmalloc (SIZEOF_FRAME_SAVED_REGS);
280 dummy->extra_info =
281 (struct frame_extra_info *) xmalloc (sizeof (struct frame_extra_info));
282 }
283
284 dummy->next = NULL;
285 dummy->prev = NULL;
286 dummy->pc = pc;
287 dummy->frame = frame;
288 dummy->extra_info->status = 0;
289 dummy->extra_info->framesize = 0;
290 memset (dummy->saved_regs, '\000', SIZEOF_FRAME_SAVED_REGS);
291 mcore_analyze_prologue (dummy, 0, 0);
292 return dummy;
293 }
294
295 /* Function prologues on the Motorola MCore processors consist of:
296
297 - adjustments to the stack pointer (r1 used as scratch register)
298 - store word/multiples that use r0 as the base address
299 - making a copy of r0 into another register (a "frame" pointer)
300
301 Note that the MCore really doesn't have a real frame pointer.
302 Instead, the compiler may copy the SP into a register (usually
303 r8) to act as an arg pointer. For our target-dependent purposes,
304 the frame info's "frame" member will be the beginning of the
305 frame. The SP could, in fact, point below this.
306
307 The prologue ends when an instruction fails to meet either of
308 the first two criteria or when an FP is made. We make a special
309 exception for gcc. When compiling unoptimized code, gcc will
310 setup stack slots. We need to make sure that we skip the filling
311 of these stack slots as much as possible. This is only done
312 when SKIP_PROLOGUE is set, so that it does not mess up
313 backtraces. */
314
315 /* Analyze the prologue of frame FI to determine where registers are saved,
316 the end of the prologue, etc. Return the address of the first line
317 of "real" code (i.e., the end of the prologue). */
318
319 static CORE_ADDR
320 mcore_analyze_prologue (struct frame_info *fi, CORE_ADDR pc, int skip_prologue)
321 {
322 CORE_ADDR func_addr, func_end, addr, stop;
323 CORE_ADDR stack_size;
324 int insn, rn;
325 int status;
326 int fp_regnum = 0; /* dummy, valid when (flags & MY_FRAME_IN_FP) */
327 int flags;
328 int framesize;
329 int register_offsets[NUM_REGS];
330 char *name;
331
332 /* If provided, use the PC in the frame to look up the
333 start of this function. */
334 pc = (fi == NULL ? pc : fi->pc);
335
336 /* Find the start of this function. */
337 status = find_pc_partial_function (pc, &name, &func_addr, &func_end);
338
339 /* If the start of this function could not be found or if the debbuger
340 is stopped at the first instruction of the prologue, do nothing. */
341 if (status == 0)
342 return pc;
343
344 /* If the debugger is entry function, give up. */
345 if (func_addr == entry_point_address ())
346 {
347 if (fi != NULL)
348 fi->extra_info->status |= NO_MORE_FRAMES;
349 return pc;
350 }
351
352 /* At the start of a function, our frame is in the stack pointer. */
353 flags = MY_FRAME_IN_SP;
354
355 /* Start decoding the prologue. We start by checking two special cases:
356
357 1. We're about to return
358 2. We're at the first insn of the prologue.
359
360 If we're about to return, our frame has already been deallocated.
361 If we are stopped at the first instruction of a prologue,
362 then our frame has not yet been set up. */
363
364 /* Get the first insn from memory (all MCore instructions are 16 bits) */
365 mcore_insn_debug (("MCORE: starting prologue decoding\n"));
366 insn = get_insn (pc);
367 mcore_dump_insn ("got 1: ", pc, insn);
368
369 /* Check for return. */
370 if (fi != NULL && IS_RTS (insn))
371 {
372 mcore_insn_debug (("MCORE: got jmp r15"));
373 if (fi->next == NULL)
374 fi->frame = read_sp ();
375 return fi->pc;
376 }
377
378 /* Check for first insn of prologue */
379 if (fi != NULL && fi->pc == func_addr)
380 {
381 if (fi->next == NULL)
382 fi->frame = read_sp ();
383 return fi->pc;
384 }
385
386 /* Figure out where to stop scanning */
387 stop = (fi ? fi->pc : func_end);
388
389 /* Don't walk off the end of the function */
390 stop = (stop > func_end ? func_end : stop);
391
392 /* REGISTER_OFFSETS will contain offsets, from the top of the frame
393 (NOT the frame pointer), for the various saved registers or -1
394 if the register is not saved. */
395 for (rn = 0; rn < NUM_REGS; rn++)
396 register_offsets[rn] = -1;
397
398 /* Analyze the prologue. Things we determine from analyzing the
399 prologue include:
400 * the size of the frame
401 * where saved registers are located (and which are saved)
402 * FP used? */
403 mcore_insn_debug (("MCORE: Scanning prologue: func_addr=0x%x, stop=0x%x\n",
404 (unsigned int) func_addr, (unsigned int) stop));
405
406 framesize = 0;
407 for (addr = func_addr; addr < stop; addr += 2)
408 {
409 /* Get next insn */
410 insn = get_insn (addr);
411 mcore_dump_insn ("got 2: ", addr, insn);
412
413 if (IS_SUBI0 (insn))
414 {
415 int offset = 1 + ((insn >> 4) & 0x1f);
416 mcore_insn_debug (("MCORE: got subi r0,%d; continuing\n", offset));
417 framesize += offset;
418 continue;
419 }
420 else if (IS_STM (insn))
421 {
422 /* Spill register(s) */
423 int offset;
424 int start_register;
425
426 /* BIG WARNING! The MCore ABI does not restrict functions
427 to taking only one stack allocation. Therefore, when
428 we save a register, we record the offset of where it was
429 saved relative to the current framesize. This will
430 then give an offset from the SP upon entry to our
431 function. Remember, framesize is NOT constant until
432 we're done scanning the prologue. */
433 start_register = (insn & 0xf);
434 mcore_insn_debug (("MCORE: got stm r%d-r15,(r0)\n", start_register));
435
436 for (rn = start_register, offset = 0; rn <= 15; rn++, offset += 4)
437 {
438 register_offsets[rn] = framesize - offset;
439 mcore_insn_debug (("MCORE: r%d saved at 0x%x (offset %d)\n", rn,
440 register_offsets[rn], offset));
441 }
442 mcore_insn_debug (("MCORE: continuing\n"));
443 continue;
444 }
445 else if (IS_STWx0 (insn))
446 {
447 /* Spill register: see note for IS_STM above. */
448 int imm;
449
450 rn = (insn >> 8) & 0xf;
451 imm = (insn >> 4) & 0xf;
452 register_offsets[rn] = framesize - (imm << 2);
453 mcore_insn_debug (("MCORE: r%d saved at offset 0x%x\n", rn, register_offsets[rn]));
454 mcore_insn_debug (("MCORE: continuing\n"));
455 continue;
456 }
457 else if (IS_MOVx0 (insn))
458 {
459 /* We have a frame pointer, so this prologue is over. Note
460 the register which is acting as the frame pointer. */
461 flags |= MY_FRAME_IN_FP;
462 flags &= ~MY_FRAME_IN_SP;
463 fp_regnum = insn & 0xf;
464 mcore_insn_debug (("MCORE: Found a frame pointer: r%d\n", fp_regnum));
465
466 /* If we found an FP, we're at the end of the prologue. */
467 mcore_insn_debug (("MCORE: end of prologue\n"));
468 if (skip_prologue)
469 continue;
470
471 /* If we're decoding prologue, stop here. */
472 addr += 2;
473 break;
474 }
475 else if (IS_STWxy (insn) && (flags & MY_FRAME_IN_FP) && ((insn & 0xf) == fp_regnum))
476 {
477 /* Special case. Skip over stack slot allocs, too. */
478 mcore_insn_debug (("MCORE: push arg onto stack.\n"));
479 continue;
480 }
481 else if (IS_LRW1 (insn) || IS_MOVI1 (insn)
482 || IS_BGENI1 (insn) || IS_BMASKI1 (insn))
483 {
484 int adjust = 0;
485 int offset = 0;
486 int insn2;
487
488 mcore_insn_debug (("MCORE: looking at large frame\n"));
489 if (IS_LRW1 (insn))
490 {
491 adjust =
492 read_memory_integer ((addr + 2 + ((insn & 0xff) << 2)) & 0xfffffffc, 4);
493 }
494 else if (IS_MOVI1 (insn))
495 adjust = (insn >> 4) & 0x7f;
496 else if (IS_BGENI1 (insn))
497 adjust = 1 << ((insn >> 4) & 0x1f);
498 else /* IS_BMASKI (insn) */
499 adjust = (1 << (adjust >> 4) & 0x1f) - 1;
500
501 mcore_insn_debug (("MCORE: base framesize=0x%x\n", adjust));
502
503 /* May have zero or more insns which modify r1 */
504 mcore_insn_debug (("MCORE: looking for r1 adjusters...\n"));
505 offset = 2;
506 insn2 = get_insn (addr + offset);
507 while (IS_R1_ADJUSTER (insn2))
508 {
509 int imm;
510
511 imm = (insn2 >> 4) & 0x1f;
512 mcore_dump_insn ("got 3: ", addr + offset, insn);
513 if (IS_ADDI1 (insn2))
514 {
515 adjust += (imm + 1);
516 mcore_insn_debug (("MCORE: addi r1,%d\n", imm + 1));
517 }
518 else if (IS_SUBI1 (insn2))
519 {
520 adjust -= (imm + 1);
521 mcore_insn_debug (("MCORE: subi r1,%d\n", imm + 1));
522 }
523 else if (IS_RSUBI1 (insn2))
524 {
525 adjust = imm - adjust;
526 mcore_insn_debug (("MCORE: rsubi r1,%d\n", imm + 1));
527 }
528 else if (IS_NOT1 (insn2))
529 {
530 adjust = ~adjust;
531 mcore_insn_debug (("MCORE: not r1\n"));
532 }
533 else if (IS_ROTLI1 (insn2))
534 {
535 adjust <<= imm;
536 mcore_insn_debug (("MCORE: rotli r1,%d\n", imm + 1));
537 }
538 else if (IS_BSETI1 (insn2))
539 {
540 adjust |= (1 << imm);
541 mcore_insn_debug (("MCORE: bseti r1,%d\n", imm));
542 }
543 else if (IS_BCLRI1 (insn2))
544 {
545 adjust &= ~(1 << imm);
546 mcore_insn_debug (("MCORE: bclri r1,%d\n", imm));
547 }
548 else if (IS_IXH1 (insn2))
549 {
550 adjust *= 3;
551 mcore_insn_debug (("MCORE: ix.h r1,r1\n"));
552 }
553 else if (IS_IXW1 (insn2))
554 {
555 adjust *= 5;
556 mcore_insn_debug (("MCORE: ix.w r1,r1\n"));
557 }
558
559 offset += 2;
560 insn2 = get_insn (addr + offset);
561 };
562
563 mcore_insn_debug (("MCORE: done looking for r1 adjusters\n"));
564
565 /* If the next insn adjusts the stack pointer, we keep everything;
566 if not, we scrap it and we've found the end of the prologue. */
567 if (IS_SUB01 (insn2))
568 {
569 addr += offset;
570 framesize += adjust;
571 mcore_insn_debug (("MCORE: found stack adjustment of 0x%x bytes.\n", adjust));
572 mcore_insn_debug (("MCORE: skipping to new address 0x%x\n", addr));
573 mcore_insn_debug (("MCORE: continuing\n"));
574 continue;
575 }
576
577 /* None of these instructions are prologue, so don't touch
578 anything. */
579 mcore_insn_debug (("MCORE: no subu r1,r0, NOT altering framesize.\n"));
580 break;
581 }
582
583 /* This is not a prologue insn, so stop here. */
584 mcore_insn_debug (("MCORE: insn is not a prologue insn -- ending scan\n"));
585 break;
586 }
587
588 mcore_insn_debug (("MCORE: done analyzing prologue\n"));
589 mcore_insn_debug (("MCORE: prologue end = 0x%x\n", addr));
590
591 /* Save everything we have learned about this frame into FI. */
592 if (fi != NULL)
593 {
594 fi->extra_info->framesize = framesize;
595 fi->extra_info->fp_regnum = fp_regnum;
596 fi->extra_info->status = flags;
597
598 /* Fix the frame pointer. When gcc uses r8 as a frame pointer,
599 it is really an arg ptr. We adjust fi->frame to be a "real"
600 frame pointer. */
601 if (fi->next == NULL)
602 {
603 if (fi->extra_info->status & MY_FRAME_IN_SP)
604 fi->frame = read_sp () + framesize;
605 else
606 fi->frame = read_register (fp_regnum) + framesize;
607 }
608
609 /* Note where saved registers are stored. The offsets in REGISTER_OFFSETS
610 are computed relative to the top of the frame. */
611 for (rn = 0; rn < NUM_REGS; rn++)
612 {
613 if (register_offsets[rn] >= 0)
614 {
615 fi->saved_regs[rn] = fi->frame - register_offsets[rn];
616 mcore_insn_debug (("Saved register %s stored at 0x%08x, value=0x%08x\n",
617 mcore_register_names[rn], fi->saved_regs[rn],
618 read_memory_integer (fi->saved_regs[rn], 4)));
619 }
620 }
621 }
622
623 /* Return addr of first non-prologue insn. */
624 return addr;
625 }
626
627 /* Given a GDB frame, determine the address of the calling function's frame.
628 This will be used to create a new GDB frame struct, and then
629 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame. */
630
631 CORE_ADDR
632 mcore_frame_chain (struct frame_info * fi)
633 {
634 struct frame_info *dummy;
635 CORE_ADDR callers_addr;
636
637 /* Analyze the prologue of this function. */
638 if (fi->extra_info->status == 0)
639 mcore_analyze_prologue (fi, 0, 0);
640
641 /* If mcore_analyze_prologue set NO_MORE_FRAMES, quit now. */
642 if (fi->extra_info->status & NO_MORE_FRAMES)
643 return 0;
644
645 /* Now that we've analyzed our prologue, we can start to ask
646 for information about our caller. The easiest way to do
647 this is to analyze our caller's prologue.
648
649 If our caller has a frame pointer, then we need to find
650 the value of that register upon entry to our frame.
651 This value is either in fi->saved_regs[rn] if it's saved,
652 or it's still in a register.
653
654 If our caller does not have a frame pointer, then his frame base
655 is <our base> + -<caller's frame size>. */
656 dummy = analyze_dummy_frame (FRAME_SAVED_PC (fi), fi->frame);
657
658 if (dummy->extra_info->status & MY_FRAME_IN_FP)
659 {
660 int fp = dummy->extra_info->fp_regnum;
661
662 /* Our caller has a frame pointer. */
663 if (fi->saved_regs[fp] != 0)
664 {
665 /* The "FP" was saved on the stack. Don't forget to adjust
666 the "FP" with the framesize to get a real FP. */
667 callers_addr = read_memory_integer (fi->saved_regs[fp], REGISTER_SIZE)
668 + dummy->extra_info->framesize;
669 }
670 else
671 {
672 /* It's still in the register. Don't forget to adjust
673 the "FP" with the framesize to get a real FP. */
674 callers_addr = read_register (fp) + dummy->extra_info->framesize;
675 }
676 }
677 else
678 {
679 /* Our caller does not have a frame pointer. */
680 callers_addr = fi->frame + dummy->extra_info->framesize;
681 }
682
683 return callers_addr;
684 }
685
686 /* Skip the prologue of the function at PC. */
687
688 CORE_ADDR
689 mcore_skip_prologue (CORE_ADDR pc)
690 {
691 CORE_ADDR func_addr, func_end;
692 struct symtab_and_line sal;
693
694 /* If we have line debugging information, then the end of the
695 prologue should be the first assembly instruction of the first
696 source line */
697 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
698 {
699 sal = find_pc_line (func_addr, 0);
700 if (sal.end && sal.end < func_end)
701 return sal.end;
702 }
703
704 return mcore_analyze_prologue (NULL, pc, 1);
705 }
706
707 /* Return the address at which function arguments are offset. */
708 CORE_ADDR
709 mcore_frame_args_address (struct frame_info * fi)
710 {
711 return fi->frame - fi->extra_info->framesize;
712 }
713
714 CORE_ADDR
715 mcore_frame_locals_address (struct frame_info * fi)
716 {
717 return fi->frame - fi->extra_info->framesize;
718 }
719
720 /* Return the frame pointer in use at address PC. */
721
722 void
723 mcore_virtual_frame_pointer (CORE_ADDR pc, int *reg, LONGEST *offset)
724 {
725 struct frame_info *dummy = analyze_dummy_frame (pc, 0);
726 if (dummy->extra_info->status & MY_FRAME_IN_SP)
727 {
728 *reg = SP_REGNUM;
729 *offset = 0;
730 }
731 else
732 {
733 *reg = dummy->extra_info->fp_regnum;
734 *offset = 0;
735 }
736 }
737
738 /* Find the value of register REGNUM in frame FI. */
739
740 CORE_ADDR
741 mcore_find_callers_reg (struct frame_info *fi, int regnum)
742 {
743 for (; fi != NULL; fi = fi->next)
744 {
745 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
746 return generic_read_register_dummy (fi->pc, fi->frame, regnum);
747 else if (fi->saved_regs[regnum] != 0)
748 return read_memory_integer (fi->saved_regs[regnum],
749 REGISTER_SIZE);
750 }
751
752 return read_register (regnum);
753 }
754
755 /* Find the saved pc in frame FI. */
756
757 CORE_ADDR
758 mcore_frame_saved_pc (struct frame_info * fi)
759 {
760
761 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
762 return generic_read_register_dummy (fi->pc, fi->frame, PC_REGNUM);
763 else
764 return mcore_find_callers_reg (fi, PR_REGNUM);
765 }
766 \f
767 /* INFERIOR FUNCTION CALLS */
768
769 /* This routine gets called when either the user uses the "return"
770 command, or the call dummy breakpoint gets hit. */
771
772 void
773 mcore_pop_frame ()
774 {
775 int rn;
776 struct frame_info *fi = get_current_frame ();
777
778 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
779 generic_pop_dummy_frame ();
780 else
781 {
782 /* Write out the PC we saved. */
783 write_register (PC_REGNUM, FRAME_SAVED_PC (fi));
784
785 /* Restore any saved registers. */
786 for (rn = 0; rn < NUM_REGS; rn++)
787 {
788 if (fi->saved_regs[rn] != 0)
789 {
790 ULONGEST value;
791
792 value = read_memory_unsigned_integer (fi->saved_regs[rn],
793 REGISTER_SIZE);
794 write_register (rn, value);
795 }
796 }
797
798 /* Actually cut back the stack. */
799 write_register (SP_REGNUM, FRAME_FP (fi));
800 }
801
802 /* Finally, throw away any cached frame information. */
803 flush_cached_frames ();
804 }
805
806 /* Setup arguments and PR for a call to the target. First six arguments
807 go in FIRST_ARGREG -> LAST_ARGREG, subsequent args go on to the stack.
808
809 * Types with lengths greater than REGISTER_SIZE may not be split
810 between registers and the stack, and they must start in an even-numbered
811 register. Subsequent args will go onto the stack.
812
813 * Structs may be split between registers and stack, left-aligned.
814
815 * If the function returns a struct which will not fit into registers (it's
816 more than eight bytes), we must allocate for that, too. Gdb will tell
817 us where this buffer is (STRUCT_ADDR), and we simply place it into
818 FIRST_ARGREG, since the MCORE treats struct returns (of less than eight
819 bytes) as hidden first arguments. */
820
821 CORE_ADDR
822 mcore_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
823 int struct_return, CORE_ADDR struct_addr)
824 {
825 int argreg;
826 int argnum;
827 struct stack_arg
828 {
829 int len;
830 char *val;
831 }
832 *stack_args;
833 int nstack_args = 0;
834
835 stack_args = (struct stack_arg *) alloca (nargs * sizeof (struct stack_arg));
836
837 argreg = FIRST_ARGREG;
838
839 /* Align the stack. This is mostly a nop, but not always. It will be needed
840 if we call a function which has argument overflow. */
841 sp &= ~3;
842
843 /* If this function returns a struct which does not fit in the
844 return registers, we must pass a buffer to the function
845 which it can use to save the return value. */
846 if (struct_return)
847 write_register (argreg++, struct_addr);
848
849 /* FIXME: what about unions? */
850 for (argnum = 0; argnum < nargs; argnum++)
851 {
852 char *val = (char *) VALUE_CONTENTS (args[argnum]);
853 int len = TYPE_LENGTH (VALUE_TYPE (args[argnum]));
854 struct type *type = VALUE_TYPE (args[argnum]);
855 int olen;
856
857 mcore_insn_debug (("MCORE PUSH: argreg=%d; len=%d; %s\n",
858 argreg, len, TYPE_CODE (type) == TYPE_CODE_STRUCT ? "struct" : "not struct"));
859 /* Arguments larger than a register must start in an even
860 numbered register. */
861 olen = len;
862
863 if (TYPE_CODE (type) != TYPE_CODE_STRUCT && len > REGISTER_SIZE && argreg % 2)
864 {
865 mcore_insn_debug (("MCORE PUSH: %d > REGISTER_SIZE: and %s is not even\n",
866 len, mcore_register_names[argreg]));
867 argreg++;
868 }
869
870 if ((argreg <= LAST_ARGREG && len <= (LAST_ARGREG - argreg + 1) * REGISTER_SIZE)
871 || (TYPE_CODE (type) == TYPE_CODE_STRUCT))
872 {
873 /* Something that will fit entirely into registers (or a struct
874 which may be split between registers and stack). */
875 mcore_insn_debug (("MCORE PUSH: arg %d going into regs\n", argnum));
876
877 if (TYPE_CODE (type) == TYPE_CODE_STRUCT && olen < REGISTER_SIZE)
878 {
879 /* Small structs must be right aligned within the register,
880 the most significant bits are undefined. */
881 write_register (argreg, extract_unsigned_integer (val, len));
882 argreg++;
883 len = 0;
884 }
885
886 while (len > 0 && argreg <= LAST_ARGREG)
887 {
888 write_register (argreg, extract_unsigned_integer (val, REGISTER_SIZE));
889 argreg++;
890 val += REGISTER_SIZE;
891 len -= REGISTER_SIZE;
892 }
893
894 /* Any remainder for the stack is noted below... */
895 }
896 else if (TYPE_CODE (VALUE_TYPE (args[argnum])) != TYPE_CODE_STRUCT
897 && len > REGISTER_SIZE)
898 {
899 /* All subsequent args go onto the stack. */
900 mcore_insn_debug (("MCORE PUSH: does not fit into regs, going onto stack\n"));
901 argnum = LAST_ARGREG + 1;
902 }
903
904 if (len > 0)
905 {
906 /* Note that this must be saved onto the stack */
907 mcore_insn_debug (("MCORE PUSH: adding arg %d to stack\n", argnum));
908 stack_args[nstack_args].val = val;
909 stack_args[nstack_args].len = len;
910 nstack_args++;
911 }
912
913 }
914
915 /* We're done with registers and stack allocation. Now do the actual
916 stack pushes. */
917 while (nstack_args--)
918 {
919 sp -= stack_args[nstack_args].len;
920 write_memory (sp, stack_args[nstack_args].val, stack_args[nstack_args].len);
921 }
922
923 /* Return adjusted stack pointer. */
924 return sp;
925 }
926
927 /* Store the return address for the call dummy. For MCore, we've
928 opted to use generic call dummies, so we simply store the
929 CALL_DUMMY_ADDRESS into the PR register (r15). */
930
931 CORE_ADDR
932 mcore_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
933 {
934 write_register (PR_REGNUM, CALL_DUMMY_ADDRESS ());
935 return sp;
936 }
937
938 /* Setting/getting return values from functions.
939
940 The Motorola MCore processors use r2/r3 to return anything
941 not larger than 32 bits. Everything else goes into a caller-
942 supplied buffer, which is passed in via a hidden first
943 argument.
944
945 For gdb, this leaves us two routes, based on what
946 USE_STRUCT_CONVENTION (mcore_use_struct_convention) returns.
947 If this macro returns 1, gdb will call STORE_STRUCT_RETURN and
948 EXTRACT_STRUCT_VALUE_ADDRESS.
949
950 If USE_STRUCT_CONVENTION retruns 0, then gdb uses STORE_RETURN_VALUE
951 and EXTRACT_RETURN_VALUE to store/fetch the functions return value. */
952
953 /* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
954 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
955 and TYPE is the type (which is known to be struct, union or array). */
956
957 int
958 mcore_use_struct_convention (int gcc_p, struct type *type)
959 {
960 return (TYPE_LENGTH (type) > 8);
961 }
962
963 /* Where is the return value saved? For MCore, a pointer to
964 this buffer was passed as a hidden first argument, so
965 just return that address. */
966
967 CORE_ADDR
968 mcore_extract_struct_value_address (char *regbuf)
969 {
970 return extract_address (regbuf + REGISTER_BYTE (FIRST_ARGREG), REGISTER_SIZE);
971 }
972
973 /* Given a function which returns a value of type TYPE, extract the
974 the function's return value and place the result into VALBUF.
975 REGBUF is the register contents of the target. */
976
977 void
978 mcore_extract_return_value (struct type *type, char *regbuf, char *valbuf)
979 {
980 /* Copy the return value (starting) in RETVAL_REGNUM to VALBUF. */
981 /* Only getting the first byte! if len = 1, we need the last byte of
982 the register, not the first. */
983 memcpy (valbuf, regbuf + REGISTER_BYTE (RETVAL_REGNUM) +
984 (TYPE_LENGTH (type) < 4 ? 4 - TYPE_LENGTH (type) : 0), TYPE_LENGTH (type));
985 }
986
987 /* Store the return value in VALBUF (of type TYPE) where the caller
988 expects to see it.
989
990 Values less than 32 bits are stored in r2, right justified and
991 sign or zero extended.
992
993 Values between 32 and 64 bits are stored in r2 (most
994 significant word) and r3 (least significant word, left justified).
995 Note that this includes structures of less than eight bytes, too. */
996
997 void
998 mcore_store_return_value (struct type *type, char *valbuf)
999 {
1000 int value_size;
1001 int return_size;
1002 int offset;
1003 char *zeros;
1004
1005 value_size = TYPE_LENGTH (type);
1006
1007 /* Return value fits into registers. */
1008 return_size = (value_size + REGISTER_SIZE - 1) & ~(REGISTER_SIZE - 1);
1009 offset = REGISTER_BYTE (RETVAL_REGNUM) + (return_size - value_size);
1010 zeros = alloca (return_size);
1011 memset (zeros, 0, return_size);
1012
1013 write_register_bytes (REGISTER_BYTE (RETVAL_REGNUM), zeros, return_size);
1014 write_register_bytes (offset, valbuf, value_size);
1015 }
1016
1017 /* Initialize our target-dependent "stuff" for this newly created frame.
1018
1019 This includes allocating space for saved registers and analyzing
1020 the prologue of this frame. */
1021
1022 void
1023 mcore_init_extra_frame_info (int fromleaf, struct frame_info *fi)
1024 {
1025 if (fi && fi->next)
1026 fi->pc = FRAME_SAVED_PC (fi->next);
1027
1028 frame_saved_regs_zalloc (fi);
1029
1030 fi->extra_info = (struct frame_extra_info *)
1031 frame_obstack_alloc (sizeof (struct frame_extra_info));
1032 fi->extra_info->status = 0;
1033 fi->extra_info->framesize = 0;
1034
1035 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
1036 {
1037 /* We need to setup fi->frame here because run_stack_dummy gets it wrong
1038 by assuming it's always FP. */
1039 fi->frame = generic_read_register_dummy (fi->pc, fi->frame, SP_REGNUM);
1040 }
1041 else
1042 mcore_analyze_prologue (fi, 0, 0);
1043 }
1044
1045 /* Get an insturction from memory. */
1046
1047 static int
1048 get_insn (CORE_ADDR pc)
1049 {
1050 char buf[4];
1051 int status = read_memory_nobpt (pc, buf, 2);
1052 if (status != 0)
1053 return 0;
1054
1055 return extract_unsigned_integer (buf, 2);
1056 }
1057
1058 static struct gdbarch *
1059 mcore_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1060 {
1061 static LONGEST call_dummy_words[7] = { };
1062 struct gdbarch_tdep *tdep = NULL;
1063 struct gdbarch *gdbarch;
1064
1065 /* find a candidate among the list of pre-declared architectures. */
1066 arches = gdbarch_list_lookup_by_info (arches, &info);
1067 if (arches != NULL)
1068 return (arches->gdbarch);
1069
1070 gdbarch = gdbarch_alloc (&info, 0);
1071
1072 /* Registers: */
1073
1074 /* All registers are 32 bits */
1075 set_gdbarch_register_size (gdbarch, MCORE_REG_SIZE);
1076 set_gdbarch_max_register_raw_size (gdbarch, MCORE_REG_SIZE);
1077 set_gdbarch_max_register_virtual_size (gdbarch, MCORE_REG_SIZE);
1078 set_gdbarch_register_name (gdbarch, mcore_register_name);
1079 set_gdbarch_register_virtual_type (gdbarch, mcore_register_virtual_type);
1080 set_gdbarch_register_virtual_size (gdbarch, mcore_register_size);
1081 set_gdbarch_register_raw_size (gdbarch, mcore_register_size);
1082 set_gdbarch_register_byte (gdbarch, mcore_register_byte);
1083 set_gdbarch_register_bytes (gdbarch, MCORE_REG_SIZE * MCORE_NUM_REGS);
1084 set_gdbarch_num_regs (gdbarch, MCORE_NUM_REGS);
1085 set_gdbarch_pc_regnum (gdbarch, 64);
1086 set_gdbarch_sp_regnum (gdbarch, 0);
1087 set_gdbarch_fp_regnum (gdbarch, 0);
1088
1089 /* Call Dummies: */
1090
1091 set_gdbarch_call_dummy_p (gdbarch, 1);
1092 set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
1093 set_gdbarch_call_dummy_words (gdbarch, call_dummy_words);
1094 set_gdbarch_sizeof_call_dummy_words (gdbarch, 0);
1095 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
1096 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
1097 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
1098 set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
1099 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
1100 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
1101 set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
1102 set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy);
1103 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
1104 set_gdbarch_saved_pc_after_call (gdbarch, mcore_saved_pc_after_call);
1105 set_gdbarch_function_start_offset (gdbarch, 0);
1106 set_gdbarch_decr_pc_after_break (gdbarch, 0);
1107 set_gdbarch_breakpoint_from_pc (gdbarch, mcore_breakpoint_from_pc);
1108 set_gdbarch_push_return_address (gdbarch, mcore_push_return_address);
1109 set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
1110 set_gdbarch_push_arguments (gdbarch, mcore_push_arguments);
1111
1112 /* Frames: */
1113
1114 set_gdbarch_init_extra_frame_info (gdbarch, mcore_init_extra_frame_info);
1115 set_gdbarch_frame_chain (gdbarch, mcore_frame_chain);
1116 set_gdbarch_frame_chain_valid (gdbarch, generic_file_frame_chain_valid);
1117 set_gdbarch_frame_init_saved_regs (gdbarch, mcore_frame_init_saved_regs);
1118 set_gdbarch_frame_saved_pc (gdbarch, mcore_frame_saved_pc);
1119 set_gdbarch_store_return_value (gdbarch, mcore_store_return_value);
1120 set_gdbarch_deprecated_extract_return_value (gdbarch,
1121 mcore_extract_return_value);
1122 set_gdbarch_store_struct_return (gdbarch, mcore_store_struct_return);
1123 set_gdbarch_deprecated_extract_struct_value_address (gdbarch,
1124 mcore_extract_struct_value_address);
1125 set_gdbarch_skip_prologue (gdbarch, mcore_skip_prologue);
1126 set_gdbarch_frame_args_skip (gdbarch, 0);
1127 set_gdbarch_frame_args_address (gdbarch, mcore_frame_args_address);
1128 set_gdbarch_frame_locals_address (gdbarch, mcore_frame_locals_address);
1129 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
1130 set_gdbarch_pop_frame (gdbarch, mcore_pop_frame);
1131
1132 /* Misc.: */
1133
1134 /* Stack grows down. */
1135 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1136
1137 return gdbarch;
1138 }
1139
1140 static void
1141 mcore_dump_tdep (struct gdbarch *current_gdbarch, struct ui_file *file)
1142 {
1143
1144 }
1145
1146 void
1147 _initialize_mcore_tdep (void)
1148 {
1149 extern int print_insn_mcore (bfd_vma, disassemble_info *);
1150 gdbarch_register (bfd_arch_mcore, mcore_gdbarch_init, mcore_dump_tdep);
1151 tm_print_insn = print_insn_mcore;
1152
1153 #ifdef MCORE_DEBUG
1154 add_show_from_set (add_set_cmd ("mcoredebug", no_class,
1155 var_boolean, (char *) &mcore_debug,
1156 "Set mcore debugging.\n", &setlist),
1157 &showlist);
1158 #endif
1159 }
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