gdb/mips-irix-tdep.c

   1 /* Target-dependent code for the MIPS architecture running on IRIX,
   2    for GDB, the GNU Debugger.
   3
   4    Copyright (C) 2002-2013 Free Software Foundation, Inc.
   5
   6    This file is part of GDB.
   7
   8    This program is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 3 of the License, or
  11    (at your option) any later version.
  12
  13    This program is distributed in the hope that it will be useful,
  14    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16    GNU General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  20
  21 #include "defs.h"
  22 #include "osabi.h"
  23 #include "gdb_string.h"
  24 #include "solib.h"
  25 #include "solib-irix.h"
  26 #include "elf-bfd.h"
  27 #include "mips-tdep.h"
  28 #include "trad-frame.h"
  29 #include "tramp-frame.h"
  30
  31 static void
  32 mips_irix_elf_osabi_sniff_abi_tag_sections (bfd *abfd, asection *sect,
  33                                             void *obj)
  34 {
  35   enum gdb_osabi *os_ident_ptr = obj;
  36   const char *name;
  37   unsigned int sectsize;
  38
  39   name = bfd_get_section_name (abfd, sect);
  40   sectsize = bfd_section_size (abfd, sect);
  41
  42   if (strncmp (name, ".MIPS.", 6) == 0 && sectsize > 0)
  43     {
  44       /* The presence of a section named with a ".MIPS." prefix is
  45          indicative of an IRIX binary.  */
  46       *os_ident_ptr = GDB_OSABI_IRIX;
  47     }
  48 }
  49
  50 static enum gdb_osabi
  51 mips_irix_elf_osabi_sniffer (bfd *abfd)
  52 {
  53   unsigned int elfosabi;
  54   enum gdb_osabi osabi = GDB_OSABI_UNKNOWN;
  55
  56   /* If the generic sniffer gets a hit, return and let other sniffers
  57      get a crack at it.  */
  58   bfd_map_over_sections (abfd,
  59                          generic_elf_osabi_sniff_abi_tag_sections,
  60                          &osabi);
  61   if (osabi != GDB_OSABI_UNKNOWN)
  62     return GDB_OSABI_UNKNOWN;
  63
  64   elfosabi = elf_elfheader (abfd)->e_ident[EI_OSABI];
  65
  66   if (elfosabi == ELFOSABI_NONE)
  67     {
  68       /* When elfosabi is ELFOSABI_NONE (0), then the ELF structures in the
  69          file are conforming to the base specification for that machine
  70          (there are no OS-specific extensions).  In order to determine the
  71          real OS in use we must look for OS notes that have been added.
  72
  73          For IRIX, we simply look for sections named with .MIPS. as
  74          prefixes.  */
  75       bfd_map_over_sections (abfd,
  76                              mips_irix_elf_osabi_sniff_abi_tag_sections,
  77                              &osabi);
  78     }
  79   return osabi;
  80 }
  81
  82 /* Unwinding past the signal handler on mips-irix.
  83
  84    Note: The following has only been tested with N32, but can probably
  85          be made to work with a small number of adjustments.
  86
  87    On mips-irix, the sigcontext_t structure is stored at the base
  88    of the frame established by the _sigtramp function.  The definition
  89    of this structure can be found in <sys/signal.h> (comments have been
  90    C++'ified to avoid a collision with the C-style comment delimiters
  91    used by this comment):
  92
  93       typedef struct sigcontext {
  94         __uint32_t      sc_regmask;     // regs to restore in sigcleanup
  95         __uint32_t      sc_status;      // cp0 status register
  96         __uint64_t      sc_pc;          // pc at time of signal
  97         // General purpose registers
  98         __uint64_t      sc_regs[32];    // processor regs 0 to 31
  99         // Floating point coprocessor state
 100         __uint64_t      sc_fpregs[32];  // fp regs 0 to 31
 101         __uint32_t      sc_ownedfp;     // fp has been used
 102         __uint32_t      sc_fpc_csr;     // fpu control and status reg
 103         __uint32_t      sc_fpc_eir;     // fpu exception instruction reg
 104                                         // implementation/revision
 105         __uint32_t      sc_ssflags;     // signal stack state to restore
 106         __uint64_t      sc_mdhi;        // Multiplier hi and low regs
 107         __uint64_t      sc_mdlo;
 108         // System coprocessor registers at time of signal
 109         __uint64_t      sc_cause;       // cp0 cause register
 110         __uint64_t      sc_badvaddr;    // cp0 bad virtual address
 111         __uint64_t      sc_triggersave; // state of graphics trigger (SGI)
 112         sigset_t        sc_sigset;      // signal mask to restore
 113         __uint64_t      sc_fp_rounded_result;   // for Ieee 754 support
 114         __uint64_t      sc_pad[31];
 115       } sigcontext_t;
 116
 117    The following macros provide the offset of some of the fields
 118    used to retrieve the value of the registers before the signal
 119    was raised.  */
 120
 121 /* The size of the sigtramp frame.  The sigtramp frame base can then
 122    be computed by adding this size to the SP.  */
 123 #define SIGTRAMP_FRAME_SIZE 48
 124 /* The offset in sigcontext_t where the PC is saved.  */
 125 #define SIGCONTEXT_PC_OFF 8
 126 /* The offset in sigcontext_t where the GP registers are saved.  */
 127 #define SIGCONTEXT_REGS_OFF (SIGCONTEXT_PC_OFF + 8)
 128 /* The offset in sigcontext_t where the FP regsiters are saved.  */
 129 #define SIGCONTEXT_FPREGS_OFF (SIGCONTEXT_REGS_OFF + 32 * 8)
 130 /* The offset in sigcontext_t where the FP CSR register is saved.  */
 131 #define SIGCONTEXT_FPCSR_OFF (SIGCONTEXT_FPREGS_OFF + 32 * 8 + 4)
 132 /* The offset in sigcontext_t where the multiplier hi register is saved.  */
 133 #define SIGCONTEXT_HI_OFF (SIGCONTEXT_FPCSR_OFF + 2 * 4)
 134 /* The offset in sigcontext_t where the multiplier lo register is saved.  */
 135 #define SIGCONTEXT_LO_OFF (SIGCONTEXT_HI_OFF + 4)
 136
 137 /* Implement the "init" routine in struct tramp_frame for the N32 ABI
 138    on mips-irix.  */
 139 static void
 140 mips_irix_n32_tramp_frame_init (const struct tramp_frame *self,
 141                                 struct frame_info *this_frame,
 142                                 struct trad_frame_cache *this_cache,
 143                                 CORE_ADDR func)
 144 {
 145   struct gdbarch *gdbarch = get_frame_arch (this_frame);
 146   const int num_regs = gdbarch_num_regs (gdbarch);
 147   int sp_cooked_regno = num_regs + MIPS_SP_REGNUM;
 148   const CORE_ADDR sp = get_frame_register_signed (this_frame, sp_cooked_regno);
 149   const CORE_ADDR sigcontext_base = sp + 48;
 150   const struct mips_regnum *regs = mips_regnum (gdbarch);
 151   int ireg;
 152
 153   trad_frame_set_reg_addr (this_cache, regs->pc + gdbarch_num_regs (gdbarch),
 154                            sigcontext_base + SIGCONTEXT_PC_OFF);
 155
 156   for (ireg = 1; ireg < 32; ireg++)
 157     trad_frame_set_reg_addr (this_cache, ireg + MIPS_ZERO_REGNUM + num_regs,
 158                              sigcontext_base + SIGCONTEXT_REGS_OFF + ireg * 8);
 159
 160   for (ireg = 0; ireg < 32; ireg++)
 161     trad_frame_set_reg_addr (this_cache, ireg + regs->fp0 + num_regs,
 162                              sigcontext_base + SIGCONTEXT_FPREGS_OFF
 163                                + ireg * 8);
 164
 165   trad_frame_set_reg_addr (this_cache, regs->fp_control_status + num_regs,
 166                            sigcontext_base + SIGCONTEXT_FPCSR_OFF);
 167
 168   trad_frame_set_reg_addr (this_cache, regs->hi + num_regs,
 169                            sigcontext_base + SIGCONTEXT_HI_OFF);
 170
 171   trad_frame_set_reg_addr (this_cache, regs->lo + num_regs,
 172                            sigcontext_base + SIGCONTEXT_LO_OFF);
 173
 174   trad_frame_set_id (this_cache, frame_id_build (sigcontext_base, func));
 175 }
 176
 177 /* The tramp_frame structure describing sigtramp frames on mips-irix N32.
 178
 179    Note that the list of instructions below is pretty much a pure dump
 180    of function _sigtramp on mips-irix.  A few instructions are actually
 181    not tested (mask set to 0), because a portion of these instructions
 182    contain an address which changes due to relocation.  We could use
 183    a smarter mask that checks the instrutction code alone, but given
 184    the number of instructions already being checked, this seemed
 185    unnecessary.  */
 186
 187 static const struct tramp_frame mips_irix_n32_tramp_frame =
 188 {
 189   SIGTRAMP_FRAME,
 190   4,
 191   {
 192    { 0x3c0c8000, -1 }, /*    lui     t0,0x8000 */
 193    { 0x27bdffd0, -1 }, /*    addiu   sp,sp,-48 */
 194    { 0x008c6024, -1 }, /*    and     t0,a0,t0 */
 195    { 0xffa40018, -1 }, /*    sd      a0,24(sp) */
 196    { 0x00000000,  0 }, /*    beqz    t0,0xfaefcb8 <_sigtramp+40> */
 197    { 0xffa60028, -1 }, /*    sd      a2,40(sp) */
 198    { 0x01806027, -1 }, /*    nor     t0,t0,zero */
 199    { 0xffa00020, -1 }, /*    sd      zero,32(sp) */
 200    { 0x00000000,  0 }, /*    b       0xfaefcbc <_sigtramp+44> */
 201    { 0x008c2024, -1 }, /*    and     a0,a0,t0 */
 202    { 0xffa60020, -1 }, /*    sd      a2,32(sp) */
 203    { 0x03e0c025, -1 }, /*    move    t8,ra */
 204    { 0x00000000,  0 }, /*    bal     0xfaefcc8 <_sigtramp+56> */
 205    { 0x00000000, -1 }, /*    nop */
 206    { 0x3c0c0007, -1 }, /*    lui     t0,0x7 */
 207    { 0x00e0c825, -1 }, /*    move    t9,a3 */
 208    { 0x658c80fc, -1 }, /*    daddiu  t0,t0,-32516 */
 209    { 0x019f602d, -1 }, /*    daddu   t0,t0,ra */
 210    { 0x0300f825, -1 }, /*    move    ra,t8 */
 211    { 0x8d8c9880, -1 }, /*    lw      t0,-26496(t0) */
 212    { 0x8d8c0000, -1 }, /*    lw      t0,0(t0) */
 213    { 0x8d8d0000, -1 }, /*    lw      t1,0(t0) */
 214    { 0xffac0008, -1 }, /*    sd      t0,8(sp) */
 215    { 0x0320f809, -1 }, /*    jalr    t9 */
 216    { 0xffad0010, -1 }, /*    sd      t1,16(sp) */
 217    { 0xdfad0010, -1 }, /*    ld      t1,16(sp) */
 218    { 0xdfac0008, -1 }, /*    ld      t0,8(sp) */
 219    { 0xad8d0000, -1 }, /*    sw      t1,0(t0) */
 220    { 0xdfa40020, -1 }, /*    ld      a0,32(sp) */
 221    { 0xdfa50028, -1 }, /*    ld      a1,40(sp) */
 222    { 0xdfa60018, -1 }, /*    ld      a2,24(sp) */
 223    { 0x24020440, -1 }, /*    li      v0,1088 */
 224    { 0x0000000c, -1 }, /*    syscall */
 225    { TRAMP_SENTINEL_INSN, -1 }
 226   },
 227   mips_irix_n32_tramp_frame_init
 228 };
 229
 230 /* Implement the "init" routine in struct tramp_frame for the stack-based
 231    trampolines used on mips-irix.  */
 232
 233 static void
 234 mips_irix_n32_stack_tramp_frame_init (const struct tramp_frame *self,
 235                                       struct frame_info *this_frame,
 236                                       struct trad_frame_cache *this_cache,
 237                                       CORE_ADDR func)
 238 {
 239   struct gdbarch *gdbarch = get_frame_arch (this_frame);
 240   const int num_regs = gdbarch_num_regs (gdbarch);
 241   int sp_cooked_regno = num_regs + MIPS_SP_REGNUM;
 242   const CORE_ADDR sp = get_frame_register_signed (this_frame, sp_cooked_regno);
 243
 244   /* The previous frame's PC is stored in RA.  */
 245   trad_frame_set_reg_realreg (this_cache, gdbarch_pc_regnum (gdbarch),
 246                               num_regs + MIPS_RA_REGNUM);
 247
 248   trad_frame_set_id (this_cache, frame_id_build (sp, func));
 249 }
 250
 251 /* A tramp_frame structure describing the stack-based trampoline
 252    used on mips-irix.  These trampolines are created on the stack
 253    before being called.  */
 254
 255 static const struct tramp_frame mips_irix_n32_stack_tramp_frame =
 256 {
 257   SIGTRAMP_FRAME,
 258   4,
 259   {
 260    { 0x8f210000, 0xffff0000 },  /* lw     at, N(t9) */
 261    { 0x8f2f0000, 0xffff0000 },  /* lw     t3, M(t9) */
 262    { 0x00200008, 0xffffffff },  /* jr     at        */
 263    { 0x0020c82d, 0xffffffff },  /* move   t9, at    */
 264    { TRAMP_SENTINEL_INSN, -1 }
 265   },
 266   mips_irix_n32_stack_tramp_frame_init
 267 };
 268
 269 static void
 270 mips_irix_init_abi (struct gdbarch_info info,
 271                     struct gdbarch *gdbarch)
 272 {
 273   set_solib_ops (gdbarch, &irix_so_ops);
 274   tramp_frame_prepend_unwinder (gdbarch, &mips_irix_n32_stack_tramp_frame);
 275   tramp_frame_prepend_unwinder (gdbarch, &mips_irix_n32_tramp_frame);
 276 }
 277
 278 /* Provide a prototype to silence -Wmissing-prototypes.  */
 279 extern initialize_file_ftype _initialize_mips_irix_tdep;
 280
 281 void
 282 _initialize_mips_irix_tdep (void)
 283 {
 284   /* Register an ELF OS ABI sniffer for IRIX binaries.  */
 285   gdbarch_register_osabi_sniffer (bfd_arch_mips,
 286                                   bfd_target_elf_flavour,
 287                                   mips_irix_elf_osabi_sniffer);
 288
 289   gdbarch_register_osabi (bfd_arch_mips, 0, GDB_OSABI_IRIX,
 290                           mips_irix_init_abi);
 291 }