1 /* Native-dependent code for GNU/Linux on MIPS processors.
3 Copyright (C) 2001-2018 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
24 #include "mips-tdep.h"
27 #include "linux-nat-trad.h"
28 #include "mips-linux-tdep.h"
29 #include "target-descriptions.h"
31 #include "gdb_proc_service.h"
35 #include "nat/gdb_ptrace.h"
36 #include <asm/ptrace.h>
37 #include "inf-ptrace.h"
39 #include "nat/mips-linux-watch.h"
41 #ifndef PTRACE_GET_THREAD_AREA
42 #define PTRACE_GET_THREAD_AREA 25
45 class mips_linux_nat_target final
: public linux_nat_trad_target
48 /* Add our register access methods. */
49 void fetch_registers (struct regcache
*, int) override
;
50 void store_registers (struct regcache
*, int) override
;
52 void close () override
;
54 int can_use_hw_breakpoint (enum bptype
, int, int) override
;
56 int remove_watchpoint (CORE_ADDR
, int, enum target_hw_bp_type
,
57 struct expression
*) override
;
59 int insert_watchpoint (CORE_ADDR
, int, enum target_hw_bp_type
,
60 struct expression
*) override
;
62 bool stopped_by_watchpoint () override
;
64 bool stopped_data_address (CORE_ADDR
*) override
;
66 int region_ok_for_hw_watchpoint (CORE_ADDR
, int) override
;
68 const struct target_desc
*read_description () override
;
71 /* Override linux_nat_trad_target methods. */
72 CORE_ADDR
register_u_offset (struct gdbarch
*gdbarch
,
73 int regno
, int store_p
) override
;
75 /* Override linux_nat_target low methods. */
76 void low_new_thread (struct lwp_info
*lp
) override
;
79 /* Helpers. See definitions. */
80 void mips64_regsets_store_registers (struct regcache
*regcache
,
82 void mips64_regsets_fetch_registers (struct regcache
*regcache
,
86 static mips_linux_nat_target the_mips_linux_nat_target
;
88 /* Assume that we have PTRACE_GETREGS et al. support. If we do not,
89 we'll clear this and use PTRACE_PEEKUSER instead. */
90 static int have_ptrace_regsets
= 1;
92 /* Map gdb internal register number to ptrace ``address''.
93 These ``addresses'' are normally defined in <asm/ptrace.h>.
95 ptrace does not provide a way to read (or set) MIPS_PS_REGNUM,
96 and there's no point in reading or setting MIPS_ZERO_REGNUM.
97 We also can not set BADVADDR, CAUSE, or FCRIR via ptrace(). */
100 mips_linux_register_addr (struct gdbarch
*gdbarch
, int regno
, int store
)
104 if (regno
< 0 || regno
>= gdbarch_num_regs (gdbarch
))
105 error (_("Bogon register number %d."), regno
);
107 if (regno
> MIPS_ZERO_REGNUM
&& regno
< MIPS_ZERO_REGNUM
+ 32)
109 else if ((regno
>= mips_regnum (gdbarch
)->fp0
)
110 && (regno
< mips_regnum (gdbarch
)->fp0
+ 32))
111 regaddr
= FPR_BASE
+ (regno
- mips_regnum (gdbarch
)->fp0
);
112 else if (regno
== mips_regnum (gdbarch
)->pc
)
114 else if (regno
== mips_regnum (gdbarch
)->cause
)
115 regaddr
= store
? (CORE_ADDR
) -1 : CAUSE
;
116 else if (regno
== mips_regnum (gdbarch
)->badvaddr
)
117 regaddr
= store
? (CORE_ADDR
) -1 : BADVADDR
;
118 else if (regno
== mips_regnum (gdbarch
)->lo
)
120 else if (regno
== mips_regnum (gdbarch
)->hi
)
122 else if (regno
== mips_regnum (gdbarch
)->fp_control_status
)
124 else if (regno
== mips_regnum (gdbarch
)->fp_implementation_revision
)
125 regaddr
= store
? (CORE_ADDR
) -1 : FPC_EIR
;
126 else if (mips_regnum (gdbarch
)->dspacc
!= -1
127 && regno
>= mips_regnum (gdbarch
)->dspacc
128 && regno
< mips_regnum (gdbarch
)->dspacc
+ 6)
129 regaddr
= DSP_BASE
+ (regno
- mips_regnum (gdbarch
)->dspacc
);
130 else if (regno
== mips_regnum (gdbarch
)->dspctl
)
131 regaddr
= DSP_CONTROL
;
132 else if (mips_linux_restart_reg_p (gdbarch
) && regno
== MIPS_RESTART_REGNUM
)
135 regaddr
= (CORE_ADDR
) -1;
141 mips64_linux_register_addr (struct gdbarch
*gdbarch
, int regno
, int store
)
145 if (regno
< 0 || regno
>= gdbarch_num_regs (gdbarch
))
146 error (_("Bogon register number %d."), regno
);
148 if (regno
> MIPS_ZERO_REGNUM
&& regno
< MIPS_ZERO_REGNUM
+ 32)
150 else if ((regno
>= mips_regnum (gdbarch
)->fp0
)
151 && (regno
< mips_regnum (gdbarch
)->fp0
+ 32))
152 regaddr
= MIPS64_FPR_BASE
+ (regno
- gdbarch_fp0_regnum (gdbarch
));
153 else if (regno
== mips_regnum (gdbarch
)->pc
)
155 else if (regno
== mips_regnum (gdbarch
)->cause
)
156 regaddr
= store
? (CORE_ADDR
) -1 : MIPS64_CAUSE
;
157 else if (regno
== mips_regnum (gdbarch
)->badvaddr
)
158 regaddr
= store
? (CORE_ADDR
) -1 : MIPS64_BADVADDR
;
159 else if (regno
== mips_regnum (gdbarch
)->lo
)
160 regaddr
= MIPS64_MMLO
;
161 else if (regno
== mips_regnum (gdbarch
)->hi
)
162 regaddr
= MIPS64_MMHI
;
163 else if (regno
== mips_regnum (gdbarch
)->fp_control_status
)
164 regaddr
= MIPS64_FPC_CSR
;
165 else if (regno
== mips_regnum (gdbarch
)->fp_implementation_revision
)
166 regaddr
= store
? (CORE_ADDR
) -1 : MIPS64_FPC_EIR
;
167 else if (mips_regnum (gdbarch
)->dspacc
!= -1
168 && regno
>= mips_regnum (gdbarch
)->dspacc
169 && regno
< mips_regnum (gdbarch
)->dspacc
+ 6)
170 regaddr
= DSP_BASE
+ (regno
- mips_regnum (gdbarch
)->dspacc
);
171 else if (regno
== mips_regnum (gdbarch
)->dspctl
)
172 regaddr
= DSP_CONTROL
;
173 else if (mips_linux_restart_reg_p (gdbarch
) && regno
== MIPS_RESTART_REGNUM
)
176 regaddr
= (CORE_ADDR
) -1;
181 /* Fetch the thread-local storage pointer for libthread_db. */
184 ps_get_thread_area (struct ps_prochandle
*ph
,
185 lwpid_t lwpid
, int idx
, void **base
)
187 if (ptrace (PTRACE_GET_THREAD_AREA
, lwpid
, NULL
, base
) != 0)
190 /* IDX is the bias from the thread pointer to the beginning of the
191 thread descriptor. It has to be subtracted due to implementation
192 quirks in libthread_db. */
193 *base
= (void *) ((char *)*base
- idx
);
198 /* Wrapper functions. These are only used by libthread_db. */
201 supply_gregset (struct regcache
*regcache
, const gdb_gregset_t
*gregsetp
)
203 if (mips_isa_regsize (regcache
->arch ()) == 4)
204 mips_supply_gregset (regcache
, (const mips_elf_gregset_t
*) gregsetp
);
206 mips64_supply_gregset (regcache
, (const mips64_elf_gregset_t
*) gregsetp
);
210 fill_gregset (const struct regcache
*regcache
,
211 gdb_gregset_t
*gregsetp
, int regno
)
213 if (mips_isa_regsize (regcache
->arch ()) == 4)
214 mips_fill_gregset (regcache
, (mips_elf_gregset_t
*) gregsetp
, regno
);
216 mips64_fill_gregset (regcache
, (mips64_elf_gregset_t
*) gregsetp
, regno
);
220 supply_fpregset (struct regcache
*regcache
, const gdb_fpregset_t
*fpregsetp
)
222 if (mips_isa_regsize (regcache
->arch ()) == 4)
223 mips_supply_fpregset (regcache
, (const mips_elf_fpregset_t
*) fpregsetp
);
225 mips64_supply_fpregset (regcache
,
226 (const mips64_elf_fpregset_t
*) fpregsetp
);
230 fill_fpregset (const struct regcache
*regcache
,
231 gdb_fpregset_t
*fpregsetp
, int regno
)
233 if (mips_isa_regsize (regcache
->arch ()) == 4)
234 mips_fill_fpregset (regcache
, (mips_elf_fpregset_t
*) fpregsetp
, regno
);
236 mips64_fill_fpregset (regcache
,
237 (mips64_elf_fpregset_t
*) fpregsetp
, regno
);
241 /* Fetch REGNO (or all registers if REGNO == -1) from the target
242 using PTRACE_GETREGS et al. */
245 mips_linux_nat_target::mips64_regsets_fetch_registers
246 (struct regcache
*regcache
, int regno
)
248 struct gdbarch
*gdbarch
= regcache
->arch ();
254 if (regno
>= mips_regnum (gdbarch
)->fp0
255 && regno
<= mips_regnum (gdbarch
)->fp0
+ 32)
257 else if (regno
== mips_regnum (gdbarch
)->fp_control_status
)
259 else if (regno
== mips_regnum (gdbarch
)->fp_implementation_revision
)
264 /* DSP registers are optional and not a part of any set. */
265 have_dsp
= mips_regnum (gdbarch
)->dspctl
!= -1;
268 else if (regno
>= mips_regnum (gdbarch
)->dspacc
269 && regno
< mips_regnum (gdbarch
)->dspacc
+ 6)
271 else if (regno
== mips_regnum (gdbarch
)->dspctl
)
276 tid
= get_ptrace_pid (regcache_get_ptid (regcache
));
278 if (regno
== -1 || (!is_fp
&& !is_dsp
))
280 mips64_elf_gregset_t regs
;
282 if (ptrace (PTRACE_GETREGS
, tid
, 0L, (PTRACE_TYPE_ARG3
) ®s
) == -1)
286 have_ptrace_regsets
= 0;
289 perror_with_name (_("Couldn't get registers"));
292 mips64_supply_gregset (regcache
,
293 (const mips64_elf_gregset_t
*) ®s
);
296 if (regno
== -1 || is_fp
)
298 mips64_elf_fpregset_t fp_regs
;
300 if (ptrace (PTRACE_GETFPREGS
, tid
, 0L,
301 (PTRACE_TYPE_ARG3
) &fp_regs
) == -1)
305 have_ptrace_regsets
= 0;
308 perror_with_name (_("Couldn't get FP registers"));
311 mips64_supply_fpregset (regcache
,
312 (const mips64_elf_fpregset_t
*) &fp_regs
);
316 linux_nat_trad_target::fetch_registers (regcache
, regno
);
317 else if (regno
== -1 && have_dsp
)
319 for (regi
= mips_regnum (gdbarch
)->dspacc
;
320 regi
< mips_regnum (gdbarch
)->dspacc
+ 6;
322 linux_nat_trad_target::fetch_registers (regcache
, regi
);
323 linux_nat_trad_target::fetch_registers (regcache
,
324 mips_regnum (gdbarch
)->dspctl
);
328 /* Store REGNO (or all registers if REGNO == -1) to the target
329 using PTRACE_SETREGS et al. */
332 mips_linux_nat_target::mips64_regsets_store_registers
333 (struct regcache
*regcache
, int regno
)
335 struct gdbarch
*gdbarch
= regcache
->arch ();
341 if (regno
>= mips_regnum (gdbarch
)->fp0
342 && regno
<= mips_regnum (gdbarch
)->fp0
+ 32)
344 else if (regno
== mips_regnum (gdbarch
)->fp_control_status
)
346 else if (regno
== mips_regnum (gdbarch
)->fp_implementation_revision
)
351 /* DSP registers are optional and not a part of any set. */
352 have_dsp
= mips_regnum (gdbarch
)->dspctl
!= -1;
355 else if (regno
>= mips_regnum (gdbarch
)->dspacc
356 && regno
< mips_regnum (gdbarch
)->dspacc
+ 6)
358 else if (regno
== mips_regnum (gdbarch
)->dspctl
)
363 tid
= get_ptrace_pid (regcache_get_ptid (regcache
));
365 if (regno
== -1 || (!is_fp
&& !is_dsp
))
367 mips64_elf_gregset_t regs
;
369 if (ptrace (PTRACE_GETREGS
, tid
, 0L, (PTRACE_TYPE_ARG3
) ®s
) == -1)
370 perror_with_name (_("Couldn't get registers"));
372 mips64_fill_gregset (regcache
, ®s
, regno
);
374 if (ptrace (PTRACE_SETREGS
, tid
, 0L, (PTRACE_TYPE_ARG3
) ®s
) == -1)
375 perror_with_name (_("Couldn't set registers"));
378 if (regno
== -1 || is_fp
)
380 mips64_elf_fpregset_t fp_regs
;
382 if (ptrace (PTRACE_GETFPREGS
, tid
, 0L,
383 (PTRACE_TYPE_ARG3
) &fp_regs
) == -1)
384 perror_with_name (_("Couldn't get FP registers"));
386 mips64_fill_fpregset (regcache
, &fp_regs
, regno
);
388 if (ptrace (PTRACE_SETFPREGS
, tid
, 0L,
389 (PTRACE_TYPE_ARG3
) &fp_regs
) == -1)
390 perror_with_name (_("Couldn't set FP registers"));
394 linux_nat_trad_target::store_registers (regcache
, regno
);
395 else if (regno
== -1 && have_dsp
)
397 for (regi
= mips_regnum (gdbarch
)->dspacc
;
398 regi
< mips_regnum (gdbarch
)->dspacc
+ 6;
400 linux_nat_trad_target::store_registers (regcache
, regi
);
401 linux_nat_trad_target::store_registers (regcache
,
402 mips_regnum (gdbarch
)->dspctl
);
406 /* Fetch REGNO (or all registers if REGNO == -1) from the target
407 using any working method. */
410 mips_linux_nat_target::fetch_registers (struct regcache
*regcache
, int regnum
)
412 /* Unless we already know that PTRACE_GETREGS does not work, try it. */
413 if (have_ptrace_regsets
)
414 mips64_regsets_fetch_registers (regcache
, regnum
);
416 /* If we know, or just found out, that PTRACE_GETREGS does not work, fall
417 back to PTRACE_PEEKUSER. */
418 if (!have_ptrace_regsets
)
419 linux_nat_trad_target::fetch_registers (regcache
, regnum
);
422 /* Store REGNO (or all registers if REGNO == -1) to the target
423 using any working method. */
426 mips_linux_nat_target::store_registers (struct regcache
*regcache
, int regnum
)
428 /* Unless we already know that PTRACE_GETREGS does not work, try it. */
429 if (have_ptrace_regsets
)
430 mips64_regsets_store_registers (regcache
, regnum
);
432 /* If we know, or just found out, that PTRACE_GETREGS does not work, fall
433 back to PTRACE_PEEKUSER. */
434 if (!have_ptrace_regsets
)
435 linux_nat_trad_target::store_registers (regcache
, regnum
);
438 /* Return the address in the core dump or inferior of register
442 mips_linux_nat_target::register_u_offset (struct gdbarch
*gdbarch
,
443 int regno
, int store_p
)
445 if (mips_abi_regsize (gdbarch
) == 8)
446 return mips64_linux_register_addr (gdbarch
, regno
, store_p
);
448 return mips_linux_register_addr (gdbarch
, regno
, store_p
);
451 const struct target_desc
*
452 mips_linux_nat_target::read_description ()
454 static int have_dsp
= -1;
460 tid
= ptid_get_lwp (inferior_ptid
);
462 tid
= ptid_get_pid (inferior_ptid
);
465 ptrace (PTRACE_PEEKUSER
, tid
, DSP_CONTROL
, 0);
475 perror_with_name (_("Couldn't check DSP support"));
480 /* Report that target registers are a size we know for sure
481 that we can get from ptrace. */
482 if (_MIPS_SIM
== _ABIO32
)
483 return have_dsp
? tdesc_mips_dsp_linux
: tdesc_mips_linux
;
485 return have_dsp
? tdesc_mips64_dsp_linux
: tdesc_mips64_linux
;
488 /* -1 if the kernel and/or CPU do not support watch registers.
489 1 if watch_readback is valid and we can read style, num_valid
491 0 if we need to read the watch_readback. */
493 static int watch_readback_valid
;
495 /* Cached watch register read values. */
497 static struct pt_watch_regs watch_readback
;
499 static struct mips_watchpoint
*current_watches
;
501 /* The current set of watch register values for writing the
504 static struct pt_watch_regs watch_mirror
;
507 mips_show_dr (const char *func
, CORE_ADDR addr
,
508 int len
, enum target_hw_bp_type type
)
512 puts_unfiltered (func
);
514 printf_unfiltered (" (addr=%s, len=%d, type=%s)",
515 paddress (target_gdbarch (), addr
), len
,
516 type
== hw_write
? "data-write"
517 : (type
== hw_read
? "data-read"
518 : (type
== hw_access
? "data-read/write"
519 : (type
== hw_execute
? "instruction-execute"
521 puts_unfiltered (":\n");
523 for (i
= 0; i
< MAX_DEBUG_REGISTER
; i
++)
524 printf_unfiltered ("\tDR%d: lo=%s, hi=%s\n", i
,
525 paddress (target_gdbarch (),
526 mips_linux_watch_get_watchlo (&watch_mirror
,
528 paddress (target_gdbarch (),
529 mips_linux_watch_get_watchhi (&watch_mirror
,
533 /* Target to_can_use_hw_breakpoint implementation. Return 1 if we can
534 handle the specified watch type. */
537 mips_linux_nat_target::can_use_hw_breakpoint (enum bptype type
,
541 uint32_t wanted_mask
, irw_mask
;
543 if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid
),
545 &watch_readback_valid
, 0))
550 case bp_hardware_watchpoint
:
551 wanted_mask
= W_MASK
;
553 case bp_read_watchpoint
:
554 wanted_mask
= R_MASK
;
556 case bp_access_watchpoint
:
557 wanted_mask
= R_MASK
| W_MASK
;
564 i
< mips_linux_watch_get_num_valid (&watch_readback
) && cnt
;
567 irw_mask
= mips_linux_watch_get_irw_mask (&watch_readback
, i
);
568 if ((irw_mask
& wanted_mask
) == wanted_mask
)
571 return (cnt
== 0) ? 1 : 0;
574 /* Target to_stopped_by_watchpoint implementation. Return 1 if
575 stopped by watchpoint. The watchhi R and W bits indicate the watch
576 register triggered. */
579 mips_linux_nat_target::stopped_by_watchpoint ()
584 if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid
),
586 &watch_readback_valid
, 1))
589 num_valid
= mips_linux_watch_get_num_valid (&watch_readback
);
591 for (n
= 0; n
< MAX_DEBUG_REGISTER
&& n
< num_valid
; n
++)
592 if (mips_linux_watch_get_watchhi (&watch_readback
, n
) & (R_MASK
| W_MASK
))
598 /* Target to_stopped_data_address implementation. Set the address
599 where the watch triggered (if known). Return 1 if the address was
603 mips_linux_nat_target::stopped_data_address (CORE_ADDR
*paddr
)
605 /* On mips we don't know the low order 3 bits of the data address,
606 so we must return false. */
610 /* Target to_region_ok_for_hw_watchpoint implementation. Return 1 if
611 the specified region can be covered by the watch registers. */
614 mips_linux_nat_target::region_ok_for_hw_watchpoint (CORE_ADDR addr
, int len
)
616 struct pt_watch_regs dummy_regs
;
619 if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid
),
621 &watch_readback_valid
, 0))
624 dummy_regs
= watch_readback
;
625 /* Clear them out. */
626 for (i
= 0; i
< mips_linux_watch_get_num_valid (&dummy_regs
); i
++)
627 mips_linux_watch_set_watchlo (&dummy_regs
, i
, 0);
628 return mips_linux_watch_try_one_watch (&dummy_regs
, addr
, len
, 0);
631 /* Write the mirrored watch register values for each thread. */
634 write_watchpoint_regs (void)
641 tid
= ptid_get_lwp (lp
->ptid
);
642 if (ptrace (PTRACE_SET_WATCH_REGS
, tid
, &watch_mirror
, NULL
) == -1)
643 perror_with_name (_("Couldn't write debug register"));
648 /* linux_nat_target::low_new_thread implementation. Write the
649 mirrored watch register values for the new thread. */
652 mips_linux_nat_target::low_new_thread (struct lwp_info
*lp
)
654 long tid
= lp
->ptid
.lwp ();
656 if (!mips_linux_read_watch_registers (tid
,
658 &watch_readback_valid
, 0))
661 if (ptrace (PTRACE_SET_WATCH_REGS
, tid
, &watch_mirror
, NULL
) == -1)
662 perror_with_name (_("Couldn't write debug register"));
665 /* Target to_insert_watchpoint implementation. Try to insert a new
666 watch. Return zero on success. */
669 mips_linux_nat_target::insert_watchpoint (CORE_ADDR addr
, int len
,
670 enum target_hw_bp_type type
,
671 struct expression
*cond
)
673 struct pt_watch_regs regs
;
674 struct mips_watchpoint
*new_watch
;
675 struct mips_watchpoint
**pw
;
680 if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid
),
682 &watch_readback_valid
, 0))
688 regs
= watch_readback
;
689 /* Add the current watches. */
690 mips_linux_watch_populate_regs (current_watches
, ®s
);
692 /* Now try to add the new watch. */
693 if (!mips_linux_watch_try_one_watch (®s
, addr
, len
,
694 mips_linux_watch_type_to_irw (type
)))
697 /* It fit. Stick it on the end of the list. */
698 new_watch
= XNEW (struct mips_watchpoint
);
699 new_watch
->addr
= addr
;
700 new_watch
->len
= len
;
701 new_watch
->type
= type
;
702 new_watch
->next
= NULL
;
704 pw
= ¤t_watches
;
710 retval
= write_watchpoint_regs ();
713 mips_show_dr ("insert_watchpoint", addr
, len
, type
);
718 /* Target to_remove_watchpoint implementation. Try to remove a watch.
719 Return zero on success. */
722 mips_linux_nat_target::remove_watchpoint (CORE_ADDR addr
, int len
,
723 enum target_hw_bp_type type
,
724 struct expression
*cond
)
729 struct mips_watchpoint
**pw
;
730 struct mips_watchpoint
*w
;
732 /* Search for a known watch that matches. Then unlink and free
735 pw
= ¤t_watches
;
738 if (w
->addr
== addr
&& w
->len
== len
&& w
->type
== type
)
749 return -1; /* We don't know about it, fail doing nothing. */
751 /* At this point watch_readback is known to be valid because we
752 could not have added the watch without reading it. */
753 gdb_assert (watch_readback_valid
== 1);
755 watch_mirror
= watch_readback
;
756 mips_linux_watch_populate_regs (current_watches
, &watch_mirror
);
758 retval
= write_watchpoint_regs ();
761 mips_show_dr ("remove_watchpoint", addr
, len
, type
);
766 /* Target to_close implementation. Free any watches and call the
767 super implementation. */
770 mips_linux_nat_target::close ()
772 struct mips_watchpoint
*w
;
773 struct mips_watchpoint
*nw
;
775 /* Clean out the current_watches list. */
783 current_watches
= NULL
;
785 linux_nat_trad_target::close ();
789 _initialize_mips_linux_nat (void)
791 add_setshow_boolean_cmd ("show-debug-regs", class_maintenance
,
792 &show_debug_regs
, _("\
793 Set whether to show variables that mirror the mips debug registers."), _("\
794 Show whether to show variables that mirror the mips debug registers."), _("\
795 Use \"on\" to enable, \"off\" to disable.\n\
796 If enabled, the debug registers values are shown when GDB inserts\n\
797 or removes a hardware breakpoint or watchpoint, and when the inferior\n\
798 triggers a breakpoint or watchpoint."),
801 &maintenance_set_cmdlist
,
802 &maintenance_show_cmdlist
);
804 linux_target
= &the_mips_linux_nat_target
;
805 add_inf_child_target (&the_mips_linux_nat_target
);