1 /* Target-dependent code for GNU/Linux on MIPS processors.
3 Copyright (C) 2001, 2002, 2004, 2005, 2006, 2007, 2008, 2009, 2010
4 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
24 #include "solib-svr4.h"
26 #include "mips-tdep.h"
27 #include "gdb_string.h"
28 #include "gdb_assert.h"
31 #include "trad-frame.h"
32 #include "tramp-frame.h"
35 #include "solib-svr4.h"
38 #include "target-descriptions.h"
39 #include "mips-linux-tdep.h"
40 #include "glibc-tdep.h"
41 #include "linux-tdep.h"
43 static struct target_so_ops mips_svr4_so_ops
;
45 /* Figure out where the longjmp will land.
46 We expect the first arg to be a pointer to the jmp_buf structure
47 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
48 at. The pc is copied into PC. This routine returns 1 on
51 #define MIPS_LINUX_JB_ELEMENT_SIZE 4
52 #define MIPS_LINUX_JB_PC 0
55 mips_linux_get_longjmp_target (struct frame_info
*frame
, CORE_ADDR
*pc
)
58 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
59 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
60 char buf
[gdbarch_ptr_bit (gdbarch
) / TARGET_CHAR_BIT
];
62 jb_addr
= get_frame_register_unsigned (frame
, MIPS_A0_REGNUM
);
64 if (target_read_memory (jb_addr
65 + MIPS_LINUX_JB_PC
* MIPS_LINUX_JB_ELEMENT_SIZE
,
66 buf
, gdbarch_ptr_bit (gdbarch
) / TARGET_CHAR_BIT
))
69 *pc
= extract_unsigned_integer (buf
,
70 gdbarch_ptr_bit (gdbarch
) / TARGET_CHAR_BIT
,
76 /* Transform the bits comprising a 32-bit register to the right size
77 for regcache_raw_supply(). This is needed when mips_isa_regsize()
81 supply_32bit_reg (struct regcache
*regcache
, int regnum
, const void *addr
)
83 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
84 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
85 gdb_byte buf
[MAX_REGISTER_SIZE
];
86 store_signed_integer (buf
, register_size (gdbarch
, regnum
), byte_order
,
87 extract_signed_integer (addr
, 4, byte_order
));
88 regcache_raw_supply (regcache
, regnum
, buf
);
91 /* Unpack an elf_gregset_t into GDB's register cache. */
94 mips_supply_gregset (struct regcache
*regcache
,
95 const mips_elf_gregset_t
*gregsetp
)
98 const mips_elf_greg_t
*regp
= *gregsetp
;
99 char zerobuf
[MAX_REGISTER_SIZE
];
100 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
102 memset (zerobuf
, 0, MAX_REGISTER_SIZE
);
104 for (regi
= EF_REG0
+ 1; regi
<= EF_REG31
; regi
++)
105 supply_32bit_reg (regcache
, regi
- EF_REG0
, regp
+ regi
);
107 if (mips_linux_restart_reg_p (gdbarch
))
108 supply_32bit_reg (regcache
, MIPS_RESTART_REGNUM
, regp
+ EF_REG0
);
110 supply_32bit_reg (regcache
, mips_regnum (gdbarch
)->lo
, regp
+ EF_LO
);
111 supply_32bit_reg (regcache
, mips_regnum (gdbarch
)->hi
, regp
+ EF_HI
);
113 supply_32bit_reg (regcache
, mips_regnum (gdbarch
)->pc
,
115 supply_32bit_reg (regcache
, mips_regnum (gdbarch
)->badvaddr
,
116 regp
+ EF_CP0_BADVADDR
);
117 supply_32bit_reg (regcache
, MIPS_PS_REGNUM
, regp
+ EF_CP0_STATUS
);
118 supply_32bit_reg (regcache
, mips_regnum (gdbarch
)->cause
,
119 regp
+ EF_CP0_CAUSE
);
121 /* Fill inaccessible registers with zero. */
122 regcache_raw_supply (regcache
, MIPS_ZERO_REGNUM
, zerobuf
);
123 regcache_raw_supply (regcache
, MIPS_UNUSED_REGNUM
, zerobuf
);
124 for (regi
= MIPS_FIRST_EMBED_REGNUM
;
125 regi
<= MIPS_LAST_EMBED_REGNUM
;
127 regcache_raw_supply (regcache
, regi
, zerobuf
);
130 /* Pack our registers (or one register) into an elf_gregset_t. */
133 mips_fill_gregset (const struct regcache
*regcache
,
134 mips_elf_gregset_t
*gregsetp
, int regno
)
136 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
138 mips_elf_greg_t
*regp
= *gregsetp
;
143 memset (regp
, 0, sizeof (mips_elf_gregset_t
));
144 for (regi
= 1; regi
< 32; regi
++)
145 mips_fill_gregset (regcache
, gregsetp
, regi
);
146 mips_fill_gregset (regcache
, gregsetp
, mips_regnum (gdbarch
)->lo
);
147 mips_fill_gregset (regcache
, gregsetp
, mips_regnum (gdbarch
)->hi
);
148 mips_fill_gregset (regcache
, gregsetp
, mips_regnum (gdbarch
)->pc
);
149 mips_fill_gregset (regcache
, gregsetp
, mips_regnum (gdbarch
)->badvaddr
);
150 mips_fill_gregset (regcache
, gregsetp
, MIPS_PS_REGNUM
);
151 mips_fill_gregset (regcache
, gregsetp
, mips_regnum (gdbarch
)->cause
);
152 mips_fill_gregset (regcache
, gregsetp
, MIPS_RESTART_REGNUM
);
156 if (regno
> 0 && regno
< 32)
158 dst
= regp
+ regno
+ EF_REG0
;
159 regcache_raw_collect (regcache
, regno
, dst
);
163 if (regno
== mips_regnum (gdbarch
)->lo
)
165 else if (regno
== mips_regnum (gdbarch
)->hi
)
167 else if (regno
== mips_regnum (gdbarch
)->pc
)
168 regaddr
= EF_CP0_EPC
;
169 else if (regno
== mips_regnum (gdbarch
)->badvaddr
)
170 regaddr
= EF_CP0_BADVADDR
;
171 else if (regno
== MIPS_PS_REGNUM
)
172 regaddr
= EF_CP0_STATUS
;
173 else if (regno
== mips_regnum (gdbarch
)->cause
)
174 regaddr
= EF_CP0_CAUSE
;
175 else if (mips_linux_restart_reg_p (gdbarch
)
176 && regno
== MIPS_RESTART_REGNUM
)
183 dst
= regp
+ regaddr
;
184 regcache_raw_collect (regcache
, regno
, dst
);
188 /* Likewise, unpack an elf_fpregset_t. */
191 mips_supply_fpregset (struct regcache
*regcache
,
192 const mips_elf_fpregset_t
*fpregsetp
)
194 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
196 char zerobuf
[MAX_REGISTER_SIZE
];
198 memset (zerobuf
, 0, MAX_REGISTER_SIZE
);
200 for (regi
= 0; regi
< 32; regi
++)
201 regcache_raw_supply (regcache
,
202 gdbarch_fp0_regnum (gdbarch
) + regi
,
205 regcache_raw_supply (regcache
,
206 mips_regnum (gdbarch
)->fp_control_status
,
209 /* FIXME: how can we supply FCRIR? The ABI doesn't tell us. */
210 regcache_raw_supply (regcache
,
211 mips_regnum (gdbarch
)->fp_implementation_revision
,
215 /* Likewise, pack one or all floating point registers into an
219 mips_fill_fpregset (const struct regcache
*regcache
,
220 mips_elf_fpregset_t
*fpregsetp
, int regno
)
222 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
225 if ((regno
>= gdbarch_fp0_regnum (gdbarch
))
226 && (regno
< gdbarch_fp0_regnum (gdbarch
) + 32))
228 to
= (char *) (*fpregsetp
+ regno
- gdbarch_fp0_regnum (gdbarch
));
229 regcache_raw_collect (regcache
, regno
, to
);
231 else if (regno
== mips_regnum (gdbarch
)->fp_control_status
)
233 to
= (char *) (*fpregsetp
+ 32);
234 regcache_raw_collect (regcache
, regno
, to
);
236 else if (regno
== -1)
240 for (regi
= 0; regi
< 32; regi
++)
241 mips_fill_fpregset (regcache
, fpregsetp
,
242 gdbarch_fp0_regnum (gdbarch
) + regi
);
243 mips_fill_fpregset (regcache
, fpregsetp
,
244 mips_regnum (gdbarch
)->fp_control_status
);
248 /* Support for 64-bit ABIs. */
250 /* Figure out where the longjmp will land.
251 We expect the first arg to be a pointer to the jmp_buf structure
252 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
253 at. The pc is copied into PC. This routine returns 1 on
256 /* Details about jmp_buf. */
258 #define MIPS64_LINUX_JB_PC 0
261 mips64_linux_get_longjmp_target (struct frame_info
*frame
, CORE_ADDR
*pc
)
264 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
265 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
266 void *buf
= alloca (gdbarch_ptr_bit (gdbarch
) / TARGET_CHAR_BIT
);
267 int element_size
= gdbarch_ptr_bit (gdbarch
) == 32 ? 4 : 8;
269 jb_addr
= get_frame_register_unsigned (frame
, MIPS_A0_REGNUM
);
271 if (target_read_memory (jb_addr
+ MIPS64_LINUX_JB_PC
* element_size
,
273 gdbarch_ptr_bit (gdbarch
) / TARGET_CHAR_BIT
))
276 *pc
= extract_unsigned_integer (buf
,
277 gdbarch_ptr_bit (gdbarch
) / TARGET_CHAR_BIT
,
283 /* Register set support functions. These operate on standard 64-bit
284 regsets, but work whether the target is 32-bit or 64-bit. A 32-bit
285 target will still use the 64-bit format for PTRACE_GETREGS. */
287 /* Supply a 64-bit register. */
290 supply_64bit_reg (struct regcache
*regcache
, int regnum
,
293 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
294 if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
295 && register_size (gdbarch
, regnum
) == 4)
296 regcache_raw_supply (regcache
, regnum
, buf
+ 4);
298 regcache_raw_supply (regcache
, regnum
, buf
);
301 /* Unpack a 64-bit elf_gregset_t into GDB's register cache. */
304 mips64_supply_gregset (struct regcache
*regcache
,
305 const mips64_elf_gregset_t
*gregsetp
)
308 const mips64_elf_greg_t
*regp
= *gregsetp
;
309 gdb_byte zerobuf
[MAX_REGISTER_SIZE
];
310 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
312 memset (zerobuf
, 0, MAX_REGISTER_SIZE
);
314 for (regi
= MIPS64_EF_REG0
+ 1; regi
<= MIPS64_EF_REG31
; regi
++)
315 supply_64bit_reg (regcache
, regi
- MIPS64_EF_REG0
,
316 (const gdb_byte
*)(regp
+ regi
));
318 if (mips_linux_restart_reg_p (gdbarch
))
319 supply_64bit_reg (regcache
, MIPS_RESTART_REGNUM
,
320 (const gdb_byte
*)(regp
+ MIPS64_EF_REG0
));
322 supply_64bit_reg (regcache
, mips_regnum (gdbarch
)->lo
,
323 (const gdb_byte
*) (regp
+ MIPS64_EF_LO
));
324 supply_64bit_reg (regcache
, mips_regnum (gdbarch
)->hi
,
325 (const gdb_byte
*) (regp
+ MIPS64_EF_HI
));
327 supply_64bit_reg (regcache
, mips_regnum (gdbarch
)->pc
,
328 (const gdb_byte
*) (regp
+ MIPS64_EF_CP0_EPC
));
329 supply_64bit_reg (regcache
, mips_regnum (gdbarch
)->badvaddr
,
330 (const gdb_byte
*) (regp
+ MIPS64_EF_CP0_BADVADDR
));
331 supply_64bit_reg (regcache
, MIPS_PS_REGNUM
,
332 (const gdb_byte
*) (regp
+ MIPS64_EF_CP0_STATUS
));
333 supply_64bit_reg (regcache
, mips_regnum (gdbarch
)->cause
,
334 (const gdb_byte
*) (regp
+ MIPS64_EF_CP0_CAUSE
));
336 /* Fill inaccessible registers with zero. */
337 regcache_raw_supply (regcache
, MIPS_ZERO_REGNUM
, zerobuf
);
338 regcache_raw_supply (regcache
, MIPS_UNUSED_REGNUM
, zerobuf
);
339 for (regi
= MIPS_FIRST_EMBED_REGNUM
;
340 regi
<= MIPS_LAST_EMBED_REGNUM
;
342 regcache_raw_supply (regcache
, regi
, zerobuf
);
345 /* Pack our registers (or one register) into a 64-bit elf_gregset_t. */
348 mips64_fill_gregset (const struct regcache
*regcache
,
349 mips64_elf_gregset_t
*gregsetp
, int regno
)
351 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
352 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
354 mips64_elf_greg_t
*regp
= *gregsetp
;
359 memset (regp
, 0, sizeof (mips64_elf_gregset_t
));
360 for (regi
= 1; regi
< 32; regi
++)
361 mips64_fill_gregset (regcache
, gregsetp
, regi
);
362 mips64_fill_gregset (regcache
, gregsetp
, mips_regnum (gdbarch
)->lo
);
363 mips64_fill_gregset (regcache
, gregsetp
, mips_regnum (gdbarch
)->hi
);
364 mips64_fill_gregset (regcache
, gregsetp
, mips_regnum (gdbarch
)->pc
);
365 mips64_fill_gregset (regcache
, gregsetp
, mips_regnum (gdbarch
)->badvaddr
);
366 mips64_fill_gregset (regcache
, gregsetp
, MIPS_PS_REGNUM
);
367 mips64_fill_gregset (regcache
, gregsetp
, mips_regnum (gdbarch
)->cause
);
368 mips64_fill_gregset (regcache
, gregsetp
, MIPS_RESTART_REGNUM
);
372 if (regno
> 0 && regno
< 32)
373 regaddr
= regno
+ MIPS64_EF_REG0
;
374 else if (regno
== mips_regnum (gdbarch
)->lo
)
375 regaddr
= MIPS64_EF_LO
;
376 else if (regno
== mips_regnum (gdbarch
)->hi
)
377 regaddr
= MIPS64_EF_HI
;
378 else if (regno
== mips_regnum (gdbarch
)->pc
)
379 regaddr
= MIPS64_EF_CP0_EPC
;
380 else if (regno
== mips_regnum (gdbarch
)->badvaddr
)
381 regaddr
= MIPS64_EF_CP0_BADVADDR
;
382 else if (regno
== MIPS_PS_REGNUM
)
383 regaddr
= MIPS64_EF_CP0_STATUS
;
384 else if (regno
== mips_regnum (gdbarch
)->cause
)
385 regaddr
= MIPS64_EF_CP0_CAUSE
;
386 else if (mips_linux_restart_reg_p (gdbarch
)
387 && regno
== MIPS_RESTART_REGNUM
)
388 regaddr
= MIPS64_EF_REG0
;
394 gdb_byte buf
[MAX_REGISTER_SIZE
];
397 regcache_raw_collect (regcache
, regno
, buf
);
398 val
= extract_signed_integer (buf
, register_size (gdbarch
, regno
),
400 dst
= regp
+ regaddr
;
401 store_signed_integer (dst
, 8, byte_order
, val
);
405 /* Likewise, unpack an elf_fpregset_t. */
408 mips64_supply_fpregset (struct regcache
*regcache
,
409 const mips64_elf_fpregset_t
*fpregsetp
)
411 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
414 /* See mips_linux_o32_sigframe_init for a description of the
415 peculiar FP register layout. */
416 if (register_size (gdbarch
, gdbarch_fp0_regnum (gdbarch
)) == 4)
417 for (regi
= 0; regi
< 32; regi
++)
419 const gdb_byte
*reg_ptr
= (const gdb_byte
*)(*fpregsetp
+ (regi
& ~1));
420 if ((gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
) != (regi
& 1))
422 regcache_raw_supply (regcache
,
423 gdbarch_fp0_regnum (gdbarch
) + regi
,
427 for (regi
= 0; regi
< 32; regi
++)
428 regcache_raw_supply (regcache
,
429 gdbarch_fp0_regnum (gdbarch
) + regi
,
430 (const char *)(*fpregsetp
+ regi
));
432 supply_32bit_reg (regcache
, mips_regnum (gdbarch
)->fp_control_status
,
433 (const gdb_byte
*)(*fpregsetp
+ 32));
435 /* The ABI doesn't tell us how to supply FCRIR, and core dumps don't
436 include it - but the result of PTRACE_GETFPREGS does. The best we
437 can do is to assume that its value is present. */
438 supply_32bit_reg (regcache
,
439 mips_regnum (gdbarch
)->fp_implementation_revision
,
440 (const gdb_byte
*)(*fpregsetp
+ 32) + 4);
443 /* Likewise, pack one or all floating point registers into an
447 mips64_fill_fpregset (const struct regcache
*regcache
,
448 mips64_elf_fpregset_t
*fpregsetp
, int regno
)
450 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
451 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
454 if ((regno
>= gdbarch_fp0_regnum (gdbarch
))
455 && (regno
< gdbarch_fp0_regnum (gdbarch
) + 32))
457 /* See mips_linux_o32_sigframe_init for a description of the
458 peculiar FP register layout. */
459 if (register_size (gdbarch
, regno
) == 4)
461 int regi
= regno
- gdbarch_fp0_regnum (gdbarch
);
463 to
= (gdb_byte
*) (*fpregsetp
+ (regi
& ~1));
464 if ((gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
) != (regi
& 1))
466 regcache_raw_collect (regcache
, regno
, to
);
470 to
= (gdb_byte
*) (*fpregsetp
+ regno
- gdbarch_fp0_regnum (gdbarch
));
471 regcache_raw_collect (regcache
, regno
, to
);
474 else if (regno
== mips_regnum (gdbarch
)->fp_control_status
)
476 gdb_byte buf
[MAX_REGISTER_SIZE
];
479 regcache_raw_collect (regcache
, regno
, buf
);
480 val
= extract_signed_integer (buf
, register_size (gdbarch
, regno
),
482 to
= (gdb_byte
*) (*fpregsetp
+ 32);
483 store_signed_integer (to
, 4, byte_order
, val
);
485 else if (regno
== mips_regnum (gdbarch
)->fp_implementation_revision
)
487 gdb_byte buf
[MAX_REGISTER_SIZE
];
490 regcache_raw_collect (regcache
, regno
, buf
);
491 val
= extract_signed_integer (buf
, register_size (gdbarch
, regno
),
493 to
= (gdb_byte
*) (*fpregsetp
+ 32) + 4;
494 store_signed_integer (to
, 4, byte_order
, val
);
496 else if (regno
== -1)
500 for (regi
= 0; regi
< 32; regi
++)
501 mips64_fill_fpregset (regcache
, fpregsetp
,
502 gdbarch_fp0_regnum (gdbarch
) + regi
);
503 mips64_fill_fpregset (regcache
, fpregsetp
,
504 mips_regnum (gdbarch
)->fp_control_status
);
505 mips64_fill_fpregset (regcache
, fpregsetp
,
506 (mips_regnum (gdbarch
)
507 ->fp_implementation_revision
));
512 /* Use a local version of this function to get the correct types for
513 regsets, until multi-arch core support is ready. */
516 fetch_core_registers (struct regcache
*regcache
,
517 char *core_reg_sect
, unsigned core_reg_size
,
518 int which
, CORE_ADDR reg_addr
)
520 mips_elf_gregset_t gregset
;
521 mips_elf_fpregset_t fpregset
;
522 mips64_elf_gregset_t gregset64
;
523 mips64_elf_fpregset_t fpregset64
;
527 if (core_reg_size
== sizeof (gregset
))
529 memcpy ((char *) &gregset
, core_reg_sect
, sizeof (gregset
));
530 mips_supply_gregset (regcache
,
531 (const mips_elf_gregset_t
*) &gregset
);
533 else if (core_reg_size
== sizeof (gregset64
))
535 memcpy ((char *) &gregset64
, core_reg_sect
, sizeof (gregset64
));
536 mips64_supply_gregset (regcache
,
537 (const mips64_elf_gregset_t
*) &gregset64
);
541 warning (_("wrong size gregset struct in core file"));
546 if (core_reg_size
== sizeof (fpregset
))
548 memcpy ((char *) &fpregset
, core_reg_sect
, sizeof (fpregset
));
549 mips_supply_fpregset (regcache
,
550 (const mips_elf_fpregset_t
*) &fpregset
);
552 else if (core_reg_size
== sizeof (fpregset64
))
554 memcpy ((char *) &fpregset64
, core_reg_sect
,
555 sizeof (fpregset64
));
556 mips64_supply_fpregset (regcache
,
557 (const mips64_elf_fpregset_t
*) &fpregset64
);
561 warning (_("wrong size fpregset struct in core file"));
566 /* Register that we are able to handle ELF file formats using standard
567 procfs "regset" structures. */
569 static struct core_fns regset_core_fns
=
571 bfd_target_elf_flavour
, /* core_flavour */
572 default_check_format
, /* check_format */
573 default_core_sniffer
, /* core_sniffer */
574 fetch_core_registers
, /* core_read_registers */
578 static const struct target_desc
*
579 mips_linux_core_read_description (struct gdbarch
*gdbarch
,
580 struct target_ops
*target
,
583 asection
*section
= bfd_get_section_by_name (abfd
, ".reg");
587 switch (bfd_section_size (abfd
, section
))
589 case sizeof (mips_elf_gregset_t
):
590 return mips_tdesc_gp32
;
592 case sizeof (mips64_elf_gregset_t
):
593 return mips_tdesc_gp64
;
601 /* Check the code at PC for a dynamic linker lazy resolution stub.
602 Because they aren't in the .plt section, we pattern-match on the
603 code generated by GNU ld. They look like this:
610 (with the appropriate doubleword instructions for N64). Also
611 return the dynamic symbol index used in the last instruction. */
614 mips_linux_in_dynsym_stub (CORE_ADDR pc
, char *name
)
616 unsigned char buf
[28], *p
;
617 ULONGEST insn
, insn1
;
618 int n64
= (mips_abi (target_gdbarch
) == MIPS_ABI_N64
);
619 enum bfd_endian byte_order
= gdbarch_byte_order (target_gdbarch
);
621 read_memory (pc
- 12, buf
, 28);
625 /* ld t9,0x8010(gp) */
630 /* lw t9,0x8010(gp) */
637 insn
= extract_unsigned_integer (p
, 4, byte_order
);
645 insn
= extract_unsigned_integer (p
+ 4, 4, byte_order
);
649 if (insn
!= 0x03e0782d)
655 if (insn
!= 0x03e07821)
659 insn
= extract_unsigned_integer (p
+ 8, 4, byte_order
);
661 if (insn
!= 0x0320f809)
664 insn
= extract_unsigned_integer (p
+ 12, 4, byte_order
);
667 /* daddiu t8,zero,0 */
668 if ((insn
& 0xffff0000) != 0x64180000)
673 /* addiu t8,zero,0 */
674 if ((insn
& 0xffff0000) != 0x24180000)
678 return (insn
& 0xffff);
681 /* Return non-zero iff PC belongs to the dynamic linker resolution
682 code, a PLT entry, or a lazy binding stub. */
685 mips_linux_in_dynsym_resolve_code (CORE_ADDR pc
)
687 /* Check whether PC is in the dynamic linker. This also checks
688 whether it is in the .plt section, used by non-PIC executables. */
689 if (svr4_in_dynsym_resolve_code (pc
))
692 /* Pattern match for the stub. It would be nice if there were a
693 more efficient way to avoid this check. */
694 if (mips_linux_in_dynsym_stub (pc
, NULL
))
700 /* See the comments for SKIP_SOLIB_RESOLVER at the top of infrun.c,
701 and glibc_skip_solib_resolver in glibc-tdep.c. The normal glibc
702 implementation of this triggers at "fixup" from the same objfile as
703 "_dl_runtime_resolve"; MIPS GNU/Linux can trigger at
704 "__dl_runtime_resolve" directly. An unresolved lazy binding
705 stub will point to _dl_runtime_resolve, which will first call
706 __dl_runtime_resolve, and then pass control to the resolved
710 mips_linux_skip_resolver (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
712 struct minimal_symbol
*resolver
;
714 resolver
= lookup_minimal_symbol ("__dl_runtime_resolve", NULL
, NULL
);
716 if (resolver
&& SYMBOL_VALUE_ADDRESS (resolver
) == pc
)
717 return frame_unwind_caller_pc (get_current_frame ());
719 return glibc_skip_solib_resolver (gdbarch
, pc
);
722 /* Signal trampoline support. There are four supported layouts for a
723 signal frame: o32 sigframe, o32 rt_sigframe, n32 rt_sigframe, and
724 n64 rt_sigframe. We handle them all independently; not the most
725 efficient way, but simplest. First, declare all the unwinders. */
727 static void mips_linux_o32_sigframe_init (const struct tramp_frame
*self
,
728 struct frame_info
*this_frame
,
729 struct trad_frame_cache
*this_cache
,
732 static void mips_linux_n32n64_sigframe_init (const struct tramp_frame
*self
,
733 struct frame_info
*this_frame
,
734 struct trad_frame_cache
*this_cache
,
737 #define MIPS_NR_LINUX 4000
738 #define MIPS_NR_N64_LINUX 5000
739 #define MIPS_NR_N32_LINUX 6000
741 #define MIPS_NR_sigreturn MIPS_NR_LINUX + 119
742 #define MIPS_NR_rt_sigreturn MIPS_NR_LINUX + 193
743 #define MIPS_NR_N64_rt_sigreturn MIPS_NR_N64_LINUX + 211
744 #define MIPS_NR_N32_rt_sigreturn MIPS_NR_N32_LINUX + 211
746 #define MIPS_INST_LI_V0_SIGRETURN 0x24020000 + MIPS_NR_sigreturn
747 #define MIPS_INST_LI_V0_RT_SIGRETURN 0x24020000 + MIPS_NR_rt_sigreturn
748 #define MIPS_INST_LI_V0_N64_RT_SIGRETURN 0x24020000 + MIPS_NR_N64_rt_sigreturn
749 #define MIPS_INST_LI_V0_N32_RT_SIGRETURN 0x24020000 + MIPS_NR_N32_rt_sigreturn
750 #define MIPS_INST_SYSCALL 0x0000000c
752 static const struct tramp_frame mips_linux_o32_sigframe
= {
756 { MIPS_INST_LI_V0_SIGRETURN
, -1 },
757 { MIPS_INST_SYSCALL
, -1 },
758 { TRAMP_SENTINEL_INSN
, -1 }
760 mips_linux_o32_sigframe_init
763 static const struct tramp_frame mips_linux_o32_rt_sigframe
= {
767 { MIPS_INST_LI_V0_RT_SIGRETURN
, -1 },
768 { MIPS_INST_SYSCALL
, -1 },
769 { TRAMP_SENTINEL_INSN
, -1 } },
770 mips_linux_o32_sigframe_init
773 static const struct tramp_frame mips_linux_n32_rt_sigframe
= {
777 { MIPS_INST_LI_V0_N32_RT_SIGRETURN
, -1 },
778 { MIPS_INST_SYSCALL
, -1 },
779 { TRAMP_SENTINEL_INSN
, -1 }
781 mips_linux_n32n64_sigframe_init
784 static const struct tramp_frame mips_linux_n64_rt_sigframe
= {
788 { MIPS_INST_LI_V0_N64_RT_SIGRETURN
, -1 },
789 { MIPS_INST_SYSCALL
, -1 },
790 { TRAMP_SENTINEL_INSN
, -1 }
792 mips_linux_n32n64_sigframe_init
796 /* The unwinder for o32 signal frames. The legacy structures look
800 u32 sf_ass[4]; [argument save space for o32]
801 u32 sf_code[2]; [signal trampoline or fill]
802 struct sigcontext sf_sc;
807 unsigned int sc_regmask; [Unused]
808 unsigned int sc_status;
809 unsigned long long sc_pc;
810 unsigned long long sc_regs[32];
811 unsigned long long sc_fpregs[32];
812 unsigned int sc_ownedfp;
813 unsigned int sc_fpc_csr;
814 unsigned int sc_fpc_eir; [Unused]
815 unsigned int sc_used_math;
816 unsigned int sc_ssflags; [Unused]
817 [Alignment hole of four bytes]
818 unsigned long long sc_mdhi;
819 unsigned long long sc_mdlo;
821 unsigned int sc_cause; [Unused]
822 unsigned int sc_badvaddr; [Unused]
824 unsigned long sc_sigset[4]; [kernel's sigset_t]
827 The RT signal frames look like this:
830 u32 rs_ass[4]; [argument save space for o32]
831 u32 rs_code[2] [signal trampoline or fill]
832 struct siginfo rs_info;
833 struct ucontext rs_uc;
837 unsigned long uc_flags;
838 struct ucontext *uc_link;
840 [Alignment hole of four bytes]
841 struct sigcontext uc_mcontext;
846 #define SIGFRAME_SIGCONTEXT_OFFSET (6 * 4)
848 #define RTSIGFRAME_SIGINFO_SIZE 128
849 #define STACK_T_SIZE (3 * 4)
850 #define UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + STACK_T_SIZE + 4)
851 #define RTSIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
852 + RTSIGFRAME_SIGINFO_SIZE \
853 + UCONTEXT_SIGCONTEXT_OFFSET)
855 #define SIGCONTEXT_PC (1 * 8)
856 #define SIGCONTEXT_REGS (2 * 8)
857 #define SIGCONTEXT_FPREGS (34 * 8)
858 #define SIGCONTEXT_FPCSR (66 * 8 + 4)
859 #define SIGCONTEXT_HI (69 * 8)
860 #define SIGCONTEXT_LO (70 * 8)
861 #define SIGCONTEXT_CAUSE (71 * 8 + 0)
862 #define SIGCONTEXT_BADVADDR (71 * 8 + 4)
864 #define SIGCONTEXT_REG_SIZE 8
867 mips_linux_o32_sigframe_init (const struct tramp_frame
*self
,
868 struct frame_info
*this_frame
,
869 struct trad_frame_cache
*this_cache
,
872 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
873 int ireg
, reg_position
;
874 CORE_ADDR frame_sp
= get_frame_sp (this_frame
);
875 CORE_ADDR sigcontext_base
;
876 const struct mips_regnum
*regs
= mips_regnum (gdbarch
);
879 if (self
== &mips_linux_o32_sigframe
)
880 sigcontext_base
= frame_sp
+ SIGFRAME_SIGCONTEXT_OFFSET
;
882 sigcontext_base
= frame_sp
+ RTSIGFRAME_SIGCONTEXT_OFFSET
;
884 /* I'm not proud of this hack. Eventually we will have the
885 infrastructure to indicate the size of saved registers on a
886 per-frame basis, but right now we don't; the kernel saves eight
887 bytes but we only want four. Use regs_base to access any
889 if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
)
890 regs_base
= sigcontext_base
+ 4;
892 regs_base
= sigcontext_base
;
894 if (mips_linux_restart_reg_p (gdbarch
))
895 trad_frame_set_reg_addr (this_cache
,
897 + gdbarch_num_regs (gdbarch
)),
898 regs_base
+ SIGCONTEXT_REGS
);
900 for (ireg
= 1; ireg
< 32; ireg
++)
901 trad_frame_set_reg_addr (this_cache
,
902 ireg
+ MIPS_ZERO_REGNUM
903 + gdbarch_num_regs (gdbarch
),
904 regs_base
+ SIGCONTEXT_REGS
905 + ireg
* SIGCONTEXT_REG_SIZE
);
907 /* The way that floating point registers are saved, unfortunately,
908 depends on the architecture the kernel is built for. For the r3000 and
909 tx39, four bytes of each register are at the beginning of each of the
910 32 eight byte slots. For everything else, the registers are saved
911 using double precision; only the even-numbered slots are initialized,
912 and the high bits are the odd-numbered register. Assume the latter
913 layout, since we can't tell, and it's much more common. Which bits are
914 the "high" bits depends on endianness. */
915 for (ireg
= 0; ireg
< 32; ireg
++)
916 if ((gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
) != (ireg
& 1))
917 trad_frame_set_reg_addr (this_cache
,
919 gdbarch_num_regs (gdbarch
),
920 sigcontext_base
+ SIGCONTEXT_FPREGS
+ 4
921 + (ireg
& ~1) * SIGCONTEXT_REG_SIZE
);
923 trad_frame_set_reg_addr (this_cache
,
925 + gdbarch_num_regs (gdbarch
),
926 sigcontext_base
+ SIGCONTEXT_FPREGS
927 + (ireg
& ~1) * SIGCONTEXT_REG_SIZE
);
929 trad_frame_set_reg_addr (this_cache
,
930 regs
->pc
+ gdbarch_num_regs (gdbarch
),
931 regs_base
+ SIGCONTEXT_PC
);
933 trad_frame_set_reg_addr (this_cache
,
934 regs
->fp_control_status
935 + gdbarch_num_regs (gdbarch
),
936 sigcontext_base
+ SIGCONTEXT_FPCSR
);
937 trad_frame_set_reg_addr (this_cache
,
938 regs
->hi
+ gdbarch_num_regs (gdbarch
),
939 regs_base
+ SIGCONTEXT_HI
);
940 trad_frame_set_reg_addr (this_cache
,
941 regs
->lo
+ gdbarch_num_regs (gdbarch
),
942 regs_base
+ SIGCONTEXT_LO
);
943 trad_frame_set_reg_addr (this_cache
,
944 regs
->cause
+ gdbarch_num_regs (gdbarch
),
945 sigcontext_base
+ SIGCONTEXT_CAUSE
);
946 trad_frame_set_reg_addr (this_cache
,
947 regs
->badvaddr
+ gdbarch_num_regs (gdbarch
),
948 sigcontext_base
+ SIGCONTEXT_BADVADDR
);
950 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
951 trad_frame_set_id (this_cache
, frame_id_build (frame_sp
, func
));
955 /* For N32/N64 things look different. There is no non-rt signal frame.
957 struct rt_sigframe_n32 {
958 u32 rs_ass[4]; [ argument save space for o32 ]
959 u32 rs_code[2]; [ signal trampoline or fill ]
960 struct siginfo rs_info;
961 struct ucontextn32 rs_uc;
968 struct sigcontext uc_mcontext;
969 sigset_t uc_sigmask; [ mask last for extensibility ]
973 u32 rs_ass[4]; [ argument save space for o32 ]
974 u32 rs_code[2]; [ signal trampoline ]
975 struct siginfo rs_info;
976 struct ucontext rs_uc;
980 unsigned long uc_flags;
981 struct ucontext *uc_link;
983 struct sigcontext uc_mcontext;
984 sigset_t uc_sigmask; [ mask last for extensibility ]
987 And the sigcontext is different (this is for both n32 and n64):
990 unsigned long long sc_regs[32];
991 unsigned long long sc_fpregs[32];
992 unsigned long long sc_mdhi;
993 unsigned long long sc_hi1;
994 unsigned long long sc_hi2;
995 unsigned long long sc_hi3;
996 unsigned long long sc_mdlo;
997 unsigned long long sc_lo1;
998 unsigned long long sc_lo2;
999 unsigned long long sc_lo3;
1000 unsigned long long sc_pc;
1001 unsigned int sc_fpc_csr;
1002 unsigned int sc_used_math;
1003 unsigned int sc_dsp;
1004 unsigned int sc_reserved;
1007 That is the post-2.6.12 definition of the 64-bit sigcontext; before
1008 then, there were no hi1-hi3 or lo1-lo3. Cause and badvaddr were
1012 #define N32_STACK_T_SIZE STACK_T_SIZE
1013 #define N64_STACK_T_SIZE (2 * 8 + 4)
1014 #define N32_UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + N32_STACK_T_SIZE + 4)
1015 #define N64_UCONTEXT_SIGCONTEXT_OFFSET (2 * 8 + N64_STACK_T_SIZE + 4)
1016 #define N32_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
1017 + RTSIGFRAME_SIGINFO_SIZE \
1018 + N32_UCONTEXT_SIGCONTEXT_OFFSET)
1019 #define N64_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
1020 + RTSIGFRAME_SIGINFO_SIZE \
1021 + N64_UCONTEXT_SIGCONTEXT_OFFSET)
1023 #define N64_SIGCONTEXT_REGS (0 * 8)
1024 #define N64_SIGCONTEXT_FPREGS (32 * 8)
1025 #define N64_SIGCONTEXT_HI (64 * 8)
1026 #define N64_SIGCONTEXT_LO (68 * 8)
1027 #define N64_SIGCONTEXT_PC (72 * 8)
1028 #define N64_SIGCONTEXT_FPCSR (73 * 8)
1030 #define N64_SIGCONTEXT_REG_SIZE 8
1033 mips_linux_n32n64_sigframe_init (const struct tramp_frame
*self
,
1034 struct frame_info
*this_frame
,
1035 struct trad_frame_cache
*this_cache
,
1038 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1039 int ireg
, reg_position
;
1040 CORE_ADDR frame_sp
= get_frame_sp (this_frame
);
1041 CORE_ADDR sigcontext_base
;
1042 const struct mips_regnum
*regs
= mips_regnum (gdbarch
);
1044 if (self
== &mips_linux_n32_rt_sigframe
)
1045 sigcontext_base
= frame_sp
+ N32_SIGFRAME_SIGCONTEXT_OFFSET
;
1047 sigcontext_base
= frame_sp
+ N64_SIGFRAME_SIGCONTEXT_OFFSET
;
1049 if (mips_linux_restart_reg_p (gdbarch
))
1050 trad_frame_set_reg_addr (this_cache
,
1051 (MIPS_RESTART_REGNUM
1052 + gdbarch_num_regs (gdbarch
)),
1053 sigcontext_base
+ N64_SIGCONTEXT_REGS
);
1055 for (ireg
= 1; ireg
< 32; ireg
++)
1056 trad_frame_set_reg_addr (this_cache
,
1057 ireg
+ MIPS_ZERO_REGNUM
1058 + gdbarch_num_regs (gdbarch
),
1059 sigcontext_base
+ N64_SIGCONTEXT_REGS
1060 + ireg
* N64_SIGCONTEXT_REG_SIZE
);
1062 for (ireg
= 0; ireg
< 32; ireg
++)
1063 trad_frame_set_reg_addr (this_cache
,
1065 + gdbarch_num_regs (gdbarch
),
1066 sigcontext_base
+ N64_SIGCONTEXT_FPREGS
1067 + ireg
* N64_SIGCONTEXT_REG_SIZE
);
1069 trad_frame_set_reg_addr (this_cache
,
1070 regs
->pc
+ gdbarch_num_regs (gdbarch
),
1071 sigcontext_base
+ N64_SIGCONTEXT_PC
);
1073 trad_frame_set_reg_addr (this_cache
,
1074 regs
->fp_control_status
1075 + gdbarch_num_regs (gdbarch
),
1076 sigcontext_base
+ N64_SIGCONTEXT_FPCSR
);
1077 trad_frame_set_reg_addr (this_cache
,
1078 regs
->hi
+ gdbarch_num_regs (gdbarch
),
1079 sigcontext_base
+ N64_SIGCONTEXT_HI
);
1080 trad_frame_set_reg_addr (this_cache
,
1081 regs
->lo
+ gdbarch_num_regs (gdbarch
),
1082 sigcontext_base
+ N64_SIGCONTEXT_LO
);
1084 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
1085 trad_frame_set_id (this_cache
, frame_id_build (frame_sp
, func
));
1089 mips_linux_write_pc (struct regcache
*regcache
, CORE_ADDR pc
)
1091 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
1092 regcache_cooked_write_unsigned (regcache
, gdbarch_pc_regnum (gdbarch
), pc
);
1094 /* Clear the syscall restart flag. */
1095 if (mips_linux_restart_reg_p (gdbarch
))
1096 regcache_cooked_write_unsigned (regcache
, MIPS_RESTART_REGNUM
, 0);
1099 /* Return 1 if MIPS_RESTART_REGNUM is usable. */
1102 mips_linux_restart_reg_p (struct gdbarch
*gdbarch
)
1104 /* If we do not have a target description with registers, then
1105 MIPS_RESTART_REGNUM will not be included in the register set. */
1106 if (!tdesc_has_registers (gdbarch_target_desc (gdbarch
)))
1109 /* If we do, then MIPS_RESTART_REGNUM is safe to check; it will
1110 either be GPR-sized or missing. */
1111 return register_size (gdbarch
, MIPS_RESTART_REGNUM
) > 0;
1114 /* When FRAME is at a syscall instruction, return the PC of the next
1115 instruction to be executed. */
1118 mips_linux_syscall_next_pc (struct frame_info
*frame
)
1120 CORE_ADDR pc
= get_frame_pc (frame
);
1121 ULONGEST v0
= get_frame_register_unsigned (frame
, MIPS_V0_REGNUM
);
1123 /* If we are about to make a sigreturn syscall, use the unwinder to
1124 decode the signal frame. */
1125 if (v0
== MIPS_NR_sigreturn
1126 || v0
== MIPS_NR_rt_sigreturn
1127 || v0
== MIPS_NR_N64_rt_sigreturn
1128 || v0
== MIPS_NR_N32_rt_sigreturn
)
1129 return frame_unwind_caller_pc (get_current_frame ());
1134 /* Initialize one of the GNU/Linux OS ABIs. */
1137 mips_linux_init_abi (struct gdbarch_info info
,
1138 struct gdbarch
*gdbarch
)
1140 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1141 enum mips_abi abi
= mips_abi (gdbarch
);
1142 struct tdesc_arch_data
*tdesc_data
= (void *) info
.tdep_info
;
1144 linux_init_abi (info
, gdbarch
);
1149 set_gdbarch_get_longjmp_target (gdbarch
,
1150 mips_linux_get_longjmp_target
);
1151 set_solib_svr4_fetch_link_map_offsets
1152 (gdbarch
, svr4_ilp32_fetch_link_map_offsets
);
1153 tramp_frame_prepend_unwinder (gdbarch
, &mips_linux_o32_sigframe
);
1154 tramp_frame_prepend_unwinder (gdbarch
, &mips_linux_o32_rt_sigframe
);
1157 set_gdbarch_get_longjmp_target (gdbarch
,
1158 mips_linux_get_longjmp_target
);
1159 set_solib_svr4_fetch_link_map_offsets
1160 (gdbarch
, svr4_ilp32_fetch_link_map_offsets
);
1161 set_gdbarch_long_double_bit (gdbarch
, 128);
1162 /* These floatformats should probably be renamed. MIPS uses
1163 the same 128-bit IEEE floating point format that IA-64 uses,
1164 except that the quiet/signalling NaN bit is reversed (GDB
1165 does not distinguish between quiet and signalling NaNs). */
1166 set_gdbarch_long_double_format (gdbarch
, floatformats_ia64_quad
);
1167 tramp_frame_prepend_unwinder (gdbarch
, &mips_linux_n32_rt_sigframe
);
1170 set_gdbarch_get_longjmp_target (gdbarch
,
1171 mips64_linux_get_longjmp_target
);
1172 set_solib_svr4_fetch_link_map_offsets
1173 (gdbarch
, svr4_lp64_fetch_link_map_offsets
);
1174 set_gdbarch_long_double_bit (gdbarch
, 128);
1175 /* These floatformats should probably be renamed. MIPS uses
1176 the same 128-bit IEEE floating point format that IA-64 uses,
1177 except that the quiet/signalling NaN bit is reversed (GDB
1178 does not distinguish between quiet and signalling NaNs). */
1179 set_gdbarch_long_double_format (gdbarch
, floatformats_ia64_quad
);
1180 tramp_frame_prepend_unwinder (gdbarch
, &mips_linux_n64_rt_sigframe
);
1186 set_gdbarch_skip_solib_resolver (gdbarch
, mips_linux_skip_resolver
);
1188 set_gdbarch_software_single_step (gdbarch
, mips_software_single_step
);
1190 /* Enable TLS support. */
1191 set_gdbarch_fetch_tls_load_module_address (gdbarch
,
1192 svr4_fetch_objfile_link_map
);
1194 /* Initialize this lazily, to avoid an initialization order
1195 dependency on solib-svr4.c's _initialize routine. */
1196 if (mips_svr4_so_ops
.in_dynsym_resolve_code
== NULL
)
1198 mips_svr4_so_ops
= svr4_so_ops
;
1199 mips_svr4_so_ops
.in_dynsym_resolve_code
1200 = mips_linux_in_dynsym_resolve_code
;
1202 set_solib_ops (gdbarch
, &mips_svr4_so_ops
);
1204 set_gdbarch_write_pc (gdbarch
, mips_linux_write_pc
);
1206 set_gdbarch_core_read_description (gdbarch
,
1207 mips_linux_core_read_description
);
1209 tdep
->syscall_next_pc
= mips_linux_syscall_next_pc
;
1213 const struct tdesc_feature
*feature
;
1215 /* If we have target-described registers, then we can safely
1216 reserve a number for MIPS_RESTART_REGNUM (whether it is
1217 described or not). */
1218 gdb_assert (gdbarch_num_regs (gdbarch
) <= MIPS_RESTART_REGNUM
);
1219 set_gdbarch_num_regs (gdbarch
, MIPS_RESTART_REGNUM
+ 1);
1221 /* If it's present, then assign it to the reserved number. */
1222 feature
= tdesc_find_feature (info
.target_desc
,
1223 "org.gnu.gdb.mips.linux");
1224 if (feature
!= NULL
)
1225 tdesc_numbered_register (feature
, tdesc_data
, MIPS_RESTART_REGNUM
,
1230 /* Provide a prototype to silence -Wmissing-prototypes. */
1231 extern initialize_file_ftype _initialize_mips_linux_tdep
;
1234 _initialize_mips_linux_tdep (void)
1236 const struct bfd_arch_info
*arch_info
;
1238 for (arch_info
= bfd_lookup_arch (bfd_arch_mips
, 0);
1240 arch_info
= arch_info
->next
)
1242 gdbarch_register_osabi (bfd_arch_mips
, arch_info
->mach
,
1244 mips_linux_init_abi
);
1247 deprecated_add_core_fns (®set_core_fns
);