1 /* Target-dependent code for GNU/Linux on MIPS processors.
3 Copyright (C) 2001-2017 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
23 #include "solib-svr4.h"
25 #include "mips-tdep.h"
28 #include "trad-frame.h"
29 #include "tramp-frame.h"
35 #include "target-descriptions.h"
37 #include "mips-linux-tdep.h"
38 #include "glibc-tdep.h"
39 #include "linux-tdep.h"
40 #include "xml-syscall.h"
41 #include "gdb_signals.h"
43 static struct target_so_ops mips_svr4_so_ops
;
45 /* This enum represents the signals' numbers on the MIPS
46 architecture. It just contains the signal definitions which are
47 different from the generic implementation.
49 It is derived from the file <arch/mips/include/uapi/asm/signal.h>,
50 from the Linux kernel tree. */
54 MIPS_LINUX_SIGEMT
= 7,
55 MIPS_LINUX_SIGBUS
= 10,
56 MIPS_LINUX_SIGSYS
= 12,
57 MIPS_LINUX_SIGUSR1
= 16,
58 MIPS_LINUX_SIGUSR2
= 17,
59 MIPS_LINUX_SIGCHLD
= 18,
60 MIPS_LINUX_SIGCLD
= MIPS_LINUX_SIGCHLD
,
61 MIPS_LINUX_SIGPWR
= 19,
62 MIPS_LINUX_SIGWINCH
= 20,
63 MIPS_LINUX_SIGURG
= 21,
64 MIPS_LINUX_SIGIO
= 22,
65 MIPS_LINUX_SIGPOLL
= MIPS_LINUX_SIGIO
,
66 MIPS_LINUX_SIGSTOP
= 23,
67 MIPS_LINUX_SIGTSTP
= 24,
68 MIPS_LINUX_SIGCONT
= 25,
69 MIPS_LINUX_SIGTTIN
= 26,
70 MIPS_LINUX_SIGTTOU
= 27,
71 MIPS_LINUX_SIGVTALRM
= 28,
72 MIPS_LINUX_SIGPROF
= 29,
73 MIPS_LINUX_SIGXCPU
= 30,
74 MIPS_LINUX_SIGXFSZ
= 31,
76 MIPS_LINUX_SIGRTMIN
= 32,
77 MIPS_LINUX_SIGRT64
= 64,
78 MIPS_LINUX_SIGRTMAX
= 127,
81 /* Figure out where the longjmp will land.
82 We expect the first arg to be a pointer to the jmp_buf structure
83 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
84 at. The pc is copied into PC. This routine returns 1 on
87 #define MIPS_LINUX_JB_ELEMENT_SIZE 4
88 #define MIPS_LINUX_JB_PC 0
91 mips_linux_get_longjmp_target (struct frame_info
*frame
, CORE_ADDR
*pc
)
94 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
95 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
96 gdb_byte buf
[gdbarch_ptr_bit (gdbarch
) / TARGET_CHAR_BIT
];
98 jb_addr
= get_frame_register_unsigned (frame
, MIPS_A0_REGNUM
);
100 if (target_read_memory ((jb_addr
101 + MIPS_LINUX_JB_PC
* MIPS_LINUX_JB_ELEMENT_SIZE
),
102 buf
, gdbarch_ptr_bit (gdbarch
) / TARGET_CHAR_BIT
))
105 *pc
= extract_unsigned_integer (buf
,
106 gdbarch_ptr_bit (gdbarch
) / TARGET_CHAR_BIT
,
112 /* Transform the bits comprising a 32-bit register to the right size
113 for regcache_raw_supply(). This is needed when mips_isa_regsize()
117 supply_32bit_reg (struct regcache
*regcache
, int regnum
, const void *addr
)
119 regcache
->raw_supply_integer (regnum
, (const gdb_byte
*) addr
, 4, true);
122 /* Unpack an elf_gregset_t into GDB's register cache. */
125 mips_supply_gregset (struct regcache
*regcache
,
126 const mips_elf_gregset_t
*gregsetp
)
129 const mips_elf_greg_t
*regp
= *gregsetp
;
130 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
132 for (regi
= EF_REG0
+ 1; regi
<= EF_REG31
; regi
++)
133 supply_32bit_reg (regcache
, regi
- EF_REG0
, regp
+ regi
);
135 if (mips_linux_restart_reg_p (gdbarch
))
136 supply_32bit_reg (regcache
, MIPS_RESTART_REGNUM
, regp
+ EF_REG0
);
138 supply_32bit_reg (regcache
, mips_regnum (gdbarch
)->lo
, regp
+ EF_LO
);
139 supply_32bit_reg (regcache
, mips_regnum (gdbarch
)->hi
, regp
+ EF_HI
);
141 supply_32bit_reg (regcache
, mips_regnum (gdbarch
)->pc
,
143 supply_32bit_reg (regcache
, mips_regnum (gdbarch
)->badvaddr
,
144 regp
+ EF_CP0_BADVADDR
);
145 supply_32bit_reg (regcache
, MIPS_PS_REGNUM
, regp
+ EF_CP0_STATUS
);
146 supply_32bit_reg (regcache
, mips_regnum (gdbarch
)->cause
,
147 regp
+ EF_CP0_CAUSE
);
149 /* Fill the inaccessible zero register with zero. */
150 regcache
->raw_supply_zeroed (MIPS_ZERO_REGNUM
);
154 mips_supply_gregset_wrapper (const struct regset
*regset
,
155 struct regcache
*regcache
,
156 int regnum
, const void *gregs
, size_t len
)
158 gdb_assert (len
>= sizeof (mips_elf_gregset_t
));
160 mips_supply_gregset (regcache
, (const mips_elf_gregset_t
*)gregs
);
163 /* Pack our registers (or one register) into an elf_gregset_t. */
166 mips_fill_gregset (const struct regcache
*regcache
,
167 mips_elf_gregset_t
*gregsetp
, int regno
)
169 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
171 mips_elf_greg_t
*regp
= *gregsetp
;
176 memset (regp
, 0, sizeof (mips_elf_gregset_t
));
177 for (regi
= 1; regi
< 32; regi
++)
178 mips_fill_gregset (regcache
, gregsetp
, regi
);
179 mips_fill_gregset (regcache
, gregsetp
, mips_regnum (gdbarch
)->lo
);
180 mips_fill_gregset (regcache
, gregsetp
, mips_regnum (gdbarch
)->hi
);
181 mips_fill_gregset (regcache
, gregsetp
, mips_regnum (gdbarch
)->pc
);
182 mips_fill_gregset (regcache
, gregsetp
, mips_regnum (gdbarch
)->badvaddr
);
183 mips_fill_gregset (regcache
, gregsetp
, MIPS_PS_REGNUM
);
184 mips_fill_gregset (regcache
, gregsetp
, mips_regnum (gdbarch
)->cause
);
185 mips_fill_gregset (regcache
, gregsetp
, MIPS_RESTART_REGNUM
);
189 if (regno
> 0 && regno
< 32)
191 dst
= regp
+ regno
+ EF_REG0
;
192 regcache_raw_collect (regcache
, regno
, dst
);
196 if (regno
== mips_regnum (gdbarch
)->lo
)
198 else if (regno
== mips_regnum (gdbarch
)->hi
)
200 else if (regno
== mips_regnum (gdbarch
)->pc
)
201 regaddr
= EF_CP0_EPC
;
202 else if (regno
== mips_regnum (gdbarch
)->badvaddr
)
203 regaddr
= EF_CP0_BADVADDR
;
204 else if (regno
== MIPS_PS_REGNUM
)
205 regaddr
= EF_CP0_STATUS
;
206 else if (regno
== mips_regnum (gdbarch
)->cause
)
207 regaddr
= EF_CP0_CAUSE
;
208 else if (mips_linux_restart_reg_p (gdbarch
)
209 && regno
== MIPS_RESTART_REGNUM
)
216 dst
= regp
+ regaddr
;
217 regcache_raw_collect (regcache
, regno
, dst
);
222 mips_fill_gregset_wrapper (const struct regset
*regset
,
223 const struct regcache
*regcache
,
224 int regnum
, void *gregs
, size_t len
)
226 gdb_assert (len
>= sizeof (mips_elf_gregset_t
));
228 mips_fill_gregset (regcache
, (mips_elf_gregset_t
*)gregs
, regnum
);
231 /* Likewise, unpack an elf_fpregset_t. */
234 mips_supply_fpregset (struct regcache
*regcache
,
235 const mips_elf_fpregset_t
*fpregsetp
)
237 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
240 for (regi
= 0; regi
< 32; regi
++)
241 regcache_raw_supply (regcache
,
242 gdbarch_fp0_regnum (gdbarch
) + regi
,
245 regcache_raw_supply (regcache
,
246 mips_regnum (gdbarch
)->fp_control_status
,
249 /* FIXME: how can we supply FCRIR? The ABI doesn't tell us. */
250 regcache
->raw_supply_zeroed
251 (mips_regnum (gdbarch
)->fp_implementation_revision
);
255 mips_supply_fpregset_wrapper (const struct regset
*regset
,
256 struct regcache
*regcache
,
257 int regnum
, const void *gregs
, size_t len
)
259 gdb_assert (len
>= sizeof (mips_elf_fpregset_t
));
261 mips_supply_fpregset (regcache
, (const mips_elf_fpregset_t
*)gregs
);
264 /* Likewise, pack one or all floating point registers into an
268 mips_fill_fpregset (const struct regcache
*regcache
,
269 mips_elf_fpregset_t
*fpregsetp
, int regno
)
271 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
274 if ((regno
>= gdbarch_fp0_regnum (gdbarch
))
275 && (regno
< gdbarch_fp0_regnum (gdbarch
) + 32))
277 to
= (char *) (*fpregsetp
+ regno
- gdbarch_fp0_regnum (gdbarch
));
278 regcache_raw_collect (regcache
, regno
, to
);
280 else if (regno
== mips_regnum (gdbarch
)->fp_control_status
)
282 to
= (char *) (*fpregsetp
+ 32);
283 regcache_raw_collect (regcache
, regno
, to
);
285 else if (regno
== -1)
289 for (regi
= 0; regi
< 32; regi
++)
290 mips_fill_fpregset (regcache
, fpregsetp
,
291 gdbarch_fp0_regnum (gdbarch
) + regi
);
292 mips_fill_fpregset (regcache
, fpregsetp
,
293 mips_regnum (gdbarch
)->fp_control_status
);
298 mips_fill_fpregset_wrapper (const struct regset
*regset
,
299 const struct regcache
*regcache
,
300 int regnum
, void *gregs
, size_t len
)
302 gdb_assert (len
>= sizeof (mips_elf_fpregset_t
));
304 mips_fill_fpregset (regcache
, (mips_elf_fpregset_t
*)gregs
, regnum
);
307 /* Support for 64-bit ABIs. */
309 /* Figure out where the longjmp will land.
310 We expect the first arg to be a pointer to the jmp_buf structure
311 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
312 at. The pc is copied into PC. This routine returns 1 on
315 /* Details about jmp_buf. */
317 #define MIPS64_LINUX_JB_PC 0
320 mips64_linux_get_longjmp_target (struct frame_info
*frame
, CORE_ADDR
*pc
)
323 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
324 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
326 = (gdb_byte
*) alloca (gdbarch_ptr_bit (gdbarch
) / TARGET_CHAR_BIT
);
327 int element_size
= gdbarch_ptr_bit (gdbarch
) == 32 ? 4 : 8;
329 jb_addr
= get_frame_register_unsigned (frame
, MIPS_A0_REGNUM
);
331 if (target_read_memory (jb_addr
+ MIPS64_LINUX_JB_PC
* element_size
,
333 gdbarch_ptr_bit (gdbarch
) / TARGET_CHAR_BIT
))
336 *pc
= extract_unsigned_integer (buf
,
337 gdbarch_ptr_bit (gdbarch
) / TARGET_CHAR_BIT
,
343 /* Register set support functions. These operate on standard 64-bit
344 regsets, but work whether the target is 32-bit or 64-bit. A 32-bit
345 target will still use the 64-bit format for PTRACE_GETREGS. */
347 /* Supply a 64-bit register. */
350 supply_64bit_reg (struct regcache
*regcache
, int regnum
,
353 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
354 if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
355 && register_size (gdbarch
, regnum
) == 4)
356 regcache_raw_supply (regcache
, regnum
, buf
+ 4);
358 regcache_raw_supply (regcache
, regnum
, buf
);
361 /* Unpack a 64-bit elf_gregset_t into GDB's register cache. */
364 mips64_supply_gregset (struct regcache
*regcache
,
365 const mips64_elf_gregset_t
*gregsetp
)
368 const mips64_elf_greg_t
*regp
= *gregsetp
;
369 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
371 for (regi
= MIPS64_EF_REG0
+ 1; regi
<= MIPS64_EF_REG31
; regi
++)
372 supply_64bit_reg (regcache
, regi
- MIPS64_EF_REG0
,
373 (const gdb_byte
*) (regp
+ regi
));
375 if (mips_linux_restart_reg_p (gdbarch
))
376 supply_64bit_reg (regcache
, MIPS_RESTART_REGNUM
,
377 (const gdb_byte
*) (regp
+ MIPS64_EF_REG0
));
379 supply_64bit_reg (regcache
, mips_regnum (gdbarch
)->lo
,
380 (const gdb_byte
*) (regp
+ MIPS64_EF_LO
));
381 supply_64bit_reg (regcache
, mips_regnum (gdbarch
)->hi
,
382 (const gdb_byte
*) (regp
+ MIPS64_EF_HI
));
384 supply_64bit_reg (regcache
, mips_regnum (gdbarch
)->pc
,
385 (const gdb_byte
*) (regp
+ MIPS64_EF_CP0_EPC
));
386 supply_64bit_reg (regcache
, mips_regnum (gdbarch
)->badvaddr
,
387 (const gdb_byte
*) (regp
+ MIPS64_EF_CP0_BADVADDR
));
388 supply_64bit_reg (regcache
, MIPS_PS_REGNUM
,
389 (const gdb_byte
*) (regp
+ MIPS64_EF_CP0_STATUS
));
390 supply_64bit_reg (regcache
, mips_regnum (gdbarch
)->cause
,
391 (const gdb_byte
*) (regp
+ MIPS64_EF_CP0_CAUSE
));
393 /* Fill the inaccessible zero register with zero. */
394 regcache
->raw_supply_zeroed (MIPS_ZERO_REGNUM
);
398 mips64_supply_gregset_wrapper (const struct regset
*regset
,
399 struct regcache
*regcache
,
400 int regnum
, const void *gregs
, size_t len
)
402 gdb_assert (len
>= sizeof (mips64_elf_gregset_t
));
404 mips64_supply_gregset (regcache
, (const mips64_elf_gregset_t
*)gregs
);
407 /* Pack our registers (or one register) into a 64-bit elf_gregset_t. */
410 mips64_fill_gregset (const struct regcache
*regcache
,
411 mips64_elf_gregset_t
*gregsetp
, int regno
)
413 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
415 mips64_elf_greg_t
*regp
= *gregsetp
;
420 memset (regp
, 0, sizeof (mips64_elf_gregset_t
));
421 for (regi
= 1; regi
< 32; regi
++)
422 mips64_fill_gregset (regcache
, gregsetp
, regi
);
423 mips64_fill_gregset (regcache
, gregsetp
, mips_regnum (gdbarch
)->lo
);
424 mips64_fill_gregset (regcache
, gregsetp
, mips_regnum (gdbarch
)->hi
);
425 mips64_fill_gregset (regcache
, gregsetp
, mips_regnum (gdbarch
)->pc
);
426 mips64_fill_gregset (regcache
, gregsetp
,
427 mips_regnum (gdbarch
)->badvaddr
);
428 mips64_fill_gregset (regcache
, gregsetp
, MIPS_PS_REGNUM
);
429 mips64_fill_gregset (regcache
, gregsetp
, mips_regnum (gdbarch
)->cause
);
430 mips64_fill_gregset (regcache
, gregsetp
, MIPS_RESTART_REGNUM
);
434 if (regno
> 0 && regno
< 32)
435 regaddr
= regno
+ MIPS64_EF_REG0
;
436 else if (regno
== mips_regnum (gdbarch
)->lo
)
437 regaddr
= MIPS64_EF_LO
;
438 else if (regno
== mips_regnum (gdbarch
)->hi
)
439 regaddr
= MIPS64_EF_HI
;
440 else if (regno
== mips_regnum (gdbarch
)->pc
)
441 regaddr
= MIPS64_EF_CP0_EPC
;
442 else if (regno
== mips_regnum (gdbarch
)->badvaddr
)
443 regaddr
= MIPS64_EF_CP0_BADVADDR
;
444 else if (regno
== MIPS_PS_REGNUM
)
445 regaddr
= MIPS64_EF_CP0_STATUS
;
446 else if (regno
== mips_regnum (gdbarch
)->cause
)
447 regaddr
= MIPS64_EF_CP0_CAUSE
;
448 else if (mips_linux_restart_reg_p (gdbarch
)
449 && regno
== MIPS_RESTART_REGNUM
)
450 regaddr
= MIPS64_EF_REG0
;
456 dst
= regp
+ regaddr
;
457 regcache
->raw_collect_integer (regno
, (gdb_byte
*) dst
, 8, true);
462 mips64_fill_gregset_wrapper (const struct regset
*regset
,
463 const struct regcache
*regcache
,
464 int regnum
, void *gregs
, size_t len
)
466 gdb_assert (len
>= sizeof (mips64_elf_gregset_t
));
468 mips64_fill_gregset (regcache
, (mips64_elf_gregset_t
*)gregs
, regnum
);
471 /* Likewise, unpack an elf_fpregset_t. */
474 mips64_supply_fpregset (struct regcache
*regcache
,
475 const mips64_elf_fpregset_t
*fpregsetp
)
477 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
480 /* See mips_linux_o32_sigframe_init for a description of the
481 peculiar FP register layout. */
482 if (register_size (gdbarch
, gdbarch_fp0_regnum (gdbarch
)) == 4)
483 for (regi
= 0; regi
< 32; regi
++)
485 const gdb_byte
*reg_ptr
486 = (const gdb_byte
*) (*fpregsetp
+ (regi
& ~1));
487 if ((gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
) != (regi
& 1))
489 regcache_raw_supply (regcache
,
490 gdbarch_fp0_regnum (gdbarch
) + regi
,
494 for (regi
= 0; regi
< 32; regi
++)
495 regcache_raw_supply (regcache
,
496 gdbarch_fp0_regnum (gdbarch
) + regi
,
497 (const char *) (*fpregsetp
+ regi
));
499 supply_32bit_reg (regcache
, mips_regnum (gdbarch
)->fp_control_status
,
500 (const gdb_byte
*) (*fpregsetp
+ 32));
502 /* The ABI doesn't tell us how to supply FCRIR, and core dumps don't
503 include it - but the result of PTRACE_GETFPREGS does. The best we
504 can do is to assume that its value is present. */
505 supply_32bit_reg (regcache
,
506 mips_regnum (gdbarch
)->fp_implementation_revision
,
507 (const gdb_byte
*) (*fpregsetp
+ 32) + 4);
511 mips64_supply_fpregset_wrapper (const struct regset
*regset
,
512 struct regcache
*regcache
,
513 int regnum
, const void *gregs
, size_t len
)
515 gdb_assert (len
>= sizeof (mips64_elf_fpregset_t
));
517 mips64_supply_fpregset (regcache
, (const mips64_elf_fpregset_t
*)gregs
);
520 /* Likewise, pack one or all floating point registers into an
524 mips64_fill_fpregset (const struct regcache
*regcache
,
525 mips64_elf_fpregset_t
*fpregsetp
, int regno
)
527 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
528 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
531 if ((regno
>= gdbarch_fp0_regnum (gdbarch
))
532 && (regno
< gdbarch_fp0_regnum (gdbarch
) + 32))
534 /* See mips_linux_o32_sigframe_init for a description of the
535 peculiar FP register layout. */
536 if (register_size (gdbarch
, regno
) == 4)
538 int regi
= regno
- gdbarch_fp0_regnum (gdbarch
);
540 to
= (gdb_byte
*) (*fpregsetp
+ (regi
& ~1));
541 if ((gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
) != (regi
& 1))
543 regcache_raw_collect (regcache
, regno
, to
);
547 to
= (gdb_byte
*) (*fpregsetp
+ regno
548 - gdbarch_fp0_regnum (gdbarch
));
549 regcache_raw_collect (regcache
, regno
, to
);
552 else if (regno
== mips_regnum (gdbarch
)->fp_control_status
)
554 to
= (gdb_byte
*) (*fpregsetp
+ 32);
555 regcache
->raw_collect_integer (regno
, to
, 4, true);
557 else if (regno
== mips_regnum (gdbarch
)->fp_implementation_revision
)
559 to
= (gdb_byte
*) (*fpregsetp
+ 32) + 4;
560 regcache
->raw_collect_integer (regno
, to
, 4, true);
562 else if (regno
== -1)
566 for (regi
= 0; regi
< 32; regi
++)
567 mips64_fill_fpregset (regcache
, fpregsetp
,
568 gdbarch_fp0_regnum (gdbarch
) + regi
);
569 mips64_fill_fpregset (regcache
, fpregsetp
,
570 mips_regnum (gdbarch
)->fp_control_status
);
571 mips64_fill_fpregset (regcache
, fpregsetp
,
572 mips_regnum (gdbarch
)->fp_implementation_revision
);
577 mips64_fill_fpregset_wrapper (const struct regset
*regset
,
578 const struct regcache
*regcache
,
579 int regnum
, void *gregs
, size_t len
)
581 gdb_assert (len
>= sizeof (mips64_elf_fpregset_t
));
583 mips64_fill_fpregset (regcache
, (mips64_elf_fpregset_t
*)gregs
, regnum
);
586 static const struct regset mips_linux_gregset
=
588 NULL
, mips_supply_gregset_wrapper
, mips_fill_gregset_wrapper
591 static const struct regset mips64_linux_gregset
=
593 NULL
, mips64_supply_gregset_wrapper
, mips64_fill_gregset_wrapper
596 static const struct regset mips_linux_fpregset
=
598 NULL
, mips_supply_fpregset_wrapper
, mips_fill_fpregset_wrapper
601 static const struct regset mips64_linux_fpregset
=
603 NULL
, mips64_supply_fpregset_wrapper
, mips64_fill_fpregset_wrapper
607 mips_linux_iterate_over_regset_sections (struct gdbarch
*gdbarch
,
608 iterate_over_regset_sections_cb
*cb
,
610 const struct regcache
*regcache
)
612 if (register_size (gdbarch
, MIPS_ZERO_REGNUM
) == 4)
614 cb (".reg", sizeof (mips_elf_gregset_t
), &mips_linux_gregset
,
616 cb (".reg2", sizeof (mips_elf_fpregset_t
), &mips_linux_fpregset
,
621 cb (".reg", sizeof (mips64_elf_gregset_t
), &mips64_linux_gregset
,
623 cb (".reg2", sizeof (mips64_elf_fpregset_t
), &mips64_linux_fpregset
,
628 static const struct target_desc
*
629 mips_linux_core_read_description (struct gdbarch
*gdbarch
,
630 struct target_ops
*target
,
633 asection
*section
= bfd_get_section_by_name (abfd
, ".reg");
637 switch (bfd_section_size (abfd
, section
))
639 case sizeof (mips_elf_gregset_t
):
640 return mips_tdesc_gp32
;
642 case sizeof (mips64_elf_gregset_t
):
643 return mips_tdesc_gp64
;
651 /* Check the code at PC for a dynamic linker lazy resolution stub.
652 GNU ld for MIPS has put lazy resolution stubs into a ".MIPS.stubs"
653 section uniformly since version 2.15. If the pc is in that section,
654 then we are in such a stub. Before that ".stub" was used in 32-bit
655 ELF binaries, however we do not bother checking for that since we
656 have never had and that case should be extremely rare these days.
657 Instead we pattern-match on the code generated by GNU ld. They look
665 (with the appropriate doubleword instructions for N64). As any lazy
666 resolution stubs in microMIPS binaries will always be in a
667 ".MIPS.stubs" section we only ever verify standard MIPS patterns. */
670 mips_linux_in_dynsym_stub (CORE_ADDR pc
)
672 gdb_byte buf
[28], *p
;
673 ULONGEST insn
, insn1
;
674 int n64
= (mips_abi (target_gdbarch ()) == MIPS_ABI_N64
);
675 enum bfd_endian byte_order
= gdbarch_byte_order (target_gdbarch ());
677 if (in_mips_stubs_section (pc
))
680 read_memory (pc
- 12, buf
, 28);
684 /* ld t9,0x8010(gp) */
689 /* lw t9,0x8010(gp) */
696 insn
= extract_unsigned_integer (p
, 4, byte_order
);
704 insn
= extract_unsigned_integer (p
+ 4, 4, byte_order
);
707 /* 'daddu t7,ra' or 'or t7, ra, zero'*/
708 if (insn
!= 0x03e0782d || insn
!= 0x03e07825)
714 /* 'addu t7,ra' or 'or t7, ra, zero'*/
715 if (insn
!= 0x03e07821 || insn
!= 0x03e07825)
720 insn
= extract_unsigned_integer (p
+ 8, 4, byte_order
);
722 if (insn
!= 0x0320f809)
725 insn
= extract_unsigned_integer (p
+ 12, 4, byte_order
);
728 /* daddiu t8,zero,0 */
729 if ((insn
& 0xffff0000) != 0x64180000)
734 /* addiu t8,zero,0 */
735 if ((insn
& 0xffff0000) != 0x24180000)
742 /* Return non-zero iff PC belongs to the dynamic linker resolution
743 code, a PLT entry, or a lazy binding stub. */
746 mips_linux_in_dynsym_resolve_code (CORE_ADDR pc
)
748 /* Check whether PC is in the dynamic linker. This also checks
749 whether it is in the .plt section, used by non-PIC executables. */
750 if (svr4_in_dynsym_resolve_code (pc
))
753 /* Likewise for the stubs. They live in the .MIPS.stubs section these
754 days, so we check if the PC is within, than fall back to a pattern
756 if (mips_linux_in_dynsym_stub (pc
))
762 /* See the comments for SKIP_SOLIB_RESOLVER at the top of infrun.c,
763 and glibc_skip_solib_resolver in glibc-tdep.c. The normal glibc
764 implementation of this triggers at "fixup" from the same objfile as
765 "_dl_runtime_resolve"; MIPS GNU/Linux can trigger at
766 "__dl_runtime_resolve" directly. An unresolved lazy binding
767 stub will point to _dl_runtime_resolve, which will first call
768 __dl_runtime_resolve, and then pass control to the resolved
772 mips_linux_skip_resolver (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
774 struct bound_minimal_symbol resolver
;
776 resolver
= lookup_minimal_symbol ("__dl_runtime_resolve", NULL
, NULL
);
778 if (resolver
.minsym
&& BMSYMBOL_VALUE_ADDRESS (resolver
) == pc
)
779 return frame_unwind_caller_pc (get_current_frame ());
781 return glibc_skip_solib_resolver (gdbarch
, pc
);
784 /* Signal trampoline support. There are four supported layouts for a
785 signal frame: o32 sigframe, o32 rt_sigframe, n32 rt_sigframe, and
786 n64 rt_sigframe. We handle them all independently; not the most
787 efficient way, but simplest. First, declare all the unwinders. */
789 static void mips_linux_o32_sigframe_init (const struct tramp_frame
*self
,
790 struct frame_info
*this_frame
,
791 struct trad_frame_cache
*this_cache
,
794 static void mips_linux_n32n64_sigframe_init (const struct tramp_frame
*self
,
795 struct frame_info
*this_frame
,
796 struct trad_frame_cache
*this_cache
,
799 static int mips_linux_sigframe_validate (const struct tramp_frame
*self
,
800 struct frame_info
*this_frame
,
803 static int micromips_linux_sigframe_validate (const struct tramp_frame
*self
,
804 struct frame_info
*this_frame
,
807 #define MIPS_NR_LINUX 4000
808 #define MIPS_NR_N64_LINUX 5000
809 #define MIPS_NR_N32_LINUX 6000
811 #define MIPS_NR_sigreturn MIPS_NR_LINUX + 119
812 #define MIPS_NR_rt_sigreturn MIPS_NR_LINUX + 193
813 #define MIPS_NR_N64_rt_sigreturn MIPS_NR_N64_LINUX + 211
814 #define MIPS_NR_N32_rt_sigreturn MIPS_NR_N32_LINUX + 211
816 #define MIPS_INST_LI_V0_SIGRETURN 0x24020000 + MIPS_NR_sigreturn
817 #define MIPS_INST_LI_V0_RT_SIGRETURN 0x24020000 + MIPS_NR_rt_sigreturn
818 #define MIPS_INST_LI_V0_N64_RT_SIGRETURN 0x24020000 + MIPS_NR_N64_rt_sigreturn
819 #define MIPS_INST_LI_V0_N32_RT_SIGRETURN 0x24020000 + MIPS_NR_N32_rt_sigreturn
820 #define MIPS_INST_SYSCALL 0x0000000c
822 #define MICROMIPS_INST_LI_V0 0x3040
823 #define MICROMIPS_INST_POOL32A 0x0000
824 #define MICROMIPS_INST_SYSCALL 0x8b7c
826 static const struct tramp_frame mips_linux_o32_sigframe
= {
830 { MIPS_INST_LI_V0_SIGRETURN
, -1 },
831 { MIPS_INST_SYSCALL
, -1 },
832 { TRAMP_SENTINEL_INSN
, -1 }
834 mips_linux_o32_sigframe_init
,
835 mips_linux_sigframe_validate
838 static const struct tramp_frame mips_linux_o32_rt_sigframe
= {
842 { MIPS_INST_LI_V0_RT_SIGRETURN
, -1 },
843 { MIPS_INST_SYSCALL
, -1 },
844 { TRAMP_SENTINEL_INSN
, -1 } },
845 mips_linux_o32_sigframe_init
,
846 mips_linux_sigframe_validate
849 static const struct tramp_frame mips_linux_n32_rt_sigframe
= {
853 { MIPS_INST_LI_V0_N32_RT_SIGRETURN
, -1 },
854 { MIPS_INST_SYSCALL
, -1 },
855 { TRAMP_SENTINEL_INSN
, -1 }
857 mips_linux_n32n64_sigframe_init
,
858 mips_linux_sigframe_validate
861 static const struct tramp_frame mips_linux_n64_rt_sigframe
= {
865 { MIPS_INST_LI_V0_N64_RT_SIGRETURN
, -1 },
866 { MIPS_INST_SYSCALL
, -1 },
867 { TRAMP_SENTINEL_INSN
, -1 }
869 mips_linux_n32n64_sigframe_init
,
870 mips_linux_sigframe_validate
873 static const struct tramp_frame micromips_linux_o32_sigframe
= {
877 { MICROMIPS_INST_LI_V0
, -1 },
878 { MIPS_NR_sigreturn
, -1 },
879 { MICROMIPS_INST_POOL32A
, -1 },
880 { MICROMIPS_INST_SYSCALL
, -1 },
881 { TRAMP_SENTINEL_INSN
, -1 }
883 mips_linux_o32_sigframe_init
,
884 micromips_linux_sigframe_validate
887 static const struct tramp_frame micromips_linux_o32_rt_sigframe
= {
891 { MICROMIPS_INST_LI_V0
, -1 },
892 { MIPS_NR_rt_sigreturn
, -1 },
893 { MICROMIPS_INST_POOL32A
, -1 },
894 { MICROMIPS_INST_SYSCALL
, -1 },
895 { TRAMP_SENTINEL_INSN
, -1 }
897 mips_linux_o32_sigframe_init
,
898 micromips_linux_sigframe_validate
901 static const struct tramp_frame micromips_linux_n32_rt_sigframe
= {
905 { MICROMIPS_INST_LI_V0
, -1 },
906 { MIPS_NR_N32_rt_sigreturn
, -1 },
907 { MICROMIPS_INST_POOL32A
, -1 },
908 { MICROMIPS_INST_SYSCALL
, -1 },
909 { TRAMP_SENTINEL_INSN
, -1 }
911 mips_linux_n32n64_sigframe_init
,
912 micromips_linux_sigframe_validate
915 static const struct tramp_frame micromips_linux_n64_rt_sigframe
= {
919 { MICROMIPS_INST_LI_V0
, -1 },
920 { MIPS_NR_N64_rt_sigreturn
, -1 },
921 { MICROMIPS_INST_POOL32A
, -1 },
922 { MICROMIPS_INST_SYSCALL
, -1 },
923 { TRAMP_SENTINEL_INSN
, -1 }
925 mips_linux_n32n64_sigframe_init
,
926 micromips_linux_sigframe_validate
930 /* The unwinder for o32 signal frames. The legacy structures look
934 u32 sf_ass[4]; [argument save space for o32]
935 u32 sf_code[2]; [signal trampoline or fill]
936 struct sigcontext sf_sc;
940 Pre-2.6.12 sigcontext:
943 unsigned int sc_regmask; [Unused]
944 unsigned int sc_status;
945 unsigned long long sc_pc;
946 unsigned long long sc_regs[32];
947 unsigned long long sc_fpregs[32];
948 unsigned int sc_ownedfp;
949 unsigned int sc_fpc_csr;
950 unsigned int sc_fpc_eir; [Unused]
951 unsigned int sc_used_math;
952 unsigned int sc_ssflags; [Unused]
953 [Alignment hole of four bytes]
954 unsigned long long sc_mdhi;
955 unsigned long long sc_mdlo;
957 unsigned int sc_cause; [Unused]
958 unsigned int sc_badvaddr; [Unused]
960 unsigned long sc_sigset[4]; [kernel's sigset_t]
963 Post-2.6.12 sigcontext (SmartMIPS/DSP support added):
966 unsigned int sc_regmask; [Unused]
967 unsigned int sc_status; [Unused]
968 unsigned long long sc_pc;
969 unsigned long long sc_regs[32];
970 unsigned long long sc_fpregs[32];
972 unsigned int sc_fpc_csr;
973 unsigned int sc_fpc_eir; [Unused]
974 unsigned int sc_used_math;
976 [Alignment hole of four bytes]
977 unsigned long long sc_mdhi;
978 unsigned long long sc_mdlo;
979 unsigned long sc_hi1;
980 unsigned long sc_lo1;
981 unsigned long sc_hi2;
982 unsigned long sc_lo2;
983 unsigned long sc_hi3;
984 unsigned long sc_lo3;
987 The RT signal frames look like this:
990 u32 rs_ass[4]; [argument save space for o32]
991 u32 rs_code[2] [signal trampoline or fill]
992 struct siginfo rs_info;
993 struct ucontext rs_uc;
997 unsigned long uc_flags;
998 struct ucontext *uc_link;
1000 [Alignment hole of four bytes]
1001 struct sigcontext uc_mcontext;
1002 sigset_t uc_sigmask;
1006 #define SIGFRAME_SIGCONTEXT_OFFSET (6 * 4)
1008 #define RTSIGFRAME_SIGINFO_SIZE 128
1009 #define STACK_T_SIZE (3 * 4)
1010 #define UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + STACK_T_SIZE + 4)
1011 #define RTSIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
1012 + RTSIGFRAME_SIGINFO_SIZE \
1013 + UCONTEXT_SIGCONTEXT_OFFSET)
1015 #define SIGCONTEXT_PC (1 * 8)
1016 #define SIGCONTEXT_REGS (2 * 8)
1017 #define SIGCONTEXT_FPREGS (34 * 8)
1018 #define SIGCONTEXT_FPCSR (66 * 8 + 4)
1019 #define SIGCONTEXT_DSPCTL (68 * 8 + 0)
1020 #define SIGCONTEXT_HI (69 * 8)
1021 #define SIGCONTEXT_LO (70 * 8)
1022 #define SIGCONTEXT_CAUSE (71 * 8 + 0)
1023 #define SIGCONTEXT_BADVADDR (71 * 8 + 4)
1024 #define SIGCONTEXT_HI1 (71 * 8 + 0)
1025 #define SIGCONTEXT_LO1 (71 * 8 + 4)
1026 #define SIGCONTEXT_HI2 (72 * 8 + 0)
1027 #define SIGCONTEXT_LO2 (72 * 8 + 4)
1028 #define SIGCONTEXT_HI3 (73 * 8 + 0)
1029 #define SIGCONTEXT_LO3 (73 * 8 + 4)
1031 #define SIGCONTEXT_REG_SIZE 8
1034 mips_linux_o32_sigframe_init (const struct tramp_frame
*self
,
1035 struct frame_info
*this_frame
,
1036 struct trad_frame_cache
*this_cache
,
1039 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1041 CORE_ADDR frame_sp
= get_frame_sp (this_frame
);
1042 CORE_ADDR sigcontext_base
;
1043 const struct mips_regnum
*regs
= mips_regnum (gdbarch
);
1044 CORE_ADDR regs_base
;
1046 if (self
== &mips_linux_o32_sigframe
1047 || self
== µmips_linux_o32_sigframe
)
1048 sigcontext_base
= frame_sp
+ SIGFRAME_SIGCONTEXT_OFFSET
;
1050 sigcontext_base
= frame_sp
+ RTSIGFRAME_SIGCONTEXT_OFFSET
;
1052 /* I'm not proud of this hack. Eventually we will have the
1053 infrastructure to indicate the size of saved registers on a
1054 per-frame basis, but right now we don't; the kernel saves eight
1055 bytes but we only want four. Use regs_base to access any
1057 if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
)
1058 regs_base
= sigcontext_base
+ 4;
1060 regs_base
= sigcontext_base
;
1062 if (mips_linux_restart_reg_p (gdbarch
))
1063 trad_frame_set_reg_addr (this_cache
,
1064 (MIPS_RESTART_REGNUM
1065 + gdbarch_num_regs (gdbarch
)),
1066 regs_base
+ SIGCONTEXT_REGS
);
1068 for (ireg
= 1; ireg
< 32; ireg
++)
1069 trad_frame_set_reg_addr (this_cache
,
1070 (ireg
+ MIPS_ZERO_REGNUM
1071 + gdbarch_num_regs (gdbarch
)),
1072 (regs_base
+ SIGCONTEXT_REGS
1073 + ireg
* SIGCONTEXT_REG_SIZE
));
1075 /* The way that floating point registers are saved, unfortunately,
1076 depends on the architecture the kernel is built for. For the r3000 and
1077 tx39, four bytes of each register are at the beginning of each of the
1078 32 eight byte slots. For everything else, the registers are saved
1079 using double precision; only the even-numbered slots are initialized,
1080 and the high bits are the odd-numbered register. Assume the latter
1081 layout, since we can't tell, and it's much more common. Which bits are
1082 the "high" bits depends on endianness. */
1083 for (ireg
= 0; ireg
< 32; ireg
++)
1084 if ((gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
) != (ireg
& 1))
1085 trad_frame_set_reg_addr (this_cache
,
1086 ireg
+ regs
->fp0
+ gdbarch_num_regs (gdbarch
),
1087 (sigcontext_base
+ SIGCONTEXT_FPREGS
+ 4
1088 + (ireg
& ~1) * SIGCONTEXT_REG_SIZE
));
1090 trad_frame_set_reg_addr (this_cache
,
1091 ireg
+ regs
->fp0
+ gdbarch_num_regs (gdbarch
),
1092 (sigcontext_base
+ SIGCONTEXT_FPREGS
1093 + (ireg
& ~1) * SIGCONTEXT_REG_SIZE
));
1095 trad_frame_set_reg_addr (this_cache
,
1096 regs
->pc
+ gdbarch_num_regs (gdbarch
),
1097 regs_base
+ SIGCONTEXT_PC
);
1099 trad_frame_set_reg_addr (this_cache
,
1100 (regs
->fp_control_status
1101 + gdbarch_num_regs (gdbarch
)),
1102 sigcontext_base
+ SIGCONTEXT_FPCSR
);
1104 if (regs
->dspctl
!= -1)
1105 trad_frame_set_reg_addr (this_cache
,
1106 regs
->dspctl
+ gdbarch_num_regs (gdbarch
),
1107 sigcontext_base
+ SIGCONTEXT_DSPCTL
);
1109 trad_frame_set_reg_addr (this_cache
,
1110 regs
->hi
+ gdbarch_num_regs (gdbarch
),
1111 regs_base
+ SIGCONTEXT_HI
);
1112 trad_frame_set_reg_addr (this_cache
,
1113 regs
->lo
+ gdbarch_num_regs (gdbarch
),
1114 regs_base
+ SIGCONTEXT_LO
);
1116 if (regs
->dspacc
!= -1)
1118 trad_frame_set_reg_addr (this_cache
,
1119 regs
->dspacc
+ 0 + gdbarch_num_regs (gdbarch
),
1120 sigcontext_base
+ SIGCONTEXT_HI1
);
1121 trad_frame_set_reg_addr (this_cache
,
1122 regs
->dspacc
+ 1 + gdbarch_num_regs (gdbarch
),
1123 sigcontext_base
+ SIGCONTEXT_LO1
);
1124 trad_frame_set_reg_addr (this_cache
,
1125 regs
->dspacc
+ 2 + gdbarch_num_regs (gdbarch
),
1126 sigcontext_base
+ SIGCONTEXT_HI2
);
1127 trad_frame_set_reg_addr (this_cache
,
1128 regs
->dspacc
+ 3 + gdbarch_num_regs (gdbarch
),
1129 sigcontext_base
+ SIGCONTEXT_LO2
);
1130 trad_frame_set_reg_addr (this_cache
,
1131 regs
->dspacc
+ 4 + gdbarch_num_regs (gdbarch
),
1132 sigcontext_base
+ SIGCONTEXT_HI3
);
1133 trad_frame_set_reg_addr (this_cache
,
1134 regs
->dspacc
+ 5 + gdbarch_num_regs (gdbarch
),
1135 sigcontext_base
+ SIGCONTEXT_LO3
);
1139 trad_frame_set_reg_addr (this_cache
,
1140 regs
->cause
+ gdbarch_num_regs (gdbarch
),
1141 sigcontext_base
+ SIGCONTEXT_CAUSE
);
1142 trad_frame_set_reg_addr (this_cache
,
1143 regs
->badvaddr
+ gdbarch_num_regs (gdbarch
),
1144 sigcontext_base
+ SIGCONTEXT_BADVADDR
);
1147 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
1148 trad_frame_set_id (this_cache
, frame_id_build (frame_sp
, func
));
1152 /* For N32/N64 things look different. There is no non-rt signal frame.
1154 struct rt_sigframe_n32 {
1155 u32 rs_ass[4]; [ argument save space for o32 ]
1156 u32 rs_code[2]; [ signal trampoline or fill ]
1157 struct siginfo rs_info;
1158 struct ucontextn32 rs_uc;
1161 struct ucontextn32 {
1165 struct sigcontext uc_mcontext;
1166 sigset_t uc_sigmask; [ mask last for extensibility ]
1169 struct rt_sigframe {
1170 u32 rs_ass[4]; [ argument save space for o32 ]
1171 u32 rs_code[2]; [ signal trampoline ]
1172 struct siginfo rs_info;
1173 struct ucontext rs_uc;
1177 unsigned long uc_flags;
1178 struct ucontext *uc_link;
1180 struct sigcontext uc_mcontext;
1181 sigset_t uc_sigmask; [ mask last for extensibility ]
1184 And the sigcontext is different (this is for both n32 and n64):
1187 unsigned long long sc_regs[32];
1188 unsigned long long sc_fpregs[32];
1189 unsigned long long sc_mdhi;
1190 unsigned long long sc_hi1;
1191 unsigned long long sc_hi2;
1192 unsigned long long sc_hi3;
1193 unsigned long long sc_mdlo;
1194 unsigned long long sc_lo1;
1195 unsigned long long sc_lo2;
1196 unsigned long long sc_lo3;
1197 unsigned long long sc_pc;
1198 unsigned int sc_fpc_csr;
1199 unsigned int sc_used_math;
1200 unsigned int sc_dsp;
1201 unsigned int sc_reserved;
1204 That is the post-2.6.12 definition of the 64-bit sigcontext; before
1205 then, there were no hi1-hi3 or lo1-lo3. Cause and badvaddr were
1209 #define N32_STACK_T_SIZE STACK_T_SIZE
1210 #define N64_STACK_T_SIZE (2 * 8 + 4)
1211 #define N32_UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + N32_STACK_T_SIZE + 4)
1212 #define N64_UCONTEXT_SIGCONTEXT_OFFSET (2 * 8 + N64_STACK_T_SIZE + 4)
1213 #define N32_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
1214 + RTSIGFRAME_SIGINFO_SIZE \
1215 + N32_UCONTEXT_SIGCONTEXT_OFFSET)
1216 #define N64_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
1217 + RTSIGFRAME_SIGINFO_SIZE \
1218 + N64_UCONTEXT_SIGCONTEXT_OFFSET)
1220 #define N64_SIGCONTEXT_REGS (0 * 8)
1221 #define N64_SIGCONTEXT_FPREGS (32 * 8)
1222 #define N64_SIGCONTEXT_HI (64 * 8)
1223 #define N64_SIGCONTEXT_HI1 (65 * 8)
1224 #define N64_SIGCONTEXT_HI2 (66 * 8)
1225 #define N64_SIGCONTEXT_HI3 (67 * 8)
1226 #define N64_SIGCONTEXT_LO (68 * 8)
1227 #define N64_SIGCONTEXT_LO1 (69 * 8)
1228 #define N64_SIGCONTEXT_LO2 (70 * 8)
1229 #define N64_SIGCONTEXT_LO3 (71 * 8)
1230 #define N64_SIGCONTEXT_PC (72 * 8)
1231 #define N64_SIGCONTEXT_FPCSR (73 * 8 + 0)
1232 #define N64_SIGCONTEXT_DSPCTL (74 * 8 + 0)
1234 #define N64_SIGCONTEXT_REG_SIZE 8
1237 mips_linux_n32n64_sigframe_init (const struct tramp_frame
*self
,
1238 struct frame_info
*this_frame
,
1239 struct trad_frame_cache
*this_cache
,
1242 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1244 CORE_ADDR frame_sp
= get_frame_sp (this_frame
);
1245 CORE_ADDR sigcontext_base
;
1246 const struct mips_regnum
*regs
= mips_regnum (gdbarch
);
1248 if (self
== &mips_linux_n32_rt_sigframe
1249 || self
== µmips_linux_n32_rt_sigframe
)
1250 sigcontext_base
= frame_sp
+ N32_SIGFRAME_SIGCONTEXT_OFFSET
;
1252 sigcontext_base
= frame_sp
+ N64_SIGFRAME_SIGCONTEXT_OFFSET
;
1254 if (mips_linux_restart_reg_p (gdbarch
))
1255 trad_frame_set_reg_addr (this_cache
,
1256 (MIPS_RESTART_REGNUM
1257 + gdbarch_num_regs (gdbarch
)),
1258 sigcontext_base
+ N64_SIGCONTEXT_REGS
);
1260 for (ireg
= 1; ireg
< 32; ireg
++)
1261 trad_frame_set_reg_addr (this_cache
,
1262 (ireg
+ MIPS_ZERO_REGNUM
1263 + gdbarch_num_regs (gdbarch
)),
1264 (sigcontext_base
+ N64_SIGCONTEXT_REGS
1265 + ireg
* N64_SIGCONTEXT_REG_SIZE
));
1267 for (ireg
= 0; ireg
< 32; ireg
++)
1268 trad_frame_set_reg_addr (this_cache
,
1269 ireg
+ regs
->fp0
+ gdbarch_num_regs (gdbarch
),
1270 (sigcontext_base
+ N64_SIGCONTEXT_FPREGS
1271 + ireg
* N64_SIGCONTEXT_REG_SIZE
));
1273 trad_frame_set_reg_addr (this_cache
,
1274 regs
->pc
+ gdbarch_num_regs (gdbarch
),
1275 sigcontext_base
+ N64_SIGCONTEXT_PC
);
1277 trad_frame_set_reg_addr (this_cache
,
1278 (regs
->fp_control_status
1279 + gdbarch_num_regs (gdbarch
)),
1280 sigcontext_base
+ N64_SIGCONTEXT_FPCSR
);
1282 trad_frame_set_reg_addr (this_cache
,
1283 regs
->hi
+ gdbarch_num_regs (gdbarch
),
1284 sigcontext_base
+ N64_SIGCONTEXT_HI
);
1285 trad_frame_set_reg_addr (this_cache
,
1286 regs
->lo
+ gdbarch_num_regs (gdbarch
),
1287 sigcontext_base
+ N64_SIGCONTEXT_LO
);
1289 if (regs
->dspacc
!= -1)
1291 trad_frame_set_reg_addr (this_cache
,
1292 regs
->dspacc
+ 0 + gdbarch_num_regs (gdbarch
),
1293 sigcontext_base
+ N64_SIGCONTEXT_HI1
);
1294 trad_frame_set_reg_addr (this_cache
,
1295 regs
->dspacc
+ 1 + gdbarch_num_regs (gdbarch
),
1296 sigcontext_base
+ N64_SIGCONTEXT_LO1
);
1297 trad_frame_set_reg_addr (this_cache
,
1298 regs
->dspacc
+ 2 + gdbarch_num_regs (gdbarch
),
1299 sigcontext_base
+ N64_SIGCONTEXT_HI2
);
1300 trad_frame_set_reg_addr (this_cache
,
1301 regs
->dspacc
+ 3 + gdbarch_num_regs (gdbarch
),
1302 sigcontext_base
+ N64_SIGCONTEXT_LO2
);
1303 trad_frame_set_reg_addr (this_cache
,
1304 regs
->dspacc
+ 4 + gdbarch_num_regs (gdbarch
),
1305 sigcontext_base
+ N64_SIGCONTEXT_HI3
);
1306 trad_frame_set_reg_addr (this_cache
,
1307 regs
->dspacc
+ 5 + gdbarch_num_regs (gdbarch
),
1308 sigcontext_base
+ N64_SIGCONTEXT_LO3
);
1310 if (regs
->dspctl
!= -1)
1311 trad_frame_set_reg_addr (this_cache
,
1312 regs
->dspctl
+ gdbarch_num_regs (gdbarch
),
1313 sigcontext_base
+ N64_SIGCONTEXT_DSPCTL
);
1315 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
1316 trad_frame_set_id (this_cache
, frame_id_build (frame_sp
, func
));
1319 /* Implement struct tramp_frame's "validate" method for standard MIPS code. */
1322 mips_linux_sigframe_validate (const struct tramp_frame
*self
,
1323 struct frame_info
*this_frame
,
1326 return mips_pc_is_mips (*pc
);
1329 /* Implement struct tramp_frame's "validate" method for microMIPS code. */
1332 micromips_linux_sigframe_validate (const struct tramp_frame
*self
,
1333 struct frame_info
*this_frame
,
1336 if (mips_pc_is_micromips (get_frame_arch (this_frame
), *pc
))
1338 *pc
= mips_unmake_compact_addr (*pc
);
1345 /* Implement the "write_pc" gdbarch method. */
1348 mips_linux_write_pc (struct regcache
*regcache
, CORE_ADDR pc
)
1350 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
1352 mips_write_pc (regcache
, pc
);
1354 /* Clear the syscall restart flag. */
1355 if (mips_linux_restart_reg_p (gdbarch
))
1356 regcache_cooked_write_unsigned (regcache
, MIPS_RESTART_REGNUM
, 0);
1359 /* Return 1 if MIPS_RESTART_REGNUM is usable. */
1362 mips_linux_restart_reg_p (struct gdbarch
*gdbarch
)
1364 /* If we do not have a target description with registers, then
1365 MIPS_RESTART_REGNUM will not be included in the register set. */
1366 if (!tdesc_has_registers (gdbarch_target_desc (gdbarch
)))
1369 /* If we do, then MIPS_RESTART_REGNUM is safe to check; it will
1370 either be GPR-sized or missing. */
1371 return register_size (gdbarch
, MIPS_RESTART_REGNUM
) > 0;
1374 /* When FRAME is at a syscall instruction, return the PC of the next
1375 instruction to be executed. */
1378 mips_linux_syscall_next_pc (struct frame_info
*frame
)
1380 CORE_ADDR pc
= get_frame_pc (frame
);
1381 ULONGEST v0
= get_frame_register_unsigned (frame
, MIPS_V0_REGNUM
);
1383 /* If we are about to make a sigreturn syscall, use the unwinder to
1384 decode the signal frame. */
1385 if (v0
== MIPS_NR_sigreturn
1386 || v0
== MIPS_NR_rt_sigreturn
1387 || v0
== MIPS_NR_N64_rt_sigreturn
1388 || v0
== MIPS_NR_N32_rt_sigreturn
)
1389 return frame_unwind_caller_pc (get_current_frame ());
1394 /* Return the current system call's number present in the
1395 v0 register. When the function fails, it returns -1. */
1398 mips_linux_get_syscall_number (struct gdbarch
*gdbarch
,
1401 struct regcache
*regcache
= get_thread_regcache (ptid
);
1402 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1403 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1404 int regsize
= register_size (gdbarch
, MIPS_V0_REGNUM
);
1405 /* The content of a register */
1410 /* Make sure we're in a known ABI */
1411 gdb_assert (tdep
->mips_abi
== MIPS_ABI_O32
1412 || tdep
->mips_abi
== MIPS_ABI_N32
1413 || tdep
->mips_abi
== MIPS_ABI_N64
);
1415 gdb_assert (regsize
<= sizeof (buf
));
1417 /* Getting the system call number from the register.
1418 syscall number is in v0 or $2. */
1419 regcache_cooked_read (regcache
, MIPS_V0_REGNUM
, buf
);
1421 ret
= extract_signed_integer (buf
, regsize
, byte_order
);
1426 /* Implementation of `gdbarch_gdb_signal_to_target', as defined in
1430 mips_gdb_signal_to_target (struct gdbarch
*gdbarch
,
1431 enum gdb_signal signal
)
1435 case GDB_SIGNAL_EMT
:
1436 return MIPS_LINUX_SIGEMT
;
1438 case GDB_SIGNAL_BUS
:
1439 return MIPS_LINUX_SIGBUS
;
1441 case GDB_SIGNAL_SYS
:
1442 return MIPS_LINUX_SIGSYS
;
1444 case GDB_SIGNAL_USR1
:
1445 return MIPS_LINUX_SIGUSR1
;
1447 case GDB_SIGNAL_USR2
:
1448 return MIPS_LINUX_SIGUSR2
;
1450 case GDB_SIGNAL_CHLD
:
1451 return MIPS_LINUX_SIGCHLD
;
1453 case GDB_SIGNAL_PWR
:
1454 return MIPS_LINUX_SIGPWR
;
1456 case GDB_SIGNAL_WINCH
:
1457 return MIPS_LINUX_SIGWINCH
;
1459 case GDB_SIGNAL_URG
:
1460 return MIPS_LINUX_SIGURG
;
1463 return MIPS_LINUX_SIGIO
;
1465 case GDB_SIGNAL_POLL
:
1466 return MIPS_LINUX_SIGPOLL
;
1468 case GDB_SIGNAL_STOP
:
1469 return MIPS_LINUX_SIGSTOP
;
1471 case GDB_SIGNAL_TSTP
:
1472 return MIPS_LINUX_SIGTSTP
;
1474 case GDB_SIGNAL_CONT
:
1475 return MIPS_LINUX_SIGCONT
;
1477 case GDB_SIGNAL_TTIN
:
1478 return MIPS_LINUX_SIGTTIN
;
1480 case GDB_SIGNAL_TTOU
:
1481 return MIPS_LINUX_SIGTTOU
;
1483 case GDB_SIGNAL_VTALRM
:
1484 return MIPS_LINUX_SIGVTALRM
;
1486 case GDB_SIGNAL_PROF
:
1487 return MIPS_LINUX_SIGPROF
;
1489 case GDB_SIGNAL_XCPU
:
1490 return MIPS_LINUX_SIGXCPU
;
1492 case GDB_SIGNAL_XFSZ
:
1493 return MIPS_LINUX_SIGXFSZ
;
1495 /* GDB_SIGNAL_REALTIME_32 is not continuous in <gdb/signals.def>,
1496 therefore we have to handle it here. */
1497 case GDB_SIGNAL_REALTIME_32
:
1498 return MIPS_LINUX_SIGRTMIN
;
1501 if (signal
>= GDB_SIGNAL_REALTIME_33
1502 && signal
<= GDB_SIGNAL_REALTIME_63
)
1504 int offset
= signal
- GDB_SIGNAL_REALTIME_33
;
1506 return MIPS_LINUX_SIGRTMIN
+ 1 + offset
;
1508 else if (signal
>= GDB_SIGNAL_REALTIME_64
1509 && signal
<= GDB_SIGNAL_REALTIME_127
)
1511 int offset
= signal
- GDB_SIGNAL_REALTIME_64
;
1513 return MIPS_LINUX_SIGRT64
+ offset
;
1516 return linux_gdb_signal_to_target (gdbarch
, signal
);
1519 /* Translate signals based on MIPS signal values.
1520 Adapted from gdb/common/signals.c. */
1522 static enum gdb_signal
1523 mips_gdb_signal_from_target (struct gdbarch
*gdbarch
, int signal
)
1527 case MIPS_LINUX_SIGEMT
:
1528 return GDB_SIGNAL_EMT
;
1530 case MIPS_LINUX_SIGBUS
:
1531 return GDB_SIGNAL_BUS
;
1533 case MIPS_LINUX_SIGSYS
:
1534 return GDB_SIGNAL_SYS
;
1536 case MIPS_LINUX_SIGUSR1
:
1537 return GDB_SIGNAL_USR1
;
1539 case MIPS_LINUX_SIGUSR2
:
1540 return GDB_SIGNAL_USR2
;
1542 case MIPS_LINUX_SIGCHLD
:
1543 return GDB_SIGNAL_CHLD
;
1545 case MIPS_LINUX_SIGPWR
:
1546 return GDB_SIGNAL_PWR
;
1548 case MIPS_LINUX_SIGWINCH
:
1549 return GDB_SIGNAL_WINCH
;
1551 case MIPS_LINUX_SIGURG
:
1552 return GDB_SIGNAL_URG
;
1554 /* No way to differentiate between SIGIO and SIGPOLL.
1555 Therefore, we just handle the first one. */
1556 case MIPS_LINUX_SIGIO
:
1557 return GDB_SIGNAL_IO
;
1559 case MIPS_LINUX_SIGSTOP
:
1560 return GDB_SIGNAL_STOP
;
1562 case MIPS_LINUX_SIGTSTP
:
1563 return GDB_SIGNAL_TSTP
;
1565 case MIPS_LINUX_SIGCONT
:
1566 return GDB_SIGNAL_CONT
;
1568 case MIPS_LINUX_SIGTTIN
:
1569 return GDB_SIGNAL_TTIN
;
1571 case MIPS_LINUX_SIGTTOU
:
1572 return GDB_SIGNAL_TTOU
;
1574 case MIPS_LINUX_SIGVTALRM
:
1575 return GDB_SIGNAL_VTALRM
;
1577 case MIPS_LINUX_SIGPROF
:
1578 return GDB_SIGNAL_PROF
;
1580 case MIPS_LINUX_SIGXCPU
:
1581 return GDB_SIGNAL_XCPU
;
1583 case MIPS_LINUX_SIGXFSZ
:
1584 return GDB_SIGNAL_XFSZ
;
1587 if (signal
>= MIPS_LINUX_SIGRTMIN
&& signal
<= MIPS_LINUX_SIGRTMAX
)
1589 /* GDB_SIGNAL_REALTIME values are not contiguous, map parts of
1590 the MIPS block to the respective GDB_SIGNAL_REALTIME blocks. */
1591 int offset
= signal
- MIPS_LINUX_SIGRTMIN
;
1594 return GDB_SIGNAL_REALTIME_32
;
1595 else if (offset
< 32)
1596 return (enum gdb_signal
) (offset
- 1
1597 + (int) GDB_SIGNAL_REALTIME_33
);
1599 return (enum gdb_signal
) (offset
- 32
1600 + (int) GDB_SIGNAL_REALTIME_64
);
1603 return linux_gdb_signal_from_target (gdbarch
, signal
);
1606 /* Initialize one of the GNU/Linux OS ABIs. */
1609 mips_linux_init_abi (struct gdbarch_info info
,
1610 struct gdbarch
*gdbarch
)
1612 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1613 enum mips_abi abi
= mips_abi (gdbarch
);
1614 struct tdesc_arch_data
*tdesc_data
1615 = (struct tdesc_arch_data
*) info
.tdep_info
;
1617 linux_init_abi (info
, gdbarch
);
1619 /* Get the syscall number from the arch's register. */
1620 set_gdbarch_get_syscall_number (gdbarch
, mips_linux_get_syscall_number
);
1625 set_gdbarch_get_longjmp_target (gdbarch
,
1626 mips_linux_get_longjmp_target
);
1627 set_solib_svr4_fetch_link_map_offsets
1628 (gdbarch
, svr4_ilp32_fetch_link_map_offsets
);
1629 tramp_frame_prepend_unwinder (gdbarch
, µmips_linux_o32_sigframe
);
1630 tramp_frame_prepend_unwinder (gdbarch
,
1631 µmips_linux_o32_rt_sigframe
);
1632 tramp_frame_prepend_unwinder (gdbarch
, &mips_linux_o32_sigframe
);
1633 tramp_frame_prepend_unwinder (gdbarch
, &mips_linux_o32_rt_sigframe
);
1634 set_xml_syscall_file_name (gdbarch
, "syscalls/mips-o32-linux.xml");
1637 set_gdbarch_get_longjmp_target (gdbarch
,
1638 mips_linux_get_longjmp_target
);
1639 set_solib_svr4_fetch_link_map_offsets
1640 (gdbarch
, svr4_ilp32_fetch_link_map_offsets
);
1641 set_gdbarch_long_double_bit (gdbarch
, 128);
1642 /* These floatformats should probably be renamed. MIPS uses
1643 the same 128-bit IEEE floating point format that IA-64 uses,
1644 except that the quiet/signalling NaN bit is reversed (GDB
1645 does not distinguish between quiet and signalling NaNs). */
1646 set_gdbarch_long_double_format (gdbarch
, floatformats_ia64_quad
);
1647 tramp_frame_prepend_unwinder (gdbarch
,
1648 µmips_linux_n32_rt_sigframe
);
1649 tramp_frame_prepend_unwinder (gdbarch
, &mips_linux_n32_rt_sigframe
);
1650 set_xml_syscall_file_name (gdbarch
, "syscalls/mips-n32-linux.xml");
1653 set_gdbarch_get_longjmp_target (gdbarch
,
1654 mips64_linux_get_longjmp_target
);
1655 set_solib_svr4_fetch_link_map_offsets
1656 (gdbarch
, svr4_lp64_fetch_link_map_offsets
);
1657 set_gdbarch_long_double_bit (gdbarch
, 128);
1658 /* These floatformats should probably be renamed. MIPS uses
1659 the same 128-bit IEEE floating point format that IA-64 uses,
1660 except that the quiet/signalling NaN bit is reversed (GDB
1661 does not distinguish between quiet and signalling NaNs). */
1662 set_gdbarch_long_double_format (gdbarch
, floatformats_ia64_quad
);
1663 tramp_frame_prepend_unwinder (gdbarch
,
1664 µmips_linux_n64_rt_sigframe
);
1665 tramp_frame_prepend_unwinder (gdbarch
, &mips_linux_n64_rt_sigframe
);
1666 set_xml_syscall_file_name (gdbarch
, "syscalls/mips-n64-linux.xml");
1672 set_gdbarch_skip_solib_resolver (gdbarch
, mips_linux_skip_resolver
);
1674 set_gdbarch_software_single_step (gdbarch
, mips_software_single_step
);
1676 /* Enable TLS support. */
1677 set_gdbarch_fetch_tls_load_module_address (gdbarch
,
1678 svr4_fetch_objfile_link_map
);
1680 /* Initialize this lazily, to avoid an initialization order
1681 dependency on solib-svr4.c's _initialize routine. */
1682 if (mips_svr4_so_ops
.in_dynsym_resolve_code
== NULL
)
1684 mips_svr4_so_ops
= svr4_so_ops
;
1685 mips_svr4_so_ops
.in_dynsym_resolve_code
1686 = mips_linux_in_dynsym_resolve_code
;
1688 set_solib_ops (gdbarch
, &mips_svr4_so_ops
);
1690 set_gdbarch_write_pc (gdbarch
, mips_linux_write_pc
);
1692 set_gdbarch_core_read_description (gdbarch
,
1693 mips_linux_core_read_description
);
1695 set_gdbarch_iterate_over_regset_sections
1696 (gdbarch
, mips_linux_iterate_over_regset_sections
);
1698 set_gdbarch_gdb_signal_from_target (gdbarch
,
1699 mips_gdb_signal_from_target
);
1701 set_gdbarch_gdb_signal_to_target (gdbarch
,
1702 mips_gdb_signal_to_target
);
1704 tdep
->syscall_next_pc
= mips_linux_syscall_next_pc
;
1708 const struct tdesc_feature
*feature
;
1710 /* If we have target-described registers, then we can safely
1711 reserve a number for MIPS_RESTART_REGNUM (whether it is
1712 described or not). */
1713 gdb_assert (gdbarch_num_regs (gdbarch
) <= MIPS_RESTART_REGNUM
);
1714 set_gdbarch_num_regs (gdbarch
, MIPS_RESTART_REGNUM
+ 1);
1715 set_gdbarch_num_pseudo_regs (gdbarch
, MIPS_RESTART_REGNUM
+ 1);
1717 /* If it's present, then assign it to the reserved number. */
1718 feature
= tdesc_find_feature (info
.target_desc
,
1719 "org.gnu.gdb.mips.linux");
1720 if (feature
!= NULL
)
1721 tdesc_numbered_register (feature
, tdesc_data
, MIPS_RESTART_REGNUM
,
1726 /* Provide a prototype to silence -Wmissing-prototypes. */
1727 extern initialize_file_ftype _initialize_mips_linux_tdep
;
1730 _initialize_mips_linux_tdep (void)
1732 const struct bfd_arch_info
*arch_info
;
1734 for (arch_info
= bfd_lookup_arch (bfd_arch_mips
, 0);
1736 arch_info
= arch_info
->next
)
1738 gdbarch_register_osabi (bfd_arch_mips
, arch_info
->mach
,
1740 mips_linux_init_abi
);