AArch64: View the pseudo V registers as vectors
[deliverable/binutils-gdb.git] / gdb / mips-linux-tdep.h
1 /* Target-dependent code for GNU/Linux on MIPS processors.
2
3 Copyright (C) 2006-2019 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19
20 #ifndef MIPS_LINUX_TDEP_H
21 #define MIPS_LINUX_TDEP_H
22
23 /* Copied from <asm/elf.h>. */
24 #define ELF_NGREG 45
25 #define ELF_NFPREG 33
26
27 typedef unsigned char mips_elf_greg_t[4];
28 typedef mips_elf_greg_t mips_elf_gregset_t[ELF_NGREG];
29
30 typedef unsigned char mips_elf_fpreg_t[8];
31 typedef mips_elf_fpreg_t mips_elf_fpregset_t[ELF_NFPREG];
32
33 /* 0 - 31 are integer registers, 32 - 63 are fp registers. */
34 #define FPR_BASE 32
35 #define PC 64
36 #define CAUSE 65
37 #define BADVADDR 66
38 #define MMHI 67
39 #define MMLO 68
40 #define FPC_CSR 69
41 #define FPC_EIR 70
42 #define DSP_BASE 71
43 #define DSP_CONTROL 77
44
45 #define EF_REG0 6
46 #define EF_REG31 37
47 #define EF_LO 38
48 #define EF_HI 39
49 #define EF_CP0_EPC 40
50 #define EF_CP0_BADVADDR 41
51 #define EF_CP0_STATUS 42
52 #define EF_CP0_CAUSE 43
53
54 #define EF_SIZE 180
55
56 void mips_supply_gregset (struct regcache *, const mips_elf_gregset_t *);
57 void mips_fill_gregset (const struct regcache *, mips_elf_gregset_t *, int);
58
59 /* 64-bit support. */
60
61 /* Copied from <asm/elf.h>. */
62 #define MIPS64_ELF_NGREG 45
63 #define MIPS64_ELF_NFPREG 33
64
65 typedef unsigned char mips64_elf_greg_t[8];
66 typedef mips64_elf_greg_t mips64_elf_gregset_t[MIPS64_ELF_NGREG];
67
68 typedef unsigned char mips64_elf_fpreg_t[8];
69 typedef mips64_elf_fpreg_t mips64_elf_fpregset_t[MIPS64_ELF_NFPREG];
70
71 /* 0 - 31 are integer registers, 32 - 63 are fp registers. */
72 #define MIPS64_FPR_BASE 32
73 #define MIPS64_PC 64
74 #define MIPS64_CAUSE 65
75 #define MIPS64_BADVADDR 66
76 #define MIPS64_MMHI 67
77 #define MIPS64_MMLO 68
78 #define MIPS64_FPC_CSR 69
79 #define MIPS64_FPC_EIR 70
80
81 #define MIPS64_EF_REG0 0
82 #define MIPS64_EF_REG31 31
83 #define MIPS64_EF_LO 32
84 #define MIPS64_EF_HI 33
85 #define MIPS64_EF_CP0_EPC 34
86 #define MIPS64_EF_CP0_BADVADDR 35
87 #define MIPS64_EF_CP0_STATUS 36
88 #define MIPS64_EF_CP0_CAUSE 37
89
90 #define MIPS64_EF_SIZE 304
91
92 void mips64_supply_gregset (struct regcache *, const mips64_elf_gregset_t *);
93 void mips64_fill_gregset (const struct regcache *,
94 mips64_elf_gregset_t *, int);
95 void mips64_supply_fpregset (struct regcache *,
96 const mips64_elf_fpregset_t *);
97 void mips64_fill_fpregset (const struct regcache *,
98 mips64_elf_fpregset_t *, int);
99
100 enum {
101 /* The Linux kernel stores an error code from any interrupted
102 syscall in a "register" (in $0's save slot). */
103 MIPS_RESTART_REGNUM = 79
104 };
105
106 /* Return 1 if MIPS_RESTART_REGNUM is usable. */
107
108 int mips_linux_restart_reg_p (struct gdbarch *gdbarch);
109
110 /* Target descriptions. */
111 extern struct target_desc *tdesc_mips_linux;
112 extern struct target_desc *tdesc_mips64_linux;
113 extern struct target_desc *tdesc_mips_dsp_linux;
114 extern struct target_desc *tdesc_mips64_dsp_linux;
115
116 #endif /* MIPS_LINUX_TDEP_H */
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