gdb/mips-linux-tdep.h

   1 /* Target-dependent code for GNU/Linux on MIPS processors.
   2
   3    Copyright 2006 Free Software Foundation, Inc.
   4
   5    This file is part of GDB.
   6
   7    This program is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 2 of the License, or
  10    (at your option) any later version.
  11
  12    This program is distributed in the hope that it will be useful,
  13    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15    GNU General Public License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this program; if not, write to the Free Software
  19    Foundation, Inc., 59 Temple Place - Suite 330,
  20    Boston, MA 02111-1307, USA.  */
  21
  22 /* Copied from <asm/elf.h>.  */
  23 #define ELF_NGREG       45
  24 #define ELF_NFPREG      33
  25
  26 typedef unsigned char mips_elf_greg_t[4];
  27 typedef mips_elf_greg_t mips_elf_gregset_t[ELF_NGREG];
  28
  29 typedef unsigned char mips_elf_fpreg_t[8];
  30 typedef mips_elf_fpreg_t mips_elf_fpregset_t[ELF_NFPREG];
  31
  32 /* 0 - 31 are integer registers, 32 - 63 are fp registers.  */
  33 #define FPR_BASE        32
  34 #define PC              64
  35 #define CAUSE           65
  36 #define BADVADDR        66
  37 #define MMHI            67
  38 #define MMLO            68
  39 #define FPC_CSR         69
  40 #define FPC_EIR         70
  41
  42 #define EF_REG0                 6
  43 #define EF_REG31                37
  44 #define EF_LO                   38
  45 #define EF_HI                   39
  46 #define EF_CP0_EPC              40
  47 #define EF_CP0_BADVADDR         41
  48 #define EF_CP0_STATUS           42
  49 #define EF_CP0_CAUSE            43
  50
  51 #define EF_SIZE                 180
  52
  53 void mips_supply_gregset (mips_elf_gregset_t *);
  54 void mips_fill_gregset (mips_elf_gregset_t *, int);
  55 void mips_supply_fpregset (mips_elf_fpregset_t *);
  56 void mips_fill_fpregset (mips_elf_fpregset_t *, int);
  57
  58 /* 64-bit support.  */
  59
  60 /* Copied from <asm/elf.h>.  */
  61 #define MIPS64_ELF_NGREG       45
  62 #define MIPS64_ELF_NFPREG      33
  63
  64 typedef unsigned char mips64_elf_greg_t[8];
  65 typedef mips64_elf_greg_t mips64_elf_gregset_t[MIPS64_ELF_NGREG];
  66
  67 typedef unsigned char mips64_elf_fpreg_t[8];
  68 typedef mips64_elf_fpreg_t mips64_elf_fpregset_t[MIPS64_ELF_NFPREG];
  69
  70 /* 0 - 31 are integer registers, 32 - 63 are fp registers.  */
  71 #define MIPS64_FPR_BASE                 32
  72 #define MIPS64_PC                       64
  73 #define MIPS64_CAUSE                    65
  74 #define MIPS64_BADVADDR                 66
  75 #define MIPS64_MMHI                     67
  76 #define MIPS64_MMLO                     68
  77 #define MIPS64_FPC_CSR                  69
  78 #define MIPS64_FPC_EIR                  70
  79
  80 #define MIPS64_EF_REG0                   0
  81 #define MIPS64_EF_REG31                 31
  82 #define MIPS64_EF_LO                    32
  83 #define MIPS64_EF_HI                    33
  84 #define MIPS64_EF_CP0_EPC               34
  85 #define MIPS64_EF_CP0_BADVADDR          35
  86 #define MIPS64_EF_CP0_STATUS            36
  87 #define MIPS64_EF_CP0_CAUSE             37
  88
  89 #define MIPS64_EF_SIZE                  304
  90
  91 void mips64_supply_gregset (mips64_elf_gregset_t *);
  92 void mips64_fill_gregset (mips64_elf_gregset_t *, int);
  93 void mips64_supply_fpregset (mips64_elf_fpregset_t *);
  94 void mips64_fill_fpregset (mips64_elf_fpregset_t *, int);