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[deliverable/binutils-gdb.git] / gdb / mips-tdep.c
1 /* Target-dependent code for the MIPS architecture, for GDB, the GNU Debugger.
2 Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994
3 Free Software Foundation, Inc.
4 Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU
5 and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin.
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
22
23 #include "defs.h"
24 #include "frame.h"
25 #include "inferior.h"
26 #include "symtab.h"
27 #include "value.h"
28 #include "gdbcmd.h"
29 #include "language.h"
30 #include "gdbcore.h"
31 #include "symfile.h"
32 #include "objfiles.h"
33 #include "gdbtypes.h"
34
35 #include "opcode/mips.h"
36
37 #define VM_MIN_ADDRESS (unsigned)0x400000
38
39 /* FIXME: Put this declaration in frame.h. */
40 extern struct obstack frame_cache_obstack;
41 \f
42 #if 0
43 static int mips_in_lenient_prologue PARAMS ((CORE_ADDR, CORE_ADDR));
44 #endif
45
46 /* Some MIPS boards don't support floating point, so we permit the
47 user to turn it off. */
48 int mips_fpu = 1;
49
50 /* Heuristic_proc_start may hunt through the text section for a long
51 time across a 2400 baud serial line. Allows the user to limit this
52 search. */
53 static unsigned int heuristic_fence_post = 0;
54
55 #define PROC_LOW_ADDR(proc) ((proc)->pdr.adr) /* least address */
56 #define PROC_HIGH_ADDR(proc) ((proc)->pdr.iline) /* upper address bound */
57 #define PROC_FRAME_OFFSET(proc) ((proc)->pdr.frameoffset)
58 #define PROC_FRAME_REG(proc) ((proc)->pdr.framereg)
59 #define PROC_REG_MASK(proc) ((proc)->pdr.regmask)
60 #define PROC_FREG_MASK(proc) ((proc)->pdr.fregmask)
61 #define PROC_REG_OFFSET(proc) ((proc)->pdr.regoffset)
62 #define PROC_FREG_OFFSET(proc) ((proc)->pdr.fregoffset)
63 #define PROC_PC_REG(proc) ((proc)->pdr.pcreg)
64 #define PROC_SYMBOL(proc) (*(struct symbol**)&(proc)->pdr.isym)
65 #define _PROC_MAGIC_ 0x0F0F0F0F
66 #define PROC_DESC_IS_DUMMY(proc) ((proc)->pdr.isym == _PROC_MAGIC_)
67 #define SET_PROC_DESC_IS_DUMMY(proc) ((proc)->pdr.isym = _PROC_MAGIC_)
68
69 struct linked_proc_info
70 {
71 struct mips_extra_func_info info;
72 struct linked_proc_info *next;
73 } *linked_proc_desc_table = NULL;
74
75 \f
76 /* Guaranteed to set fci->saved_regs to some values (it never leaves it
77 NULL). */
78
79 void
80 mips_find_saved_regs (fci)
81 FRAME fci;
82 {
83 int ireg;
84 CORE_ADDR reg_position;
85 /* r0 bit means kernel trap */
86 int kernel_trap;
87 /* What registers have been saved? Bitmasks. */
88 unsigned long gen_mask, float_mask;
89 mips_extra_func_info_t proc_desc;
90
91 fci->saved_regs = (struct frame_saved_regs *)
92 obstack_alloc (&frame_cache_obstack, sizeof(struct frame_saved_regs));
93 memset (fci->saved_regs, 0, sizeof (struct frame_saved_regs));
94
95 proc_desc = fci->proc_desc;
96 if (proc_desc == NULL)
97 /* I'm not sure how/whether this can happen. Normally when we can't
98 find a proc_desc, we "synthesize" one using heuristic_proc_desc
99 and set the saved_regs right away. */
100 return;
101
102 kernel_trap = PROC_REG_MASK(proc_desc) & 1;
103 gen_mask = kernel_trap ? 0xFFFFFFFF : PROC_REG_MASK(proc_desc);
104 float_mask = kernel_trap ? 0xFFFFFFFF : PROC_FREG_MASK(proc_desc);
105
106 if (/* In any frame other than the innermost, we assume that all
107 registers have been saved. This assumes that all register
108 saves in a function happen before the first function
109 call. */
110 fci->next == NULL
111
112 /* In a dummy frame we know exactly where things are saved. */
113 && !PROC_DESC_IS_DUMMY (proc_desc)
114
115 /* Not sure exactly what kernel_trap means, but if it means
116 the kernel saves the registers without a prologue doing it,
117 we better not examine the prologue to see whether registers
118 have been saved yet. */
119 && !kernel_trap)
120 {
121 /* We need to figure out whether the registers that the proc_desc
122 claims are saved have been saved yet. */
123
124 CORE_ADDR addr;
125 int status;
126 char buf[4];
127 unsigned long inst;
128
129 /* Bitmasks; set if we have found a save for the register. */
130 unsigned long gen_save_found = 0;
131 unsigned long float_save_found = 0;
132
133 for (addr = PROC_LOW_ADDR (proc_desc);
134 addr < fci->pc /*&& (gen_mask != gen_save_found
135 || float_mask != float_save_found)*/;
136 addr += 4)
137 {
138 status = read_memory_nobpt (addr, buf, 4);
139 if (status)
140 memory_error (status, addr);
141 inst = extract_unsigned_integer (buf, 4);
142 if (/* sw reg,n($sp) */
143 (inst & 0xffe00000) == 0xafa00000
144
145 /* sw reg,n($r30) */
146 || (inst & 0xffe00000) == 0xafc00000
147
148 /* sd reg,n($sp) */
149 || (inst & 0xffe00000) == 0xffa00000)
150 {
151 /* It might be possible to use the instruction to
152 find the offset, rather than the code below which
153 is based on things being in a certain order in the
154 frame, but figuring out what the instruction's offset
155 is relative to might be a little tricky. */
156 int reg = (inst & 0x001f0000) >> 16;
157 gen_save_found |= (1 << reg);
158 }
159 else if (/* swc1 freg,n($sp) */
160 (inst & 0xffe00000) == 0xe7a00000
161
162 /* swc1 freg,n($r30) */
163 || (inst & 0xffe00000) == 0xe7c00000
164
165 /* sdc1 freg,n($sp) */
166 || (inst & 0xffe00000) == 0xf7a00000)
167
168 {
169 int reg = ((inst & 0x001f0000) >> 16);
170 float_save_found |= (1 << reg);
171 }
172 }
173 gen_mask = gen_save_found;
174 float_mask = float_save_found;
175 }
176
177 /* Fill in the offsets for the registers which gen_mask says
178 were saved. */
179 reg_position = fci->frame + PROC_REG_OFFSET (proc_desc);
180 for (ireg= 31; gen_mask; --ireg, gen_mask <<= 1)
181 if (gen_mask & 0x80000000)
182 {
183 fci->saved_regs->regs[ireg] = reg_position;
184 reg_position -= MIPS_REGSIZE;
185 }
186 /* Fill in the offsets for the registers which float_mask says
187 were saved. */
188 reg_position = fci->frame + PROC_FREG_OFFSET (proc_desc);
189
190 /* The freg_offset points to where the first *double* register
191 is saved. So skip to the high-order word. */
192 reg_position += 4;
193 for (ireg = 31; float_mask; --ireg, float_mask <<= 1)
194 if (float_mask & 0x80000000)
195 {
196 fci->saved_regs->regs[FP0_REGNUM+ireg] = reg_position;
197 reg_position -= MIPS_REGSIZE;
198 }
199
200 fci->saved_regs->regs[PC_REGNUM] = fci->saved_regs->regs[RA_REGNUM];
201 }
202
203 static int
204 read_next_frame_reg(fi, regno)
205 FRAME fi;
206 int regno;
207 {
208 /* If it is the frame for sigtramp we have a complete sigcontext
209 somewhere above the frame and we get the saved registers from there.
210 If the stack layout for sigtramp changes we might have to change these
211 constants and the companion fixup_sigtramp in mdebugread.c */
212 #ifndef SIGFRAME_BASE
213 /* To satisfy alignment restrictions the sigcontext is located 4 bytes
214 above the sigtramp frame. */
215 #define SIGFRAME_BASE 4
216 #define SIGFRAME_PC_OFF (SIGFRAME_BASE + 2 * 4)
217 #define SIGFRAME_REGSAVE_OFF (SIGFRAME_BASE + 3 * 4)
218 #endif
219 #ifndef SIGFRAME_REG_SIZE
220 #define SIGFRAME_REG_SIZE 4
221 #endif
222 for (; fi; fi = fi->next)
223 {
224 if (fi->signal_handler_caller)
225 {
226 int offset;
227 if (regno == PC_REGNUM) offset = SIGFRAME_PC_OFF;
228 else if (regno < 32) offset = (SIGFRAME_REGSAVE_OFF
229 + regno * SIGFRAME_REG_SIZE);
230 else return 0;
231 return read_memory_integer(fi->frame + offset, MIPS_REGSIZE);
232 }
233 else if (regno == SP_REGNUM) return fi->frame;
234 else
235 {
236 if (fi->saved_regs == NULL)
237 mips_find_saved_regs (fi);
238 if (fi->saved_regs->regs[regno])
239 return read_memory_integer(fi->saved_regs->regs[regno], MIPS_REGSIZE);
240 }
241 }
242 return read_register (regno);
243 }
244
245 int
246 mips_frame_saved_pc(frame)
247 FRAME frame;
248 {
249 mips_extra_func_info_t proc_desc = frame->proc_desc;
250 /* We have to get the saved pc from the sigcontext
251 if it is a signal handler frame. */
252 int pcreg = frame->signal_handler_caller ? PC_REGNUM
253 : (proc_desc ? PROC_PC_REG(proc_desc) : RA_REGNUM);
254
255 if (proc_desc && PROC_DESC_IS_DUMMY(proc_desc))
256 return read_memory_integer(frame->frame - 4, 4);
257
258 return read_next_frame_reg(frame, pcreg);
259 }
260
261 static struct mips_extra_func_info temp_proc_desc;
262 static struct frame_saved_regs temp_saved_regs;
263
264 /* This fencepost looks highly suspicious to me. Removing it also
265 seems suspicious as it could affect remote debugging across serial
266 lines. */
267
268 static CORE_ADDR
269 heuristic_proc_start(pc)
270 CORE_ADDR pc;
271 {
272 CORE_ADDR start_pc = pc;
273 CORE_ADDR fence = start_pc - heuristic_fence_post;
274
275 if (start_pc == 0) return 0;
276
277 if (heuristic_fence_post == UINT_MAX
278 || fence < VM_MIN_ADDRESS)
279 fence = VM_MIN_ADDRESS;
280
281 /* search back for previous return */
282 for (start_pc -= 4; ; start_pc -= 4)
283 if (start_pc < fence)
284 {
285 /* It's not clear to me why we reach this point when
286 stop_soon_quietly, but with this test, at least we
287 don't print out warnings for every child forked (eg, on
288 decstation). 22apr93 rich@cygnus.com. */
289 if (!stop_soon_quietly)
290 {
291 static int blurb_printed = 0;
292
293 if (fence == VM_MIN_ADDRESS)
294 warning("Hit beginning of text section without finding");
295 else
296 warning("Hit heuristic-fence-post without finding");
297
298 warning("enclosing function for address 0x%x", pc);
299 if (!blurb_printed)
300 {
301 printf_filtered ("\
302 This warning occurs if you are debugging a function without any symbols\n\
303 (for example, in a stripped executable). In that case, you may wish to\n\
304 increase the size of the search with the `set heuristic-fence-post' command.\n\
305 \n\
306 Otherwise, you told GDB there was a function where there isn't one, or\n\
307 (more likely) you have encountered a bug in GDB.\n");
308 blurb_printed = 1;
309 }
310 }
311
312 return 0;
313 }
314 else if (ABOUT_TO_RETURN(start_pc))
315 break;
316
317 start_pc += 8; /* skip return, and its delay slot */
318 #if 0
319 /* skip nops (usually 1) 0 - is this */
320 while (start_pc < pc && read_memory_integer (start_pc, 4) == 0)
321 start_pc += 4;
322 #endif
323 return start_pc;
324 }
325
326 static mips_extra_func_info_t
327 heuristic_proc_desc(start_pc, limit_pc, next_frame)
328 CORE_ADDR start_pc, limit_pc;
329 FRAME next_frame;
330 {
331 CORE_ADDR sp = next_frame ? next_frame->frame : read_register (SP_REGNUM);
332 CORE_ADDR cur_pc;
333 int frame_size;
334 int has_frame_reg = 0;
335 int reg30 = 0; /* Value of $r30. Used by gcc for frame-pointer */
336 unsigned long reg_mask = 0;
337
338 if (start_pc == 0) return NULL;
339 memset(&temp_proc_desc, '\0', sizeof(temp_proc_desc));
340 memset(&temp_saved_regs, '\0', sizeof(struct frame_saved_regs));
341 PROC_LOW_ADDR(&temp_proc_desc) = start_pc;
342
343 if (start_pc + 200 < limit_pc) limit_pc = start_pc + 200;
344 restart:
345 frame_size = 0;
346 for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += 4) {
347 char buf[4];
348 unsigned long word;
349 int status;
350
351 status = read_memory_nobpt (cur_pc, buf, 4);
352 if (status) memory_error (status, cur_pc);
353 word = extract_unsigned_integer (buf, 4);
354
355 if ((word & 0xFFFF0000) == 0x27bd0000) /* addiu $sp,$sp,-i */
356 frame_size += (-word) & 0xFFFF;
357 else if ((word & 0xFFFF0000) == 0x23bd0000) /* addu $sp,$sp,-i */
358 frame_size += (-word) & 0xFFFF;
359 else if ((word & 0xFFE00000) == 0xafa00000) { /* sw reg,offset($sp) */
360 int reg = (word & 0x001F0000) >> 16;
361 reg_mask |= 1 << reg;
362 temp_saved_regs.regs[reg] = sp + (word & 0xffff);
363 }
364 else if ((word & 0xFFFF0000) == 0x27be0000) { /* addiu $30,$sp,size */
365 if ((word & 0xffff) != frame_size)
366 reg30 = sp + (word & 0xffff);
367 else if (!has_frame_reg) {
368 int alloca_adjust;
369 has_frame_reg = 1;
370 reg30 = read_next_frame_reg(next_frame, 30);
371 alloca_adjust = reg30 - (sp + (word & 0xffff));
372 if (alloca_adjust > 0) {
373 /* FP > SP + frame_size. This may be because
374 * of an alloca or somethings similar.
375 * Fix sp to "pre-alloca" value, and try again.
376 */
377 sp += alloca_adjust;
378 goto restart;
379 }
380 }
381 }
382 else if ((word & 0xFFE00000) == 0xafc00000) { /* sw reg,offset($30) */
383 int reg = (word & 0x001F0000) >> 16;
384 reg_mask |= 1 << reg;
385 temp_saved_regs.regs[reg] = reg30 + (word & 0xffff);
386 }
387 }
388 if (has_frame_reg) {
389 PROC_FRAME_REG(&temp_proc_desc) = 30;
390 PROC_FRAME_OFFSET(&temp_proc_desc) = 0;
391 }
392 else {
393 PROC_FRAME_REG(&temp_proc_desc) = SP_REGNUM;
394 PROC_FRAME_OFFSET(&temp_proc_desc) = frame_size;
395 }
396 PROC_REG_MASK(&temp_proc_desc) = reg_mask;
397 PROC_PC_REG(&temp_proc_desc) = RA_REGNUM;
398 return &temp_proc_desc;
399 }
400
401 static mips_extra_func_info_t
402 find_proc_desc(pc, next_frame)
403 CORE_ADDR pc;
404 FRAME next_frame;
405 {
406 mips_extra_func_info_t proc_desc;
407 struct block *b = block_for_pc(pc);
408 struct symbol *sym;
409 CORE_ADDR startaddr;
410
411 find_pc_partial_function (pc, NULL, &startaddr, NULL);
412 if (b == NULL)
413 sym = NULL;
414 else
415 {
416 if (startaddr > BLOCK_START (b))
417 /* This is the "pathological" case referred to in a comment in
418 print_frame_info. It might be better to move this check into
419 symbol reading. */
420 sym = NULL;
421 else
422 sym = lookup_symbol (MIPS_EFI_SYMBOL_NAME, b, LABEL_NAMESPACE,
423 0, NULL);
424 }
425
426 if (sym)
427 {
428 /* IF this is the topmost frame AND
429 * (this proc does not have debugging information OR
430 * the PC is in the procedure prologue)
431 * THEN create a "heuristic" proc_desc (by analyzing
432 * the actual code) to replace the "official" proc_desc.
433 */
434 proc_desc = (mips_extra_func_info_t)SYMBOL_VALUE(sym);
435 if (next_frame == NULL) {
436 struct symtab_and_line val;
437 struct symbol *proc_symbol =
438 PROC_DESC_IS_DUMMY(proc_desc) ? 0 : PROC_SYMBOL(proc_desc);
439
440 if (proc_symbol) {
441 val = find_pc_line (BLOCK_START
442 (SYMBOL_BLOCK_VALUE(proc_symbol)),
443 0);
444 val.pc = val.end ? val.end : pc;
445 }
446 if (!proc_symbol || pc < val.pc) {
447 mips_extra_func_info_t found_heuristic =
448 heuristic_proc_desc(PROC_LOW_ADDR(proc_desc),
449 pc, next_frame);
450 if (found_heuristic) proc_desc = found_heuristic;
451 }
452 }
453 }
454 else
455 {
456 /* Is linked_proc_desc_table really necessary? It only seems to be used
457 by procedure call dummys. However, the procedures being called ought
458 to have their own proc_descs, and even if they don't,
459 heuristic_proc_desc knows how to create them! */
460
461 register struct linked_proc_info *link;
462 for (link = linked_proc_desc_table; link; link = link->next)
463 if (PROC_LOW_ADDR(&link->info) <= pc
464 && PROC_HIGH_ADDR(&link->info) > pc)
465 return &link->info;
466
467 if (startaddr == 0)
468 startaddr = heuristic_proc_start (pc);
469
470 proc_desc =
471 heuristic_proc_desc (startaddr, pc, next_frame);
472 }
473 return proc_desc;
474 }
475
476 mips_extra_func_info_t cached_proc_desc;
477
478 FRAME_ADDR
479 mips_frame_chain(frame)
480 FRAME frame;
481 {
482 mips_extra_func_info_t proc_desc;
483 CORE_ADDR saved_pc = FRAME_SAVED_PC(frame);
484
485 if (saved_pc == 0 || inside_entry_file (saved_pc))
486 return 0;
487
488 proc_desc = find_proc_desc(saved_pc, frame);
489 if (!proc_desc)
490 return 0;
491
492 cached_proc_desc = proc_desc;
493
494 /* If no frame pointer and frame size is zero, we must be at end
495 of stack (or otherwise hosed). If we don't check frame size,
496 we loop forever if we see a zero size frame. */
497 if (PROC_FRAME_REG (proc_desc) == SP_REGNUM
498 && PROC_FRAME_OFFSET (proc_desc) == 0
499 /* The previous frame from a sigtramp frame might be frameless
500 and have frame size zero. */
501 && !frame->signal_handler_caller)
502 return 0;
503 else
504 return read_next_frame_reg(frame, PROC_FRAME_REG(proc_desc))
505 + PROC_FRAME_OFFSET(proc_desc);
506 }
507
508 void
509 init_extra_frame_info(fci)
510 struct frame_info *fci;
511 {
512 /* Use proc_desc calculated in frame_chain */
513 mips_extra_func_info_t proc_desc =
514 fci->next ? cached_proc_desc : find_proc_desc(fci->pc, fci->next);
515
516 fci->saved_regs = NULL;
517 fci->proc_desc =
518 proc_desc == &temp_proc_desc ? 0 : proc_desc;
519 if (proc_desc)
520 {
521 /* Fixup frame-pointer - only needed for top frame */
522 /* This may not be quite right, if proc has a real frame register.
523 Get the value of the frame relative sp, procedure might have been
524 interrupted by a signal at it's very start. */
525 if (fci->pc == PROC_LOW_ADDR (proc_desc)
526 && !PROC_DESC_IS_DUMMY (proc_desc))
527 fci->frame = read_next_frame_reg (fci->next, SP_REGNUM);
528 else
529 fci->frame =
530 read_next_frame_reg (fci->next, PROC_FRAME_REG (proc_desc))
531 + PROC_FRAME_OFFSET (proc_desc);
532
533 if (proc_desc == &temp_proc_desc)
534 {
535 fci->saved_regs = (struct frame_saved_regs*)
536 obstack_alloc (&frame_cache_obstack,
537 sizeof (struct frame_saved_regs));
538 *fci->saved_regs = temp_saved_regs;
539 fci->saved_regs->regs[PC_REGNUM] = fci->saved_regs->regs[RA_REGNUM];
540 }
541
542 /* hack: if argument regs are saved, guess these contain args */
543 if ((PROC_REG_MASK(proc_desc) & 0xF0) == 0) fci->num_args = -1;
544 else if ((PROC_REG_MASK(proc_desc) & 0x80) == 0) fci->num_args = 4;
545 else if ((PROC_REG_MASK(proc_desc) & 0x40) == 0) fci->num_args = 3;
546 else if ((PROC_REG_MASK(proc_desc) & 0x20) == 0) fci->num_args = 2;
547 else if ((PROC_REG_MASK(proc_desc) & 0x10) == 0) fci->num_args = 1;
548 }
549 }
550
551 /* MIPS stack frames are almost impenetrable. When execution stops,
552 we basically have to look at symbol information for the function
553 that we stopped in, which tells us *which* register (if any) is
554 the base of the frame pointer, and what offset from that register
555 the frame itself is at.
556
557 This presents a problem when trying to examine a stack in memory
558 (that isn't executing at the moment), using the "frame" command. We
559 don't have a PC, nor do we have any registers except SP.
560
561 This routine takes two arguments, SP and PC, and tries to make the
562 cached frames look as if these two arguments defined a frame on the
563 cache. This allows the rest of info frame to extract the important
564 arguments without difficulty. */
565
566 FRAME
567 setup_arbitrary_frame (argc, argv)
568 int argc;
569 FRAME_ADDR *argv;
570 {
571 if (argc != 2)
572 error ("MIPS frame specifications require two arguments: sp and pc");
573
574 return create_new_frame (argv[0], argv[1]);
575 }
576
577
578 CORE_ADDR
579 mips_push_arguments(nargs, args, sp, struct_return, struct_addr)
580 int nargs;
581 value *args;
582 CORE_ADDR sp;
583 int struct_return;
584 CORE_ADDR struct_addr;
585 {
586 register i;
587 int accumulate_size = struct_return ? MIPS_REGSIZE : 0;
588 struct mips_arg { char *contents; int len; int offset; };
589 struct mips_arg *mips_args =
590 (struct mips_arg*)alloca((nargs + 4) * sizeof(struct mips_arg));
591 register struct mips_arg *m_arg;
592 int fake_args = 0;
593
594 for (i = 0, m_arg = mips_args; i < nargs; i++, m_arg++) {
595 extern value value_arg_coerce();
596 value arg = value_arg_coerce (args[i]);
597 m_arg->len = TYPE_LENGTH (VALUE_TYPE (arg));
598 /* This entire mips-specific routine is because doubles must be aligned
599 * on 8-byte boundaries. It still isn't quite right, because MIPS decided
600 * to align 'struct {int a, b}' on 4-byte boundaries (even though this
601 * breaks their varargs implementation...). A correct solution
602 * requires an simulation of gcc's 'alignof' (and use of 'alignof'
603 * in stdarg.h/varargs.h).
604 * On the 64 bit r4000 we always pass the first four arguments
605 * using eight bytes each, so that we can load them up correctly
606 * in CALL_DUMMY.
607 */
608 if (m_arg->len > 4)
609 accumulate_size = (accumulate_size + 7) & -8;
610 m_arg->offset = accumulate_size;
611 m_arg->contents = VALUE_CONTENTS(arg);
612 #ifndef GDB_TARGET_IS_MIPS64
613 accumulate_size = (accumulate_size + m_arg->len + 3) & -4;
614 #else
615 if (accumulate_size >= 4 * MIPS_REGSIZE)
616 accumulate_size = (accumulate_size + m_arg->len + 3) &~ 4;
617 else
618 {
619 static char zeroes[8] = { 0 };
620 int len = m_arg->len;
621
622 if (len < 8)
623 {
624 #if TARGET_BYTE_ORDER == BIG_ENDIAN
625 m_arg->offset += 8 - len;
626 #endif
627 ++m_arg;
628 m_arg->len = 8 - len;
629 m_arg->contents = zeroes;
630 #if TARGET_BYTE_ORDER == BIG_ENDIAN
631 m_arg->offset = accumulate_size;
632 #else
633 m_arg->offset = accumulate_size + len;
634 #endif
635 ++fake_args;
636 }
637 accumulate_size = (accumulate_size + len + 7) & ~8;
638 }
639 #endif
640 }
641 accumulate_size = (accumulate_size + 7) & (-8);
642 if (accumulate_size < 4 * MIPS_REGSIZE)
643 accumulate_size = 4 * MIPS_REGSIZE;
644 sp -= accumulate_size;
645 for (i = nargs + fake_args; m_arg--, --i >= 0; )
646 write_memory(sp + m_arg->offset, m_arg->contents, m_arg->len);
647 if (struct_return)
648 {
649 char buf[TARGET_PTR_BIT / HOST_CHAR_BIT];
650
651 store_address (buf, sizeof buf, struct_addr);
652 write_memory (sp, buf, sizeof buf);
653 }
654 return sp;
655 }
656
657 /* MASK(i,j) == (1<<i) + (1<<(i+1)) + ... + (1<<j)). Assume i<=j<31. */
658 #define MASK(i,j) (((1 << ((j)+1))-1) ^ ((1 << (i))-1))
659
660 void
661 mips_push_dummy_frame()
662 {
663 char buffer[MAX_REGISTER_RAW_SIZE];
664 int ireg;
665 struct linked_proc_info *link = (struct linked_proc_info*)
666 xmalloc(sizeof(struct linked_proc_info));
667 mips_extra_func_info_t proc_desc = &link->info;
668 CORE_ADDR sp = read_register (SP_REGNUM);
669 CORE_ADDR save_address;
670 link->next = linked_proc_desc_table;
671 linked_proc_desc_table = link;
672 #define PUSH_FP_REGNUM 16 /* must be a register preserved across calls */
673 #define GEN_REG_SAVE_MASK MASK(1,16)|MASK(24,28)|(1<<31)
674 #define GEN_REG_SAVE_COUNT 22
675 #define FLOAT_REG_SAVE_MASK MASK(0,19)
676 #define FLOAT_REG_SAVE_COUNT 20
677 #define SPECIAL_REG_SAVE_COUNT 4
678 /*
679 * The registers we must save are all those not preserved across
680 * procedure calls. Dest_Reg (see tm-mips.h) must also be saved.
681 * In addition, we must save the PC, and PUSH_FP_REGNUM.
682 * (Ideally, we should also save MDLO/-HI and FP Control/Status reg.)
683 *
684 * Dummy frame layout:
685 * (high memory)
686 * Saved PC
687 * Saved MMHI, MMLO, FPC_CSR
688 * Saved R31
689 * Saved R28
690 * ...
691 * Saved R1
692 * Saved D18 (i.e. F19, F18)
693 * ...
694 * Saved D0 (i.e. F1, F0)
695 * CALL_DUMMY (subroutine stub; see tm-mips.h)
696 * Parameter build area (not yet implemented)
697 * (low memory)
698 */
699 PROC_REG_MASK(proc_desc) = GEN_REG_SAVE_MASK;
700 PROC_FREG_MASK(proc_desc) = mips_fpu ? FLOAT_REG_SAVE_MASK : 0;
701 PROC_REG_OFFSET(proc_desc) = /* offset of (Saved R31) from FP */
702 -sizeof(long) - 4 * SPECIAL_REG_SAVE_COUNT;
703 PROC_FREG_OFFSET(proc_desc) = /* offset of (Saved D18) from FP */
704 -sizeof(double) - 4 * (SPECIAL_REG_SAVE_COUNT + GEN_REG_SAVE_COUNT);
705 /* save general registers */
706 save_address = sp + PROC_REG_OFFSET(proc_desc);
707 for (ireg = 32; --ireg >= 0; )
708 if (PROC_REG_MASK(proc_desc) & (1 << ireg))
709 {
710 read_register_gen (ireg, buffer);
711
712 /* Need to fix the save_address decrement below, and also make sure
713 that we don't run into problems with the size of the dummy frame
714 or any of the offsets within it. */
715 if (REGISTER_RAW_SIZE (ireg) > 4)
716 error ("Cannot call functions on mips64");
717
718 write_memory (save_address, buffer, REGISTER_RAW_SIZE (ireg));
719 save_address -= 4;
720 }
721 /* save floating-points registers starting with high order word */
722 save_address = sp + PROC_FREG_OFFSET(proc_desc) + 4;
723 for (ireg = 32; --ireg >= 0; )
724 if (PROC_FREG_MASK(proc_desc) & (1 << ireg))
725 {
726 read_register_gen (ireg + FP0_REGNUM, buffer);
727
728 if (REGISTER_RAW_SIZE (ireg + FP0_REGNUM) > 4)
729 error ("Cannot call functions on mips64");
730
731 write_memory (save_address, buffer,
732 REGISTER_RAW_SIZE (ireg + FP0_REGNUM));
733 save_address -= 4;
734 }
735 write_register (PUSH_FP_REGNUM, sp);
736 PROC_FRAME_REG(proc_desc) = PUSH_FP_REGNUM;
737 PROC_FRAME_OFFSET(proc_desc) = 0;
738 read_register_gen (PC_REGNUM, buffer);
739 write_memory (sp - 4, buffer, REGISTER_RAW_SIZE (PC_REGNUM));
740 read_register_gen (HI_REGNUM, buffer);
741 write_memory (sp - 8, buffer, REGISTER_RAW_SIZE (HI_REGNUM));
742 read_register_gen (LO_REGNUM, buffer);
743 write_memory (sp - 12, buffer, REGISTER_RAW_SIZE (LO_REGNUM));
744 if (mips_fpu)
745 read_register_gen (FCRCS_REGNUM, buffer);
746 else
747 memset (buffer, 0, REGISTER_RAW_SIZE (FCRCS_REGNUM));
748 write_memory (sp - 16, buffer, REGISTER_RAW_SIZE (FCRCS_REGNUM));
749 sp -= 4 * (GEN_REG_SAVE_COUNT
750 + (mips_fpu ? FLOAT_REG_SAVE_COUNT : 0)
751 + SPECIAL_REG_SAVE_COUNT);
752 write_register (SP_REGNUM, sp);
753 PROC_LOW_ADDR(proc_desc) = sp - CALL_DUMMY_SIZE + CALL_DUMMY_START_OFFSET;
754 PROC_HIGH_ADDR(proc_desc) = sp;
755 SET_PROC_DESC_IS_DUMMY(proc_desc);
756 PROC_PC_REG(proc_desc) = RA_REGNUM;
757 }
758
759 void
760 mips_pop_frame()
761 {
762 register int regnum;
763 FRAME frame = get_current_frame ();
764 CORE_ADDR new_sp = frame->frame;
765
766 mips_extra_func_info_t proc_desc = frame->proc_desc;
767
768 write_register (PC_REGNUM, FRAME_SAVED_PC(frame));
769 if (frame->saved_regs == NULL)
770 mips_find_saved_regs (frame);
771 if (proc_desc)
772 {
773 for (regnum = 32; --regnum >= 0; )
774 if (PROC_REG_MASK(proc_desc) & (1 << regnum))
775 write_register (regnum,
776 read_memory_integer (frame->saved_regs->regs[regnum],
777 4));
778 for (regnum = 32; --regnum >= 0; )
779 if (PROC_FREG_MASK(proc_desc) & (1 << regnum))
780 write_register (regnum + FP0_REGNUM,
781 read_memory_integer (frame->saved_regs->regs[regnum + FP0_REGNUM], 4));
782 }
783 write_register (SP_REGNUM, new_sp);
784 flush_cached_frames ();
785 /* We let mips_init_extra_frame_info figure out the frame pointer */
786 set_current_frame (create_new_frame (0, read_pc ()));
787
788 if (proc_desc && PROC_DESC_IS_DUMMY(proc_desc))
789 {
790 struct linked_proc_info *pi_ptr, *prev_ptr;
791
792 for (pi_ptr = linked_proc_desc_table, prev_ptr = NULL;
793 pi_ptr != NULL;
794 prev_ptr = pi_ptr, pi_ptr = pi_ptr->next)
795 {
796 if (&pi_ptr->info == proc_desc)
797 break;
798 }
799
800 if (pi_ptr == NULL)
801 error ("Can't locate dummy extra frame info\n");
802
803 if (prev_ptr != NULL)
804 prev_ptr->next = pi_ptr->next;
805 else
806 linked_proc_desc_table = pi_ptr->next;
807
808 free (pi_ptr);
809
810 write_register (HI_REGNUM, read_memory_integer(new_sp - 8, 4));
811 write_register (LO_REGNUM, read_memory_integer(new_sp - 12, 4));
812 if (mips_fpu)
813 write_register (FCRCS_REGNUM, read_memory_integer(new_sp - 16, 4));
814 }
815 }
816
817 static void
818 mips_print_register (regnum, all)
819 int regnum, all;
820 {
821 unsigned char raw_buffer[MAX_REGISTER_RAW_SIZE];
822 struct type *our_type =
823 init_type (TYPE_CODE_INT,
824 /* We will fill in the length for each register. */
825 0,
826 TYPE_FLAG_UNSIGNED,
827 NULL,
828 NULL);
829
830 /* Get the data in raw format. */
831 if (read_relative_register_raw_bytes (regnum, raw_buffer))
832 {
833 printf_filtered ("%s: [Invalid]", reg_names[regnum]);
834 return;
835 }
836
837 /* If an even floating pointer register, also print as double. */
838 if (regnum >= FP0_REGNUM && regnum < FP0_REGNUM+32
839 && !((regnum-FP0_REGNUM) & 1)) {
840 char dbuffer[MAX_REGISTER_RAW_SIZE];
841
842 read_relative_register_raw_bytes (regnum, dbuffer);
843 read_relative_register_raw_bytes (regnum+1, dbuffer+4);
844 #ifdef REGISTER_CONVERT_TO_TYPE
845 REGISTER_CONVERT_TO_TYPE(regnum, builtin_type_double, dbuffer);
846 #endif
847 printf_filtered ("(d%d: ", regnum-FP0_REGNUM);
848 val_print (builtin_type_double, dbuffer, 0,
849 gdb_stdout, 0, 1, 0, Val_pretty_default);
850 printf_filtered ("); ");
851 }
852 fputs_filtered (reg_names[regnum], gdb_stdout);
853
854 /* The problem with printing numeric register names (r26, etc.) is that
855 the user can't use them on input. Probably the best solution is to
856 fix it so that either the numeric or the funky (a2, etc.) names
857 are accepted on input. */
858 if (regnum < 32)
859 printf_filtered ("(r%d): ", regnum);
860 else
861 printf_filtered (": ");
862
863 /* If virtual format is floating, print it that way. */
864 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum)) == TYPE_CODE_FLT
865 && ! INVALID_FLOAT (raw_buffer, REGISTER_VIRTUAL_SIZE(regnum))) {
866 val_print (REGISTER_VIRTUAL_TYPE (regnum), raw_buffer, 0,
867 gdb_stdout, 0, 1, 0, Val_pretty_default);
868 }
869 /* Else print as integer in hex. */
870 else
871 {
872 print_scalar_formatted (raw_buffer,
873 REGISTER_VIRTUAL_TYPE (regnum),
874 'x',
875 0,
876 gdb_stdout);
877 }
878 }
879
880 /* Replacement for generic do_registers_info. */
881 void
882 mips_do_registers_info (regnum, fpregs)
883 int regnum;
884 int fpregs;
885 {
886 if (regnum != -1) {
887 mips_print_register (regnum, 0);
888 printf_filtered ("\n");
889 }
890 else {
891 for (regnum = 0; regnum < NUM_REGS; ) {
892 if ((!fpregs) && regnum >= FP0_REGNUM && regnum <= FCRIR_REGNUM) {
893 regnum++;
894 continue;
895 }
896 mips_print_register (regnum, 1);
897 regnum++;
898 if ((regnum & 3) == 0 || regnum == NUM_REGS)
899 printf_filtered (";\n");
900 else
901 printf_filtered ("; ");
902 }
903 }
904 }
905 /* Return number of args passed to a frame. described by FIP.
906 Can return -1, meaning no way to tell. */
907
908 int
909 mips_frame_num_args(fip)
910 FRAME fip;
911 {
912 #if 0
913 struct chain_info_t *p;
914
915 p = mips_find_cached_frame(FRAME_FP(fip));
916 if (p->valid)
917 return p->the_info.numargs;
918 #endif
919 return -1;
920 }
921 \f
922 /* Is this a branch with a delay slot? */
923 static int is_delayed PARAMS ((unsigned long));
924
925 static int
926 is_delayed (insn)
927 unsigned long insn;
928 {
929 int i;
930 for (i = 0; i < NUMOPCODES; ++i)
931 if (mips_opcodes[i].pinfo != INSN_MACRO
932 && (insn & mips_opcodes[i].mask) == mips_opcodes[i].match)
933 break;
934 return (i < NUMOPCODES
935 && (mips_opcodes[i].pinfo & (INSN_UNCOND_BRANCH_DELAY
936 | INSN_COND_BRANCH_DELAY
937 | INSN_COND_BRANCH_LIKELY)));
938 }
939
940 int
941 mips_step_skips_delay (pc)
942 CORE_ADDR pc;
943 {
944 char buf[4];
945
946 if (target_read_memory (pc, buf, 4) != 0)
947 /* If error reading memory, guess that it is not a delayed branch. */
948 return 0;
949 return is_delayed (extract_unsigned_integer (buf, 4));
950 }
951
952 /* To skip prologues, I use this predicate. Returns either PC itself
953 if the code at PC does not look like a function prologue; otherwise
954 returns an address that (if we're lucky) follows the prologue. If
955 LENIENT, then we must skip everything which is involved in setting
956 up the frame (it's OK to skip more, just so long as we don't skip
957 anything which might clobber the registers which are being saved.
958 We must skip more in the case where part of the prologue is in the
959 delay slot of a non-prologue instruction). */
960
961 CORE_ADDR
962 mips_skip_prologue (pc, lenient)
963 CORE_ADDR pc;
964 int lenient;
965 {
966 unsigned long inst;
967 int offset;
968 int seen_sp_adjust = 0;
969
970 /* Skip the typical prologue instructions. These are the stack adjustment
971 instruction and the instructions that save registers on the stack
972 or in the gcc frame. */
973 for (offset = 0; offset < 100; offset += 4)
974 {
975 char buf[4];
976 int status;
977
978 status = read_memory_nobpt (pc + offset, buf, 4);
979 if (status)
980 memory_error (status, pc + offset);
981 inst = extract_unsigned_integer (buf, 4);
982
983 #if 0
984 if (lenient && is_delayed (inst))
985 continue;
986 #endif
987
988 if ((inst & 0xffff0000) == 0x27bd0000) /* addiu $sp,$sp,offset */
989 seen_sp_adjust = 1;
990 else if ((inst & 0xFFE00000) == 0xAFA00000 && (inst & 0x001F0000))
991 continue; /* sw reg,n($sp) */
992 /* reg != $zero */
993 else if ((inst & 0xFFE00000) == 0xE7A00000) /* swc1 freg,n($sp) */
994 continue;
995 else if ((inst & 0xF3E00000) == 0xA3C00000 && (inst & 0x001F0000))
996 /* sx reg,n($s8) */
997 continue; /* reg != $zero */
998 else if (inst == 0x03A0F021) /* move $s8,$sp */
999 continue;
1000 else if ((inst & 0xFF9F07FF) == 0x00800021) /* move reg,$a0-$a3 */
1001 continue;
1002 else if ((inst & 0xffff0000) == 0x3c1c0000) /* lui $gp,n */
1003 continue;
1004 else if ((inst & 0xffff0000) == 0x279c0000) /* addiu $gp,$gp,n */
1005 continue;
1006 else if (inst == 0x0399e021 /* addu $gp,$gp,$t9 */
1007 || inst == 0x033ce021) /* addu $gp,$t9,$gp */
1008 continue;
1009 else
1010 break;
1011 }
1012 return pc + offset;
1013
1014 /* FIXME schauer. The following code seems no longer necessary if we
1015 always skip the typical prologue instructions. */
1016
1017 #if 0
1018 if (seen_sp_adjust)
1019 return pc + offset;
1020
1021 /* Well, it looks like a frameless. Let's make sure.
1022 Note that we are not called on the current PC,
1023 but on the function`s start PC, and I have definitely
1024 seen optimized code that adjusts the SP quite later */
1025 b = block_for_pc(pc);
1026 if (!b) return pc;
1027
1028 f = lookup_symbol(MIPS_EFI_SYMBOL_NAME, b, LABEL_NAMESPACE, 0, NULL);
1029 if (!f) return pc;
1030 /* Ideally, I would like to use the adjusted info
1031 from mips_frame_info(), but for all practical
1032 purposes it will not matter (and it would require
1033 a different definition of SKIP_PROLOGUE())
1034
1035 Actually, it would not hurt to skip the storing
1036 of arguments on the stack as well. */
1037 if (((mips_extra_func_info_t)SYMBOL_VALUE(f))->pdr.frameoffset)
1038 return pc + 4;
1039
1040 return pc;
1041 #endif
1042 }
1043
1044 #if 0
1045 /* The lenient prologue stuff should be superceded by the code in
1046 init_extra_frame_info which looks to see whether the stores mentioned
1047 in the proc_desc have actually taken place. */
1048
1049 /* Is address PC in the prologue (loosely defined) for function at
1050 STARTADDR? */
1051
1052 static int
1053 mips_in_lenient_prologue (startaddr, pc)
1054 CORE_ADDR startaddr;
1055 CORE_ADDR pc;
1056 {
1057 CORE_ADDR end_prologue = mips_skip_prologue (startaddr, 1);
1058 return pc >= startaddr && pc < end_prologue;
1059 }
1060 #endif
1061
1062 /* Given a return value in `regbuf' with a type `valtype',
1063 extract and copy its value into `valbuf'. */
1064 void
1065 mips_extract_return_value (valtype, regbuf, valbuf)
1066 struct type *valtype;
1067 char regbuf[REGISTER_BYTES];
1068 char *valbuf;
1069 {
1070 int regnum;
1071
1072 regnum = TYPE_CODE (valtype) == TYPE_CODE_FLT && mips_fpu ? FP0_REGNUM : 2;
1073
1074 memcpy (valbuf, regbuf + REGISTER_BYTE (regnum), TYPE_LENGTH (valtype));
1075 #ifdef REGISTER_CONVERT_TO_TYPE
1076 REGISTER_CONVERT_TO_TYPE(regnum, valtype, valbuf);
1077 #endif
1078 }
1079
1080 /* Given a return value in `regbuf' with a type `valtype',
1081 write it's value into the appropriate register. */
1082 void
1083 mips_store_return_value (valtype, valbuf)
1084 struct type *valtype;
1085 char *valbuf;
1086 {
1087 int regnum;
1088 char raw_buffer[MAX_REGISTER_RAW_SIZE];
1089
1090 regnum = TYPE_CODE (valtype) == TYPE_CODE_FLT && mips_fpu ? FP0_REGNUM : 2;
1091 memcpy(raw_buffer, valbuf, TYPE_LENGTH (valtype));
1092
1093 #ifdef REGISTER_CONVERT_FROM_TYPE
1094 REGISTER_CONVERT_FROM_TYPE(regnum, valtype, raw_buffer);
1095 #endif
1096
1097 write_register_bytes(REGISTER_BYTE (regnum), raw_buffer, TYPE_LENGTH (valtype));
1098 }
1099
1100 /* These exist in mdebugread.c. */
1101 extern CORE_ADDR sigtramp_address, sigtramp_end;
1102 extern void fixup_sigtramp PARAMS ((void));
1103
1104 /* Exported procedure: Is PC in the signal trampoline code */
1105
1106 int
1107 in_sigtramp (pc, ignore)
1108 CORE_ADDR pc;
1109 char *ignore; /* function name */
1110 {
1111 if (sigtramp_address == 0)
1112 fixup_sigtramp ();
1113 return (pc >= sigtramp_address && pc < sigtramp_end);
1114 }
1115
1116 static void reinit_frame_cache_sfunc PARAMS ((char *, int,
1117 struct cmd_list_element *));
1118
1119 /* Just like reinit_frame_cache, but with the right arguments to be
1120 callable as an sfunc. */
1121 static void
1122 reinit_frame_cache_sfunc (args, from_tty, c)
1123 char *args;
1124 int from_tty;
1125 struct cmd_list_element *c;
1126 {
1127 reinit_frame_cache ();
1128 }
1129
1130 void
1131 _initialize_mips_tdep ()
1132 {
1133 struct cmd_list_element *c;
1134
1135 /* Let the user turn off floating point and set the fence post for
1136 heuristic_proc_start. */
1137
1138 add_show_from_set
1139 (add_set_cmd ("mipsfpu", class_support, var_boolean,
1140 (char *) &mips_fpu,
1141 "Set use of floating point coprocessor.\n\
1142 Turn off to avoid using floating point instructions when calling functions\n\
1143 or dealing with return values.", &setlist),
1144 &showlist);
1145
1146 /* We really would like to have both "0" and "unlimited" work, but
1147 command.c doesn't deal with that. So make it a var_zinteger
1148 because the user can always use "999999" or some such for unlimited. */
1149 c = add_set_cmd ("heuristic-fence-post", class_support, var_zinteger,
1150 (char *) &heuristic_fence_post,
1151 "\
1152 Set the distance searched for the start of a function.\n\
1153 If you are debugging a stripped executable, GDB needs to search through the\n\
1154 program for the start of a function. This command sets the distance of the\n\
1155 search. The only need to set it is when debugging a stripped executable.",
1156 &setlist);
1157 /* We need to throw away the frame cache when we set this, since it
1158 might change our ability to get backtraces. */
1159 c->function.sfunc = reinit_frame_cache_sfunc;
1160 add_show_from_set (c, &showlist);
1161 }
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