1 /* Target-dependent code for the MIPS architecture, for GDB, the GNU Debugger.
2 Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995
3 Free Software Foundation, Inc.
4 Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU
5 and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
24 #include "gdb_string.h"
36 #include "opcode/mips.h"
38 #define VM_MIN_ADDRESS (unsigned)0x400000
40 /* FIXME: Put this declaration in frame.h. */
41 extern struct obstack frame_cache_obstack
;
44 static int mips_in_lenient_prologue
PARAMS ((CORE_ADDR
, CORE_ADDR
));
47 static void mips_print_register
PARAMS ((int, int));
49 static mips_extra_func_info_t
50 heuristic_proc_desc
PARAMS ((CORE_ADDR
, CORE_ADDR
, struct frame_info
*));
52 static CORE_ADDR heuristic_proc_start
PARAMS ((CORE_ADDR
));
54 static int read_next_frame_reg
PARAMS ((struct frame_info
*, int));
56 static void mips_set_fpu_command
PARAMS ((char *, int,
57 struct cmd_list_element
*));
59 static void mips_show_fpu_command
PARAMS ((char *, int,
60 struct cmd_list_element
*));
62 void mips_set_processor_type_command
PARAMS ((char *, int));
64 int mips_set_processor_type
PARAMS ((char *));
66 static void mips_show_processor_type_command
PARAMS ((char *, int));
68 static void reinit_frame_cache_sfunc
PARAMS ((char *, int,
69 struct cmd_list_element
*));
71 static mips_extra_func_info_t
72 find_proc_desc
PARAMS ((CORE_ADDR pc
, struct frame_info
*next_frame
));
74 static CORE_ADDR after_prologue
PARAMS ((CORE_ADDR pc
,
75 mips_extra_func_info_t proc_desc
));
77 /* This value is the model of MIPS in use. It is derived from the value
78 of the PrID register. */
80 char *mips_processor_type
;
82 char *tmp_mips_processor_type
;
84 /* Some MIPS boards don't support floating point, so we permit the
85 user to turn it off. */
87 enum mips_fpu_type mips_fpu
;
89 static char *mips_fpu_string
;
91 /* A set of original names, to be used when restoring back to generic
92 registers from a specific set. */
94 char *mips_generic_reg_names
[] = REGISTER_NAMES
;
96 /* Names of IDT R3041 registers. */
98 char *mips_r3041_reg_names
[] = {
99 "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3",
100 "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7",
101 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
102 "t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra",
103 "sr", "lo", "hi", "bad", "cause","pc",
104 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
105 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
106 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
107 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
108 "fsr", "fir", "fp", "",
109 "", "", "bus", "ccfg", "", "", "", "",
110 "", "", "port", "cmp", "", "", "epc", "prid",
113 /* Names of IDT R3051 registers. */
115 char *mips_r3051_reg_names
[] = {
116 "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3",
117 "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7",
118 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
119 "t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra",
120 "sr", "lo", "hi", "bad", "cause","pc",
121 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
122 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
123 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
124 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
125 "fsr", "fir", "fp", "",
126 "inx", "rand", "elo", "", "ctxt", "", "", "",
127 "", "", "ehi", "", "", "", "epc", "prid",
130 /* Names of IDT R3081 registers. */
132 char *mips_r3081_reg_names
[] = {
133 "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3",
134 "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7",
135 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
136 "t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra",
137 "sr", "lo", "hi", "bad", "cause","pc",
138 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
139 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
140 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
141 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
142 "fsr", "fir", "fp", "",
143 "inx", "rand", "elo", "cfg", "ctxt", "", "", "",
144 "", "", "ehi", "", "", "", "epc", "prid",
147 /* Names of LSI 33k registers. */
149 char *mips_lsi33k_reg_names
[] = {
150 "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3",
151 "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7",
152 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
153 "t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra",
154 "epc", "hi", "lo", "sr", "cause","badvaddr",
155 "dcic", "bpc", "bda", "", "", "", "", "",
156 "", "", "", "", "", "", "", "",
157 "", "", "", "", "", "", "", "",
158 "", "", "", "", "", "", "", "",
160 "", "", "", "", "", "", "", "",
161 "", "", "", "", "", "", "", "",
167 } mips_processor_type_table
[] = {
168 { "generic", mips_generic_reg_names
},
169 { "r3041", mips_r3041_reg_names
},
170 { "r3051", mips_r3051_reg_names
},
171 { "r3071", mips_r3081_reg_names
},
172 { "r3081", mips_r3081_reg_names
},
173 { "lsi33k", mips_lsi33k_reg_names
},
177 /* Heuristic_proc_start may hunt through the text section for a long
178 time across a 2400 baud serial line. Allows the user to limit this
181 static unsigned int heuristic_fence_post
= 0;
183 #define PROC_LOW_ADDR(proc) ((proc)->pdr.adr) /* least address */
184 #define PROC_HIGH_ADDR(proc) ((proc)->pdr.iline) /* upper address bound */
185 #define PROC_FRAME_OFFSET(proc) ((proc)->pdr.frameoffset)
186 #define PROC_FRAME_REG(proc) ((proc)->pdr.framereg)
187 #define PROC_REG_MASK(proc) ((proc)->pdr.regmask)
188 #define PROC_FREG_MASK(proc) ((proc)->pdr.fregmask)
189 #define PROC_REG_OFFSET(proc) ((proc)->pdr.regoffset)
190 #define PROC_FREG_OFFSET(proc) ((proc)->pdr.fregoffset)
191 #define PROC_PC_REG(proc) ((proc)->pdr.pcreg)
192 #define PROC_SYMBOL(proc) (*(struct symbol**)&(proc)->pdr.isym)
193 #define _PROC_MAGIC_ 0x0F0F0F0F
194 #define PROC_DESC_IS_DUMMY(proc) ((proc)->pdr.isym == _PROC_MAGIC_)
195 #define SET_PROC_DESC_IS_DUMMY(proc) ((proc)->pdr.isym = _PROC_MAGIC_)
197 struct linked_proc_info
199 struct mips_extra_func_info info
;
200 struct linked_proc_info
*next
;
201 } *linked_proc_desc_table
= NULL
;
205 /* This returns the PC of the first inst after the prologue. If we can't
206 find the prologue, then return 0. */
209 after_prologue (pc
, proc_desc
)
211 mips_extra_func_info_t proc_desc
;
213 struct symtab_and_line sal
;
214 CORE_ADDR func_addr
, func_end
;
217 proc_desc
= find_proc_desc (pc
, NULL
);
221 /* If function is frameless, then we need to do it the hard way. I
222 strongly suspect that frameless always means prologueless... */
223 if (PROC_FRAME_REG (proc_desc
) == SP_REGNUM
224 && PROC_FRAME_OFFSET (proc_desc
) == 0)
228 if (!find_pc_partial_function (pc
, NULL
, &func_addr
, &func_end
))
229 return 0; /* Unknown */
231 sal
= find_pc_line (func_addr
, 0);
233 if (sal
.end
< func_end
)
236 /* The line after the prologue is after the end of the function. In this
237 case, tell the caller to find the prologue the hard way. */
242 /* Guaranteed to set fci->saved_regs to some values (it never leaves it
246 mips_find_saved_regs (fci
)
247 struct frame_info
*fci
;
250 CORE_ADDR reg_position
;
251 /* r0 bit means kernel trap */
253 /* What registers have been saved? Bitmasks. */
254 unsigned long gen_mask
, float_mask
;
255 mips_extra_func_info_t proc_desc
;
257 fci
->saved_regs
= (struct frame_saved_regs
*)
258 obstack_alloc (&frame_cache_obstack
, sizeof(struct frame_saved_regs
));
259 memset (fci
->saved_regs
, 0, sizeof (struct frame_saved_regs
));
261 /* If it is the frame for sigtramp, the saved registers are located
262 in a sigcontext structure somewhere on the stack.
263 If the stack layout for sigtramp changes we might have to change these
264 constants and the companion fixup_sigtramp in mdebugread.c */
265 #ifndef SIGFRAME_BASE
266 /* To satisfy alignment restrictions, sigcontext is located 4 bytes
267 above the sigtramp frame. */
268 #define SIGFRAME_BASE 4
269 #define SIGFRAME_PC_OFF (SIGFRAME_BASE + 2 * 4)
270 #define SIGFRAME_REGSAVE_OFF (SIGFRAME_BASE + 3 * 4)
271 #define SIGFRAME_FPREGSAVE_OFF (SIGFRAME_REGSAVE_OFF + 32 * 4 + 3 * 4)
273 #ifndef SIGFRAME_REG_SIZE
274 #define SIGFRAME_REG_SIZE 4
276 if (fci
->signal_handler_caller
)
278 for (ireg
= 0; ireg
< 32; ireg
++)
280 reg_position
= fci
->frame
+ SIGFRAME_REGSAVE_OFF
281 + ireg
* SIGFRAME_REG_SIZE
;
282 fci
->saved_regs
->regs
[ireg
] = reg_position
;
284 for (ireg
= 0; ireg
< 32; ireg
++)
286 reg_position
= fci
->frame
+ SIGFRAME_FPREGSAVE_OFF
287 + ireg
* SIGFRAME_REG_SIZE
;
288 fci
->saved_regs
->regs
[FP0_REGNUM
+ ireg
] = reg_position
;
290 fci
->saved_regs
->regs
[PC_REGNUM
] = fci
->frame
+ SIGFRAME_PC_OFF
;
294 proc_desc
= fci
->proc_desc
;
295 if (proc_desc
== NULL
)
296 /* I'm not sure how/whether this can happen. Normally when we can't
297 find a proc_desc, we "synthesize" one using heuristic_proc_desc
298 and set the saved_regs right away. */
301 kernel_trap
= PROC_REG_MASK(proc_desc
) & 1;
302 gen_mask
= kernel_trap
? 0xFFFFFFFF : PROC_REG_MASK(proc_desc
);
303 float_mask
= kernel_trap
? 0xFFFFFFFF : PROC_FREG_MASK(proc_desc
);
305 if (/* In any frame other than the innermost, we assume that all
306 registers have been saved. This assumes that all register
307 saves in a function happen before the first function
311 /* In a dummy frame we know exactly where things are saved. */
312 && !PROC_DESC_IS_DUMMY (proc_desc
)
314 /* Don't bother unless we are inside a function prologue. Outside the
315 prologue, we know where everything is. */
317 && in_prologue (fci
->pc
, PROC_LOW_ADDR (proc_desc
))
319 /* Not sure exactly what kernel_trap means, but if it means
320 the kernel saves the registers without a prologue doing it,
321 we better not examine the prologue to see whether registers
322 have been saved yet. */
325 /* We need to figure out whether the registers that the proc_desc
326 claims are saved have been saved yet. */
333 /* Bitmasks; set if we have found a save for the register. */
334 unsigned long gen_save_found
= 0;
335 unsigned long float_save_found
= 0;
337 for (addr
= PROC_LOW_ADDR (proc_desc
);
338 addr
< fci
->pc
/*&& (gen_mask != gen_save_found
339 || float_mask != float_save_found)*/;
342 status
= read_memory_nobpt (addr
, buf
, 4);
344 memory_error (status
, addr
);
345 inst
= extract_unsigned_integer (buf
, 4);
346 if (/* sw reg,n($sp) */
347 (inst
& 0xffe00000) == 0xafa00000
350 || (inst
& 0xffe00000) == 0xafc00000
353 || (inst
& 0xffe00000) == 0xffa00000)
355 /* It might be possible to use the instruction to
356 find the offset, rather than the code below which
357 is based on things being in a certain order in the
358 frame, but figuring out what the instruction's offset
359 is relative to might be a little tricky. */
360 int reg
= (inst
& 0x001f0000) >> 16;
361 gen_save_found
|= (1 << reg
);
363 else if (/* swc1 freg,n($sp) */
364 (inst
& 0xffe00000) == 0xe7a00000
366 /* swc1 freg,n($r30) */
367 || (inst
& 0xffe00000) == 0xe7c00000
369 /* sdc1 freg,n($sp) */
370 || (inst
& 0xffe00000) == 0xf7a00000)
373 int reg
= ((inst
& 0x001f0000) >> 16);
374 float_save_found
|= (1 << reg
);
377 gen_mask
= gen_save_found
;
378 float_mask
= float_save_found
;
381 /* Fill in the offsets for the registers which gen_mask says
383 reg_position
= fci
->frame
+ PROC_REG_OFFSET (proc_desc
);
384 for (ireg
= 31; gen_mask
; --ireg
, gen_mask
<<= 1)
385 if (gen_mask
& 0x80000000)
387 fci
->saved_regs
->regs
[ireg
] = reg_position
;
388 reg_position
-= MIPS_REGSIZE
;
390 /* Fill in the offsets for the registers which float_mask says
392 reg_position
= fci
->frame
+ PROC_FREG_OFFSET (proc_desc
);
394 /* The freg_offset points to where the first *double* register
395 is saved. So skip to the high-order word. */
397 for (ireg
= 31; float_mask
; --ireg
, float_mask
<<= 1)
398 if (float_mask
& 0x80000000)
400 fci
->saved_regs
->regs
[FP0_REGNUM
+ireg
] = reg_position
;
401 reg_position
-= MIPS_REGSIZE
;
404 fci
->saved_regs
->regs
[PC_REGNUM
] = fci
->saved_regs
->regs
[RA_REGNUM
];
408 read_next_frame_reg(fi
, regno
)
409 struct frame_info
*fi
;
412 for (; fi
; fi
= fi
->next
)
414 /* We have to get the saved sp from the sigcontext
415 if it is a signal handler frame. */
416 if (regno
== SP_REGNUM
&& !fi
->signal_handler_caller
)
420 if (fi
->saved_regs
== NULL
)
421 mips_find_saved_regs (fi
);
422 if (fi
->saved_regs
->regs
[regno
])
423 return read_memory_integer(fi
->saved_regs
->regs
[regno
], MIPS_REGSIZE
);
426 return read_register (regno
);
430 mips_frame_saved_pc(frame
)
431 struct frame_info
*frame
;
433 mips_extra_func_info_t proc_desc
= frame
->proc_desc
;
434 /* We have to get the saved pc from the sigcontext
435 if it is a signal handler frame. */
436 int pcreg
= frame
->signal_handler_caller
? PC_REGNUM
437 : (proc_desc
? PROC_PC_REG(proc_desc
) : RA_REGNUM
);
439 if (proc_desc
&& PROC_DESC_IS_DUMMY(proc_desc
))
440 return read_memory_integer(frame
->frame
- 4, 4);
442 return read_next_frame_reg(frame
, pcreg
);
445 static struct mips_extra_func_info temp_proc_desc
;
446 static struct frame_saved_regs temp_saved_regs
;
448 /* This fencepost looks highly suspicious to me. Removing it also
449 seems suspicious as it could affect remote debugging across serial
453 heuristic_proc_start(pc
)
456 CORE_ADDR start_pc
= pc
;
457 CORE_ADDR fence
= start_pc
- heuristic_fence_post
;
459 if (start_pc
== 0) return 0;
461 if (heuristic_fence_post
== UINT_MAX
462 || fence
< VM_MIN_ADDRESS
)
463 fence
= VM_MIN_ADDRESS
;
465 /* search back for previous return */
466 for (start_pc
-= 4; ; start_pc
-= 4)
467 if (start_pc
< fence
)
469 /* It's not clear to me why we reach this point when
470 stop_soon_quietly, but with this test, at least we
471 don't print out warnings for every child forked (eg, on
472 decstation). 22apr93 rich@cygnus.com. */
473 if (!stop_soon_quietly
)
475 static int blurb_printed
= 0;
477 if (fence
== VM_MIN_ADDRESS
)
478 warning("Hit beginning of text section without finding");
480 warning("Hit heuristic-fence-post without finding");
482 warning("enclosing function for address 0x%x", pc
);
486 This warning occurs if you are debugging a function without any symbols\n\
487 (for example, in a stripped executable). In that case, you may wish to\n\
488 increase the size of the search with the `set heuristic-fence-post' command.\n\
490 Otherwise, you told GDB there was a function where there isn't one, or\n\
491 (more likely) you have encountered a bug in GDB.\n");
498 else if (ABOUT_TO_RETURN(start_pc
))
501 start_pc
+= 8; /* skip return, and its delay slot */
503 /* skip nops (usually 1) 0 - is this */
504 while (start_pc
< pc
&& read_memory_integer (start_pc
, 4) == 0)
510 static mips_extra_func_info_t
511 heuristic_proc_desc(start_pc
, limit_pc
, next_frame
)
512 CORE_ADDR start_pc
, limit_pc
;
513 struct frame_info
*next_frame
;
515 CORE_ADDR sp
= read_next_frame_reg (next_frame
, SP_REGNUM
);
518 int has_frame_reg
= 0;
519 int reg30
= 0; /* Value of $r30. Used by gcc for frame-pointer */
520 unsigned long reg_mask
= 0;
522 if (start_pc
== 0) return NULL
;
523 memset (&temp_proc_desc
, '\0', sizeof(temp_proc_desc
));
524 memset (&temp_saved_regs
, '\0', sizeof(struct frame_saved_regs
));
525 PROC_LOW_ADDR (&temp_proc_desc
) = start_pc
;
527 if (start_pc
+ 200 < limit_pc
)
528 limit_pc
= start_pc
+ 200;
531 for (cur_pc
= start_pc
; cur_pc
< limit_pc
; cur_pc
+= 4) {
536 status
= read_memory_nobpt (cur_pc
, buf
, 4);
537 if (status
) memory_error (status
, cur_pc
);
538 word
= extract_unsigned_integer (buf
, 4);
540 if ((word
& 0xFFFF0000) == 0x27bd0000) /* addiu $sp,$sp,-i */
541 frame_size
+= (-word
) & 0xFFFF;
542 else if ((word
& 0xFFFF0000) == 0x23bd0000) /* addu $sp,$sp,-i */
543 frame_size
+= (-word
) & 0xFFFF;
544 else if ((word
& 0xFFE00000) == 0xafa00000) { /* sw reg,offset($sp) */
545 int reg
= (word
& 0x001F0000) >> 16;
546 reg_mask
|= 1 << reg
;
547 temp_saved_regs
.regs
[reg
] = sp
+ (word
& 0xffff);
549 else if ((word
& 0xFFFF0000) == 0x27be0000) { /* addiu $30,$sp,size */
550 if ((word
& 0xffff) != frame_size
)
551 reg30
= sp
+ (word
& 0xffff);
552 else if (!has_frame_reg
) {
555 reg30
= read_next_frame_reg(next_frame
, 30);
556 alloca_adjust
= reg30
- (sp
+ (word
& 0xffff));
557 if (alloca_adjust
> 0) {
558 /* FP > SP + frame_size. This may be because
559 * of an alloca or somethings similar.
560 * Fix sp to "pre-alloca" value, and try again.
567 else if ((word
& 0xFFE00000) == 0xafc00000) { /* sw reg,offset($30) */
568 int reg
= (word
& 0x001F0000) >> 16;
569 reg_mask
|= 1 << reg
;
570 temp_saved_regs
.regs
[reg
] = reg30
+ (word
& 0xffff);
574 PROC_FRAME_REG(&temp_proc_desc
) = 30;
575 PROC_FRAME_OFFSET(&temp_proc_desc
) = 0;
578 PROC_FRAME_REG(&temp_proc_desc
) = SP_REGNUM
;
579 PROC_FRAME_OFFSET(&temp_proc_desc
) = frame_size
;
581 PROC_REG_MASK(&temp_proc_desc
) = reg_mask
;
582 PROC_PC_REG(&temp_proc_desc
) = RA_REGNUM
;
583 return &temp_proc_desc
;
586 static mips_extra_func_info_t
587 find_proc_desc (pc
, next_frame
)
589 struct frame_info
*next_frame
;
591 mips_extra_func_info_t proc_desc
;
592 struct block
*b
= block_for_pc(pc
);
596 find_pc_partial_function (pc
, NULL
, &startaddr
, NULL
);
601 if (startaddr
> BLOCK_START (b
))
602 /* This is the "pathological" case referred to in a comment in
603 print_frame_info. It might be better to move this check into
607 sym
= lookup_symbol (MIPS_EFI_SYMBOL_NAME
, b
, LABEL_NAMESPACE
,
611 /* If we never found a PDR for this function in symbol reading, then
612 examine prologues to find the information. */
613 if (sym
&& ((mips_extra_func_info_t
) SYMBOL_VALUE (sym
))->pdr
.framereg
== -1)
618 /* IF this is the topmost frame AND
619 * (this proc does not have debugging information OR
620 * the PC is in the procedure prologue)
621 * THEN create a "heuristic" proc_desc (by analyzing
622 * the actual code) to replace the "official" proc_desc.
624 proc_desc
= (mips_extra_func_info_t
) SYMBOL_VALUE (sym
);
625 if (next_frame
== NULL
) {
626 struct symtab_and_line val
;
627 struct symbol
*proc_symbol
=
628 PROC_DESC_IS_DUMMY(proc_desc
) ? 0 : PROC_SYMBOL(proc_desc
);
631 val
= find_pc_line (BLOCK_START
632 (SYMBOL_BLOCK_VALUE(proc_symbol
)),
634 val
.pc
= val
.end
? val
.end
: pc
;
636 if (!proc_symbol
|| pc
< val
.pc
) {
637 mips_extra_func_info_t found_heuristic
=
638 heuristic_proc_desc (PROC_LOW_ADDR (proc_desc
),
641 proc_desc
= found_heuristic
;
647 /* Is linked_proc_desc_table really necessary? It only seems to be used
648 by procedure call dummys. However, the procedures being called ought
649 to have their own proc_descs, and even if they don't,
650 heuristic_proc_desc knows how to create them! */
652 register struct linked_proc_info
*link
;
654 for (link
= linked_proc_desc_table
; link
; link
= link
->next
)
655 if (PROC_LOW_ADDR(&link
->info
) <= pc
656 && PROC_HIGH_ADDR(&link
->info
) > pc
)
660 startaddr
= heuristic_proc_start (pc
);
663 heuristic_proc_desc (startaddr
, pc
, next_frame
);
668 mips_extra_func_info_t cached_proc_desc
;
671 mips_frame_chain(frame
)
672 struct frame_info
*frame
;
674 mips_extra_func_info_t proc_desc
;
675 CORE_ADDR saved_pc
= FRAME_SAVED_PC(frame
);
677 if (saved_pc
== 0 || inside_entry_file (saved_pc
))
680 proc_desc
= find_proc_desc(saved_pc
, frame
);
684 cached_proc_desc
= proc_desc
;
686 /* If no frame pointer and frame size is zero, we must be at end
687 of stack (or otherwise hosed). If we don't check frame size,
688 we loop forever if we see a zero size frame. */
689 if (PROC_FRAME_REG (proc_desc
) == SP_REGNUM
690 && PROC_FRAME_OFFSET (proc_desc
) == 0
691 /* The previous frame from a sigtramp frame might be frameless
692 and have frame size zero. */
693 && !frame
->signal_handler_caller
)
696 return read_next_frame_reg(frame
, PROC_FRAME_REG(proc_desc
))
697 + PROC_FRAME_OFFSET(proc_desc
);
701 init_extra_frame_info(fci
)
702 struct frame_info
*fci
;
704 /* Use proc_desc calculated in frame_chain */
705 mips_extra_func_info_t proc_desc
=
706 fci
->next
? cached_proc_desc
: find_proc_desc(fci
->pc
, fci
->next
);
708 fci
->saved_regs
= NULL
;
710 proc_desc
== &temp_proc_desc
? 0 : proc_desc
;
713 /* Fixup frame-pointer - only needed for top frame */
714 /* This may not be quite right, if proc has a real frame register.
715 Get the value of the frame relative sp, procedure might have been
716 interrupted by a signal at it's very start. */
717 if (fci
->pc
== PROC_LOW_ADDR (proc_desc
)
718 && !PROC_DESC_IS_DUMMY (proc_desc
))
719 fci
->frame
= read_next_frame_reg (fci
->next
, SP_REGNUM
);
722 read_next_frame_reg (fci
->next
, PROC_FRAME_REG (proc_desc
))
723 + PROC_FRAME_OFFSET (proc_desc
);
725 if (proc_desc
== &temp_proc_desc
)
729 /* Do not set the saved registers for a sigtramp frame,
730 mips_find_saved_registers will do that for us.
731 We can't use fci->signal_handler_caller, it is not yet set. */
732 find_pc_partial_function (fci
->pc
, &name
,
733 (CORE_ADDR
*)NULL
,(CORE_ADDR
*)NULL
);
734 if (!IN_SIGTRAMP (fci
->pc
, name
))
736 fci
->saved_regs
= (struct frame_saved_regs
*)
737 obstack_alloc (&frame_cache_obstack
,
738 sizeof (struct frame_saved_regs
));
739 *fci
->saved_regs
= temp_saved_regs
;
740 fci
->saved_regs
->regs
[PC_REGNUM
]
741 = fci
->saved_regs
->regs
[RA_REGNUM
];
745 /* hack: if argument regs are saved, guess these contain args */
746 if ((PROC_REG_MASK(proc_desc
) & 0xF0) == 0) fci
->num_args
= -1;
747 else if ((PROC_REG_MASK(proc_desc
) & 0x80) == 0) fci
->num_args
= 4;
748 else if ((PROC_REG_MASK(proc_desc
) & 0x40) == 0) fci
->num_args
= 3;
749 else if ((PROC_REG_MASK(proc_desc
) & 0x20) == 0) fci
->num_args
= 2;
750 else if ((PROC_REG_MASK(proc_desc
) & 0x10) == 0) fci
->num_args
= 1;
754 /* MIPS stack frames are almost impenetrable. When execution stops,
755 we basically have to look at symbol information for the function
756 that we stopped in, which tells us *which* register (if any) is
757 the base of the frame pointer, and what offset from that register
758 the frame itself is at.
760 This presents a problem when trying to examine a stack in memory
761 (that isn't executing at the moment), using the "frame" command. We
762 don't have a PC, nor do we have any registers except SP.
764 This routine takes two arguments, SP and PC, and tries to make the
765 cached frames look as if these two arguments defined a frame on the
766 cache. This allows the rest of info frame to extract the important
767 arguments without difficulty. */
770 setup_arbitrary_frame (argc
, argv
)
775 error ("MIPS frame specifications require two arguments: sp and pc");
777 return create_new_frame (argv
[0], argv
[1]);
782 mips_push_arguments(nargs
, args
, sp
, struct_return
, struct_addr
)
787 CORE_ADDR struct_addr
;
790 int accumulate_size
= struct_return
? MIPS_REGSIZE
: 0;
791 struct mips_arg
{ char *contents
; int len
; int offset
; };
792 struct mips_arg
*mips_args
=
793 (struct mips_arg
*)alloca((nargs
+ 4) * sizeof(struct mips_arg
));
794 register struct mips_arg
*m_arg
;
797 for (i
= 0, m_arg
= mips_args
; i
< nargs
; i
++, m_arg
++) {
798 value_ptr arg
= args
[i
];
799 m_arg
->len
= TYPE_LENGTH (VALUE_TYPE (arg
));
800 /* This entire mips-specific routine is because doubles must be aligned
801 * on 8-byte boundaries. It still isn't quite right, because MIPS decided
802 * to align 'struct {int a, b}' on 4-byte boundaries (even though this
803 * breaks their varargs implementation...). A correct solution
804 * requires an simulation of gcc's 'alignof' (and use of 'alignof'
805 * in stdarg.h/varargs.h).
806 * On the 64 bit r4000 we always pass the first four arguments
807 * using eight bytes each, so that we can load them up correctly
811 accumulate_size
= (accumulate_size
+ 7) & -8;
812 m_arg
->offset
= accumulate_size
;
813 m_arg
->contents
= VALUE_CONTENTS(arg
);
814 if (! GDB_TARGET_IS_MIPS64
)
815 accumulate_size
= (accumulate_size
+ m_arg
->len
+ 3) & -4;
818 if (accumulate_size
>= 4 * MIPS_REGSIZE
)
819 accumulate_size
= (accumulate_size
+ m_arg
->len
+ 3) &~ 4;
822 static char zeroes
[8] = { 0 };
823 int len
= m_arg
->len
;
827 if (TARGET_BYTE_ORDER
== BIG_ENDIAN
)
828 m_arg
->offset
+= 8 - len
;
830 m_arg
->len
= 8 - len
;
831 m_arg
->contents
= zeroes
;
832 if (TARGET_BYTE_ORDER
== BIG_ENDIAN
)
833 m_arg
->offset
= accumulate_size
;
835 m_arg
->offset
= accumulate_size
+ len
;
838 accumulate_size
= (accumulate_size
+ len
+ 7) & ~8;
842 accumulate_size
= (accumulate_size
+ 7) & (-8);
843 if (accumulate_size
< 4 * MIPS_REGSIZE
)
844 accumulate_size
= 4 * MIPS_REGSIZE
;
845 sp
-= accumulate_size
;
846 for (i
= nargs
+ fake_args
; m_arg
--, --i
>= 0; )
847 write_memory(sp
+ m_arg
->offset
, m_arg
->contents
, m_arg
->len
);
850 char buf
[TARGET_PTR_BIT
/ HOST_CHAR_BIT
];
852 store_address (buf
, sizeof buf
, struct_addr
);
853 write_memory (sp
, buf
, sizeof buf
);
858 /* MASK(i,j) == (1<<i) + (1<<(i+1)) + ... + (1<<j)). Assume i<=j<31. */
859 #define MASK(i,j) (((1 << ((j)+1))-1) ^ ((1 << (i))-1))
862 mips_push_dummy_frame()
864 char buffer
[MAX_REGISTER_RAW_SIZE
];
866 struct linked_proc_info
*link
= (struct linked_proc_info
*)
867 xmalloc(sizeof(struct linked_proc_info
));
868 mips_extra_func_info_t proc_desc
= &link
->info
;
869 CORE_ADDR sp
= read_register (SP_REGNUM
);
870 CORE_ADDR save_address
;
871 link
->next
= linked_proc_desc_table
;
872 linked_proc_desc_table
= link
;
873 #define PUSH_FP_REGNUM 16 /* must be a register preserved across calls */
874 #define GEN_REG_SAVE_MASK MASK(1,16)|MASK(24,28)|(1<<31)
875 #define GEN_REG_SAVE_COUNT 22
876 #define FLOAT_REG_SAVE_MASK MASK(0,19)
877 #define FLOAT_REG_SAVE_COUNT 20
878 #define FLOAT_SINGLE_REG_SAVE_MASK \
879 ((1<<18)|(1<<16)|(1<<14)|(1<<12)|(1<<10)|(1<<8)|(1<<6)|(1<<4)|(1<<2)|(1<<0))
880 #define FLOAT_SINGLE_REG_SAVE_COUNT 10
881 #define SPECIAL_REG_SAVE_COUNT 4
883 * The registers we must save are all those not preserved across
884 * procedure calls. Dest_Reg (see tm-mips.h) must also be saved.
885 * In addition, we must save the PC, and PUSH_FP_REGNUM.
886 * (Ideally, we should also save MDLO/-HI and FP Control/Status reg.)
888 * Dummy frame layout:
891 * Saved MMHI, MMLO, FPC_CSR
896 * Saved D18 (i.e. F19, F18)
898 * Saved D0 (i.e. F1, F0)
899 * CALL_DUMMY (subroutine stub; see tm-mips.h)
900 * Parameter build area (not yet implemented)
903 PROC_REG_MASK(proc_desc
) = GEN_REG_SAVE_MASK
;
906 case MIPS_FPU_DOUBLE
:
907 PROC_FREG_MASK(proc_desc
) = FLOAT_REG_SAVE_MASK
;
909 case MIPS_FPU_SINGLE
:
910 PROC_FREG_MASK(proc_desc
) = FLOAT_SINGLE_REG_SAVE_MASK
;
913 PROC_FREG_MASK(proc_desc
) = 0;
916 PROC_REG_OFFSET(proc_desc
) = /* offset of (Saved R31) from FP */
917 -sizeof(long) - 4 * SPECIAL_REG_SAVE_COUNT
;
918 PROC_FREG_OFFSET(proc_desc
) = /* offset of (Saved D18) from FP */
919 -sizeof(double) - 4 * (SPECIAL_REG_SAVE_COUNT
+ GEN_REG_SAVE_COUNT
);
920 /* save general registers */
921 save_address
= sp
+ PROC_REG_OFFSET(proc_desc
);
922 for (ireg
= 32; --ireg
>= 0; )
923 if (PROC_REG_MASK(proc_desc
) & (1 << ireg
))
925 read_register_gen (ireg
, buffer
);
927 /* Need to fix the save_address decrement below, and also make sure
928 that we don't run into problems with the size of the dummy frame
929 or any of the offsets within it. */
930 if (REGISTER_RAW_SIZE (ireg
) > 4)
931 error ("Cannot call functions on mips64");
933 write_memory (save_address
, buffer
, REGISTER_RAW_SIZE (ireg
));
936 /* save floating-points registers starting with high order word */
937 save_address
= sp
+ PROC_FREG_OFFSET(proc_desc
) + 4;
938 for (ireg
= 32; --ireg
>= 0; )
939 if (PROC_FREG_MASK(proc_desc
) & (1 << ireg
))
941 read_register_gen (ireg
+ FP0_REGNUM
, buffer
);
943 if (REGISTER_RAW_SIZE (ireg
+ FP0_REGNUM
) > 4)
944 error ("Cannot call functions on mips64");
946 write_memory (save_address
, buffer
,
947 REGISTER_RAW_SIZE (ireg
+ FP0_REGNUM
));
950 write_register (PUSH_FP_REGNUM
, sp
);
951 PROC_FRAME_REG(proc_desc
) = PUSH_FP_REGNUM
;
952 PROC_FRAME_OFFSET(proc_desc
) = 0;
953 read_register_gen (PC_REGNUM
, buffer
);
954 write_memory (sp
- 4, buffer
, REGISTER_RAW_SIZE (PC_REGNUM
));
955 read_register_gen (HI_REGNUM
, buffer
);
956 write_memory (sp
- 8, buffer
, REGISTER_RAW_SIZE (HI_REGNUM
));
957 read_register_gen (LO_REGNUM
, buffer
);
958 write_memory (sp
- 12, buffer
, REGISTER_RAW_SIZE (LO_REGNUM
));
959 if (mips_fpu
!= MIPS_FPU_NONE
)
960 read_register_gen (FCRCS_REGNUM
, buffer
);
962 memset (buffer
, 0, REGISTER_RAW_SIZE (FCRCS_REGNUM
));
963 write_memory (sp
- 16, buffer
, REGISTER_RAW_SIZE (FCRCS_REGNUM
));
964 sp
-= 4 * (GEN_REG_SAVE_COUNT
+ SPECIAL_REG_SAVE_COUNT
);
965 if (mips_fpu
== MIPS_FPU_DOUBLE
)
966 sp
-= 4 * FLOAT_REG_SAVE_COUNT
;
967 else if (mips_fpu
== MIPS_FPU_SINGLE
)
968 sp
-= 4 * FLOAT_SINGLE_REG_SAVE_COUNT
;
969 write_register (SP_REGNUM
, sp
);
970 PROC_LOW_ADDR(proc_desc
) = sp
- CALL_DUMMY_SIZE
+ CALL_DUMMY_START_OFFSET
;
971 PROC_HIGH_ADDR(proc_desc
) = sp
;
972 SET_PROC_DESC_IS_DUMMY(proc_desc
);
973 PROC_PC_REG(proc_desc
) = RA_REGNUM
;
980 struct frame_info
*frame
= get_current_frame ();
981 CORE_ADDR new_sp
= FRAME_FP (frame
);
983 mips_extra_func_info_t proc_desc
= frame
->proc_desc
;
985 write_register (PC_REGNUM
, FRAME_SAVED_PC(frame
));
986 if (frame
->saved_regs
== NULL
)
987 mips_find_saved_regs (frame
);
990 for (regnum
= 32; --regnum
>= 0; )
991 if (PROC_REG_MASK(proc_desc
) & (1 << regnum
))
992 write_register (regnum
,
993 read_memory_integer (frame
->saved_regs
->regs
[regnum
],
995 for (regnum
= 32; --regnum
>= 0; )
996 if (PROC_FREG_MASK(proc_desc
) & (1 << regnum
))
997 write_register (regnum
+ FP0_REGNUM
,
998 read_memory_integer (frame
->saved_regs
->regs
[regnum
+ FP0_REGNUM
], 4));
1000 write_register (SP_REGNUM
, new_sp
);
1001 flush_cached_frames ();
1003 if (proc_desc
&& PROC_DESC_IS_DUMMY(proc_desc
))
1005 struct linked_proc_info
*pi_ptr
, *prev_ptr
;
1007 for (pi_ptr
= linked_proc_desc_table
, prev_ptr
= NULL
;
1009 prev_ptr
= pi_ptr
, pi_ptr
= pi_ptr
->next
)
1011 if (&pi_ptr
->info
== proc_desc
)
1016 error ("Can't locate dummy extra frame info\n");
1018 if (prev_ptr
!= NULL
)
1019 prev_ptr
->next
= pi_ptr
->next
;
1021 linked_proc_desc_table
= pi_ptr
->next
;
1025 write_register (HI_REGNUM
, read_memory_integer(new_sp
- 8, 4));
1026 write_register (LO_REGNUM
, read_memory_integer(new_sp
- 12, 4));
1027 if (mips_fpu
!= MIPS_FPU_NONE
)
1028 write_register (FCRCS_REGNUM
, read_memory_integer(new_sp
- 16, 4));
1033 mips_print_register (regnum
, all
)
1036 char raw_buffer
[MAX_REGISTER_RAW_SIZE
];
1038 /* Get the data in raw format. */
1039 if (read_relative_register_raw_bytes (regnum
, raw_buffer
))
1041 printf_filtered ("%s: [Invalid]", reg_names
[regnum
]);
1045 /* If an even floating pointer register, also print as double. */
1046 if (regnum
>= FP0_REGNUM
&& regnum
< FP0_REGNUM
+32
1047 && !((regnum
-FP0_REGNUM
) & 1))
1049 char dbuffer
[MAX_REGISTER_RAW_SIZE
];
1051 read_relative_register_raw_bytes (regnum
, dbuffer
);
1052 read_relative_register_raw_bytes (regnum
+1, dbuffer
+4);
1053 #ifdef REGISTER_CONVERT_TO_TYPE
1054 REGISTER_CONVERT_TO_TYPE(regnum
, builtin_type_double
, dbuffer
);
1056 printf_filtered ("(d%d: ", regnum
-FP0_REGNUM
);
1057 val_print (builtin_type_double
, dbuffer
, 0,
1058 gdb_stdout
, 0, 1, 0, Val_pretty_default
);
1059 printf_filtered ("); ");
1061 fputs_filtered (reg_names
[regnum
], gdb_stdout
);
1063 /* The problem with printing numeric register names (r26, etc.) is that
1064 the user can't use them on input. Probably the best solution is to
1065 fix it so that either the numeric or the funky (a2, etc.) names
1066 are accepted on input. */
1068 printf_filtered ("(r%d): ", regnum
);
1070 printf_filtered (": ");
1072 /* If virtual format is floating, print it that way. */
1073 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum
)) == TYPE_CODE_FLT
)
1074 val_print (REGISTER_VIRTUAL_TYPE (regnum
), raw_buffer
, 0,
1075 gdb_stdout
, 0, 1, 0, Val_pretty_default
);
1076 /* Else print as integer in hex. */
1078 print_scalar_formatted (raw_buffer
, REGISTER_VIRTUAL_TYPE (regnum
),
1079 'x', 0, gdb_stdout
);
1082 /* Replacement for generic do_registers_info. */
1085 mips_do_registers_info (regnum
, fpregs
)
1091 if (*(reg_names
[regnum
]) == '\0')
1092 error ("Not a valid register for the current processor type");
1094 mips_print_register (regnum
, 0);
1095 printf_filtered ("\n");
1099 int did_newline
= 0;
1101 for (regnum
= 0; regnum
< NUM_REGS
; )
1103 if (((!fpregs
) && regnum
>= FP0_REGNUM
&& regnum
<= FCRIR_REGNUM
)
1104 || *(reg_names
[regnum
]) == '\0')
1109 mips_print_register (regnum
, 1);
1111 printf_filtered ("; ");
1113 if ((regnum
& 3) == 0)
1115 printf_filtered ("\n");
1120 printf_filtered ("\n");
1124 /* Return number of args passed to a frame. described by FIP.
1125 Can return -1, meaning no way to tell. */
1128 mips_frame_num_args (frame
)
1129 struct frame_info
*frame
;
1131 #if 0 /* FIXME Use or lose this! */
1132 struct chain_info_t
*p
;
1134 p
= mips_find_cached_frame (FRAME_FP (frame
));
1136 return p
->the_info
.numargs
;
1141 /* Is this a branch with a delay slot? */
1143 static int is_delayed
PARAMS ((unsigned long));
1150 for (i
= 0; i
< NUMOPCODES
; ++i
)
1151 if (mips_opcodes
[i
].pinfo
!= INSN_MACRO
1152 && (insn
& mips_opcodes
[i
].mask
) == mips_opcodes
[i
].match
)
1154 return (i
< NUMOPCODES
1155 && (mips_opcodes
[i
].pinfo
& (INSN_UNCOND_BRANCH_DELAY
1156 | INSN_COND_BRANCH_DELAY
1157 | INSN_COND_BRANCH_LIKELY
)));
1161 mips_step_skips_delay (pc
)
1166 if (target_read_memory (pc
, buf
, 4) != 0)
1167 /* If error reading memory, guess that it is not a delayed branch. */
1169 return is_delayed (extract_unsigned_integer (buf
, 4));
1172 /* To skip prologues, I use this predicate. Returns either PC itself
1173 if the code at PC does not look like a function prologue; otherwise
1174 returns an address that (if we're lucky) follows the prologue. If
1175 LENIENT, then we must skip everything which is involved in setting
1176 up the frame (it's OK to skip more, just so long as we don't skip
1177 anything which might clobber the registers which are being saved.
1178 We must skip more in the case where part of the prologue is in the
1179 delay slot of a non-prologue instruction). */
1182 mips_skip_prologue (pc
, lenient
)
1188 int seen_sp_adjust
= 0;
1189 int load_immediate_bytes
= 0;
1190 CORE_ADDR post_prologue_pc
;
1192 /* See if we can determine the end of the prologue via the symbol table.
1193 If so, then return either PC, or the PC after the prologue, whichever
1196 post_prologue_pc
= after_prologue (pc
, NULL
);
1198 if (post_prologue_pc
!= 0)
1199 return max (pc
, post_prologue_pc
);
1201 /* Can't determine prologue from the symbol table, need to examine
1204 /* Skip the typical prologue instructions. These are the stack adjustment
1205 instruction and the instructions that save registers on the stack
1206 or in the gcc frame. */
1207 for (offset
= 0; offset
< 100; offset
+= 4)
1212 status
= read_memory_nobpt (pc
+ offset
, buf
, 4);
1214 memory_error (status
, pc
+ offset
);
1215 inst
= extract_unsigned_integer (buf
, 4);
1218 if (lenient
&& is_delayed (inst
))
1222 if ((inst
& 0xffff0000) == 0x27bd0000) /* addiu $sp,$sp,offset */
1224 else if (inst
== 0x03a1e823 || /* subu $sp,$sp,$at */
1225 inst
== 0x03a8e823) /* subu $sp,$sp,$t0 */
1227 else if ((inst
& 0xFFE00000) == 0xAFA00000 && (inst
& 0x001F0000))
1228 continue; /* sw reg,n($sp) */
1230 else if ((inst
& 0xFFE00000) == 0xE7A00000) /* swc1 freg,n($sp) */
1232 else if ((inst
& 0xF3E00000) == 0xA3C00000 && (inst
& 0x001F0000))
1234 continue; /* reg != $zero */
1236 /* move $s8,$sp. With different versions of gas this will be either
1237 `addu $s8,$sp,$zero' or `or $s8,$sp,$zero'. Accept either. */
1238 else if (inst
== 0x03A0F021 || inst
== 0x03a0f025)
1241 else if ((inst
& 0xFF9F07FF) == 0x00800021) /* move reg,$a0-$a3 */
1243 else if ((inst
& 0xffff0000) == 0x3c1c0000) /* lui $gp,n */
1245 else if ((inst
& 0xffff0000) == 0x279c0000) /* addiu $gp,$gp,n */
1247 else if (inst
== 0x0399e021 /* addu $gp,$gp,$t9 */
1248 || inst
== 0x033ce021) /* addu $gp,$t9,$gp */
1250 /* The following instructions load $at or $t0 with an immediate
1251 value in preparation for a stack adjustment via
1252 subu $sp,$sp,[$at,$t0]. These instructions could also initialize
1253 a local variable, so we accept them only before a stack adjustment
1254 instruction was seen. */
1255 else if (!seen_sp_adjust
)
1257 if ((inst
& 0xffff0000) == 0x3c010000 || /* lui $at,n */
1258 (inst
& 0xffff0000) == 0x3c080000) /* lui $t0,n */
1260 load_immediate_bytes
+= 4;
1263 else if ((inst
& 0xffff0000) == 0x34210000 || /* ori $at,$at,n */
1264 (inst
& 0xffff0000) == 0x35080000 || /* ori $t0,$t0,n */
1265 (inst
& 0xffff0000) == 0x34010000 || /* ori $at,$zero,n */
1266 (inst
& 0xffff0000) == 0x34080000) /* ori $t0,$zero,n */
1268 load_immediate_bytes
+= 4;
1278 /* In a frameless function, we might have incorrectly
1279 skipped some load immediate instructions. Undo the skipping
1280 if the load immediate was not followed by a stack adjustment. */
1281 if (load_immediate_bytes
&& !seen_sp_adjust
)
1282 offset
-= load_immediate_bytes
;
1287 /* The lenient prologue stuff should be superceded by the code in
1288 init_extra_frame_info which looks to see whether the stores mentioned
1289 in the proc_desc have actually taken place. */
1291 /* Is address PC in the prologue (loosely defined) for function at
1295 mips_in_lenient_prologue (startaddr
, pc
)
1296 CORE_ADDR startaddr
;
1299 CORE_ADDR end_prologue
= mips_skip_prologue (startaddr
, 1);
1300 return pc
>= startaddr
&& pc
< end_prologue
;
1304 /* Given a return value in `regbuf' with a type `valtype',
1305 extract and copy its value into `valbuf'. */
1307 mips_extract_return_value (valtype
, regbuf
, valbuf
)
1308 struct type
*valtype
;
1309 char regbuf
[REGISTER_BYTES
];
1316 if (TYPE_CODE (valtype
) == TYPE_CODE_FLT
1317 && (mips_fpu
== MIPS_FPU_DOUBLE
1318 || (mips_fpu
== MIPS_FPU_SINGLE
&& TYPE_LENGTH (valtype
) <= 4)))
1319 regnum
= FP0_REGNUM
;
1321 if (TARGET_BYTE_ORDER
== BIG_ENDIAN
1322 && TYPE_CODE (valtype
) != TYPE_CODE_FLT
1323 && TYPE_LENGTH (valtype
) < REGISTER_RAW_SIZE (regnum
))
1324 offset
= REGISTER_RAW_SIZE (regnum
) - TYPE_LENGTH (valtype
);
1326 memcpy (valbuf
, regbuf
+ REGISTER_BYTE (regnum
) + offset
,
1327 TYPE_LENGTH (valtype
));
1328 #ifdef REGISTER_CONVERT_TO_TYPE
1329 REGISTER_CONVERT_TO_TYPE(regnum
, valtype
, valbuf
);
1333 /* Given a return value in `regbuf' with a type `valtype',
1334 write it's value into the appropriate register. */
1336 mips_store_return_value (valtype
, valbuf
)
1337 struct type
*valtype
;
1341 char raw_buffer
[MAX_REGISTER_RAW_SIZE
];
1344 if (TYPE_CODE (valtype
) == TYPE_CODE_FLT
1345 && (mips_fpu
== MIPS_FPU_DOUBLE
1346 || (mips_fpu
== MIPS_FPU_SINGLE
&& TYPE_LENGTH (valtype
) <= 4)))
1347 regnum
= FP0_REGNUM
;
1349 memcpy(raw_buffer
, valbuf
, TYPE_LENGTH (valtype
));
1351 #ifdef REGISTER_CONVERT_FROM_TYPE
1352 REGISTER_CONVERT_FROM_TYPE(regnum
, valtype
, raw_buffer
);
1355 write_register_bytes(REGISTER_BYTE (regnum
), raw_buffer
, TYPE_LENGTH (valtype
));
1358 /* Exported procedure: Is PC in the signal trampoline code */
1361 in_sigtramp (pc
, ignore
)
1363 char *ignore
; /* function name */
1365 if (sigtramp_address
== 0)
1367 return (pc
>= sigtramp_address
&& pc
< sigtramp_end
);
1370 /* Command to set FPU type. mips_fpu_string will have been set to the
1371 user's argument. Set mips_fpu based on mips_fpu_string, and then
1372 canonicalize mips_fpu_string. */
1376 mips_set_fpu_command (args
, from_tty
, c
)
1379 struct cmd_list_element
*c
;
1383 if (mips_fpu_string
== NULL
|| *mips_fpu_string
== '\0')
1384 mips_fpu
= MIPS_FPU_DOUBLE
;
1385 else if (strcasecmp (mips_fpu_string
, "double") == 0
1386 || strcasecmp (mips_fpu_string
, "on") == 0
1387 || strcasecmp (mips_fpu_string
, "1") == 0
1388 || strcasecmp (mips_fpu_string
, "yes") == 0)
1389 mips_fpu
= MIPS_FPU_DOUBLE
;
1390 else if (strcasecmp (mips_fpu_string
, "none") == 0
1391 || strcasecmp (mips_fpu_string
, "off") == 0
1392 || strcasecmp (mips_fpu_string
, "0") == 0
1393 || strcasecmp (mips_fpu_string
, "no") == 0)
1394 mips_fpu
= MIPS_FPU_NONE
;
1395 else if (strcasecmp (mips_fpu_string
, "single") == 0)
1396 mips_fpu
= MIPS_FPU_SINGLE
;
1398 err
= strsave (mips_fpu_string
);
1400 if (mips_fpu_string
!= NULL
)
1401 free (mips_fpu_string
);
1405 case MIPS_FPU_DOUBLE
:
1406 mips_fpu_string
= strsave ("double");
1408 case MIPS_FPU_SINGLE
:
1409 mips_fpu_string
= strsave ("single");
1412 mips_fpu_string
= strsave ("none");
1418 struct cleanup
*cleanups
= make_cleanup (free
, err
);
1419 error ("Unknown FPU type `%s'. Use `double', `none', or `single'.",
1421 do_cleanups (cleanups
);
1426 mips_show_fpu_command (args
, from_tty
, c
)
1429 struct cmd_list_element
*c
;
1433 /* Command to set the processor type. */
1436 mips_set_processor_type_command (args
, from_tty
)
1442 if (tmp_mips_processor_type
== NULL
|| *tmp_mips_processor_type
== '\0')
1444 printf_unfiltered ("The known MIPS processor types are as follows:\n\n");
1445 for (i
= 0; mips_processor_type_table
[i
].name
!= NULL
; ++i
)
1446 printf_unfiltered ("%s\n", mips_processor_type_table
[i
].name
);
1448 /* Restore the value. */
1449 tmp_mips_processor_type
= strsave (mips_processor_type
);
1454 if (!mips_set_processor_type (tmp_mips_processor_type
))
1456 error ("Unknown processor type `%s'.", tmp_mips_processor_type
);
1457 /* Restore its value. */
1458 tmp_mips_processor_type
= strsave (mips_processor_type
);
1463 mips_show_processor_type_command (args
, from_tty
)
1469 /* Modify the actual processor type. */
1472 mips_set_processor_type (str
)
1480 for (i
= 0; mips_processor_type_table
[i
].name
!= NULL
; ++i
)
1482 if (strcasecmp (str
, mips_processor_type_table
[i
].name
) == 0)
1484 mips_processor_type
= str
;
1486 for (j
= 0; j
< NUM_REGS
; ++j
)
1487 reg_names
[j
] = mips_processor_type_table
[i
].regnames
[j
];
1491 /* FIXME tweak fpu flag too */
1498 /* Attempt to identify the particular processor model by reading the
1502 mips_read_processor_type ()
1506 prid
= read_register (PRID_REGNUM
);
1508 if ((prid
& ~0xf) == 0x700)
1509 return savestring ("r3041", strlen("r3041"));
1514 /* Just like reinit_frame_cache, but with the right arguments to be
1515 callable as an sfunc. */
1518 reinit_frame_cache_sfunc (args
, from_tty
, c
)
1521 struct cmd_list_element
*c
;
1523 reinit_frame_cache ();
1527 gdb_print_insn_mips (memaddr
, info
)
1529 disassemble_info
*info
;
1531 if (TARGET_BYTE_ORDER
== BIG_ENDIAN
)
1532 return print_insn_big_mips (memaddr
, info
);
1534 return print_insn_little_mips (memaddr
, info
);
1538 _initialize_mips_tdep ()
1540 struct cmd_list_element
*c
;
1542 tm_print_insn
= gdb_print_insn_mips
;
1544 /* Let the user turn off floating point and set the fence post for
1545 heuristic_proc_start. */
1547 c
= add_set_cmd ("mipsfpu", class_support
, var_string_noescape
,
1548 (char *) &mips_fpu_string
,
1549 "Set use of floating point coprocessor.\n\
1550 Set to `none' to avoid using floating point instructions when calling\n\
1551 functions or dealing with return values. Set to `single' to use only\n\
1552 single precision floating point as on the R4650. Set to `double' for\n\
1553 normal floating point support.",
1555 c
->function
.sfunc
= mips_set_fpu_command
;
1556 c
= add_show_from_set (c
, &showlist
);
1557 c
->function
.sfunc
= mips_show_fpu_command
;
1559 mips_fpu
= MIPS_FPU_DOUBLE
;
1560 mips_fpu_string
= strsave ("double");
1562 c
= add_set_cmd ("processor", class_support
, var_string_noescape
,
1563 (char *) &tmp_mips_processor_type
,
1564 "Set the type of MIPS processor in use.\n\
1565 Set this to be able to access processor-type-specific registers.\n\
1568 c
->function
.cfunc
= mips_set_processor_type_command
;
1569 c
= add_show_from_set (c
, &showlist
);
1570 c
->function
.cfunc
= mips_show_processor_type_command
;
1572 tmp_mips_processor_type
= strsave (DEFAULT_MIPS_TYPE
);
1573 mips_set_processor_type_command (strsave (DEFAULT_MIPS_TYPE
), 0);
1575 /* We really would like to have both "0" and "unlimited" work, but
1576 command.c doesn't deal with that. So make it a var_zinteger
1577 because the user can always use "999999" or some such for unlimited. */
1578 c
= add_set_cmd ("heuristic-fence-post", class_support
, var_zinteger
,
1579 (char *) &heuristic_fence_post
,
1581 Set the distance searched for the start of a function.\n\
1582 If you are debugging a stripped executable, GDB needs to search through the\n\
1583 program for the start of a function. This command sets the distance of the\n\
1584 search. The only need to set it is when debugging a stripped executable.",
1586 /* We need to throw away the frame cache when we set this, since it
1587 might change our ability to get backtraces. */
1588 c
->function
.sfunc
= reinit_frame_cache_sfunc
;
1589 add_show_from_set (c
, &showlist
);