1 /* Target-dependent code for the Matsushita MN10300 for GDB, the GNU debugger.
3 Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
4 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
22 #include "arch-utils.h"
26 #include "gdb_string.h"
27 #include "gdb_assert.h"
28 #include "gdbcore.h" /* For write_memory_unsigned_integer. */
32 #include "frame-unwind.h"
33 #include "frame-base.h"
35 #include "dwarf2-frame.h"
38 #include "prologue-value.h"
41 #include "mn10300-tdep.h"
44 /* The am33-2 has 64 registers. */
45 #define MN10300_MAX_NUM_REGS 64
47 /* This structure holds the results of a prologue analysis. */
48 struct mn10300_prologue
50 /* The architecture for which we generated this prologue info. */
51 struct gdbarch
*gdbarch
;
53 /* The offset from the frame base to the stack pointer --- always
56 Calling this a "size" is a bit misleading, but given that the
57 stack grows downwards, using offsets for everything keeps one
58 from going completely sign-crazy: you never change anything's
59 sign for an ADD instruction; always change the second operand's
60 sign for a SUB instruction; and everything takes care of
64 /* Non-zero if this function has initialized the frame pointer from
65 the stack pointer, zero otherwise. */
68 /* If has_frame_ptr is non-zero, this is the offset from the frame
69 base to where the frame pointer points. This is always zero or
73 /* The address of the first instruction at which the frame has been
74 set up and the arguments are where the debug info says they are
75 --- as best as we can tell. */
76 CORE_ADDR prologue_end
;
78 /* reg_offset[R] is the offset from the CFA at which register R is
79 saved, or 1 if register R has not been saved. (Real values are
80 always zero or negative.) */
81 int reg_offset
[MN10300_MAX_NUM_REGS
];
85 /* Compute the alignment required by a type. */
88 mn10300_type_align (struct type
*type
)
92 switch (TYPE_CODE (type
))
103 return TYPE_LENGTH (type
);
105 case TYPE_CODE_COMPLEX
:
106 return TYPE_LENGTH (type
) / 2;
108 case TYPE_CODE_STRUCT
:
109 case TYPE_CODE_UNION
:
110 for (i
= 0; i
< TYPE_NFIELDS (type
); i
++)
112 int falign
= mn10300_type_align (TYPE_FIELD_TYPE (type
, i
));
113 while (align
< falign
)
118 case TYPE_CODE_ARRAY
:
119 /* HACK! Structures containing arrays, even small ones, are not
120 elligible for returning in registers. */
123 case TYPE_CODE_TYPEDEF
:
124 return mn10300_type_align (check_typedef (type
));
127 internal_error (__FILE__
, __LINE__
, _("bad switch"));
131 /* Should call_function allocate stack space for a struct return? */
133 mn10300_use_struct_convention (struct type
*type
)
135 /* Structures bigger than a pair of words can't be returned in
137 if (TYPE_LENGTH (type
) > 8)
140 switch (TYPE_CODE (type
))
142 case TYPE_CODE_STRUCT
:
143 case TYPE_CODE_UNION
:
144 /* Structures with a single field are handled as the field
146 if (TYPE_NFIELDS (type
) == 1)
147 return mn10300_use_struct_convention (TYPE_FIELD_TYPE (type
, 0));
149 /* Structures with word or double-word size are passed in memory, as
150 long as they require at least word alignment. */
151 if (mn10300_type_align (type
) >= 4)
156 /* Arrays are addressable, so they're never returned in
157 registers. This condition can only hold when the array is
158 the only field of a struct or union. */
159 case TYPE_CODE_ARRAY
:
162 case TYPE_CODE_TYPEDEF
:
163 return mn10300_use_struct_convention (check_typedef (type
));
171 mn10300_store_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
172 struct regcache
*regcache
, const void *valbuf
)
174 int len
= TYPE_LENGTH (type
);
177 if (TYPE_CODE (type
) == TYPE_CODE_PTR
)
182 regsz
= register_size (gdbarch
, reg
);
185 regcache_raw_write_part (regcache
, reg
, 0, len
, valbuf
);
186 else if (len
<= 2 * regsz
)
188 regcache_raw_write (regcache
, reg
, valbuf
);
189 gdb_assert (regsz
== register_size (gdbarch
, reg
+ 1));
190 regcache_raw_write_part (regcache
, reg
+1, 0,
191 len
- regsz
, (char *) valbuf
+ regsz
);
194 internal_error (__FILE__
, __LINE__
,
195 _("Cannot store return value %d bytes long."), len
);
199 mn10300_extract_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
200 struct regcache
*regcache
, void *valbuf
)
202 char buf
[MAX_REGISTER_SIZE
];
203 int len
= TYPE_LENGTH (type
);
206 if (TYPE_CODE (type
) == TYPE_CODE_PTR
)
211 regsz
= register_size (gdbarch
, reg
);
214 regcache_raw_read (regcache
, reg
, buf
);
215 memcpy (valbuf
, buf
, len
);
217 else if (len
<= 2 * regsz
)
219 regcache_raw_read (regcache
, reg
, buf
);
220 memcpy (valbuf
, buf
, regsz
);
221 gdb_assert (regsz
== register_size (gdbarch
, reg
+ 1));
222 regcache_raw_read (regcache
, reg
+ 1, buf
);
223 memcpy ((char *) valbuf
+ regsz
, buf
, len
- regsz
);
226 internal_error (__FILE__
, __LINE__
,
227 _("Cannot extract return value %d bytes long."), len
);
230 /* Determine, for architecture GDBARCH, how a return value of TYPE
231 should be returned. If it is supposed to be returned in registers,
232 and READBUF is non-zero, read the appropriate value from REGCACHE,
233 and copy it into READBUF. If WRITEBUF is non-zero, write the value
234 from WRITEBUF into REGCACHE. */
236 static enum return_value_convention
237 mn10300_return_value (struct gdbarch
*gdbarch
, struct type
*func_type
,
238 struct type
*type
, struct regcache
*regcache
,
239 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
241 if (mn10300_use_struct_convention (type
))
242 return RETURN_VALUE_STRUCT_CONVENTION
;
245 mn10300_extract_return_value (gdbarch
, type
, regcache
, readbuf
);
247 mn10300_store_return_value (gdbarch
, type
, regcache
, writebuf
);
249 return RETURN_VALUE_REGISTER_CONVENTION
;
253 register_name (int reg
, char **regs
, long sizeof_regs
)
255 if (reg
< 0 || reg
>= sizeof_regs
/ sizeof (regs
[0]))
262 mn10300_generic_register_name (struct gdbarch
*gdbarch
, int reg
)
264 static char *regs
[] =
265 { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
266 "sp", "pc", "mdr", "psw", "lir", "lar", "", "",
267 "", "", "", "", "", "", "", "",
268 "", "", "", "", "", "", "", "fp"
270 return register_name (reg
, regs
, sizeof regs
);
275 am33_register_name (struct gdbarch
*gdbarch
, int reg
)
277 static char *regs
[] =
278 { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
279 "sp", "pc", "mdr", "psw", "lir", "lar", "",
280 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
281 "ssp", "msp", "usp", "mcrh", "mcrl", "mcvf", "", "", ""
283 return register_name (reg
, regs
, sizeof regs
);
287 am33_2_register_name (struct gdbarch
*gdbarch
, int reg
)
289 static char *regs
[] =
291 "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
292 "sp", "pc", "mdr", "psw", "lir", "lar", "mdrq", "r0",
293 "r1", "r2", "r3", "r4", "r5", "r6", "r7", "ssp",
294 "msp", "usp", "mcrh", "mcrl", "mcvf", "fpcr", "", "",
295 "fs0", "fs1", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7",
296 "fs8", "fs9", "fs10", "fs11", "fs12", "fs13", "fs14", "fs15",
297 "fs16", "fs17", "fs18", "fs19", "fs20", "fs21", "fs22", "fs23",
298 "fs24", "fs25", "fs26", "fs27", "fs28", "fs29", "fs30", "fs31"
300 return register_name (reg
, regs
, sizeof regs
);
304 mn10300_register_type (struct gdbarch
*gdbarch
, int reg
)
306 return builtin_type (gdbarch
)->builtin_int
;
310 mn10300_read_pc (struct regcache
*regcache
)
313 regcache_cooked_read_unsigned (regcache
, E_PC_REGNUM
, &val
);
318 mn10300_write_pc (struct regcache
*regcache
, CORE_ADDR val
)
320 regcache_cooked_write_unsigned (regcache
, E_PC_REGNUM
, val
);
323 /* The breakpoint instruction must be the same size as the smallest
324 instruction in the instruction set.
326 The Matsushita mn10x00 processors have single byte instructions
327 so we need a single byte breakpoint. Matsushita hasn't defined
328 one, so we defined it ourselves. */
330 const static unsigned char *
331 mn10300_breakpoint_from_pc (struct gdbarch
*gdbarch
, CORE_ADDR
*bp_addr
,
334 static char breakpoint
[] = {0xff};
339 /* Model the semantics of pushing a register onto the stack. This
340 is a helper function for mn10300_analyze_prologue, below. */
342 push_reg (pv_t
*regs
, struct pv_area
*stack
, int regnum
)
344 regs
[E_SP_REGNUM
] = pv_add_constant (regs
[E_SP_REGNUM
], -4);
345 pv_area_store (stack
, regs
[E_SP_REGNUM
], 4, regs
[regnum
]);
348 /* Translate an "r" register number extracted from an instruction encoding
349 into a GDB register number. Adapted from a simulator function
350 of the same name; see am33.igen. */
352 translate_rreg (int rreg
)
354 /* The higher register numbers actually correspond to the
355 basic machine's address and data registers. */
356 if (rreg
> 7 && rreg
< 12)
357 return E_A0_REGNUM
+ rreg
- 8;
358 else if (rreg
> 11 && rreg
< 16)
359 return E_D0_REGNUM
+ rreg
- 12;
361 return E_E0_REGNUM
+ rreg
;
364 /* Find saved registers in a 'struct pv_area'; we pass this to pv_area_scan.
366 If VALUE is a saved register, ADDR says it was saved at a constant
367 offset from the frame base, and SIZE indicates that the whole
368 register was saved, record its offset in RESULT_UNTYPED. */
370 check_for_saved (void *result_untyped
, pv_t addr
, CORE_ADDR size
, pv_t value
)
372 struct mn10300_prologue
*result
= (struct mn10300_prologue
*) result_untyped
;
374 if (value
.kind
== pvk_register
376 && pv_is_register (addr
, E_SP_REGNUM
)
377 && size
== register_size (result
->gdbarch
, value
.reg
))
378 result
->reg_offset
[value
.reg
] = addr
.k
;
381 /* Analyze the prologue to determine where registers are saved,
382 the end of the prologue, etc. The result of this analysis is
383 returned in RESULT. See struct mn10300_prologue above for more
386 mn10300_analyze_prologue (struct gdbarch
*gdbarch
,
387 CORE_ADDR start_pc
, CORE_ADDR limit_pc
,
388 struct mn10300_prologue
*result
)
390 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
391 CORE_ADDR pc
, next_pc
;
393 pv_t regs
[MN10300_MAX_NUM_REGS
];
394 struct pv_area
*stack
;
395 struct cleanup
*back_to
;
396 CORE_ADDR after_last_frame_setup_insn
= start_pc
;
397 int am33_mode
= AM33_MODE (gdbarch
);
399 memset (result
, 0, sizeof (*result
));
400 result
->gdbarch
= gdbarch
;
402 for (rn
= 0; rn
< MN10300_MAX_NUM_REGS
; rn
++)
404 regs
[rn
] = pv_register (rn
, 0);
405 result
->reg_offset
[rn
] = 1;
407 stack
= make_pv_area (E_SP_REGNUM
, gdbarch_addr_bit (gdbarch
));
408 back_to
= make_cleanup_free_pv_area (stack
);
410 /* The typical call instruction will have saved the return address on the
411 stack. Space for the return address has already been preallocated in
412 the caller's frame. It's possible, such as when using -mrelax with gcc
413 that other registers were saved as well. If this happens, we really
414 have no chance of deciphering the frame. DWARF info can save the day
415 when this happens. */
416 pv_area_store (stack
, regs
[E_SP_REGNUM
], 4, regs
[E_PC_REGNUM
]);
419 while (pc
< limit_pc
)
424 /* Instructions can be as small as one byte; however, we usually
425 need at least two bytes to do the decoding, so fetch that many
427 status
= target_read_memory (pc
, instr
, 2);
431 /* movm [regs], sp */
432 if (instr
[0] == 0xcf)
436 save_mask
= instr
[1];
438 if ((save_mask
& movm_exreg0_bit
) && am33_mode
)
440 push_reg (regs
, stack
, E_E2_REGNUM
);
441 push_reg (regs
, stack
, E_E3_REGNUM
);
443 if ((save_mask
& movm_exreg1_bit
) && am33_mode
)
445 push_reg (regs
, stack
, E_E4_REGNUM
);
446 push_reg (regs
, stack
, E_E5_REGNUM
);
447 push_reg (regs
, stack
, E_E6_REGNUM
);
448 push_reg (regs
, stack
, E_E7_REGNUM
);
450 if ((save_mask
& movm_exother_bit
) && am33_mode
)
452 push_reg (regs
, stack
, E_E0_REGNUM
);
453 push_reg (regs
, stack
, E_E1_REGNUM
);
454 push_reg (regs
, stack
, E_MDRQ_REGNUM
);
455 push_reg (regs
, stack
, E_MCRH_REGNUM
);
456 push_reg (regs
, stack
, E_MCRL_REGNUM
);
457 push_reg (regs
, stack
, E_MCVF_REGNUM
);
459 if (save_mask
& movm_d2_bit
)
460 push_reg (regs
, stack
, E_D2_REGNUM
);
461 if (save_mask
& movm_d3_bit
)
462 push_reg (regs
, stack
, E_D3_REGNUM
);
463 if (save_mask
& movm_a2_bit
)
464 push_reg (regs
, stack
, E_A2_REGNUM
);
465 if (save_mask
& movm_a3_bit
)
466 push_reg (regs
, stack
, E_A3_REGNUM
);
467 if (save_mask
& movm_other_bit
)
469 push_reg (regs
, stack
, E_D0_REGNUM
);
470 push_reg (regs
, stack
, E_D1_REGNUM
);
471 push_reg (regs
, stack
, E_A0_REGNUM
);
472 push_reg (regs
, stack
, E_A1_REGNUM
);
473 push_reg (regs
, stack
, E_MDR_REGNUM
);
474 push_reg (regs
, stack
, E_LIR_REGNUM
);
475 push_reg (regs
, stack
, E_LAR_REGNUM
);
476 /* The `other' bit leaves a blank area of four bytes at
477 the beginning of its block of saved registers, making
478 it 32 bytes long in total. */
479 regs
[E_SP_REGNUM
] = pv_add_constant (regs
[E_SP_REGNUM
], -4);
483 after_last_frame_setup_insn
= pc
;
486 else if ((instr
[0] & 0xfc) == 0x3c)
488 int aN
= instr
[0] & 0x03;
490 regs
[E_A0_REGNUM
+ aN
] = regs
[E_SP_REGNUM
];
494 after_last_frame_setup_insn
= pc
;
497 else if ((instr
[0] & 0xf0) == 0x90
498 && (instr
[0] & 0x03) != ((instr
[0] & 0x0c) >> 2))
500 int aN
= instr
[0] & 0x03;
501 int aM
= (instr
[0] & 0x0c) >> 2;
503 regs
[E_A0_REGNUM
+ aN
] = regs
[E_A0_REGNUM
+ aM
];
508 else if ((instr
[0] & 0xf0) == 0x80
509 && (instr
[0] & 0x03) != ((instr
[0] & 0x0c) >> 2))
511 int dN
= instr
[0] & 0x03;
512 int dM
= (instr
[0] & 0x0c) >> 2;
514 regs
[E_D0_REGNUM
+ dN
] = regs
[E_D0_REGNUM
+ dM
];
519 else if (instr
[0] == 0xf1 && (instr
[1] & 0xf0) == 0xd0)
521 int dN
= instr
[1] & 0x03;
522 int aM
= (instr
[1] & 0x0c) >> 2;
524 regs
[E_D0_REGNUM
+ dN
] = regs
[E_A0_REGNUM
+ aM
];
529 else if (instr
[0] == 0xf1 && (instr
[1] & 0xf0) == 0xe0)
531 int aN
= instr
[1] & 0x03;
532 int dM
= (instr
[1] & 0x0c) >> 2;
534 regs
[E_A0_REGNUM
+ aN
] = regs
[E_D0_REGNUM
+ dM
];
539 else if (instr
[0] == 0xf8 && instr
[1] == 0xfe)
545 status
= target_read_memory (pc
+ 2, buf
, 1);
549 imm8
= extract_signed_integer (buf
, 1, byte_order
);
550 regs
[E_SP_REGNUM
] = pv_add_constant (regs
[E_SP_REGNUM
], imm8
);
553 /* Stack pointer adjustments are frame related. */
554 after_last_frame_setup_insn
= pc
;
557 else if (instr
[0] == 0xfa && instr
[1] == 0xfe)
562 status
= target_read_memory (pc
+ 2, buf
, 2);
566 imm16
= extract_signed_integer (buf
, 2, byte_order
);
567 regs
[E_SP_REGNUM
] = pv_add_constant (regs
[E_SP_REGNUM
], imm16
);
570 /* Stack pointer adjustments are frame related. */
571 after_last_frame_setup_insn
= pc
;
574 else if (instr
[0] == 0xfc && instr
[1] == 0xfe)
579 status
= target_read_memory (pc
+ 2, buf
, 4);
584 imm32
= extract_signed_integer (buf
, 4, byte_order
);
585 regs
[E_SP_REGNUM
] = pv_add_constant (regs
[E_SP_REGNUM
], imm32
);
588 /* Stack pointer adjustments are frame related. */
589 after_last_frame_setup_insn
= pc
;
592 else if ((instr
[0] & 0xfc) == 0x20)
597 aN
= instr
[0] & 0x03;
598 imm8
= extract_signed_integer (&instr
[1], 1, byte_order
);
600 regs
[E_A0_REGNUM
+ aN
] = pv_add_constant (regs
[E_A0_REGNUM
+ aN
],
606 else if (instr
[0] == 0xfa && (instr
[1] & 0xfc) == 0xd0)
612 aN
= instr
[1] & 0x03;
614 status
= target_read_memory (pc
+ 2, buf
, 2);
619 imm16
= extract_signed_integer (buf
, 2, byte_order
);
621 regs
[E_A0_REGNUM
+ aN
] = pv_add_constant (regs
[E_A0_REGNUM
+ aN
],
627 else if (instr
[0] == 0xfc && (instr
[1] & 0xfc) == 0xd0)
633 aN
= instr
[1] & 0x03;
635 status
= target_read_memory (pc
+ 2, buf
, 4);
639 imm32
= extract_signed_integer (buf
, 2, byte_order
);
641 regs
[E_A0_REGNUM
+ aN
] = pv_add_constant (regs
[E_A0_REGNUM
+ aN
],
646 else if (instr
[0] == 0xf9 && (instr
[1] & 0xfd) == 0x30)
651 Y
= (instr
[1] & 0x02) >> 1;
653 status
= target_read_memory (pc
+ 2, buf
, 1);
657 sM
= (buf
[0] & 0xf0) >> 4;
661 pv_area_store (stack
, regs
[translate_rreg (rN
)], 4,
662 regs
[E_FS0_REGNUM
+ fsM
]);
667 else if (instr
[0] == 0xf9 && (instr
[1] & 0xfd) == 0x34)
672 Y
= (instr
[1] & 0x02) >> 1;
674 status
= target_read_memory (pc
+ 2, buf
, 1);
678 sM
= (buf
[0] & 0xf0) >> 4;
681 pv_area_store (stack
, regs
[E_SP_REGNUM
], 4,
682 regs
[E_FS0_REGNUM
+ fsM
]);
686 /* fmov fsM, (rN, rI) */
687 else if (instr
[0] == 0xfb && instr
[1] == 0x37)
689 int fsM
, sM
, Z
, rN
, rI
;
693 status
= target_read_memory (pc
+ 2, buf
, 2);
697 rI
= (buf
[0] & 0xf0) >> 4;
699 sM
= (buf
[1] & 0xf0) >> 4;
700 Z
= (buf
[1] & 0x02) >> 1;
703 pv_area_store (stack
,
704 pv_add (regs
[translate_rreg (rN
)],
705 regs
[translate_rreg (rI
)]),
706 4, regs
[E_FS0_REGNUM
+ fsM
]);
710 /* fmov fsM, (d8, rN) */
711 else if (instr
[0] == 0xfb && (instr
[1] & 0xfd) == 0x30)
717 Y
= (instr
[1] & 0x02) >> 1;
719 status
= target_read_memory (pc
+ 2, buf
, 2);
723 sM
= (buf
[0] & 0xf0) >> 4;
726 d8
= extract_signed_integer (&buf
[1], 1, byte_order
);
728 pv_area_store (stack
,
729 pv_add_constant (regs
[translate_rreg (rN
)], d8
),
730 4, regs
[E_FS0_REGNUM
+ fsM
]);
734 /* fmov fsM, (d24, rN) */
735 else if (instr
[0] == 0xfd && (instr
[1] & 0xfd) == 0x30)
741 Y
= (instr
[1] & 0x02) >> 1;
743 status
= target_read_memory (pc
+ 2, buf
, 4);
747 sM
= (buf
[0] & 0xf0) >> 4;
750 d24
= extract_signed_integer (&buf
[1], 3, byte_order
);
752 pv_area_store (stack
,
753 pv_add_constant (regs
[translate_rreg (rN
)], d24
),
754 4, regs
[E_FS0_REGNUM
+ fsM
]);
758 /* fmov fsM, (d32, rN) */
759 else if (instr
[0] == 0xfe && (instr
[1] & 0xfd) == 0x30)
765 Y
= (instr
[1] & 0x02) >> 1;
767 status
= target_read_memory (pc
+ 2, buf
, 5);
771 sM
= (buf
[0] & 0xf0) >> 4;
774 d32
= extract_signed_integer (&buf
[1], 4, byte_order
);
776 pv_area_store (stack
,
777 pv_add_constant (regs
[translate_rreg (rN
)], d32
),
778 4, regs
[E_FS0_REGNUM
+ fsM
]);
782 /* fmov fsM, (d8, SP) */
783 else if (instr
[0] == 0xfb && (instr
[1] & 0xfd) == 0x34)
789 Y
= (instr
[1] & 0x02) >> 1;
791 status
= target_read_memory (pc
+ 2, buf
, 2);
795 sM
= (buf
[0] & 0xf0) >> 4;
797 d8
= extract_signed_integer (&buf
[1], 1, byte_order
);
799 pv_area_store (stack
,
800 pv_add_constant (regs
[E_SP_REGNUM
], d8
),
801 4, regs
[E_FS0_REGNUM
+ fsM
]);
805 /* fmov fsM, (d24, SP) */
806 else if (instr
[0] == 0xfd && (instr
[1] & 0xfd) == 0x34)
812 Y
= (instr
[1] & 0x02) >> 1;
814 status
= target_read_memory (pc
+ 2, buf
, 4);
818 sM
= (buf
[0] & 0xf0) >> 4;
820 d24
= extract_signed_integer (&buf
[1], 3, byte_order
);
822 pv_area_store (stack
,
823 pv_add_constant (regs
[E_SP_REGNUM
], d24
),
824 4, regs
[E_FS0_REGNUM
+ fsM
]);
828 /* fmov fsM, (d32, SP) */
829 else if (instr
[0] == 0xfe && (instr
[1] & 0xfd) == 0x34)
835 Y
= (instr
[1] & 0x02) >> 1;
837 status
= target_read_memory (pc
+ 2, buf
, 5);
841 sM
= (buf
[0] & 0xf0) >> 4;
843 d32
= extract_signed_integer (&buf
[1], 4, byte_order
);
845 pv_area_store (stack
,
846 pv_add_constant (regs
[E_SP_REGNUM
], d32
),
847 4, regs
[E_FS0_REGNUM
+ fsM
]);
851 /* fmov fsM, (rN+) */
852 else if (instr
[0] == 0xf9 && (instr
[1] & 0xfd) == 0x31)
854 int fsM
, sM
, Y
, rN
, rN_regnum
;
857 Y
= (instr
[1] & 0x02) >> 1;
859 status
= target_read_memory (pc
+ 2, buf
, 1);
863 sM
= (buf
[0] & 0xf0) >> 4;
867 rN_regnum
= translate_rreg (rN
);
869 pv_area_store (stack
, regs
[rN_regnum
], 4,
870 regs
[E_FS0_REGNUM
+ fsM
]);
871 regs
[rN_regnum
] = pv_add_constant (regs
[rN_regnum
], 4);
875 /* fmov fsM, (rN+, imm8) */
876 else if (instr
[0] == 0xfb && (instr
[1] & 0xfd) == 0x31)
878 int fsM
, sM
, Y
, rN
, rN_regnum
;
882 Y
= (instr
[1] & 0x02) >> 1;
884 status
= target_read_memory (pc
+ 2, buf
, 2);
888 sM
= (buf
[0] & 0xf0) >> 4;
891 imm8
= extract_signed_integer (&buf
[1], 1, byte_order
);
893 rN_regnum
= translate_rreg (rN
);
895 pv_area_store (stack
, regs
[rN_regnum
], 4, regs
[E_FS0_REGNUM
+ fsM
]);
896 regs
[rN_regnum
] = pv_add_constant (regs
[rN_regnum
], imm8
);
900 /* fmov fsM, (rN+, imm24) */
901 else if (instr
[0] == 0xfd && (instr
[1] & 0xfd) == 0x31)
903 int fsM
, sM
, Y
, rN
, rN_regnum
;
907 Y
= (instr
[1] & 0x02) >> 1;
909 status
= target_read_memory (pc
+ 2, buf
, 4);
913 sM
= (buf
[0] & 0xf0) >> 4;
916 imm24
= extract_signed_integer (&buf
[1], 3, byte_order
);
918 rN_regnum
= translate_rreg (rN
);
920 pv_area_store (stack
, regs
[rN_regnum
], 4, regs
[E_FS0_REGNUM
+ fsM
]);
921 regs
[rN_regnum
] = pv_add_constant (regs
[rN_regnum
], imm24
);
925 /* fmov fsM, (rN+, imm32) */
926 else if (instr
[0] == 0xfe && (instr
[1] & 0xfd) == 0x31)
928 int fsM
, sM
, Y
, rN
, rN_regnum
;
932 Y
= (instr
[1] & 0x02) >> 1;
934 status
= target_read_memory (pc
+ 2, buf
, 5);
938 sM
= (buf
[0] & 0xf0) >> 4;
941 imm32
= extract_signed_integer (&buf
[1], 4, byte_order
);
943 rN_regnum
= translate_rreg (rN
);
945 pv_area_store (stack
, regs
[rN_regnum
], 4, regs
[E_FS0_REGNUM
+ fsM
]);
946 regs
[rN_regnum
] = pv_add_constant (regs
[rN_regnum
], imm32
);
951 else if ((instr
[0] & 0xf0) == 0x90)
953 int aN
= instr
[0] & 0x03;
956 imm8
= extract_signed_integer (&instr
[1], 1, byte_order
);
958 regs
[E_A0_REGNUM
+ aN
] = pv_constant (imm8
);
962 else if ((instr
[0] & 0xfc) == 0x24)
964 int aN
= instr
[0] & 0x03;
968 status
= target_read_memory (pc
+ 1, buf
, 2);
972 imm16
= extract_signed_integer (buf
, 2, byte_order
);
973 regs
[E_A0_REGNUM
+ aN
] = pv_constant (imm16
);
977 else if (instr
[0] == 0xfc && ((instr
[1] & 0xfc) == 0xdc))
979 int aN
= instr
[1] & 0x03;
983 status
= target_read_memory (pc
+ 2, buf
, 4);
987 imm32
= extract_signed_integer (buf
, 4, byte_order
);
988 regs
[E_A0_REGNUM
+ aN
] = pv_constant (imm32
);
992 else if ((instr
[0] & 0xf0) == 0x80)
994 int dN
= instr
[0] & 0x03;
997 imm8
= extract_signed_integer (&instr
[1], 1, byte_order
);
999 regs
[E_D0_REGNUM
+ dN
] = pv_constant (imm8
);
1003 else if ((instr
[0] & 0xfc) == 0x2c)
1005 int dN
= instr
[0] & 0x03;
1009 status
= target_read_memory (pc
+ 1, buf
, 2);
1013 imm16
= extract_signed_integer (buf
, 2, byte_order
);
1014 regs
[E_D0_REGNUM
+ dN
] = pv_constant (imm16
);
1018 else if (instr
[0] == 0xfc && ((instr
[1] & 0xfc) == 0xcc))
1020 int dN
= instr
[1] & 0x03;
1024 status
= target_read_memory (pc
+ 2, buf
, 4);
1028 imm32
= extract_signed_integer (buf
, 4, byte_order
);
1029 regs
[E_D0_REGNUM
+ dN
] = pv_constant (imm32
);
1034 /* We've hit some instruction that we don't recognize. Hopefully,
1035 we have enough to do prologue analysis. */
1040 /* Is the frame size (offset, really) a known constant? */
1041 if (pv_is_register (regs
[E_SP_REGNUM
], E_SP_REGNUM
))
1042 result
->frame_size
= regs
[E_SP_REGNUM
].k
;
1044 /* Was the frame pointer initialized? */
1045 if (pv_is_register (regs
[E_A3_REGNUM
], E_SP_REGNUM
))
1047 result
->has_frame_ptr
= 1;
1048 result
->frame_ptr_offset
= regs
[E_A3_REGNUM
].k
;
1051 /* Record where all the registers were saved. */
1052 pv_area_scan (stack
, check_for_saved
, (void *) result
);
1054 result
->prologue_end
= after_last_frame_setup_insn
;
1056 do_cleanups (back_to
);
1059 /* Function: skip_prologue
1060 Return the address of the first inst past the prologue of the function. */
1063 mn10300_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
1066 CORE_ADDR func_addr
, func_end
;
1067 struct mn10300_prologue p
;
1069 /* Try to find the extent of the function that contains PC. */
1070 if (!find_pc_partial_function (pc
, &name
, &func_addr
, &func_end
))
1073 mn10300_analyze_prologue (gdbarch
, pc
, func_end
, &p
);
1074 return p
.prologue_end
;
1077 /* Wrapper for mn10300_analyze_prologue: find the function start;
1078 use the current frame PC as the limit, then
1079 invoke mn10300_analyze_prologue and return its result. */
1080 static struct mn10300_prologue
*
1081 mn10300_analyze_frame_prologue (struct frame_info
*this_frame
,
1082 void **this_prologue_cache
)
1084 if (!*this_prologue_cache
)
1086 CORE_ADDR func_start
, stop_addr
;
1088 *this_prologue_cache
= FRAME_OBSTACK_ZALLOC (struct mn10300_prologue
);
1090 func_start
= get_frame_func (this_frame
);
1091 stop_addr
= get_frame_pc (this_frame
);
1093 /* If we couldn't find any function containing the PC, then
1094 just initialize the prologue cache, but don't do anything. */
1096 stop_addr
= func_start
;
1098 mn10300_analyze_prologue (get_frame_arch (this_frame
),
1099 func_start
, stop_addr
, *this_prologue_cache
);
1102 return *this_prologue_cache
;
1105 /* Given the next frame and a prologue cache, return this frame's
1108 mn10300_frame_base (struct frame_info
*this_frame
, void **this_prologue_cache
)
1110 struct mn10300_prologue
*p
1111 = mn10300_analyze_frame_prologue (this_frame
, this_prologue_cache
);
1113 /* In functions that use alloca, the distance between the stack
1114 pointer and the frame base varies dynamically, so we can't use
1115 the SP plus static information like prologue analysis to find the
1116 frame base. However, such functions must have a frame pointer,
1117 to be able to restore the SP on exit. So whenever we do have a
1118 frame pointer, use that to find the base. */
1119 if (p
->has_frame_ptr
)
1121 CORE_ADDR fp
= get_frame_register_unsigned (this_frame
, E_A3_REGNUM
);
1122 return fp
- p
->frame_ptr_offset
;
1126 CORE_ADDR sp
= get_frame_register_unsigned (this_frame
, E_SP_REGNUM
);
1127 return sp
- p
->frame_size
;
1131 /* Here is a dummy implementation. */
1132 static struct frame_id
1133 mn10300_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
1135 CORE_ADDR sp
= get_frame_register_unsigned (this_frame
, E_SP_REGNUM
);
1136 CORE_ADDR pc
= get_frame_register_unsigned (this_frame
, E_PC_REGNUM
);
1137 return frame_id_build (sp
, pc
);
1141 mn10300_frame_this_id (struct frame_info
*this_frame
,
1142 void **this_prologue_cache
,
1143 struct frame_id
*this_id
)
1145 *this_id
= frame_id_build (mn10300_frame_base (this_frame
,
1146 this_prologue_cache
),
1147 get_frame_func (this_frame
));
1151 static struct value
*
1152 mn10300_frame_prev_register (struct frame_info
*this_frame
,
1153 void **this_prologue_cache
, int regnum
)
1155 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (this_frame
));
1156 struct mn10300_prologue
*p
1157 = mn10300_analyze_frame_prologue (this_frame
, this_prologue_cache
);
1158 CORE_ADDR frame_base
= mn10300_frame_base (this_frame
, this_prologue_cache
);
1159 int reg_size
= register_size (get_frame_arch (this_frame
), regnum
);
1161 if (regnum
== E_SP_REGNUM
)
1162 return frame_unwind_got_constant (this_frame
, regnum
, frame_base
);
1164 /* If prologue analysis says we saved this register somewhere,
1165 return a description of the stack slot holding it. */
1166 if (p
->reg_offset
[regnum
] != 1)
1167 return frame_unwind_got_memory (this_frame
, regnum
,
1168 frame_base
+ p
->reg_offset
[regnum
]);
1170 /* Otherwise, presume we haven't changed the value of this
1171 register, and get it from the next frame. */
1172 return frame_unwind_got_register (this_frame
, regnum
, regnum
);
1175 static const struct frame_unwind mn10300_frame_unwind
= {
1177 mn10300_frame_this_id
,
1178 mn10300_frame_prev_register
,
1180 default_frame_sniffer
1184 mn10300_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
1188 pc
= frame_unwind_register_unsigned (this_frame
, E_PC_REGNUM
);
1193 mn10300_unwind_sp (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
1197 sp
= frame_unwind_register_unsigned (this_frame
, E_SP_REGNUM
);
1202 mn10300_frame_unwind_init (struct gdbarch
*gdbarch
)
1204 dwarf2_append_unwinders (gdbarch
);
1205 frame_unwind_append_unwinder (gdbarch
, &mn10300_frame_unwind
);
1206 set_gdbarch_dummy_id (gdbarch
, mn10300_dummy_id
);
1207 set_gdbarch_unwind_pc (gdbarch
, mn10300_unwind_pc
);
1208 set_gdbarch_unwind_sp (gdbarch
, mn10300_unwind_sp
);
1211 /* Function: push_dummy_call
1213 * Set up machine state for a target call, including
1214 * function arguments, stack, return address, etc.
1219 mn10300_push_dummy_call (struct gdbarch
*gdbarch
,
1220 struct value
*target_func
,
1221 struct regcache
*regcache
,
1223 int nargs
, struct value
**args
,
1226 CORE_ADDR struct_addr
)
1228 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1229 const int push_size
= register_size (gdbarch
, E_PC_REGNUM
);
1232 int stack_offset
= 0;
1234 char *val
, valbuf
[MAX_REGISTER_SIZE
];
1236 /* This should be a nop, but align the stack just in case something
1237 went wrong. Stacks are four byte aligned on the mn10300. */
1240 /* Now make space on the stack for the args.
1242 XXX This doesn't appear to handle pass-by-invisible reference
1244 regs_used
= struct_return
? 1 : 0;
1245 for (len
= 0, argnum
= 0; argnum
< nargs
; argnum
++)
1247 arg_len
= (TYPE_LENGTH (value_type (args
[argnum
])) + 3) & ~3;
1248 while (regs_used
< 2 && arg_len
> 0)
1251 arg_len
-= push_size
;
1256 /* Allocate stack space. */
1262 regcache_cooked_write_unsigned (regcache
, E_D0_REGNUM
, struct_addr
);
1267 /* Push all arguments onto the stack. */
1268 for (argnum
= 0; argnum
< nargs
; argnum
++)
1270 /* FIXME what about structs? Unions? */
1271 if (TYPE_CODE (value_type (*args
)) == TYPE_CODE_STRUCT
1272 && TYPE_LENGTH (value_type (*args
)) > 8)
1274 /* Change to pointer-to-type. */
1275 arg_len
= push_size
;
1276 store_unsigned_integer (valbuf
, push_size
, byte_order
,
1277 value_address (*args
));
1282 arg_len
= TYPE_LENGTH (value_type (*args
));
1283 val
= (char *) value_contents (*args
);
1286 while (regs_used
< 2 && arg_len
> 0)
1288 regcache_cooked_write_unsigned (regcache
, regs_used
,
1289 extract_unsigned_integer (val
, push_size
, byte_order
));
1291 arg_len
-= push_size
;
1297 write_memory (sp
+ stack_offset
, val
, push_size
);
1298 arg_len
-= push_size
;
1300 stack_offset
+= push_size
;
1306 /* Make space for the flushback area. */
1309 /* Push the return address that contains the magic breakpoint. */
1311 write_memory_unsigned_integer (sp
, push_size
, byte_order
, bp_addr
);
1313 /* The CPU also writes the return address always into the
1314 MDR register on "call". */
1315 regcache_cooked_write_unsigned (regcache
, E_MDR_REGNUM
, bp_addr
);
1318 regcache_cooked_write_unsigned (regcache
, E_SP_REGNUM
, sp
);
1320 /* On the mn10300, it's possible to move some of the stack adjustment
1321 and saving of the caller-save registers out of the prologue and
1322 into the call sites. (When using gcc, this optimization can
1323 occur when using the -mrelax switch.) If this occurs, the dwarf2
1324 info will reflect this fact. We can test to see if this is the
1325 case by creating a new frame using the current stack pointer and
1326 the address of the function that we're about to call. We then
1327 unwind SP and see if it's different than the SP of our newly
1328 created frame. If the SP values are the same, the caller is not
1329 expected to allocate any additional stack. On the other hand, if
1330 the SP values are different, the difference determines the
1331 additional stack that must be allocated.
1333 Note that we don't update the return value though because that's
1334 the value of the stack just after pushing the arguments, but prior
1335 to performing the call. This value is needed in order to
1336 construct the frame ID of the dummy call. */
1338 CORE_ADDR func_addr
= find_function_addr (target_func
, NULL
);
1339 CORE_ADDR unwound_sp
1340 = mn10300_unwind_sp (gdbarch
, create_new_frame (sp
, func_addr
));
1341 if (sp
!= unwound_sp
)
1342 regcache_cooked_write_unsigned (regcache
, E_SP_REGNUM
,
1343 sp
- (unwound_sp
- sp
));
1349 /* If DWARF2 is a register number appearing in Dwarf2 debug info, then
1350 mn10300_dwarf2_reg_to_regnum (DWARF2) is the corresponding GDB
1351 register number. Why don't Dwarf2 and GDB use the same numbering?
1352 Who knows? But since people have object files lying around with
1353 the existing Dwarf2 numbering, and other people have written stubs
1354 to work with the existing GDB, neither of them can change. So we
1355 just have to cope. */
1357 mn10300_dwarf2_reg_to_regnum (struct gdbarch
*gdbarch
, int dwarf2
)
1359 /* This table is supposed to be shaped like the gdbarch_register_name
1360 initializer in gcc/config/mn10300/mn10300.h. Registers which
1361 appear in GCC's numbering, but have no counterpart in GDB's
1362 world, are marked with a -1. */
1363 static int dwarf2_to_gdb
[] = {
1364 0, 1, 2, 3, 4, 5, 6, 7, -1, 8,
1365 15, 16, 17, 18, 19, 20, 21, 22,
1366 32, 33, 34, 35, 36, 37, 38, 39,
1367 40, 41, 42, 43, 44, 45, 46, 47,
1368 48, 49, 50, 51, 52, 53, 54, 55,
1369 56, 57, 58, 59, 60, 61, 62, 63,
1374 || dwarf2
>= ARRAY_SIZE (dwarf2_to_gdb
))
1376 warning (_("Bogus register number in debug info: %d"), dwarf2
);
1380 return dwarf2_to_gdb
[dwarf2
];
1383 static struct gdbarch
*
1384 mn10300_gdbarch_init (struct gdbarch_info info
,
1385 struct gdbarch_list
*arches
)
1387 struct gdbarch
*gdbarch
;
1388 struct gdbarch_tdep
*tdep
;
1391 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1393 return arches
->gdbarch
;
1395 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
1396 gdbarch
= gdbarch_alloc (&info
, tdep
);
1398 switch (info
.bfd_arch_info
->mach
)
1401 case bfd_mach_mn10300
:
1402 set_gdbarch_register_name (gdbarch
, mn10300_generic_register_name
);
1403 tdep
->am33_mode
= 0;
1407 set_gdbarch_register_name (gdbarch
, am33_register_name
);
1408 tdep
->am33_mode
= 1;
1411 case bfd_mach_am33_2
:
1412 set_gdbarch_register_name (gdbarch
, am33_2_register_name
);
1413 tdep
->am33_mode
= 2;
1415 set_gdbarch_fp0_regnum (gdbarch
, 32);
1418 internal_error (__FILE__
, __LINE__
,
1419 _("mn10300_gdbarch_init: Unknown mn10300 variant"));
1423 /* By default, chars are unsigned. */
1424 set_gdbarch_char_signed (gdbarch
, 0);
1427 set_gdbarch_num_regs (gdbarch
, num_regs
);
1428 set_gdbarch_register_type (gdbarch
, mn10300_register_type
);
1429 set_gdbarch_skip_prologue (gdbarch
, mn10300_skip_prologue
);
1430 set_gdbarch_read_pc (gdbarch
, mn10300_read_pc
);
1431 set_gdbarch_write_pc (gdbarch
, mn10300_write_pc
);
1432 set_gdbarch_pc_regnum (gdbarch
, E_PC_REGNUM
);
1433 set_gdbarch_sp_regnum (gdbarch
, E_SP_REGNUM
);
1434 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, mn10300_dwarf2_reg_to_regnum
);
1436 /* Stack unwinding. */
1437 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1439 set_gdbarch_breakpoint_from_pc (gdbarch
, mn10300_breakpoint_from_pc
);
1440 /* decr_pc_after_break? */
1442 set_gdbarch_print_insn (gdbarch
, print_insn_mn10300
);
1445 set_gdbarch_return_value (gdbarch
, mn10300_return_value
);
1447 /* Stage 3 -- get target calls working. */
1448 set_gdbarch_push_dummy_call (gdbarch
, mn10300_push_dummy_call
);
1449 /* set_gdbarch_return_value (store, extract) */
1452 mn10300_frame_unwind_init (gdbarch
);
1454 /* Hook in ABI-specific overrides, if they have been registered. */
1455 gdbarch_init_osabi (info
, gdbarch
);
1460 /* Dump out the mn10300 specific architecture information. */
1463 mn10300_dump_tdep (struct gdbarch
*gdbarch
, struct ui_file
*file
)
1465 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1466 fprintf_unfiltered (file
, "mn10300_dump_tdep: am33_mode = %d\n",
1470 /* Provide a prototype to silence -Wmissing-prototypes. */
1471 extern initialize_file_ftype _initialize_mn10300_tdep
;
1474 _initialize_mn10300_tdep (void)
1476 gdbarch_register (bfd_arch_mn10300
, mn10300_gdbarch_init
, mn10300_dump_tdep
);