Import alloca explicitly
[deliverable/binutils-gdb.git] / gdb / mn10300-tdep.c
1 /* Target-dependent code for the Matsushita MN10300 for GDB, the GNU debugger.
2
3 Copyright (C) 1996-2014 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19
20 #include "defs.h"
21 #include "arch-utils.h"
22 #include "dis-asm.h"
23 #include "gdbtypes.h"
24 #include "regcache.h"
25 #include "gdbcore.h" /* For write_memory_unsigned_integer. */
26 #include "value.h"
27 #include "frame.h"
28 #include "frame-unwind.h"
29 #include "frame-base.h"
30 #include "symtab.h"
31 #include "dwarf2-frame.h"
32 #include "osabi.h"
33 #include "infcall.h"
34 #include "prologue-value.h"
35 #include "target.h"
36
37 #include "mn10300-tdep.h"
38
39
40 /* The am33-2 has 64 registers. */
41 #define MN10300_MAX_NUM_REGS 64
42
43 /* This structure holds the results of a prologue analysis. */
44 struct mn10300_prologue
45 {
46 /* The architecture for which we generated this prologue info. */
47 struct gdbarch *gdbarch;
48
49 /* The offset from the frame base to the stack pointer --- always
50 zero or negative.
51
52 Calling this a "size" is a bit misleading, but given that the
53 stack grows downwards, using offsets for everything keeps one
54 from going completely sign-crazy: you never change anything's
55 sign for an ADD instruction; always change the second operand's
56 sign for a SUB instruction; and everything takes care of
57 itself. */
58 int frame_size;
59
60 /* Non-zero if this function has initialized the frame pointer from
61 the stack pointer, zero otherwise. */
62 int has_frame_ptr;
63
64 /* If has_frame_ptr is non-zero, this is the offset from the frame
65 base to where the frame pointer points. This is always zero or
66 negative. */
67 int frame_ptr_offset;
68
69 /* The address of the first instruction at which the frame has been
70 set up and the arguments are where the debug info says they are
71 --- as best as we can tell. */
72 CORE_ADDR prologue_end;
73
74 /* reg_offset[R] is the offset from the CFA at which register R is
75 saved, or 1 if register R has not been saved. (Real values are
76 always zero or negative.) */
77 int reg_offset[MN10300_MAX_NUM_REGS];
78 };
79
80
81 /* Compute the alignment required by a type. */
82
83 static int
84 mn10300_type_align (struct type *type)
85 {
86 int i, align = 1;
87
88 switch (TYPE_CODE (type))
89 {
90 case TYPE_CODE_INT:
91 case TYPE_CODE_ENUM:
92 case TYPE_CODE_SET:
93 case TYPE_CODE_RANGE:
94 case TYPE_CODE_CHAR:
95 case TYPE_CODE_BOOL:
96 case TYPE_CODE_FLT:
97 case TYPE_CODE_PTR:
98 case TYPE_CODE_REF:
99 return TYPE_LENGTH (type);
100
101 case TYPE_CODE_COMPLEX:
102 return TYPE_LENGTH (type) / 2;
103
104 case TYPE_CODE_STRUCT:
105 case TYPE_CODE_UNION:
106 for (i = 0; i < TYPE_NFIELDS (type); i++)
107 {
108 int falign = mn10300_type_align (TYPE_FIELD_TYPE (type, i));
109 while (align < falign)
110 align <<= 1;
111 }
112 return align;
113
114 case TYPE_CODE_ARRAY:
115 /* HACK! Structures containing arrays, even small ones, are not
116 elligible for returning in registers. */
117 return 256;
118
119 case TYPE_CODE_TYPEDEF:
120 return mn10300_type_align (check_typedef (type));
121
122 default:
123 internal_error (__FILE__, __LINE__, _("bad switch"));
124 }
125 }
126
127 /* Should call_function allocate stack space for a struct return? */
128 static int
129 mn10300_use_struct_convention (struct type *type)
130 {
131 /* Structures bigger than a pair of words can't be returned in
132 registers. */
133 if (TYPE_LENGTH (type) > 8)
134 return 1;
135
136 switch (TYPE_CODE (type))
137 {
138 case TYPE_CODE_STRUCT:
139 case TYPE_CODE_UNION:
140 /* Structures with a single field are handled as the field
141 itself. */
142 if (TYPE_NFIELDS (type) == 1)
143 return mn10300_use_struct_convention (TYPE_FIELD_TYPE (type, 0));
144
145 /* Structures with word or double-word size are passed in memory, as
146 long as they require at least word alignment. */
147 if (mn10300_type_align (type) >= 4)
148 return 0;
149
150 return 1;
151
152 /* Arrays are addressable, so they're never returned in
153 registers. This condition can only hold when the array is
154 the only field of a struct or union. */
155 case TYPE_CODE_ARRAY:
156 return 1;
157
158 case TYPE_CODE_TYPEDEF:
159 return mn10300_use_struct_convention (check_typedef (type));
160
161 default:
162 return 0;
163 }
164 }
165
166 static void
167 mn10300_store_return_value (struct gdbarch *gdbarch, struct type *type,
168 struct regcache *regcache, const gdb_byte *valbuf)
169 {
170 int len = TYPE_LENGTH (type);
171 int reg, regsz;
172
173 if (TYPE_CODE (type) == TYPE_CODE_PTR)
174 reg = 4;
175 else
176 reg = 0;
177
178 regsz = register_size (gdbarch, reg);
179
180 if (len <= regsz)
181 regcache_raw_write_part (regcache, reg, 0, len, valbuf);
182 else if (len <= 2 * regsz)
183 {
184 regcache_raw_write (regcache, reg, valbuf);
185 gdb_assert (regsz == register_size (gdbarch, reg + 1));
186 regcache_raw_write_part (regcache, reg+1, 0,
187 len - regsz, valbuf + regsz);
188 }
189 else
190 internal_error (__FILE__, __LINE__,
191 _("Cannot store return value %d bytes long."), len);
192 }
193
194 static void
195 mn10300_extract_return_value (struct gdbarch *gdbarch, struct type *type,
196 struct regcache *regcache, void *valbuf)
197 {
198 gdb_byte buf[MAX_REGISTER_SIZE];
199 int len = TYPE_LENGTH (type);
200 int reg, regsz;
201
202 if (TYPE_CODE (type) == TYPE_CODE_PTR)
203 reg = 4;
204 else
205 reg = 0;
206
207 regsz = register_size (gdbarch, reg);
208 if (len <= regsz)
209 {
210 regcache_raw_read (regcache, reg, buf);
211 memcpy (valbuf, buf, len);
212 }
213 else if (len <= 2 * regsz)
214 {
215 regcache_raw_read (regcache, reg, buf);
216 memcpy (valbuf, buf, regsz);
217 gdb_assert (regsz == register_size (gdbarch, reg + 1));
218 regcache_raw_read (regcache, reg + 1, buf);
219 memcpy ((char *) valbuf + regsz, buf, len - regsz);
220 }
221 else
222 internal_error (__FILE__, __LINE__,
223 _("Cannot extract return value %d bytes long."), len);
224 }
225
226 /* Determine, for architecture GDBARCH, how a return value of TYPE
227 should be returned. If it is supposed to be returned in registers,
228 and READBUF is non-zero, read the appropriate value from REGCACHE,
229 and copy it into READBUF. If WRITEBUF is non-zero, write the value
230 from WRITEBUF into REGCACHE. */
231
232 static enum return_value_convention
233 mn10300_return_value (struct gdbarch *gdbarch, struct value *function,
234 struct type *type, struct regcache *regcache,
235 gdb_byte *readbuf, const gdb_byte *writebuf)
236 {
237 if (mn10300_use_struct_convention (type))
238 return RETURN_VALUE_STRUCT_CONVENTION;
239
240 if (readbuf)
241 mn10300_extract_return_value (gdbarch, type, regcache, readbuf);
242 if (writebuf)
243 mn10300_store_return_value (gdbarch, type, regcache, writebuf);
244
245 return RETURN_VALUE_REGISTER_CONVENTION;
246 }
247
248 static char *
249 register_name (int reg, char **regs, long sizeof_regs)
250 {
251 if (reg < 0 || reg >= sizeof_regs / sizeof (regs[0]))
252 return NULL;
253 else
254 return regs[reg];
255 }
256
257 static const char *
258 mn10300_generic_register_name (struct gdbarch *gdbarch, int reg)
259 {
260 static char *regs[] =
261 { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
262 "sp", "pc", "mdr", "psw", "lir", "lar", "", "",
263 "", "", "", "", "", "", "", "",
264 "", "", "", "", "", "", "", "fp"
265 };
266 return register_name (reg, regs, sizeof regs);
267 }
268
269
270 static const char *
271 am33_register_name (struct gdbarch *gdbarch, int reg)
272 {
273 static char *regs[] =
274 { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
275 "sp", "pc", "mdr", "psw", "lir", "lar", "",
276 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
277 "ssp", "msp", "usp", "mcrh", "mcrl", "mcvf", "", "", ""
278 };
279 return register_name (reg, regs, sizeof regs);
280 }
281
282 static const char *
283 am33_2_register_name (struct gdbarch *gdbarch, int reg)
284 {
285 static char *regs[] =
286 {
287 "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
288 "sp", "pc", "mdr", "psw", "lir", "lar", "mdrq", "r0",
289 "r1", "r2", "r3", "r4", "r5", "r6", "r7", "ssp",
290 "msp", "usp", "mcrh", "mcrl", "mcvf", "fpcr", "", "",
291 "fs0", "fs1", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7",
292 "fs8", "fs9", "fs10", "fs11", "fs12", "fs13", "fs14", "fs15",
293 "fs16", "fs17", "fs18", "fs19", "fs20", "fs21", "fs22", "fs23",
294 "fs24", "fs25", "fs26", "fs27", "fs28", "fs29", "fs30", "fs31"
295 };
296 return register_name (reg, regs, sizeof regs);
297 }
298
299 static struct type *
300 mn10300_register_type (struct gdbarch *gdbarch, int reg)
301 {
302 return builtin_type (gdbarch)->builtin_int;
303 }
304
305 static CORE_ADDR
306 mn10300_read_pc (struct regcache *regcache)
307 {
308 ULONGEST val;
309 regcache_cooked_read_unsigned (regcache, E_PC_REGNUM, &val);
310 return val;
311 }
312
313 static void
314 mn10300_write_pc (struct regcache *regcache, CORE_ADDR val)
315 {
316 regcache_cooked_write_unsigned (regcache, E_PC_REGNUM, val);
317 }
318
319 /* The breakpoint instruction must be the same size as the smallest
320 instruction in the instruction set.
321
322 The Matsushita mn10x00 processors have single byte instructions
323 so we need a single byte breakpoint. Matsushita hasn't defined
324 one, so we defined it ourselves. */
325
326 static const unsigned char *
327 mn10300_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *bp_addr,
328 int *bp_size)
329 {
330 static gdb_byte breakpoint[] = {0xff};
331 *bp_size = 1;
332 return breakpoint;
333 }
334
335 /* Model the semantics of pushing a register onto the stack. This
336 is a helper function for mn10300_analyze_prologue, below. */
337 static void
338 push_reg (pv_t *regs, struct pv_area *stack, int regnum)
339 {
340 regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], -4);
341 pv_area_store (stack, regs[E_SP_REGNUM], 4, regs[regnum]);
342 }
343
344 /* Translate an "r" register number extracted from an instruction encoding
345 into a GDB register number. Adapted from a simulator function
346 of the same name; see am33.igen. */
347 static int
348 translate_rreg (int rreg)
349 {
350 /* The higher register numbers actually correspond to the
351 basic machine's address and data registers. */
352 if (rreg > 7 && rreg < 12)
353 return E_A0_REGNUM + rreg - 8;
354 else if (rreg > 11 && rreg < 16)
355 return E_D0_REGNUM + rreg - 12;
356 else
357 return E_E0_REGNUM + rreg;
358 }
359
360 /* Find saved registers in a 'struct pv_area'; we pass this to pv_area_scan.
361
362 If VALUE is a saved register, ADDR says it was saved at a constant
363 offset from the frame base, and SIZE indicates that the whole
364 register was saved, record its offset in RESULT_UNTYPED. */
365 static void
366 check_for_saved (void *result_untyped, pv_t addr, CORE_ADDR size, pv_t value)
367 {
368 struct mn10300_prologue *result = (struct mn10300_prologue *) result_untyped;
369
370 if (value.kind == pvk_register
371 && value.k == 0
372 && pv_is_register (addr, E_SP_REGNUM)
373 && size == register_size (result->gdbarch, value.reg))
374 result->reg_offset[value.reg] = addr.k;
375 }
376
377 /* Analyze the prologue to determine where registers are saved,
378 the end of the prologue, etc. The result of this analysis is
379 returned in RESULT. See struct mn10300_prologue above for more
380 information. */
381 static void
382 mn10300_analyze_prologue (struct gdbarch *gdbarch,
383 CORE_ADDR start_pc, CORE_ADDR limit_pc,
384 struct mn10300_prologue *result)
385 {
386 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
387 CORE_ADDR pc;
388 int rn;
389 pv_t regs[MN10300_MAX_NUM_REGS];
390 struct pv_area *stack;
391 struct cleanup *back_to;
392 CORE_ADDR after_last_frame_setup_insn = start_pc;
393 int am33_mode = AM33_MODE (gdbarch);
394
395 memset (result, 0, sizeof (*result));
396 result->gdbarch = gdbarch;
397
398 for (rn = 0; rn < MN10300_MAX_NUM_REGS; rn++)
399 {
400 regs[rn] = pv_register (rn, 0);
401 result->reg_offset[rn] = 1;
402 }
403 stack = make_pv_area (E_SP_REGNUM, gdbarch_addr_bit (gdbarch));
404 back_to = make_cleanup_free_pv_area (stack);
405
406 /* The typical call instruction will have saved the return address on the
407 stack. Space for the return address has already been preallocated in
408 the caller's frame. It's possible, such as when using -mrelax with gcc
409 that other registers were saved as well. If this happens, we really
410 have no chance of deciphering the frame. DWARF info can save the day
411 when this happens. */
412 pv_area_store (stack, regs[E_SP_REGNUM], 4, regs[E_PC_REGNUM]);
413
414 pc = start_pc;
415 while (pc < limit_pc)
416 {
417 int status;
418 gdb_byte instr[2];
419
420 /* Instructions can be as small as one byte; however, we usually
421 need at least two bytes to do the decoding, so fetch that many
422 to begin with. */
423 status = target_read_memory (pc, instr, 2);
424 if (status != 0)
425 break;
426
427 /* movm [regs], sp */
428 if (instr[0] == 0xcf)
429 {
430 gdb_byte save_mask;
431
432 save_mask = instr[1];
433
434 if ((save_mask & movm_exreg0_bit) && am33_mode)
435 {
436 push_reg (regs, stack, E_E2_REGNUM);
437 push_reg (regs, stack, E_E3_REGNUM);
438 }
439 if ((save_mask & movm_exreg1_bit) && am33_mode)
440 {
441 push_reg (regs, stack, E_E4_REGNUM);
442 push_reg (regs, stack, E_E5_REGNUM);
443 push_reg (regs, stack, E_E6_REGNUM);
444 push_reg (regs, stack, E_E7_REGNUM);
445 }
446 if ((save_mask & movm_exother_bit) && am33_mode)
447 {
448 push_reg (regs, stack, E_E0_REGNUM);
449 push_reg (regs, stack, E_E1_REGNUM);
450 push_reg (regs, stack, E_MDRQ_REGNUM);
451 push_reg (regs, stack, E_MCRH_REGNUM);
452 push_reg (regs, stack, E_MCRL_REGNUM);
453 push_reg (regs, stack, E_MCVF_REGNUM);
454 }
455 if (save_mask & movm_d2_bit)
456 push_reg (regs, stack, E_D2_REGNUM);
457 if (save_mask & movm_d3_bit)
458 push_reg (regs, stack, E_D3_REGNUM);
459 if (save_mask & movm_a2_bit)
460 push_reg (regs, stack, E_A2_REGNUM);
461 if (save_mask & movm_a3_bit)
462 push_reg (regs, stack, E_A3_REGNUM);
463 if (save_mask & movm_other_bit)
464 {
465 push_reg (regs, stack, E_D0_REGNUM);
466 push_reg (regs, stack, E_D1_REGNUM);
467 push_reg (regs, stack, E_A0_REGNUM);
468 push_reg (regs, stack, E_A1_REGNUM);
469 push_reg (regs, stack, E_MDR_REGNUM);
470 push_reg (regs, stack, E_LIR_REGNUM);
471 push_reg (regs, stack, E_LAR_REGNUM);
472 /* The `other' bit leaves a blank area of four bytes at
473 the beginning of its block of saved registers, making
474 it 32 bytes long in total. */
475 regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], -4);
476 }
477
478 pc += 2;
479 after_last_frame_setup_insn = pc;
480 }
481 /* mov sp, aN */
482 else if ((instr[0] & 0xfc) == 0x3c)
483 {
484 int aN = instr[0] & 0x03;
485
486 regs[E_A0_REGNUM + aN] = regs[E_SP_REGNUM];
487
488 pc += 1;
489 if (aN == 3)
490 after_last_frame_setup_insn = pc;
491 }
492 /* mov aM, aN */
493 else if ((instr[0] & 0xf0) == 0x90
494 && (instr[0] & 0x03) != ((instr[0] & 0x0c) >> 2))
495 {
496 int aN = instr[0] & 0x03;
497 int aM = (instr[0] & 0x0c) >> 2;
498
499 regs[E_A0_REGNUM + aN] = regs[E_A0_REGNUM + aM];
500
501 pc += 1;
502 }
503 /* mov dM, dN */
504 else if ((instr[0] & 0xf0) == 0x80
505 && (instr[0] & 0x03) != ((instr[0] & 0x0c) >> 2))
506 {
507 int dN = instr[0] & 0x03;
508 int dM = (instr[0] & 0x0c) >> 2;
509
510 regs[E_D0_REGNUM + dN] = regs[E_D0_REGNUM + dM];
511
512 pc += 1;
513 }
514 /* mov aM, dN */
515 else if (instr[0] == 0xf1 && (instr[1] & 0xf0) == 0xd0)
516 {
517 int dN = instr[1] & 0x03;
518 int aM = (instr[1] & 0x0c) >> 2;
519
520 regs[E_D0_REGNUM + dN] = regs[E_A0_REGNUM + aM];
521
522 pc += 2;
523 }
524 /* mov dM, aN */
525 else if (instr[0] == 0xf1 && (instr[1] & 0xf0) == 0xe0)
526 {
527 int aN = instr[1] & 0x03;
528 int dM = (instr[1] & 0x0c) >> 2;
529
530 regs[E_A0_REGNUM + aN] = regs[E_D0_REGNUM + dM];
531
532 pc += 2;
533 }
534 /* add imm8, SP */
535 else if (instr[0] == 0xf8 && instr[1] == 0xfe)
536 {
537 gdb_byte buf[1];
538 LONGEST imm8;
539
540
541 status = target_read_memory (pc + 2, buf, 1);
542 if (status != 0)
543 break;
544
545 imm8 = extract_signed_integer (buf, 1, byte_order);
546 regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], imm8);
547
548 pc += 3;
549 /* Stack pointer adjustments are frame related. */
550 after_last_frame_setup_insn = pc;
551 }
552 /* add imm16, SP */
553 else if (instr[0] == 0xfa && instr[1] == 0xfe)
554 {
555 gdb_byte buf[2];
556 LONGEST imm16;
557
558 status = target_read_memory (pc + 2, buf, 2);
559 if (status != 0)
560 break;
561
562 imm16 = extract_signed_integer (buf, 2, byte_order);
563 regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], imm16);
564
565 pc += 4;
566 /* Stack pointer adjustments are frame related. */
567 after_last_frame_setup_insn = pc;
568 }
569 /* add imm32, SP */
570 else if (instr[0] == 0xfc && instr[1] == 0xfe)
571 {
572 gdb_byte buf[4];
573 LONGEST imm32;
574
575 status = target_read_memory (pc + 2, buf, 4);
576 if (status != 0)
577 break;
578
579
580 imm32 = extract_signed_integer (buf, 4, byte_order);
581 regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], imm32);
582
583 pc += 6;
584 /* Stack pointer adjustments are frame related. */
585 after_last_frame_setup_insn = pc;
586 }
587 /* add imm8, aN */
588 else if ((instr[0] & 0xfc) == 0x20)
589 {
590 int aN;
591 LONGEST imm8;
592
593 aN = instr[0] & 0x03;
594 imm8 = extract_signed_integer (&instr[1], 1, byte_order);
595
596 regs[E_A0_REGNUM + aN] = pv_add_constant (regs[E_A0_REGNUM + aN],
597 imm8);
598
599 pc += 2;
600 }
601 /* add imm16, aN */
602 else if (instr[0] == 0xfa && (instr[1] & 0xfc) == 0xd0)
603 {
604 int aN;
605 LONGEST imm16;
606 gdb_byte buf[2];
607
608 aN = instr[1] & 0x03;
609
610 status = target_read_memory (pc + 2, buf, 2);
611 if (status != 0)
612 break;
613
614
615 imm16 = extract_signed_integer (buf, 2, byte_order);
616
617 regs[E_A0_REGNUM + aN] = pv_add_constant (regs[E_A0_REGNUM + aN],
618 imm16);
619
620 pc += 4;
621 }
622 /* add imm32, aN */
623 else if (instr[0] == 0xfc && (instr[1] & 0xfc) == 0xd0)
624 {
625 int aN;
626 LONGEST imm32;
627 gdb_byte buf[4];
628
629 aN = instr[1] & 0x03;
630
631 status = target_read_memory (pc + 2, buf, 4);
632 if (status != 0)
633 break;
634
635 imm32 = extract_signed_integer (buf, 2, byte_order);
636
637 regs[E_A0_REGNUM + aN] = pv_add_constant (regs[E_A0_REGNUM + aN],
638 imm32);
639 pc += 6;
640 }
641 /* fmov fsM, (rN) */
642 else if (instr[0] == 0xf9 && (instr[1] & 0xfd) == 0x30)
643 {
644 int fsM, sM, Y, rN;
645 gdb_byte buf[1];
646
647 Y = (instr[1] & 0x02) >> 1;
648
649 status = target_read_memory (pc + 2, buf, 1);
650 if (status != 0)
651 break;
652
653 sM = (buf[0] & 0xf0) >> 4;
654 rN = buf[0] & 0x0f;
655 fsM = (Y << 4) | sM;
656
657 pv_area_store (stack, regs[translate_rreg (rN)], 4,
658 regs[E_FS0_REGNUM + fsM]);
659
660 pc += 3;
661 }
662 /* fmov fsM, (sp) */
663 else if (instr[0] == 0xf9 && (instr[1] & 0xfd) == 0x34)
664 {
665 int fsM, sM, Y;
666 gdb_byte buf[1];
667
668 Y = (instr[1] & 0x02) >> 1;
669
670 status = target_read_memory (pc + 2, buf, 1);
671 if (status != 0)
672 break;
673
674 sM = (buf[0] & 0xf0) >> 4;
675 fsM = (Y << 4) | sM;
676
677 pv_area_store (stack, regs[E_SP_REGNUM], 4,
678 regs[E_FS0_REGNUM + fsM]);
679
680 pc += 3;
681 }
682 /* fmov fsM, (rN, rI) */
683 else if (instr[0] == 0xfb && instr[1] == 0x37)
684 {
685 int fsM, sM, Z, rN, rI;
686 gdb_byte buf[2];
687
688
689 status = target_read_memory (pc + 2, buf, 2);
690 if (status != 0)
691 break;
692
693 rI = (buf[0] & 0xf0) >> 4;
694 rN = buf[0] & 0x0f;
695 sM = (buf[1] & 0xf0) >> 4;
696 Z = (buf[1] & 0x02) >> 1;
697 fsM = (Z << 4) | sM;
698
699 pv_area_store (stack,
700 pv_add (regs[translate_rreg (rN)],
701 regs[translate_rreg (rI)]),
702 4, regs[E_FS0_REGNUM + fsM]);
703
704 pc += 4;
705 }
706 /* fmov fsM, (d8, rN) */
707 else if (instr[0] == 0xfb && (instr[1] & 0xfd) == 0x30)
708 {
709 int fsM, sM, Y, rN;
710 LONGEST d8;
711 gdb_byte buf[2];
712
713 Y = (instr[1] & 0x02) >> 1;
714
715 status = target_read_memory (pc + 2, buf, 2);
716 if (status != 0)
717 break;
718
719 sM = (buf[0] & 0xf0) >> 4;
720 rN = buf[0] & 0x0f;
721 fsM = (Y << 4) | sM;
722 d8 = extract_signed_integer (&buf[1], 1, byte_order);
723
724 pv_area_store (stack,
725 pv_add_constant (regs[translate_rreg (rN)], d8),
726 4, regs[E_FS0_REGNUM + fsM]);
727
728 pc += 4;
729 }
730 /* fmov fsM, (d24, rN) */
731 else if (instr[0] == 0xfd && (instr[1] & 0xfd) == 0x30)
732 {
733 int fsM, sM, Y, rN;
734 LONGEST d24;
735 gdb_byte buf[4];
736
737 Y = (instr[1] & 0x02) >> 1;
738
739 status = target_read_memory (pc + 2, buf, 4);
740 if (status != 0)
741 break;
742
743 sM = (buf[0] & 0xf0) >> 4;
744 rN = buf[0] & 0x0f;
745 fsM = (Y << 4) | sM;
746 d24 = extract_signed_integer (&buf[1], 3, byte_order);
747
748 pv_area_store (stack,
749 pv_add_constant (regs[translate_rreg (rN)], d24),
750 4, regs[E_FS0_REGNUM + fsM]);
751
752 pc += 6;
753 }
754 /* fmov fsM, (d32, rN) */
755 else if (instr[0] == 0xfe && (instr[1] & 0xfd) == 0x30)
756 {
757 int fsM, sM, Y, rN;
758 LONGEST d32;
759 gdb_byte buf[5];
760
761 Y = (instr[1] & 0x02) >> 1;
762
763 status = target_read_memory (pc + 2, buf, 5);
764 if (status != 0)
765 break;
766
767 sM = (buf[0] & 0xf0) >> 4;
768 rN = buf[0] & 0x0f;
769 fsM = (Y << 4) | sM;
770 d32 = extract_signed_integer (&buf[1], 4, byte_order);
771
772 pv_area_store (stack,
773 pv_add_constant (regs[translate_rreg (rN)], d32),
774 4, regs[E_FS0_REGNUM + fsM]);
775
776 pc += 7;
777 }
778 /* fmov fsM, (d8, SP) */
779 else if (instr[0] == 0xfb && (instr[1] & 0xfd) == 0x34)
780 {
781 int fsM, sM, Y;
782 LONGEST d8;
783 gdb_byte buf[2];
784
785 Y = (instr[1] & 0x02) >> 1;
786
787 status = target_read_memory (pc + 2, buf, 2);
788 if (status != 0)
789 break;
790
791 sM = (buf[0] & 0xf0) >> 4;
792 fsM = (Y << 4) | sM;
793 d8 = extract_signed_integer (&buf[1], 1, byte_order);
794
795 pv_area_store (stack,
796 pv_add_constant (regs[E_SP_REGNUM], d8),
797 4, regs[E_FS0_REGNUM + fsM]);
798
799 pc += 4;
800 }
801 /* fmov fsM, (d24, SP) */
802 else if (instr[0] == 0xfd && (instr[1] & 0xfd) == 0x34)
803 {
804 int fsM, sM, Y;
805 LONGEST d24;
806 gdb_byte buf[4];
807
808 Y = (instr[1] & 0x02) >> 1;
809
810 status = target_read_memory (pc + 2, buf, 4);
811 if (status != 0)
812 break;
813
814 sM = (buf[0] & 0xf0) >> 4;
815 fsM = (Y << 4) | sM;
816 d24 = extract_signed_integer (&buf[1], 3, byte_order);
817
818 pv_area_store (stack,
819 pv_add_constant (regs[E_SP_REGNUM], d24),
820 4, regs[E_FS0_REGNUM + fsM]);
821
822 pc += 6;
823 }
824 /* fmov fsM, (d32, SP) */
825 else if (instr[0] == 0xfe && (instr[1] & 0xfd) == 0x34)
826 {
827 int fsM, sM, Y;
828 LONGEST d32;
829 gdb_byte buf[5];
830
831 Y = (instr[1] & 0x02) >> 1;
832
833 status = target_read_memory (pc + 2, buf, 5);
834 if (status != 0)
835 break;
836
837 sM = (buf[0] & 0xf0) >> 4;
838 fsM = (Y << 4) | sM;
839 d32 = extract_signed_integer (&buf[1], 4, byte_order);
840
841 pv_area_store (stack,
842 pv_add_constant (regs[E_SP_REGNUM], d32),
843 4, regs[E_FS0_REGNUM + fsM]);
844
845 pc += 7;
846 }
847 /* fmov fsM, (rN+) */
848 else if (instr[0] == 0xf9 && (instr[1] & 0xfd) == 0x31)
849 {
850 int fsM, sM, Y, rN, rN_regnum;
851 gdb_byte buf[1];
852
853 Y = (instr[1] & 0x02) >> 1;
854
855 status = target_read_memory (pc + 2, buf, 1);
856 if (status != 0)
857 break;
858
859 sM = (buf[0] & 0xf0) >> 4;
860 rN = buf[0] & 0x0f;
861 fsM = (Y << 4) | sM;
862
863 rN_regnum = translate_rreg (rN);
864
865 pv_area_store (stack, regs[rN_regnum], 4,
866 regs[E_FS0_REGNUM + fsM]);
867 regs[rN_regnum] = pv_add_constant (regs[rN_regnum], 4);
868
869 pc += 3;
870 }
871 /* fmov fsM, (rN+, imm8) */
872 else if (instr[0] == 0xfb && (instr[1] & 0xfd) == 0x31)
873 {
874 int fsM, sM, Y, rN, rN_regnum;
875 LONGEST imm8;
876 gdb_byte buf[2];
877
878 Y = (instr[1] & 0x02) >> 1;
879
880 status = target_read_memory (pc + 2, buf, 2);
881 if (status != 0)
882 break;
883
884 sM = (buf[0] & 0xf0) >> 4;
885 rN = buf[0] & 0x0f;
886 fsM = (Y << 4) | sM;
887 imm8 = extract_signed_integer (&buf[1], 1, byte_order);
888
889 rN_regnum = translate_rreg (rN);
890
891 pv_area_store (stack, regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
892 regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm8);
893
894 pc += 4;
895 }
896 /* fmov fsM, (rN+, imm24) */
897 else if (instr[0] == 0xfd && (instr[1] & 0xfd) == 0x31)
898 {
899 int fsM, sM, Y, rN, rN_regnum;
900 LONGEST imm24;
901 gdb_byte buf[4];
902
903 Y = (instr[1] & 0x02) >> 1;
904
905 status = target_read_memory (pc + 2, buf, 4);
906 if (status != 0)
907 break;
908
909 sM = (buf[0] & 0xf0) >> 4;
910 rN = buf[0] & 0x0f;
911 fsM = (Y << 4) | sM;
912 imm24 = extract_signed_integer (&buf[1], 3, byte_order);
913
914 rN_regnum = translate_rreg (rN);
915
916 pv_area_store (stack, regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
917 regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm24);
918
919 pc += 6;
920 }
921 /* fmov fsM, (rN+, imm32) */
922 else if (instr[0] == 0xfe && (instr[1] & 0xfd) == 0x31)
923 {
924 int fsM, sM, Y, rN, rN_regnum;
925 LONGEST imm32;
926 gdb_byte buf[5];
927
928 Y = (instr[1] & 0x02) >> 1;
929
930 status = target_read_memory (pc + 2, buf, 5);
931 if (status != 0)
932 break;
933
934 sM = (buf[0] & 0xf0) >> 4;
935 rN = buf[0] & 0x0f;
936 fsM = (Y << 4) | sM;
937 imm32 = extract_signed_integer (&buf[1], 4, byte_order);
938
939 rN_regnum = translate_rreg (rN);
940
941 pv_area_store (stack, regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
942 regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm32);
943
944 pc += 7;
945 }
946 /* mov imm8, aN */
947 else if ((instr[0] & 0xf0) == 0x90)
948 {
949 int aN = instr[0] & 0x03;
950 LONGEST imm8;
951
952 imm8 = extract_signed_integer (&instr[1], 1, byte_order);
953
954 regs[E_A0_REGNUM + aN] = pv_constant (imm8);
955 pc += 2;
956 }
957 /* mov imm16, aN */
958 else if ((instr[0] & 0xfc) == 0x24)
959 {
960 int aN = instr[0] & 0x03;
961 gdb_byte buf[2];
962 LONGEST imm16;
963
964 status = target_read_memory (pc + 1, buf, 2);
965 if (status != 0)
966 break;
967
968 imm16 = extract_signed_integer (buf, 2, byte_order);
969 regs[E_A0_REGNUM + aN] = pv_constant (imm16);
970 pc += 3;
971 }
972 /* mov imm32, aN */
973 else if (instr[0] == 0xfc && ((instr[1] & 0xfc) == 0xdc))
974 {
975 int aN = instr[1] & 0x03;
976 gdb_byte buf[4];
977 LONGEST imm32;
978
979 status = target_read_memory (pc + 2, buf, 4);
980 if (status != 0)
981 break;
982
983 imm32 = extract_signed_integer (buf, 4, byte_order);
984 regs[E_A0_REGNUM + aN] = pv_constant (imm32);
985 pc += 6;
986 }
987 /* mov imm8, dN */
988 else if ((instr[0] & 0xf0) == 0x80)
989 {
990 int dN = instr[0] & 0x03;
991 LONGEST imm8;
992
993 imm8 = extract_signed_integer (&instr[1], 1, byte_order);
994
995 regs[E_D0_REGNUM + dN] = pv_constant (imm8);
996 pc += 2;
997 }
998 /* mov imm16, dN */
999 else if ((instr[0] & 0xfc) == 0x2c)
1000 {
1001 int dN = instr[0] & 0x03;
1002 gdb_byte buf[2];
1003 LONGEST imm16;
1004
1005 status = target_read_memory (pc + 1, buf, 2);
1006 if (status != 0)
1007 break;
1008
1009 imm16 = extract_signed_integer (buf, 2, byte_order);
1010 regs[E_D0_REGNUM + dN] = pv_constant (imm16);
1011 pc += 3;
1012 }
1013 /* mov imm32, dN */
1014 else if (instr[0] == 0xfc && ((instr[1] & 0xfc) == 0xcc))
1015 {
1016 int dN = instr[1] & 0x03;
1017 gdb_byte buf[4];
1018 LONGEST imm32;
1019
1020 status = target_read_memory (pc + 2, buf, 4);
1021 if (status != 0)
1022 break;
1023
1024 imm32 = extract_signed_integer (buf, 4, byte_order);
1025 regs[E_D0_REGNUM + dN] = pv_constant (imm32);
1026 pc += 6;
1027 }
1028 else
1029 {
1030 /* We've hit some instruction that we don't recognize. Hopefully,
1031 we have enough to do prologue analysis. */
1032 break;
1033 }
1034 }
1035
1036 /* Is the frame size (offset, really) a known constant? */
1037 if (pv_is_register (regs[E_SP_REGNUM], E_SP_REGNUM))
1038 result->frame_size = regs[E_SP_REGNUM].k;
1039
1040 /* Was the frame pointer initialized? */
1041 if (pv_is_register (regs[E_A3_REGNUM], E_SP_REGNUM))
1042 {
1043 result->has_frame_ptr = 1;
1044 result->frame_ptr_offset = regs[E_A3_REGNUM].k;
1045 }
1046
1047 /* Record where all the registers were saved. */
1048 pv_area_scan (stack, check_for_saved, (void *) result);
1049
1050 result->prologue_end = after_last_frame_setup_insn;
1051
1052 do_cleanups (back_to);
1053 }
1054
1055 /* Function: skip_prologue
1056 Return the address of the first inst past the prologue of the function. */
1057
1058 static CORE_ADDR
1059 mn10300_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
1060 {
1061 const char *name;
1062 CORE_ADDR func_addr, func_end;
1063 struct mn10300_prologue p;
1064
1065 /* Try to find the extent of the function that contains PC. */
1066 if (!find_pc_partial_function (pc, &name, &func_addr, &func_end))
1067 return pc;
1068
1069 mn10300_analyze_prologue (gdbarch, pc, func_end, &p);
1070 return p.prologue_end;
1071 }
1072
1073 /* Wrapper for mn10300_analyze_prologue: find the function start;
1074 use the current frame PC as the limit, then
1075 invoke mn10300_analyze_prologue and return its result. */
1076 static struct mn10300_prologue *
1077 mn10300_analyze_frame_prologue (struct frame_info *this_frame,
1078 void **this_prologue_cache)
1079 {
1080 if (!*this_prologue_cache)
1081 {
1082 CORE_ADDR func_start, stop_addr;
1083
1084 *this_prologue_cache = FRAME_OBSTACK_ZALLOC (struct mn10300_prologue);
1085
1086 func_start = get_frame_func (this_frame);
1087 stop_addr = get_frame_pc (this_frame);
1088
1089 /* If we couldn't find any function containing the PC, then
1090 just initialize the prologue cache, but don't do anything. */
1091 if (!func_start)
1092 stop_addr = func_start;
1093
1094 mn10300_analyze_prologue (get_frame_arch (this_frame),
1095 func_start, stop_addr, *this_prologue_cache);
1096 }
1097
1098 return *this_prologue_cache;
1099 }
1100
1101 /* Given the next frame and a prologue cache, return this frame's
1102 base. */
1103 static CORE_ADDR
1104 mn10300_frame_base (struct frame_info *this_frame, void **this_prologue_cache)
1105 {
1106 struct mn10300_prologue *p
1107 = mn10300_analyze_frame_prologue (this_frame, this_prologue_cache);
1108
1109 /* In functions that use alloca, the distance between the stack
1110 pointer and the frame base varies dynamically, so we can't use
1111 the SP plus static information like prologue analysis to find the
1112 frame base. However, such functions must have a frame pointer,
1113 to be able to restore the SP on exit. So whenever we do have a
1114 frame pointer, use that to find the base. */
1115 if (p->has_frame_ptr)
1116 {
1117 CORE_ADDR fp = get_frame_register_unsigned (this_frame, E_A3_REGNUM);
1118 return fp - p->frame_ptr_offset;
1119 }
1120 else
1121 {
1122 CORE_ADDR sp = get_frame_register_unsigned (this_frame, E_SP_REGNUM);
1123 return sp - p->frame_size;
1124 }
1125 }
1126
1127 /* Here is a dummy implementation. */
1128 static struct frame_id
1129 mn10300_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
1130 {
1131 CORE_ADDR sp = get_frame_register_unsigned (this_frame, E_SP_REGNUM);
1132 CORE_ADDR pc = get_frame_register_unsigned (this_frame, E_PC_REGNUM);
1133 return frame_id_build (sp, pc);
1134 }
1135
1136 static void
1137 mn10300_frame_this_id (struct frame_info *this_frame,
1138 void **this_prologue_cache,
1139 struct frame_id *this_id)
1140 {
1141 *this_id = frame_id_build (mn10300_frame_base (this_frame,
1142 this_prologue_cache),
1143 get_frame_func (this_frame));
1144
1145 }
1146
1147 static struct value *
1148 mn10300_frame_prev_register (struct frame_info *this_frame,
1149 void **this_prologue_cache, int regnum)
1150 {
1151 struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (this_frame));
1152 struct mn10300_prologue *p
1153 = mn10300_analyze_frame_prologue (this_frame, this_prologue_cache);
1154 CORE_ADDR frame_base = mn10300_frame_base (this_frame, this_prologue_cache);
1155 int reg_size = register_size (get_frame_arch (this_frame), regnum);
1156
1157 if (regnum == E_SP_REGNUM)
1158 return frame_unwind_got_constant (this_frame, regnum, frame_base);
1159
1160 /* If prologue analysis says we saved this register somewhere,
1161 return a description of the stack slot holding it. */
1162 if (p->reg_offset[regnum] != 1)
1163 return frame_unwind_got_memory (this_frame, regnum,
1164 frame_base + p->reg_offset[regnum]);
1165
1166 /* Otherwise, presume we haven't changed the value of this
1167 register, and get it from the next frame. */
1168 return frame_unwind_got_register (this_frame, regnum, regnum);
1169 }
1170
1171 static const struct frame_unwind mn10300_frame_unwind = {
1172 NORMAL_FRAME,
1173 default_frame_unwind_stop_reason,
1174 mn10300_frame_this_id,
1175 mn10300_frame_prev_register,
1176 NULL,
1177 default_frame_sniffer
1178 };
1179
1180 static CORE_ADDR
1181 mn10300_unwind_pc (struct gdbarch *gdbarch, struct frame_info *this_frame)
1182 {
1183 ULONGEST pc;
1184
1185 pc = frame_unwind_register_unsigned (this_frame, E_PC_REGNUM);
1186 return pc;
1187 }
1188
1189 static CORE_ADDR
1190 mn10300_unwind_sp (struct gdbarch *gdbarch, struct frame_info *this_frame)
1191 {
1192 ULONGEST sp;
1193
1194 sp = frame_unwind_register_unsigned (this_frame, E_SP_REGNUM);
1195 return sp;
1196 }
1197
1198 static void
1199 mn10300_frame_unwind_init (struct gdbarch *gdbarch)
1200 {
1201 dwarf2_append_unwinders (gdbarch);
1202 frame_unwind_append_unwinder (gdbarch, &mn10300_frame_unwind);
1203 set_gdbarch_dummy_id (gdbarch, mn10300_dummy_id);
1204 set_gdbarch_unwind_pc (gdbarch, mn10300_unwind_pc);
1205 set_gdbarch_unwind_sp (gdbarch, mn10300_unwind_sp);
1206 }
1207
1208 /* Function: push_dummy_call
1209 *
1210 * Set up machine state for a target call, including
1211 * function arguments, stack, return address, etc.
1212 *
1213 */
1214
1215 static CORE_ADDR
1216 mn10300_push_dummy_call (struct gdbarch *gdbarch,
1217 struct value *target_func,
1218 struct regcache *regcache,
1219 CORE_ADDR bp_addr,
1220 int nargs, struct value **args,
1221 CORE_ADDR sp,
1222 int struct_return,
1223 CORE_ADDR struct_addr)
1224 {
1225 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1226 const int push_size = register_size (gdbarch, E_PC_REGNUM);
1227 int regs_used;
1228 int len, arg_len;
1229 int stack_offset = 0;
1230 int argnum;
1231 const gdb_byte *val;
1232 gdb_byte valbuf[MAX_REGISTER_SIZE];
1233
1234 /* This should be a nop, but align the stack just in case something
1235 went wrong. Stacks are four byte aligned on the mn10300. */
1236 sp &= ~3;
1237
1238 /* Now make space on the stack for the args.
1239
1240 XXX This doesn't appear to handle pass-by-invisible reference
1241 arguments. */
1242 regs_used = struct_return ? 1 : 0;
1243 for (len = 0, argnum = 0; argnum < nargs; argnum++)
1244 {
1245 arg_len = (TYPE_LENGTH (value_type (args[argnum])) + 3) & ~3;
1246 while (regs_used < 2 && arg_len > 0)
1247 {
1248 regs_used++;
1249 arg_len -= push_size;
1250 }
1251 len += arg_len;
1252 }
1253
1254 /* Allocate stack space. */
1255 sp -= len;
1256
1257 if (struct_return)
1258 {
1259 regs_used = 1;
1260 regcache_cooked_write_unsigned (regcache, E_D0_REGNUM, struct_addr);
1261 }
1262 else
1263 regs_used = 0;
1264
1265 /* Push all arguments onto the stack. */
1266 for (argnum = 0; argnum < nargs; argnum++)
1267 {
1268 /* FIXME what about structs? Unions? */
1269 if (TYPE_CODE (value_type (*args)) == TYPE_CODE_STRUCT
1270 && TYPE_LENGTH (value_type (*args)) > 8)
1271 {
1272 /* Change to pointer-to-type. */
1273 arg_len = push_size;
1274 store_unsigned_integer (valbuf, push_size, byte_order,
1275 value_address (*args));
1276 val = &valbuf[0];
1277 }
1278 else
1279 {
1280 arg_len = TYPE_LENGTH (value_type (*args));
1281 val = value_contents (*args);
1282 }
1283
1284 while (regs_used < 2 && arg_len > 0)
1285 {
1286 regcache_cooked_write_unsigned (regcache, regs_used,
1287 extract_unsigned_integer (val, push_size, byte_order));
1288 val += push_size;
1289 arg_len -= push_size;
1290 regs_used++;
1291 }
1292
1293 while (arg_len > 0)
1294 {
1295 write_memory (sp + stack_offset, val, push_size);
1296 arg_len -= push_size;
1297 val += push_size;
1298 stack_offset += push_size;
1299 }
1300
1301 args++;
1302 }
1303
1304 /* Make space for the flushback area. */
1305 sp -= 8;
1306
1307 /* Push the return address that contains the magic breakpoint. */
1308 sp -= 4;
1309 write_memory_unsigned_integer (sp, push_size, byte_order, bp_addr);
1310
1311 /* The CPU also writes the return address always into the
1312 MDR register on "call". */
1313 regcache_cooked_write_unsigned (regcache, E_MDR_REGNUM, bp_addr);
1314
1315 /* Update $sp. */
1316 regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp);
1317
1318 /* On the mn10300, it's possible to move some of the stack adjustment
1319 and saving of the caller-save registers out of the prologue and
1320 into the call sites. (When using gcc, this optimization can
1321 occur when using the -mrelax switch.) If this occurs, the dwarf2
1322 info will reflect this fact. We can test to see if this is the
1323 case by creating a new frame using the current stack pointer and
1324 the address of the function that we're about to call. We then
1325 unwind SP and see if it's different than the SP of our newly
1326 created frame. If the SP values are the same, the caller is not
1327 expected to allocate any additional stack. On the other hand, if
1328 the SP values are different, the difference determines the
1329 additional stack that must be allocated.
1330
1331 Note that we don't update the return value though because that's
1332 the value of the stack just after pushing the arguments, but prior
1333 to performing the call. This value is needed in order to
1334 construct the frame ID of the dummy call. */
1335 {
1336 CORE_ADDR func_addr = find_function_addr (target_func, NULL);
1337 CORE_ADDR unwound_sp
1338 = mn10300_unwind_sp (gdbarch, create_new_frame (sp, func_addr));
1339 if (sp != unwound_sp)
1340 regcache_cooked_write_unsigned (regcache, E_SP_REGNUM,
1341 sp - (unwound_sp - sp));
1342 }
1343
1344 return sp;
1345 }
1346
1347 /* If DWARF2 is a register number appearing in Dwarf2 debug info, then
1348 mn10300_dwarf2_reg_to_regnum (DWARF2) is the corresponding GDB
1349 register number. Why don't Dwarf2 and GDB use the same numbering?
1350 Who knows? But since people have object files lying around with
1351 the existing Dwarf2 numbering, and other people have written stubs
1352 to work with the existing GDB, neither of them can change. So we
1353 just have to cope. */
1354 static int
1355 mn10300_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int dwarf2)
1356 {
1357 /* This table is supposed to be shaped like the gdbarch_register_name
1358 initializer in gcc/config/mn10300/mn10300.h. Registers which
1359 appear in GCC's numbering, but have no counterpart in GDB's
1360 world, are marked with a -1. */
1361 static int dwarf2_to_gdb[] = {
1362 E_D0_REGNUM, E_D1_REGNUM, E_D2_REGNUM, E_D3_REGNUM,
1363 E_A0_REGNUM, E_A1_REGNUM, E_A2_REGNUM, E_A3_REGNUM,
1364 -1, E_SP_REGNUM,
1365
1366 E_E0_REGNUM, E_E1_REGNUM, E_E2_REGNUM, E_E3_REGNUM,
1367 E_E4_REGNUM, E_E5_REGNUM, E_E6_REGNUM, E_E7_REGNUM,
1368
1369 E_FS0_REGNUM + 0, E_FS0_REGNUM + 1, E_FS0_REGNUM + 2, E_FS0_REGNUM + 3,
1370 E_FS0_REGNUM + 4, E_FS0_REGNUM + 5, E_FS0_REGNUM + 6, E_FS0_REGNUM + 7,
1371
1372 E_FS0_REGNUM + 8, E_FS0_REGNUM + 9, E_FS0_REGNUM + 10, E_FS0_REGNUM + 11,
1373 E_FS0_REGNUM + 12, E_FS0_REGNUM + 13, E_FS0_REGNUM + 14, E_FS0_REGNUM + 15,
1374
1375 E_FS0_REGNUM + 16, E_FS0_REGNUM + 17, E_FS0_REGNUM + 18, E_FS0_REGNUM + 19,
1376 E_FS0_REGNUM + 20, E_FS0_REGNUM + 21, E_FS0_REGNUM + 22, E_FS0_REGNUM + 23,
1377
1378 E_FS0_REGNUM + 24, E_FS0_REGNUM + 25, E_FS0_REGNUM + 26, E_FS0_REGNUM + 27,
1379 E_FS0_REGNUM + 28, E_FS0_REGNUM + 29, E_FS0_REGNUM + 30, E_FS0_REGNUM + 31,
1380
1381 E_MDR_REGNUM, E_PSW_REGNUM, E_PC_REGNUM
1382 };
1383
1384 if (dwarf2 < 0
1385 || dwarf2 >= ARRAY_SIZE (dwarf2_to_gdb))
1386 {
1387 warning (_("Bogus register number in debug info: %d"), dwarf2);
1388 return -1;
1389 }
1390
1391 return dwarf2_to_gdb[dwarf2];
1392 }
1393
1394 static struct gdbarch *
1395 mn10300_gdbarch_init (struct gdbarch_info info,
1396 struct gdbarch_list *arches)
1397 {
1398 struct gdbarch *gdbarch;
1399 struct gdbarch_tdep *tdep;
1400 int num_regs;
1401
1402 arches = gdbarch_list_lookup_by_info (arches, &info);
1403 if (arches != NULL)
1404 return arches->gdbarch;
1405
1406 tdep = xmalloc (sizeof (struct gdbarch_tdep));
1407 gdbarch = gdbarch_alloc (&info, tdep);
1408
1409 switch (info.bfd_arch_info->mach)
1410 {
1411 case 0:
1412 case bfd_mach_mn10300:
1413 set_gdbarch_register_name (gdbarch, mn10300_generic_register_name);
1414 tdep->am33_mode = 0;
1415 num_regs = 32;
1416 break;
1417 case bfd_mach_am33:
1418 set_gdbarch_register_name (gdbarch, am33_register_name);
1419 tdep->am33_mode = 1;
1420 num_regs = 32;
1421 break;
1422 case bfd_mach_am33_2:
1423 set_gdbarch_register_name (gdbarch, am33_2_register_name);
1424 tdep->am33_mode = 2;
1425 num_regs = 64;
1426 set_gdbarch_fp0_regnum (gdbarch, 32);
1427 break;
1428 default:
1429 internal_error (__FILE__, __LINE__,
1430 _("mn10300_gdbarch_init: Unknown mn10300 variant"));
1431 break;
1432 }
1433
1434 /* By default, chars are unsigned. */
1435 set_gdbarch_char_signed (gdbarch, 0);
1436
1437 /* Registers. */
1438 set_gdbarch_num_regs (gdbarch, num_regs);
1439 set_gdbarch_register_type (gdbarch, mn10300_register_type);
1440 set_gdbarch_skip_prologue (gdbarch, mn10300_skip_prologue);
1441 set_gdbarch_read_pc (gdbarch, mn10300_read_pc);
1442 set_gdbarch_write_pc (gdbarch, mn10300_write_pc);
1443 set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM);
1444 set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM);
1445 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, mn10300_dwarf2_reg_to_regnum);
1446
1447 /* Stack unwinding. */
1448 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1449 /* Breakpoints. */
1450 set_gdbarch_breakpoint_from_pc (gdbarch, mn10300_breakpoint_from_pc);
1451 /* decr_pc_after_break? */
1452 /* Disassembly. */
1453 set_gdbarch_print_insn (gdbarch, print_insn_mn10300);
1454
1455 /* Stage 2 */
1456 set_gdbarch_return_value (gdbarch, mn10300_return_value);
1457
1458 /* Stage 3 -- get target calls working. */
1459 set_gdbarch_push_dummy_call (gdbarch, mn10300_push_dummy_call);
1460 /* set_gdbarch_return_value (store, extract) */
1461
1462
1463 mn10300_frame_unwind_init (gdbarch);
1464
1465 /* Hook in ABI-specific overrides, if they have been registered. */
1466 gdbarch_init_osabi (info, gdbarch);
1467
1468 return gdbarch;
1469 }
1470
1471 /* Dump out the mn10300 specific architecture information. */
1472
1473 static void
1474 mn10300_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file)
1475 {
1476 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1477 fprintf_unfiltered (file, "mn10300_dump_tdep: am33_mode = %d\n",
1478 tdep->am33_mode);
1479 }
1480
1481 /* Provide a prototype to silence -Wmissing-prototypes. */
1482 extern initialize_file_ftype _initialize_mn10300_tdep;
1483
1484 void
1485 _initialize_mn10300_tdep (void)
1486 {
1487 gdbarch_register (bfd_arch_mn10300, mn10300_gdbarch_init, mn10300_dump_tdep);
1488 }
1489
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