1 /* Target-dependent code for the Matsushita MN10300 for GDB, the GNU debugger.
3 Copyright (C) 1996-2014 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21 #include "arch-utils.h"
26 #include "gdbcore.h" /* For write_memory_unsigned_integer. */
29 #include "frame-unwind.h"
30 #include "frame-base.h"
32 #include "dwarf2-frame.h"
35 #include "prologue-value.h"
38 #include "mn10300-tdep.h"
41 /* The am33-2 has 64 registers. */
42 #define MN10300_MAX_NUM_REGS 64
44 /* This structure holds the results of a prologue analysis. */
45 struct mn10300_prologue
47 /* The architecture for which we generated this prologue info. */
48 struct gdbarch
*gdbarch
;
50 /* The offset from the frame base to the stack pointer --- always
53 Calling this a "size" is a bit misleading, but given that the
54 stack grows downwards, using offsets for everything keeps one
55 from going completely sign-crazy: you never change anything's
56 sign for an ADD instruction; always change the second operand's
57 sign for a SUB instruction; and everything takes care of
61 /* Non-zero if this function has initialized the frame pointer from
62 the stack pointer, zero otherwise. */
65 /* If has_frame_ptr is non-zero, this is the offset from the frame
66 base to where the frame pointer points. This is always zero or
70 /* The address of the first instruction at which the frame has been
71 set up and the arguments are where the debug info says they are
72 --- as best as we can tell. */
73 CORE_ADDR prologue_end
;
75 /* reg_offset[R] is the offset from the CFA at which register R is
76 saved, or 1 if register R has not been saved. (Real values are
77 always zero or negative.) */
78 int reg_offset
[MN10300_MAX_NUM_REGS
];
82 /* Compute the alignment required by a type. */
85 mn10300_type_align (struct type
*type
)
89 switch (TYPE_CODE (type
))
100 return TYPE_LENGTH (type
);
102 case TYPE_CODE_COMPLEX
:
103 return TYPE_LENGTH (type
) / 2;
105 case TYPE_CODE_STRUCT
:
106 case TYPE_CODE_UNION
:
107 for (i
= 0; i
< TYPE_NFIELDS (type
); i
++)
109 int falign
= mn10300_type_align (TYPE_FIELD_TYPE (type
, i
));
110 while (align
< falign
)
115 case TYPE_CODE_ARRAY
:
116 /* HACK! Structures containing arrays, even small ones, are not
117 elligible for returning in registers. */
120 case TYPE_CODE_TYPEDEF
:
121 return mn10300_type_align (check_typedef (type
));
124 internal_error (__FILE__
, __LINE__
, _("bad switch"));
128 /* Should call_function allocate stack space for a struct return? */
130 mn10300_use_struct_convention (struct type
*type
)
132 /* Structures bigger than a pair of words can't be returned in
134 if (TYPE_LENGTH (type
) > 8)
137 switch (TYPE_CODE (type
))
139 case TYPE_CODE_STRUCT
:
140 case TYPE_CODE_UNION
:
141 /* Structures with a single field are handled as the field
143 if (TYPE_NFIELDS (type
) == 1)
144 return mn10300_use_struct_convention (TYPE_FIELD_TYPE (type
, 0));
146 /* Structures with word or double-word size are passed in memory, as
147 long as they require at least word alignment. */
148 if (mn10300_type_align (type
) >= 4)
153 /* Arrays are addressable, so they're never returned in
154 registers. This condition can only hold when the array is
155 the only field of a struct or union. */
156 case TYPE_CODE_ARRAY
:
159 case TYPE_CODE_TYPEDEF
:
160 return mn10300_use_struct_convention (check_typedef (type
));
168 mn10300_store_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
169 struct regcache
*regcache
, const gdb_byte
*valbuf
)
171 int len
= TYPE_LENGTH (type
);
174 if (TYPE_CODE (type
) == TYPE_CODE_PTR
)
179 regsz
= register_size (gdbarch
, reg
);
182 regcache_raw_write_part (regcache
, reg
, 0, len
, valbuf
);
183 else if (len
<= 2 * regsz
)
185 regcache_raw_write (regcache
, reg
, valbuf
);
186 gdb_assert (regsz
== register_size (gdbarch
, reg
+ 1));
187 regcache_raw_write_part (regcache
, reg
+1, 0,
188 len
- regsz
, valbuf
+ regsz
);
191 internal_error (__FILE__
, __LINE__
,
192 _("Cannot store return value %d bytes long."), len
);
196 mn10300_extract_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
197 struct regcache
*regcache
, void *valbuf
)
199 gdb_byte buf
[MAX_REGISTER_SIZE
];
200 int len
= TYPE_LENGTH (type
);
203 if (TYPE_CODE (type
) == TYPE_CODE_PTR
)
208 regsz
= register_size (gdbarch
, reg
);
211 regcache_raw_read (regcache
, reg
, buf
);
212 memcpy (valbuf
, buf
, len
);
214 else if (len
<= 2 * regsz
)
216 regcache_raw_read (regcache
, reg
, buf
);
217 memcpy (valbuf
, buf
, regsz
);
218 gdb_assert (regsz
== register_size (gdbarch
, reg
+ 1));
219 regcache_raw_read (regcache
, reg
+ 1, buf
);
220 memcpy ((char *) valbuf
+ regsz
, buf
, len
- regsz
);
223 internal_error (__FILE__
, __LINE__
,
224 _("Cannot extract return value %d bytes long."), len
);
227 /* Determine, for architecture GDBARCH, how a return value of TYPE
228 should be returned. If it is supposed to be returned in registers,
229 and READBUF is non-zero, read the appropriate value from REGCACHE,
230 and copy it into READBUF. If WRITEBUF is non-zero, write the value
231 from WRITEBUF into REGCACHE. */
233 static enum return_value_convention
234 mn10300_return_value (struct gdbarch
*gdbarch
, struct value
*function
,
235 struct type
*type
, struct regcache
*regcache
,
236 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
238 if (mn10300_use_struct_convention (type
))
239 return RETURN_VALUE_STRUCT_CONVENTION
;
242 mn10300_extract_return_value (gdbarch
, type
, regcache
, readbuf
);
244 mn10300_store_return_value (gdbarch
, type
, regcache
, writebuf
);
246 return RETURN_VALUE_REGISTER_CONVENTION
;
250 register_name (int reg
, char **regs
, long sizeof_regs
)
252 if (reg
< 0 || reg
>= sizeof_regs
/ sizeof (regs
[0]))
259 mn10300_generic_register_name (struct gdbarch
*gdbarch
, int reg
)
261 static char *regs
[] =
262 { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
263 "sp", "pc", "mdr", "psw", "lir", "lar", "", "",
264 "", "", "", "", "", "", "", "",
265 "", "", "", "", "", "", "", "fp"
267 return register_name (reg
, regs
, sizeof regs
);
272 am33_register_name (struct gdbarch
*gdbarch
, int reg
)
274 static char *regs
[] =
275 { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
276 "sp", "pc", "mdr", "psw", "lir", "lar", "",
277 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
278 "ssp", "msp", "usp", "mcrh", "mcrl", "mcvf", "", "", ""
280 return register_name (reg
, regs
, sizeof regs
);
284 am33_2_register_name (struct gdbarch
*gdbarch
, int reg
)
286 static char *regs
[] =
288 "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
289 "sp", "pc", "mdr", "psw", "lir", "lar", "mdrq", "r0",
290 "r1", "r2", "r3", "r4", "r5", "r6", "r7", "ssp",
291 "msp", "usp", "mcrh", "mcrl", "mcvf", "fpcr", "", "",
292 "fs0", "fs1", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7",
293 "fs8", "fs9", "fs10", "fs11", "fs12", "fs13", "fs14", "fs15",
294 "fs16", "fs17", "fs18", "fs19", "fs20", "fs21", "fs22", "fs23",
295 "fs24", "fs25", "fs26", "fs27", "fs28", "fs29", "fs30", "fs31"
297 return register_name (reg
, regs
, sizeof regs
);
301 mn10300_register_type (struct gdbarch
*gdbarch
, int reg
)
303 return builtin_type (gdbarch
)->builtin_int
;
307 mn10300_read_pc (struct regcache
*regcache
)
310 regcache_cooked_read_unsigned (regcache
, E_PC_REGNUM
, &val
);
315 mn10300_write_pc (struct regcache
*regcache
, CORE_ADDR val
)
317 regcache_cooked_write_unsigned (regcache
, E_PC_REGNUM
, val
);
320 /* The breakpoint instruction must be the same size as the smallest
321 instruction in the instruction set.
323 The Matsushita mn10x00 processors have single byte instructions
324 so we need a single byte breakpoint. Matsushita hasn't defined
325 one, so we defined it ourselves. */
327 static const unsigned char *
328 mn10300_breakpoint_from_pc (struct gdbarch
*gdbarch
, CORE_ADDR
*bp_addr
,
331 static gdb_byte breakpoint
[] = {0xff};
336 /* Model the semantics of pushing a register onto the stack. This
337 is a helper function for mn10300_analyze_prologue, below. */
339 push_reg (pv_t
*regs
, struct pv_area
*stack
, int regnum
)
341 regs
[E_SP_REGNUM
] = pv_add_constant (regs
[E_SP_REGNUM
], -4);
342 pv_area_store (stack
, regs
[E_SP_REGNUM
], 4, regs
[regnum
]);
345 /* Translate an "r" register number extracted from an instruction encoding
346 into a GDB register number. Adapted from a simulator function
347 of the same name; see am33.igen. */
349 translate_rreg (int rreg
)
351 /* The higher register numbers actually correspond to the
352 basic machine's address and data registers. */
353 if (rreg
> 7 && rreg
< 12)
354 return E_A0_REGNUM
+ rreg
- 8;
355 else if (rreg
> 11 && rreg
< 16)
356 return E_D0_REGNUM
+ rreg
- 12;
358 return E_E0_REGNUM
+ rreg
;
361 /* Find saved registers in a 'struct pv_area'; we pass this to pv_area_scan.
363 If VALUE is a saved register, ADDR says it was saved at a constant
364 offset from the frame base, and SIZE indicates that the whole
365 register was saved, record its offset in RESULT_UNTYPED. */
367 check_for_saved (void *result_untyped
, pv_t addr
, CORE_ADDR size
, pv_t value
)
369 struct mn10300_prologue
*result
= (struct mn10300_prologue
*) result_untyped
;
371 if (value
.kind
== pvk_register
373 && pv_is_register (addr
, E_SP_REGNUM
)
374 && size
== register_size (result
->gdbarch
, value
.reg
))
375 result
->reg_offset
[value
.reg
] = addr
.k
;
378 /* Analyze the prologue to determine where registers are saved,
379 the end of the prologue, etc. The result of this analysis is
380 returned in RESULT. See struct mn10300_prologue above for more
383 mn10300_analyze_prologue (struct gdbarch
*gdbarch
,
384 CORE_ADDR start_pc
, CORE_ADDR limit_pc
,
385 struct mn10300_prologue
*result
)
387 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
390 pv_t regs
[MN10300_MAX_NUM_REGS
];
391 struct pv_area
*stack
;
392 struct cleanup
*back_to
;
393 CORE_ADDR after_last_frame_setup_insn
= start_pc
;
394 int am33_mode
= AM33_MODE (gdbarch
);
396 memset (result
, 0, sizeof (*result
));
397 result
->gdbarch
= gdbarch
;
399 for (rn
= 0; rn
< MN10300_MAX_NUM_REGS
; rn
++)
401 regs
[rn
] = pv_register (rn
, 0);
402 result
->reg_offset
[rn
] = 1;
404 stack
= make_pv_area (E_SP_REGNUM
, gdbarch_addr_bit (gdbarch
));
405 back_to
= make_cleanup_free_pv_area (stack
);
407 /* The typical call instruction will have saved the return address on the
408 stack. Space for the return address has already been preallocated in
409 the caller's frame. It's possible, such as when using -mrelax with gcc
410 that other registers were saved as well. If this happens, we really
411 have no chance of deciphering the frame. DWARF info can save the day
412 when this happens. */
413 pv_area_store (stack
, regs
[E_SP_REGNUM
], 4, regs
[E_PC_REGNUM
]);
416 while (pc
< limit_pc
)
421 /* Instructions can be as small as one byte; however, we usually
422 need at least two bytes to do the decoding, so fetch that many
424 status
= target_read_memory (pc
, instr
, 2);
428 /* movm [regs], sp */
429 if (instr
[0] == 0xcf)
433 save_mask
= instr
[1];
435 if ((save_mask
& movm_exreg0_bit
) && am33_mode
)
437 push_reg (regs
, stack
, E_E2_REGNUM
);
438 push_reg (regs
, stack
, E_E3_REGNUM
);
440 if ((save_mask
& movm_exreg1_bit
) && am33_mode
)
442 push_reg (regs
, stack
, E_E4_REGNUM
);
443 push_reg (regs
, stack
, E_E5_REGNUM
);
444 push_reg (regs
, stack
, E_E6_REGNUM
);
445 push_reg (regs
, stack
, E_E7_REGNUM
);
447 if ((save_mask
& movm_exother_bit
) && am33_mode
)
449 push_reg (regs
, stack
, E_E0_REGNUM
);
450 push_reg (regs
, stack
, E_E1_REGNUM
);
451 push_reg (regs
, stack
, E_MDRQ_REGNUM
);
452 push_reg (regs
, stack
, E_MCRH_REGNUM
);
453 push_reg (regs
, stack
, E_MCRL_REGNUM
);
454 push_reg (regs
, stack
, E_MCVF_REGNUM
);
456 if (save_mask
& movm_d2_bit
)
457 push_reg (regs
, stack
, E_D2_REGNUM
);
458 if (save_mask
& movm_d3_bit
)
459 push_reg (regs
, stack
, E_D3_REGNUM
);
460 if (save_mask
& movm_a2_bit
)
461 push_reg (regs
, stack
, E_A2_REGNUM
);
462 if (save_mask
& movm_a3_bit
)
463 push_reg (regs
, stack
, E_A3_REGNUM
);
464 if (save_mask
& movm_other_bit
)
466 push_reg (regs
, stack
, E_D0_REGNUM
);
467 push_reg (regs
, stack
, E_D1_REGNUM
);
468 push_reg (regs
, stack
, E_A0_REGNUM
);
469 push_reg (regs
, stack
, E_A1_REGNUM
);
470 push_reg (regs
, stack
, E_MDR_REGNUM
);
471 push_reg (regs
, stack
, E_LIR_REGNUM
);
472 push_reg (regs
, stack
, E_LAR_REGNUM
);
473 /* The `other' bit leaves a blank area of four bytes at
474 the beginning of its block of saved registers, making
475 it 32 bytes long in total. */
476 regs
[E_SP_REGNUM
] = pv_add_constant (regs
[E_SP_REGNUM
], -4);
480 after_last_frame_setup_insn
= pc
;
483 else if ((instr
[0] & 0xfc) == 0x3c)
485 int aN
= instr
[0] & 0x03;
487 regs
[E_A0_REGNUM
+ aN
] = regs
[E_SP_REGNUM
];
491 after_last_frame_setup_insn
= pc
;
494 else if ((instr
[0] & 0xf0) == 0x90
495 && (instr
[0] & 0x03) != ((instr
[0] & 0x0c) >> 2))
497 int aN
= instr
[0] & 0x03;
498 int aM
= (instr
[0] & 0x0c) >> 2;
500 regs
[E_A0_REGNUM
+ aN
] = regs
[E_A0_REGNUM
+ aM
];
505 else if ((instr
[0] & 0xf0) == 0x80
506 && (instr
[0] & 0x03) != ((instr
[0] & 0x0c) >> 2))
508 int dN
= instr
[0] & 0x03;
509 int dM
= (instr
[0] & 0x0c) >> 2;
511 regs
[E_D0_REGNUM
+ dN
] = regs
[E_D0_REGNUM
+ dM
];
516 else if (instr
[0] == 0xf1 && (instr
[1] & 0xf0) == 0xd0)
518 int dN
= instr
[1] & 0x03;
519 int aM
= (instr
[1] & 0x0c) >> 2;
521 regs
[E_D0_REGNUM
+ dN
] = regs
[E_A0_REGNUM
+ aM
];
526 else if (instr
[0] == 0xf1 && (instr
[1] & 0xf0) == 0xe0)
528 int aN
= instr
[1] & 0x03;
529 int dM
= (instr
[1] & 0x0c) >> 2;
531 regs
[E_A0_REGNUM
+ aN
] = regs
[E_D0_REGNUM
+ dM
];
536 else if (instr
[0] == 0xf8 && instr
[1] == 0xfe)
542 status
= target_read_memory (pc
+ 2, buf
, 1);
546 imm8
= extract_signed_integer (buf
, 1, byte_order
);
547 regs
[E_SP_REGNUM
] = pv_add_constant (regs
[E_SP_REGNUM
], imm8
);
550 /* Stack pointer adjustments are frame related. */
551 after_last_frame_setup_insn
= pc
;
554 else if (instr
[0] == 0xfa && instr
[1] == 0xfe)
559 status
= target_read_memory (pc
+ 2, buf
, 2);
563 imm16
= extract_signed_integer (buf
, 2, byte_order
);
564 regs
[E_SP_REGNUM
] = pv_add_constant (regs
[E_SP_REGNUM
], imm16
);
567 /* Stack pointer adjustments are frame related. */
568 after_last_frame_setup_insn
= pc
;
571 else if (instr
[0] == 0xfc && instr
[1] == 0xfe)
576 status
= target_read_memory (pc
+ 2, buf
, 4);
581 imm32
= extract_signed_integer (buf
, 4, byte_order
);
582 regs
[E_SP_REGNUM
] = pv_add_constant (regs
[E_SP_REGNUM
], imm32
);
585 /* Stack pointer adjustments are frame related. */
586 after_last_frame_setup_insn
= pc
;
589 else if ((instr
[0] & 0xfc) == 0x20)
594 aN
= instr
[0] & 0x03;
595 imm8
= extract_signed_integer (&instr
[1], 1, byte_order
);
597 regs
[E_A0_REGNUM
+ aN
] = pv_add_constant (regs
[E_A0_REGNUM
+ aN
],
603 else if (instr
[0] == 0xfa && (instr
[1] & 0xfc) == 0xd0)
609 aN
= instr
[1] & 0x03;
611 status
= target_read_memory (pc
+ 2, buf
, 2);
616 imm16
= extract_signed_integer (buf
, 2, byte_order
);
618 regs
[E_A0_REGNUM
+ aN
] = pv_add_constant (regs
[E_A0_REGNUM
+ aN
],
624 else if (instr
[0] == 0xfc && (instr
[1] & 0xfc) == 0xd0)
630 aN
= instr
[1] & 0x03;
632 status
= target_read_memory (pc
+ 2, buf
, 4);
636 imm32
= extract_signed_integer (buf
, 2, byte_order
);
638 regs
[E_A0_REGNUM
+ aN
] = pv_add_constant (regs
[E_A0_REGNUM
+ aN
],
643 else if (instr
[0] == 0xf9 && (instr
[1] & 0xfd) == 0x30)
648 Y
= (instr
[1] & 0x02) >> 1;
650 status
= target_read_memory (pc
+ 2, buf
, 1);
654 sM
= (buf
[0] & 0xf0) >> 4;
658 pv_area_store (stack
, regs
[translate_rreg (rN
)], 4,
659 regs
[E_FS0_REGNUM
+ fsM
]);
664 else if (instr
[0] == 0xf9 && (instr
[1] & 0xfd) == 0x34)
669 Y
= (instr
[1] & 0x02) >> 1;
671 status
= target_read_memory (pc
+ 2, buf
, 1);
675 sM
= (buf
[0] & 0xf0) >> 4;
678 pv_area_store (stack
, regs
[E_SP_REGNUM
], 4,
679 regs
[E_FS0_REGNUM
+ fsM
]);
683 /* fmov fsM, (rN, rI) */
684 else if (instr
[0] == 0xfb && instr
[1] == 0x37)
686 int fsM
, sM
, Z
, rN
, rI
;
690 status
= target_read_memory (pc
+ 2, buf
, 2);
694 rI
= (buf
[0] & 0xf0) >> 4;
696 sM
= (buf
[1] & 0xf0) >> 4;
697 Z
= (buf
[1] & 0x02) >> 1;
700 pv_area_store (stack
,
701 pv_add (regs
[translate_rreg (rN
)],
702 regs
[translate_rreg (rI
)]),
703 4, regs
[E_FS0_REGNUM
+ fsM
]);
707 /* fmov fsM, (d8, rN) */
708 else if (instr
[0] == 0xfb && (instr
[1] & 0xfd) == 0x30)
714 Y
= (instr
[1] & 0x02) >> 1;
716 status
= target_read_memory (pc
+ 2, buf
, 2);
720 sM
= (buf
[0] & 0xf0) >> 4;
723 d8
= extract_signed_integer (&buf
[1], 1, byte_order
);
725 pv_area_store (stack
,
726 pv_add_constant (regs
[translate_rreg (rN
)], d8
),
727 4, regs
[E_FS0_REGNUM
+ fsM
]);
731 /* fmov fsM, (d24, rN) */
732 else if (instr
[0] == 0xfd && (instr
[1] & 0xfd) == 0x30)
738 Y
= (instr
[1] & 0x02) >> 1;
740 status
= target_read_memory (pc
+ 2, buf
, 4);
744 sM
= (buf
[0] & 0xf0) >> 4;
747 d24
= extract_signed_integer (&buf
[1], 3, byte_order
);
749 pv_area_store (stack
,
750 pv_add_constant (regs
[translate_rreg (rN
)], d24
),
751 4, regs
[E_FS0_REGNUM
+ fsM
]);
755 /* fmov fsM, (d32, rN) */
756 else if (instr
[0] == 0xfe && (instr
[1] & 0xfd) == 0x30)
762 Y
= (instr
[1] & 0x02) >> 1;
764 status
= target_read_memory (pc
+ 2, buf
, 5);
768 sM
= (buf
[0] & 0xf0) >> 4;
771 d32
= extract_signed_integer (&buf
[1], 4, byte_order
);
773 pv_area_store (stack
,
774 pv_add_constant (regs
[translate_rreg (rN
)], d32
),
775 4, regs
[E_FS0_REGNUM
+ fsM
]);
779 /* fmov fsM, (d8, SP) */
780 else if (instr
[0] == 0xfb && (instr
[1] & 0xfd) == 0x34)
786 Y
= (instr
[1] & 0x02) >> 1;
788 status
= target_read_memory (pc
+ 2, buf
, 2);
792 sM
= (buf
[0] & 0xf0) >> 4;
794 d8
= extract_signed_integer (&buf
[1], 1, byte_order
);
796 pv_area_store (stack
,
797 pv_add_constant (regs
[E_SP_REGNUM
], d8
),
798 4, regs
[E_FS0_REGNUM
+ fsM
]);
802 /* fmov fsM, (d24, SP) */
803 else if (instr
[0] == 0xfd && (instr
[1] & 0xfd) == 0x34)
809 Y
= (instr
[1] & 0x02) >> 1;
811 status
= target_read_memory (pc
+ 2, buf
, 4);
815 sM
= (buf
[0] & 0xf0) >> 4;
817 d24
= extract_signed_integer (&buf
[1], 3, byte_order
);
819 pv_area_store (stack
,
820 pv_add_constant (regs
[E_SP_REGNUM
], d24
),
821 4, regs
[E_FS0_REGNUM
+ fsM
]);
825 /* fmov fsM, (d32, SP) */
826 else if (instr
[0] == 0xfe && (instr
[1] & 0xfd) == 0x34)
832 Y
= (instr
[1] & 0x02) >> 1;
834 status
= target_read_memory (pc
+ 2, buf
, 5);
838 sM
= (buf
[0] & 0xf0) >> 4;
840 d32
= extract_signed_integer (&buf
[1], 4, byte_order
);
842 pv_area_store (stack
,
843 pv_add_constant (regs
[E_SP_REGNUM
], d32
),
844 4, regs
[E_FS0_REGNUM
+ fsM
]);
848 /* fmov fsM, (rN+) */
849 else if (instr
[0] == 0xf9 && (instr
[1] & 0xfd) == 0x31)
851 int fsM
, sM
, Y
, rN
, rN_regnum
;
854 Y
= (instr
[1] & 0x02) >> 1;
856 status
= target_read_memory (pc
+ 2, buf
, 1);
860 sM
= (buf
[0] & 0xf0) >> 4;
864 rN_regnum
= translate_rreg (rN
);
866 pv_area_store (stack
, regs
[rN_regnum
], 4,
867 regs
[E_FS0_REGNUM
+ fsM
]);
868 regs
[rN_regnum
] = pv_add_constant (regs
[rN_regnum
], 4);
872 /* fmov fsM, (rN+, imm8) */
873 else if (instr
[0] == 0xfb && (instr
[1] & 0xfd) == 0x31)
875 int fsM
, sM
, Y
, rN
, rN_regnum
;
879 Y
= (instr
[1] & 0x02) >> 1;
881 status
= target_read_memory (pc
+ 2, buf
, 2);
885 sM
= (buf
[0] & 0xf0) >> 4;
888 imm8
= extract_signed_integer (&buf
[1], 1, byte_order
);
890 rN_regnum
= translate_rreg (rN
);
892 pv_area_store (stack
, regs
[rN_regnum
], 4, regs
[E_FS0_REGNUM
+ fsM
]);
893 regs
[rN_regnum
] = pv_add_constant (regs
[rN_regnum
], imm8
);
897 /* fmov fsM, (rN+, imm24) */
898 else if (instr
[0] == 0xfd && (instr
[1] & 0xfd) == 0x31)
900 int fsM
, sM
, Y
, rN
, rN_regnum
;
904 Y
= (instr
[1] & 0x02) >> 1;
906 status
= target_read_memory (pc
+ 2, buf
, 4);
910 sM
= (buf
[0] & 0xf0) >> 4;
913 imm24
= extract_signed_integer (&buf
[1], 3, byte_order
);
915 rN_regnum
= translate_rreg (rN
);
917 pv_area_store (stack
, regs
[rN_regnum
], 4, regs
[E_FS0_REGNUM
+ fsM
]);
918 regs
[rN_regnum
] = pv_add_constant (regs
[rN_regnum
], imm24
);
922 /* fmov fsM, (rN+, imm32) */
923 else if (instr
[0] == 0xfe && (instr
[1] & 0xfd) == 0x31)
925 int fsM
, sM
, Y
, rN
, rN_regnum
;
929 Y
= (instr
[1] & 0x02) >> 1;
931 status
= target_read_memory (pc
+ 2, buf
, 5);
935 sM
= (buf
[0] & 0xf0) >> 4;
938 imm32
= extract_signed_integer (&buf
[1], 4, byte_order
);
940 rN_regnum
= translate_rreg (rN
);
942 pv_area_store (stack
, regs
[rN_regnum
], 4, regs
[E_FS0_REGNUM
+ fsM
]);
943 regs
[rN_regnum
] = pv_add_constant (regs
[rN_regnum
], imm32
);
948 else if ((instr
[0] & 0xf0) == 0x90)
950 int aN
= instr
[0] & 0x03;
953 imm8
= extract_signed_integer (&instr
[1], 1, byte_order
);
955 regs
[E_A0_REGNUM
+ aN
] = pv_constant (imm8
);
959 else if ((instr
[0] & 0xfc) == 0x24)
961 int aN
= instr
[0] & 0x03;
965 status
= target_read_memory (pc
+ 1, buf
, 2);
969 imm16
= extract_signed_integer (buf
, 2, byte_order
);
970 regs
[E_A0_REGNUM
+ aN
] = pv_constant (imm16
);
974 else if (instr
[0] == 0xfc && ((instr
[1] & 0xfc) == 0xdc))
976 int aN
= instr
[1] & 0x03;
980 status
= target_read_memory (pc
+ 2, buf
, 4);
984 imm32
= extract_signed_integer (buf
, 4, byte_order
);
985 regs
[E_A0_REGNUM
+ aN
] = pv_constant (imm32
);
989 else if ((instr
[0] & 0xf0) == 0x80)
991 int dN
= instr
[0] & 0x03;
994 imm8
= extract_signed_integer (&instr
[1], 1, byte_order
);
996 regs
[E_D0_REGNUM
+ dN
] = pv_constant (imm8
);
1000 else if ((instr
[0] & 0xfc) == 0x2c)
1002 int dN
= instr
[0] & 0x03;
1006 status
= target_read_memory (pc
+ 1, buf
, 2);
1010 imm16
= extract_signed_integer (buf
, 2, byte_order
);
1011 regs
[E_D0_REGNUM
+ dN
] = pv_constant (imm16
);
1015 else if (instr
[0] == 0xfc && ((instr
[1] & 0xfc) == 0xcc))
1017 int dN
= instr
[1] & 0x03;
1021 status
= target_read_memory (pc
+ 2, buf
, 4);
1025 imm32
= extract_signed_integer (buf
, 4, byte_order
);
1026 regs
[E_D0_REGNUM
+ dN
] = pv_constant (imm32
);
1031 /* We've hit some instruction that we don't recognize. Hopefully,
1032 we have enough to do prologue analysis. */
1037 /* Is the frame size (offset, really) a known constant? */
1038 if (pv_is_register (regs
[E_SP_REGNUM
], E_SP_REGNUM
))
1039 result
->frame_size
= regs
[E_SP_REGNUM
].k
;
1041 /* Was the frame pointer initialized? */
1042 if (pv_is_register (regs
[E_A3_REGNUM
], E_SP_REGNUM
))
1044 result
->has_frame_ptr
= 1;
1045 result
->frame_ptr_offset
= regs
[E_A3_REGNUM
].k
;
1048 /* Record where all the registers were saved. */
1049 pv_area_scan (stack
, check_for_saved
, (void *) result
);
1051 result
->prologue_end
= after_last_frame_setup_insn
;
1053 do_cleanups (back_to
);
1056 /* Function: skip_prologue
1057 Return the address of the first inst past the prologue of the function. */
1060 mn10300_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
1063 CORE_ADDR func_addr
, func_end
;
1064 struct mn10300_prologue p
;
1066 /* Try to find the extent of the function that contains PC. */
1067 if (!find_pc_partial_function (pc
, &name
, &func_addr
, &func_end
))
1070 mn10300_analyze_prologue (gdbarch
, pc
, func_end
, &p
);
1071 return p
.prologue_end
;
1074 /* Wrapper for mn10300_analyze_prologue: find the function start;
1075 use the current frame PC as the limit, then
1076 invoke mn10300_analyze_prologue and return its result. */
1077 static struct mn10300_prologue
*
1078 mn10300_analyze_frame_prologue (struct frame_info
*this_frame
,
1079 void **this_prologue_cache
)
1081 if (!*this_prologue_cache
)
1083 CORE_ADDR func_start
, stop_addr
;
1085 *this_prologue_cache
= FRAME_OBSTACK_ZALLOC (struct mn10300_prologue
);
1087 func_start
= get_frame_func (this_frame
);
1088 stop_addr
= get_frame_pc (this_frame
);
1090 /* If we couldn't find any function containing the PC, then
1091 just initialize the prologue cache, but don't do anything. */
1093 stop_addr
= func_start
;
1095 mn10300_analyze_prologue (get_frame_arch (this_frame
),
1096 func_start
, stop_addr
, *this_prologue_cache
);
1099 return *this_prologue_cache
;
1102 /* Given the next frame and a prologue cache, return this frame's
1105 mn10300_frame_base (struct frame_info
*this_frame
, void **this_prologue_cache
)
1107 struct mn10300_prologue
*p
1108 = mn10300_analyze_frame_prologue (this_frame
, this_prologue_cache
);
1110 /* In functions that use alloca, the distance between the stack
1111 pointer and the frame base varies dynamically, so we can't use
1112 the SP plus static information like prologue analysis to find the
1113 frame base. However, such functions must have a frame pointer,
1114 to be able to restore the SP on exit. So whenever we do have a
1115 frame pointer, use that to find the base. */
1116 if (p
->has_frame_ptr
)
1118 CORE_ADDR fp
= get_frame_register_unsigned (this_frame
, E_A3_REGNUM
);
1119 return fp
- p
->frame_ptr_offset
;
1123 CORE_ADDR sp
= get_frame_register_unsigned (this_frame
, E_SP_REGNUM
);
1124 return sp
- p
->frame_size
;
1128 /* Here is a dummy implementation. */
1129 static struct frame_id
1130 mn10300_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
1132 CORE_ADDR sp
= get_frame_register_unsigned (this_frame
, E_SP_REGNUM
);
1133 CORE_ADDR pc
= get_frame_register_unsigned (this_frame
, E_PC_REGNUM
);
1134 return frame_id_build (sp
, pc
);
1138 mn10300_frame_this_id (struct frame_info
*this_frame
,
1139 void **this_prologue_cache
,
1140 struct frame_id
*this_id
)
1142 *this_id
= frame_id_build (mn10300_frame_base (this_frame
,
1143 this_prologue_cache
),
1144 get_frame_func (this_frame
));
1148 static struct value
*
1149 mn10300_frame_prev_register (struct frame_info
*this_frame
,
1150 void **this_prologue_cache
, int regnum
)
1152 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (this_frame
));
1153 struct mn10300_prologue
*p
1154 = mn10300_analyze_frame_prologue (this_frame
, this_prologue_cache
);
1155 CORE_ADDR frame_base
= mn10300_frame_base (this_frame
, this_prologue_cache
);
1156 int reg_size
= register_size (get_frame_arch (this_frame
), regnum
);
1158 if (regnum
== E_SP_REGNUM
)
1159 return frame_unwind_got_constant (this_frame
, regnum
, frame_base
);
1161 /* If prologue analysis says we saved this register somewhere,
1162 return a description of the stack slot holding it. */
1163 if (p
->reg_offset
[regnum
] != 1)
1164 return frame_unwind_got_memory (this_frame
, regnum
,
1165 frame_base
+ p
->reg_offset
[regnum
]);
1167 /* Otherwise, presume we haven't changed the value of this
1168 register, and get it from the next frame. */
1169 return frame_unwind_got_register (this_frame
, regnum
, regnum
);
1172 static const struct frame_unwind mn10300_frame_unwind
= {
1174 default_frame_unwind_stop_reason
,
1175 mn10300_frame_this_id
,
1176 mn10300_frame_prev_register
,
1178 default_frame_sniffer
1182 mn10300_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
1186 pc
= frame_unwind_register_unsigned (this_frame
, E_PC_REGNUM
);
1191 mn10300_unwind_sp (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
1195 sp
= frame_unwind_register_unsigned (this_frame
, E_SP_REGNUM
);
1200 mn10300_frame_unwind_init (struct gdbarch
*gdbarch
)
1202 dwarf2_append_unwinders (gdbarch
);
1203 frame_unwind_append_unwinder (gdbarch
, &mn10300_frame_unwind
);
1204 set_gdbarch_dummy_id (gdbarch
, mn10300_dummy_id
);
1205 set_gdbarch_unwind_pc (gdbarch
, mn10300_unwind_pc
);
1206 set_gdbarch_unwind_sp (gdbarch
, mn10300_unwind_sp
);
1209 /* Function: push_dummy_call
1211 * Set up machine state for a target call, including
1212 * function arguments, stack, return address, etc.
1217 mn10300_push_dummy_call (struct gdbarch
*gdbarch
,
1218 struct value
*target_func
,
1219 struct regcache
*regcache
,
1221 int nargs
, struct value
**args
,
1224 CORE_ADDR struct_addr
)
1226 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1227 const int push_size
= register_size (gdbarch
, E_PC_REGNUM
);
1230 int stack_offset
= 0;
1232 const gdb_byte
*val
;
1233 gdb_byte valbuf
[MAX_REGISTER_SIZE
];
1235 /* This should be a nop, but align the stack just in case something
1236 went wrong. Stacks are four byte aligned on the mn10300. */
1239 /* Now make space on the stack for the args.
1241 XXX This doesn't appear to handle pass-by-invisible reference
1243 regs_used
= struct_return
? 1 : 0;
1244 for (len
= 0, argnum
= 0; argnum
< nargs
; argnum
++)
1246 arg_len
= (TYPE_LENGTH (value_type (args
[argnum
])) + 3) & ~3;
1247 while (regs_used
< 2 && arg_len
> 0)
1250 arg_len
-= push_size
;
1255 /* Allocate stack space. */
1261 regcache_cooked_write_unsigned (regcache
, E_D0_REGNUM
, struct_addr
);
1266 /* Push all arguments onto the stack. */
1267 for (argnum
= 0; argnum
< nargs
; argnum
++)
1269 /* FIXME what about structs? Unions? */
1270 if (TYPE_CODE (value_type (*args
)) == TYPE_CODE_STRUCT
1271 && TYPE_LENGTH (value_type (*args
)) > 8)
1273 /* Change to pointer-to-type. */
1274 arg_len
= push_size
;
1275 store_unsigned_integer (valbuf
, push_size
, byte_order
,
1276 value_address (*args
));
1281 arg_len
= TYPE_LENGTH (value_type (*args
));
1282 val
= value_contents (*args
);
1285 while (regs_used
< 2 && arg_len
> 0)
1287 regcache_cooked_write_unsigned (regcache
, regs_used
,
1288 extract_unsigned_integer (val
, push_size
, byte_order
));
1290 arg_len
-= push_size
;
1296 write_memory (sp
+ stack_offset
, val
, push_size
);
1297 arg_len
-= push_size
;
1299 stack_offset
+= push_size
;
1305 /* Make space for the flushback area. */
1308 /* Push the return address that contains the magic breakpoint. */
1310 write_memory_unsigned_integer (sp
, push_size
, byte_order
, bp_addr
);
1312 /* The CPU also writes the return address always into the
1313 MDR register on "call". */
1314 regcache_cooked_write_unsigned (regcache
, E_MDR_REGNUM
, bp_addr
);
1317 regcache_cooked_write_unsigned (regcache
, E_SP_REGNUM
, sp
);
1319 /* On the mn10300, it's possible to move some of the stack adjustment
1320 and saving of the caller-save registers out of the prologue and
1321 into the call sites. (When using gcc, this optimization can
1322 occur when using the -mrelax switch.) If this occurs, the dwarf2
1323 info will reflect this fact. We can test to see if this is the
1324 case by creating a new frame using the current stack pointer and
1325 the address of the function that we're about to call. We then
1326 unwind SP and see if it's different than the SP of our newly
1327 created frame. If the SP values are the same, the caller is not
1328 expected to allocate any additional stack. On the other hand, if
1329 the SP values are different, the difference determines the
1330 additional stack that must be allocated.
1332 Note that we don't update the return value though because that's
1333 the value of the stack just after pushing the arguments, but prior
1334 to performing the call. This value is needed in order to
1335 construct the frame ID of the dummy call. */
1337 CORE_ADDR func_addr
= find_function_addr (target_func
, NULL
);
1338 CORE_ADDR unwound_sp
1339 = mn10300_unwind_sp (gdbarch
, create_new_frame (sp
, func_addr
));
1340 if (sp
!= unwound_sp
)
1341 regcache_cooked_write_unsigned (regcache
, E_SP_REGNUM
,
1342 sp
- (unwound_sp
- sp
));
1348 /* If DWARF2 is a register number appearing in Dwarf2 debug info, then
1349 mn10300_dwarf2_reg_to_regnum (DWARF2) is the corresponding GDB
1350 register number. Why don't Dwarf2 and GDB use the same numbering?
1351 Who knows? But since people have object files lying around with
1352 the existing Dwarf2 numbering, and other people have written stubs
1353 to work with the existing GDB, neither of them can change. So we
1354 just have to cope. */
1356 mn10300_dwarf2_reg_to_regnum (struct gdbarch
*gdbarch
, int dwarf2
)
1358 /* This table is supposed to be shaped like the gdbarch_register_name
1359 initializer in gcc/config/mn10300/mn10300.h. Registers which
1360 appear in GCC's numbering, but have no counterpart in GDB's
1361 world, are marked with a -1. */
1362 static int dwarf2_to_gdb
[] = {
1363 E_D0_REGNUM
, E_D1_REGNUM
, E_D2_REGNUM
, E_D3_REGNUM
,
1364 E_A0_REGNUM
, E_A1_REGNUM
, E_A2_REGNUM
, E_A3_REGNUM
,
1367 E_E0_REGNUM
, E_E1_REGNUM
, E_E2_REGNUM
, E_E3_REGNUM
,
1368 E_E4_REGNUM
, E_E5_REGNUM
, E_E6_REGNUM
, E_E7_REGNUM
,
1370 E_FS0_REGNUM
+ 0, E_FS0_REGNUM
+ 1, E_FS0_REGNUM
+ 2, E_FS0_REGNUM
+ 3,
1371 E_FS0_REGNUM
+ 4, E_FS0_REGNUM
+ 5, E_FS0_REGNUM
+ 6, E_FS0_REGNUM
+ 7,
1373 E_FS0_REGNUM
+ 8, E_FS0_REGNUM
+ 9, E_FS0_REGNUM
+ 10, E_FS0_REGNUM
+ 11,
1374 E_FS0_REGNUM
+ 12, E_FS0_REGNUM
+ 13, E_FS0_REGNUM
+ 14, E_FS0_REGNUM
+ 15,
1376 E_FS0_REGNUM
+ 16, E_FS0_REGNUM
+ 17, E_FS0_REGNUM
+ 18, E_FS0_REGNUM
+ 19,
1377 E_FS0_REGNUM
+ 20, E_FS0_REGNUM
+ 21, E_FS0_REGNUM
+ 22, E_FS0_REGNUM
+ 23,
1379 E_FS0_REGNUM
+ 24, E_FS0_REGNUM
+ 25, E_FS0_REGNUM
+ 26, E_FS0_REGNUM
+ 27,
1380 E_FS0_REGNUM
+ 28, E_FS0_REGNUM
+ 29, E_FS0_REGNUM
+ 30, E_FS0_REGNUM
+ 31,
1382 E_MDR_REGNUM
, E_PSW_REGNUM
, E_PC_REGNUM
1386 || dwarf2
>= ARRAY_SIZE (dwarf2_to_gdb
))
1388 warning (_("Bogus register number in debug info: %d"), dwarf2
);
1392 return dwarf2_to_gdb
[dwarf2
];
1395 static struct gdbarch
*
1396 mn10300_gdbarch_init (struct gdbarch_info info
,
1397 struct gdbarch_list
*arches
)
1399 struct gdbarch
*gdbarch
;
1400 struct gdbarch_tdep
*tdep
;
1403 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1405 return arches
->gdbarch
;
1407 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
1408 gdbarch
= gdbarch_alloc (&info
, tdep
);
1410 switch (info
.bfd_arch_info
->mach
)
1413 case bfd_mach_mn10300
:
1414 set_gdbarch_register_name (gdbarch
, mn10300_generic_register_name
);
1415 tdep
->am33_mode
= 0;
1419 set_gdbarch_register_name (gdbarch
, am33_register_name
);
1420 tdep
->am33_mode
= 1;
1423 case bfd_mach_am33_2
:
1424 set_gdbarch_register_name (gdbarch
, am33_2_register_name
);
1425 tdep
->am33_mode
= 2;
1427 set_gdbarch_fp0_regnum (gdbarch
, 32);
1430 internal_error (__FILE__
, __LINE__
,
1431 _("mn10300_gdbarch_init: Unknown mn10300 variant"));
1435 /* By default, chars are unsigned. */
1436 set_gdbarch_char_signed (gdbarch
, 0);
1439 set_gdbarch_num_regs (gdbarch
, num_regs
);
1440 set_gdbarch_register_type (gdbarch
, mn10300_register_type
);
1441 set_gdbarch_skip_prologue (gdbarch
, mn10300_skip_prologue
);
1442 set_gdbarch_read_pc (gdbarch
, mn10300_read_pc
);
1443 set_gdbarch_write_pc (gdbarch
, mn10300_write_pc
);
1444 set_gdbarch_pc_regnum (gdbarch
, E_PC_REGNUM
);
1445 set_gdbarch_sp_regnum (gdbarch
, E_SP_REGNUM
);
1446 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, mn10300_dwarf2_reg_to_regnum
);
1448 /* Stack unwinding. */
1449 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1451 set_gdbarch_breakpoint_from_pc (gdbarch
, mn10300_breakpoint_from_pc
);
1452 /* decr_pc_after_break? */
1454 set_gdbarch_print_insn (gdbarch
, print_insn_mn10300
);
1457 set_gdbarch_return_value (gdbarch
, mn10300_return_value
);
1459 /* Stage 3 -- get target calls working. */
1460 set_gdbarch_push_dummy_call (gdbarch
, mn10300_push_dummy_call
);
1461 /* set_gdbarch_return_value (store, extract) */
1464 mn10300_frame_unwind_init (gdbarch
);
1466 /* Hook in ABI-specific overrides, if they have been registered. */
1467 gdbarch_init_osabi (info
, gdbarch
);
1472 /* Dump out the mn10300 specific architecture information. */
1475 mn10300_dump_tdep (struct gdbarch
*gdbarch
, struct ui_file
*file
)
1477 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1478 fprintf_unfiltered (file
, "mn10300_dump_tdep: am33_mode = %d\n",
1482 /* Provide a prototype to silence -Wmissing-prototypes. */
1483 extern initialize_file_ftype _initialize_mn10300_tdep
;
1486 _initialize_mn10300_tdep (void)
1488 gdbarch_register (bfd_arch_mn10300
, mn10300_gdbarch_init
, mn10300_dump_tdep
);