1 /* Target-dependent code for the Matsushita MN10300 for GDB, the GNU debugger.
3 Copyright (C) 1996-2005, 2007-2012 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21 #include "arch-utils.h"
25 #include "gdb_string.h"
26 #include "gdb_assert.h"
27 #include "gdbcore.h" /* For write_memory_unsigned_integer. */
31 #include "frame-unwind.h"
32 #include "frame-base.h"
34 #include "dwarf2-frame.h"
37 #include "prologue-value.h"
40 #include "mn10300-tdep.h"
43 /* The am33-2 has 64 registers. */
44 #define MN10300_MAX_NUM_REGS 64
46 /* This structure holds the results of a prologue analysis. */
47 struct mn10300_prologue
49 /* The architecture for which we generated this prologue info. */
50 struct gdbarch
*gdbarch
;
52 /* The offset from the frame base to the stack pointer --- always
55 Calling this a "size" is a bit misleading, but given that the
56 stack grows downwards, using offsets for everything keeps one
57 from going completely sign-crazy: you never change anything's
58 sign for an ADD instruction; always change the second operand's
59 sign for a SUB instruction; and everything takes care of
63 /* Non-zero if this function has initialized the frame pointer from
64 the stack pointer, zero otherwise. */
67 /* If has_frame_ptr is non-zero, this is the offset from the frame
68 base to where the frame pointer points. This is always zero or
72 /* The address of the first instruction at which the frame has been
73 set up and the arguments are where the debug info says they are
74 --- as best as we can tell. */
75 CORE_ADDR prologue_end
;
77 /* reg_offset[R] is the offset from the CFA at which register R is
78 saved, or 1 if register R has not been saved. (Real values are
79 always zero or negative.) */
80 int reg_offset
[MN10300_MAX_NUM_REGS
];
84 /* Compute the alignment required by a type. */
87 mn10300_type_align (struct type
*type
)
91 switch (TYPE_CODE (type
))
102 return TYPE_LENGTH (type
);
104 case TYPE_CODE_COMPLEX
:
105 return TYPE_LENGTH (type
) / 2;
107 case TYPE_CODE_STRUCT
:
108 case TYPE_CODE_UNION
:
109 for (i
= 0; i
< TYPE_NFIELDS (type
); i
++)
111 int falign
= mn10300_type_align (TYPE_FIELD_TYPE (type
, i
));
112 while (align
< falign
)
117 case TYPE_CODE_ARRAY
:
118 /* HACK! Structures containing arrays, even small ones, are not
119 elligible for returning in registers. */
122 case TYPE_CODE_TYPEDEF
:
123 return mn10300_type_align (check_typedef (type
));
126 internal_error (__FILE__
, __LINE__
, _("bad switch"));
130 /* Should call_function allocate stack space for a struct return? */
132 mn10300_use_struct_convention (struct type
*type
)
134 /* Structures bigger than a pair of words can't be returned in
136 if (TYPE_LENGTH (type
) > 8)
139 switch (TYPE_CODE (type
))
141 case TYPE_CODE_STRUCT
:
142 case TYPE_CODE_UNION
:
143 /* Structures with a single field are handled as the field
145 if (TYPE_NFIELDS (type
) == 1)
146 return mn10300_use_struct_convention (TYPE_FIELD_TYPE (type
, 0));
148 /* Structures with word or double-word size are passed in memory, as
149 long as they require at least word alignment. */
150 if (mn10300_type_align (type
) >= 4)
155 /* Arrays are addressable, so they're never returned in
156 registers. This condition can only hold when the array is
157 the only field of a struct or union. */
158 case TYPE_CODE_ARRAY
:
161 case TYPE_CODE_TYPEDEF
:
162 return mn10300_use_struct_convention (check_typedef (type
));
170 mn10300_store_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
171 struct regcache
*regcache
, const void *valbuf
)
173 int len
= TYPE_LENGTH (type
);
176 if (TYPE_CODE (type
) == TYPE_CODE_PTR
)
181 regsz
= register_size (gdbarch
, reg
);
184 regcache_raw_write_part (regcache
, reg
, 0, len
, valbuf
);
185 else if (len
<= 2 * regsz
)
187 regcache_raw_write (regcache
, reg
, valbuf
);
188 gdb_assert (regsz
== register_size (gdbarch
, reg
+ 1));
189 regcache_raw_write_part (regcache
, reg
+1, 0,
190 len
- regsz
, (char *) valbuf
+ regsz
);
193 internal_error (__FILE__
, __LINE__
,
194 _("Cannot store return value %d bytes long."), len
);
198 mn10300_extract_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
199 struct regcache
*regcache
, void *valbuf
)
201 char buf
[MAX_REGISTER_SIZE
];
202 int len
= TYPE_LENGTH (type
);
205 if (TYPE_CODE (type
) == TYPE_CODE_PTR
)
210 regsz
= register_size (gdbarch
, reg
);
213 regcache_raw_read (regcache
, reg
, buf
);
214 memcpy (valbuf
, buf
, len
);
216 else if (len
<= 2 * regsz
)
218 regcache_raw_read (regcache
, reg
, buf
);
219 memcpy (valbuf
, buf
, regsz
);
220 gdb_assert (regsz
== register_size (gdbarch
, reg
+ 1));
221 regcache_raw_read (regcache
, reg
+ 1, buf
);
222 memcpy ((char *) valbuf
+ regsz
, buf
, len
- regsz
);
225 internal_error (__FILE__
, __LINE__
,
226 _("Cannot extract return value %d bytes long."), len
);
229 /* Determine, for architecture GDBARCH, how a return value of TYPE
230 should be returned. If it is supposed to be returned in registers,
231 and READBUF is non-zero, read the appropriate value from REGCACHE,
232 and copy it into READBUF. If WRITEBUF is non-zero, write the value
233 from WRITEBUF into REGCACHE. */
235 static enum return_value_convention
236 mn10300_return_value (struct gdbarch
*gdbarch
, struct value
*function
,
237 struct type
*type
, struct regcache
*regcache
,
238 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
240 if (mn10300_use_struct_convention (type
))
241 return RETURN_VALUE_STRUCT_CONVENTION
;
244 mn10300_extract_return_value (gdbarch
, type
, regcache
, readbuf
);
246 mn10300_store_return_value (gdbarch
, type
, regcache
, writebuf
);
248 return RETURN_VALUE_REGISTER_CONVENTION
;
252 register_name (int reg
, char **regs
, long sizeof_regs
)
254 if (reg
< 0 || reg
>= sizeof_regs
/ sizeof (regs
[0]))
261 mn10300_generic_register_name (struct gdbarch
*gdbarch
, int reg
)
263 static char *regs
[] =
264 { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
265 "sp", "pc", "mdr", "psw", "lir", "lar", "", "",
266 "", "", "", "", "", "", "", "",
267 "", "", "", "", "", "", "", "fp"
269 return register_name (reg
, regs
, sizeof regs
);
274 am33_register_name (struct gdbarch
*gdbarch
, int reg
)
276 static char *regs
[] =
277 { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
278 "sp", "pc", "mdr", "psw", "lir", "lar", "",
279 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
280 "ssp", "msp", "usp", "mcrh", "mcrl", "mcvf", "", "", ""
282 return register_name (reg
, regs
, sizeof regs
);
286 am33_2_register_name (struct gdbarch
*gdbarch
, int reg
)
288 static char *regs
[] =
290 "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
291 "sp", "pc", "mdr", "psw", "lir", "lar", "mdrq", "r0",
292 "r1", "r2", "r3", "r4", "r5", "r6", "r7", "ssp",
293 "msp", "usp", "mcrh", "mcrl", "mcvf", "fpcr", "", "",
294 "fs0", "fs1", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7",
295 "fs8", "fs9", "fs10", "fs11", "fs12", "fs13", "fs14", "fs15",
296 "fs16", "fs17", "fs18", "fs19", "fs20", "fs21", "fs22", "fs23",
297 "fs24", "fs25", "fs26", "fs27", "fs28", "fs29", "fs30", "fs31"
299 return register_name (reg
, regs
, sizeof regs
);
303 mn10300_register_type (struct gdbarch
*gdbarch
, int reg
)
305 return builtin_type (gdbarch
)->builtin_int
;
309 mn10300_read_pc (struct regcache
*regcache
)
312 regcache_cooked_read_unsigned (regcache
, E_PC_REGNUM
, &val
);
317 mn10300_write_pc (struct regcache
*regcache
, CORE_ADDR val
)
319 regcache_cooked_write_unsigned (regcache
, E_PC_REGNUM
, val
);
322 /* The breakpoint instruction must be the same size as the smallest
323 instruction in the instruction set.
325 The Matsushita mn10x00 processors have single byte instructions
326 so we need a single byte breakpoint. Matsushita hasn't defined
327 one, so we defined it ourselves. */
329 const static unsigned char *
330 mn10300_breakpoint_from_pc (struct gdbarch
*gdbarch
, CORE_ADDR
*bp_addr
,
333 static char breakpoint
[] = {0xff};
338 /* Model the semantics of pushing a register onto the stack. This
339 is a helper function for mn10300_analyze_prologue, below. */
341 push_reg (pv_t
*regs
, struct pv_area
*stack
, int regnum
)
343 regs
[E_SP_REGNUM
] = pv_add_constant (regs
[E_SP_REGNUM
], -4);
344 pv_area_store (stack
, regs
[E_SP_REGNUM
], 4, regs
[regnum
]);
347 /* Translate an "r" register number extracted from an instruction encoding
348 into a GDB register number. Adapted from a simulator function
349 of the same name; see am33.igen. */
351 translate_rreg (int rreg
)
353 /* The higher register numbers actually correspond to the
354 basic machine's address and data registers. */
355 if (rreg
> 7 && rreg
< 12)
356 return E_A0_REGNUM
+ rreg
- 8;
357 else if (rreg
> 11 && rreg
< 16)
358 return E_D0_REGNUM
+ rreg
- 12;
360 return E_E0_REGNUM
+ rreg
;
363 /* Find saved registers in a 'struct pv_area'; we pass this to pv_area_scan.
365 If VALUE is a saved register, ADDR says it was saved at a constant
366 offset from the frame base, and SIZE indicates that the whole
367 register was saved, record its offset in RESULT_UNTYPED. */
369 check_for_saved (void *result_untyped
, pv_t addr
, CORE_ADDR size
, pv_t value
)
371 struct mn10300_prologue
*result
= (struct mn10300_prologue
*) result_untyped
;
373 if (value
.kind
== pvk_register
375 && pv_is_register (addr
, E_SP_REGNUM
)
376 && size
== register_size (result
->gdbarch
, value
.reg
))
377 result
->reg_offset
[value
.reg
] = addr
.k
;
380 /* Analyze the prologue to determine where registers are saved,
381 the end of the prologue, etc. The result of this analysis is
382 returned in RESULT. See struct mn10300_prologue above for more
385 mn10300_analyze_prologue (struct gdbarch
*gdbarch
,
386 CORE_ADDR start_pc
, CORE_ADDR limit_pc
,
387 struct mn10300_prologue
*result
)
389 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
392 pv_t regs
[MN10300_MAX_NUM_REGS
];
393 struct pv_area
*stack
;
394 struct cleanup
*back_to
;
395 CORE_ADDR after_last_frame_setup_insn
= start_pc
;
396 int am33_mode
= AM33_MODE (gdbarch
);
398 memset (result
, 0, sizeof (*result
));
399 result
->gdbarch
= gdbarch
;
401 for (rn
= 0; rn
< MN10300_MAX_NUM_REGS
; rn
++)
403 regs
[rn
] = pv_register (rn
, 0);
404 result
->reg_offset
[rn
] = 1;
406 stack
= make_pv_area (E_SP_REGNUM
, gdbarch_addr_bit (gdbarch
));
407 back_to
= make_cleanup_free_pv_area (stack
);
409 /* The typical call instruction will have saved the return address on the
410 stack. Space for the return address has already been preallocated in
411 the caller's frame. It's possible, such as when using -mrelax with gcc
412 that other registers were saved as well. If this happens, we really
413 have no chance of deciphering the frame. DWARF info can save the day
414 when this happens. */
415 pv_area_store (stack
, regs
[E_SP_REGNUM
], 4, regs
[E_PC_REGNUM
]);
418 while (pc
< limit_pc
)
423 /* Instructions can be as small as one byte; however, we usually
424 need at least two bytes to do the decoding, so fetch that many
426 status
= target_read_memory (pc
, instr
, 2);
430 /* movm [regs], sp */
431 if (instr
[0] == 0xcf)
435 save_mask
= instr
[1];
437 if ((save_mask
& movm_exreg0_bit
) && am33_mode
)
439 push_reg (regs
, stack
, E_E2_REGNUM
);
440 push_reg (regs
, stack
, E_E3_REGNUM
);
442 if ((save_mask
& movm_exreg1_bit
) && am33_mode
)
444 push_reg (regs
, stack
, E_E4_REGNUM
);
445 push_reg (regs
, stack
, E_E5_REGNUM
);
446 push_reg (regs
, stack
, E_E6_REGNUM
);
447 push_reg (regs
, stack
, E_E7_REGNUM
);
449 if ((save_mask
& movm_exother_bit
) && am33_mode
)
451 push_reg (regs
, stack
, E_E0_REGNUM
);
452 push_reg (regs
, stack
, E_E1_REGNUM
);
453 push_reg (regs
, stack
, E_MDRQ_REGNUM
);
454 push_reg (regs
, stack
, E_MCRH_REGNUM
);
455 push_reg (regs
, stack
, E_MCRL_REGNUM
);
456 push_reg (regs
, stack
, E_MCVF_REGNUM
);
458 if (save_mask
& movm_d2_bit
)
459 push_reg (regs
, stack
, E_D2_REGNUM
);
460 if (save_mask
& movm_d3_bit
)
461 push_reg (regs
, stack
, E_D3_REGNUM
);
462 if (save_mask
& movm_a2_bit
)
463 push_reg (regs
, stack
, E_A2_REGNUM
);
464 if (save_mask
& movm_a3_bit
)
465 push_reg (regs
, stack
, E_A3_REGNUM
);
466 if (save_mask
& movm_other_bit
)
468 push_reg (regs
, stack
, E_D0_REGNUM
);
469 push_reg (regs
, stack
, E_D1_REGNUM
);
470 push_reg (regs
, stack
, E_A0_REGNUM
);
471 push_reg (regs
, stack
, E_A1_REGNUM
);
472 push_reg (regs
, stack
, E_MDR_REGNUM
);
473 push_reg (regs
, stack
, E_LIR_REGNUM
);
474 push_reg (regs
, stack
, E_LAR_REGNUM
);
475 /* The `other' bit leaves a blank area of four bytes at
476 the beginning of its block of saved registers, making
477 it 32 bytes long in total. */
478 regs
[E_SP_REGNUM
] = pv_add_constant (regs
[E_SP_REGNUM
], -4);
482 after_last_frame_setup_insn
= pc
;
485 else if ((instr
[0] & 0xfc) == 0x3c)
487 int aN
= instr
[0] & 0x03;
489 regs
[E_A0_REGNUM
+ aN
] = regs
[E_SP_REGNUM
];
493 after_last_frame_setup_insn
= pc
;
496 else if ((instr
[0] & 0xf0) == 0x90
497 && (instr
[0] & 0x03) != ((instr
[0] & 0x0c) >> 2))
499 int aN
= instr
[0] & 0x03;
500 int aM
= (instr
[0] & 0x0c) >> 2;
502 regs
[E_A0_REGNUM
+ aN
] = regs
[E_A0_REGNUM
+ aM
];
507 else if ((instr
[0] & 0xf0) == 0x80
508 && (instr
[0] & 0x03) != ((instr
[0] & 0x0c) >> 2))
510 int dN
= instr
[0] & 0x03;
511 int dM
= (instr
[0] & 0x0c) >> 2;
513 regs
[E_D0_REGNUM
+ dN
] = regs
[E_D0_REGNUM
+ dM
];
518 else if (instr
[0] == 0xf1 && (instr
[1] & 0xf0) == 0xd0)
520 int dN
= instr
[1] & 0x03;
521 int aM
= (instr
[1] & 0x0c) >> 2;
523 regs
[E_D0_REGNUM
+ dN
] = regs
[E_A0_REGNUM
+ aM
];
528 else if (instr
[0] == 0xf1 && (instr
[1] & 0xf0) == 0xe0)
530 int aN
= instr
[1] & 0x03;
531 int dM
= (instr
[1] & 0x0c) >> 2;
533 regs
[E_A0_REGNUM
+ aN
] = regs
[E_D0_REGNUM
+ dM
];
538 else if (instr
[0] == 0xf8 && instr
[1] == 0xfe)
544 status
= target_read_memory (pc
+ 2, buf
, 1);
548 imm8
= extract_signed_integer (buf
, 1, byte_order
);
549 regs
[E_SP_REGNUM
] = pv_add_constant (regs
[E_SP_REGNUM
], imm8
);
552 /* Stack pointer adjustments are frame related. */
553 after_last_frame_setup_insn
= pc
;
556 else if (instr
[0] == 0xfa && instr
[1] == 0xfe)
561 status
= target_read_memory (pc
+ 2, buf
, 2);
565 imm16
= extract_signed_integer (buf
, 2, byte_order
);
566 regs
[E_SP_REGNUM
] = pv_add_constant (regs
[E_SP_REGNUM
], imm16
);
569 /* Stack pointer adjustments are frame related. */
570 after_last_frame_setup_insn
= pc
;
573 else if (instr
[0] == 0xfc && instr
[1] == 0xfe)
578 status
= target_read_memory (pc
+ 2, buf
, 4);
583 imm32
= extract_signed_integer (buf
, 4, byte_order
);
584 regs
[E_SP_REGNUM
] = pv_add_constant (regs
[E_SP_REGNUM
], imm32
);
587 /* Stack pointer adjustments are frame related. */
588 after_last_frame_setup_insn
= pc
;
591 else if ((instr
[0] & 0xfc) == 0x20)
596 aN
= instr
[0] & 0x03;
597 imm8
= extract_signed_integer (&instr
[1], 1, byte_order
);
599 regs
[E_A0_REGNUM
+ aN
] = pv_add_constant (regs
[E_A0_REGNUM
+ aN
],
605 else if (instr
[0] == 0xfa && (instr
[1] & 0xfc) == 0xd0)
611 aN
= instr
[1] & 0x03;
613 status
= target_read_memory (pc
+ 2, buf
, 2);
618 imm16
= extract_signed_integer (buf
, 2, byte_order
);
620 regs
[E_A0_REGNUM
+ aN
] = pv_add_constant (regs
[E_A0_REGNUM
+ aN
],
626 else if (instr
[0] == 0xfc && (instr
[1] & 0xfc) == 0xd0)
632 aN
= instr
[1] & 0x03;
634 status
= target_read_memory (pc
+ 2, buf
, 4);
638 imm32
= extract_signed_integer (buf
, 2, byte_order
);
640 regs
[E_A0_REGNUM
+ aN
] = pv_add_constant (regs
[E_A0_REGNUM
+ aN
],
645 else if (instr
[0] == 0xf9 && (instr
[1] & 0xfd) == 0x30)
650 Y
= (instr
[1] & 0x02) >> 1;
652 status
= target_read_memory (pc
+ 2, buf
, 1);
656 sM
= (buf
[0] & 0xf0) >> 4;
660 pv_area_store (stack
, regs
[translate_rreg (rN
)], 4,
661 regs
[E_FS0_REGNUM
+ fsM
]);
666 else if (instr
[0] == 0xf9 && (instr
[1] & 0xfd) == 0x34)
671 Y
= (instr
[1] & 0x02) >> 1;
673 status
= target_read_memory (pc
+ 2, buf
, 1);
677 sM
= (buf
[0] & 0xf0) >> 4;
680 pv_area_store (stack
, regs
[E_SP_REGNUM
], 4,
681 regs
[E_FS0_REGNUM
+ fsM
]);
685 /* fmov fsM, (rN, rI) */
686 else if (instr
[0] == 0xfb && instr
[1] == 0x37)
688 int fsM
, sM
, Z
, rN
, rI
;
692 status
= target_read_memory (pc
+ 2, buf
, 2);
696 rI
= (buf
[0] & 0xf0) >> 4;
698 sM
= (buf
[1] & 0xf0) >> 4;
699 Z
= (buf
[1] & 0x02) >> 1;
702 pv_area_store (stack
,
703 pv_add (regs
[translate_rreg (rN
)],
704 regs
[translate_rreg (rI
)]),
705 4, regs
[E_FS0_REGNUM
+ fsM
]);
709 /* fmov fsM, (d8, rN) */
710 else if (instr
[0] == 0xfb && (instr
[1] & 0xfd) == 0x30)
716 Y
= (instr
[1] & 0x02) >> 1;
718 status
= target_read_memory (pc
+ 2, buf
, 2);
722 sM
= (buf
[0] & 0xf0) >> 4;
725 d8
= extract_signed_integer (&buf
[1], 1, byte_order
);
727 pv_area_store (stack
,
728 pv_add_constant (regs
[translate_rreg (rN
)], d8
),
729 4, regs
[E_FS0_REGNUM
+ fsM
]);
733 /* fmov fsM, (d24, rN) */
734 else if (instr
[0] == 0xfd && (instr
[1] & 0xfd) == 0x30)
740 Y
= (instr
[1] & 0x02) >> 1;
742 status
= target_read_memory (pc
+ 2, buf
, 4);
746 sM
= (buf
[0] & 0xf0) >> 4;
749 d24
= extract_signed_integer (&buf
[1], 3, byte_order
);
751 pv_area_store (stack
,
752 pv_add_constant (regs
[translate_rreg (rN
)], d24
),
753 4, regs
[E_FS0_REGNUM
+ fsM
]);
757 /* fmov fsM, (d32, rN) */
758 else if (instr
[0] == 0xfe && (instr
[1] & 0xfd) == 0x30)
764 Y
= (instr
[1] & 0x02) >> 1;
766 status
= target_read_memory (pc
+ 2, buf
, 5);
770 sM
= (buf
[0] & 0xf0) >> 4;
773 d32
= extract_signed_integer (&buf
[1], 4, byte_order
);
775 pv_area_store (stack
,
776 pv_add_constant (regs
[translate_rreg (rN
)], d32
),
777 4, regs
[E_FS0_REGNUM
+ fsM
]);
781 /* fmov fsM, (d8, SP) */
782 else if (instr
[0] == 0xfb && (instr
[1] & 0xfd) == 0x34)
788 Y
= (instr
[1] & 0x02) >> 1;
790 status
= target_read_memory (pc
+ 2, buf
, 2);
794 sM
= (buf
[0] & 0xf0) >> 4;
796 d8
= extract_signed_integer (&buf
[1], 1, byte_order
);
798 pv_area_store (stack
,
799 pv_add_constant (regs
[E_SP_REGNUM
], d8
),
800 4, regs
[E_FS0_REGNUM
+ fsM
]);
804 /* fmov fsM, (d24, SP) */
805 else if (instr
[0] == 0xfd && (instr
[1] & 0xfd) == 0x34)
811 Y
= (instr
[1] & 0x02) >> 1;
813 status
= target_read_memory (pc
+ 2, buf
, 4);
817 sM
= (buf
[0] & 0xf0) >> 4;
819 d24
= extract_signed_integer (&buf
[1], 3, byte_order
);
821 pv_area_store (stack
,
822 pv_add_constant (regs
[E_SP_REGNUM
], d24
),
823 4, regs
[E_FS0_REGNUM
+ fsM
]);
827 /* fmov fsM, (d32, SP) */
828 else if (instr
[0] == 0xfe && (instr
[1] & 0xfd) == 0x34)
834 Y
= (instr
[1] & 0x02) >> 1;
836 status
= target_read_memory (pc
+ 2, buf
, 5);
840 sM
= (buf
[0] & 0xf0) >> 4;
842 d32
= extract_signed_integer (&buf
[1], 4, byte_order
);
844 pv_area_store (stack
,
845 pv_add_constant (regs
[E_SP_REGNUM
], d32
),
846 4, regs
[E_FS0_REGNUM
+ fsM
]);
850 /* fmov fsM, (rN+) */
851 else if (instr
[0] == 0xf9 && (instr
[1] & 0xfd) == 0x31)
853 int fsM
, sM
, Y
, rN
, rN_regnum
;
856 Y
= (instr
[1] & 0x02) >> 1;
858 status
= target_read_memory (pc
+ 2, buf
, 1);
862 sM
= (buf
[0] & 0xf0) >> 4;
866 rN_regnum
= translate_rreg (rN
);
868 pv_area_store (stack
, regs
[rN_regnum
], 4,
869 regs
[E_FS0_REGNUM
+ fsM
]);
870 regs
[rN_regnum
] = pv_add_constant (regs
[rN_regnum
], 4);
874 /* fmov fsM, (rN+, imm8) */
875 else if (instr
[0] == 0xfb && (instr
[1] & 0xfd) == 0x31)
877 int fsM
, sM
, Y
, rN
, rN_regnum
;
881 Y
= (instr
[1] & 0x02) >> 1;
883 status
= target_read_memory (pc
+ 2, buf
, 2);
887 sM
= (buf
[0] & 0xf0) >> 4;
890 imm8
= extract_signed_integer (&buf
[1], 1, byte_order
);
892 rN_regnum
= translate_rreg (rN
);
894 pv_area_store (stack
, regs
[rN_regnum
], 4, regs
[E_FS0_REGNUM
+ fsM
]);
895 regs
[rN_regnum
] = pv_add_constant (regs
[rN_regnum
], imm8
);
899 /* fmov fsM, (rN+, imm24) */
900 else if (instr
[0] == 0xfd && (instr
[1] & 0xfd) == 0x31)
902 int fsM
, sM
, Y
, rN
, rN_regnum
;
906 Y
= (instr
[1] & 0x02) >> 1;
908 status
= target_read_memory (pc
+ 2, buf
, 4);
912 sM
= (buf
[0] & 0xf0) >> 4;
915 imm24
= extract_signed_integer (&buf
[1], 3, byte_order
);
917 rN_regnum
= translate_rreg (rN
);
919 pv_area_store (stack
, regs
[rN_regnum
], 4, regs
[E_FS0_REGNUM
+ fsM
]);
920 regs
[rN_regnum
] = pv_add_constant (regs
[rN_regnum
], imm24
);
924 /* fmov fsM, (rN+, imm32) */
925 else if (instr
[0] == 0xfe && (instr
[1] & 0xfd) == 0x31)
927 int fsM
, sM
, Y
, rN
, rN_regnum
;
931 Y
= (instr
[1] & 0x02) >> 1;
933 status
= target_read_memory (pc
+ 2, buf
, 5);
937 sM
= (buf
[0] & 0xf0) >> 4;
940 imm32
= extract_signed_integer (&buf
[1], 4, byte_order
);
942 rN_regnum
= translate_rreg (rN
);
944 pv_area_store (stack
, regs
[rN_regnum
], 4, regs
[E_FS0_REGNUM
+ fsM
]);
945 regs
[rN_regnum
] = pv_add_constant (regs
[rN_regnum
], imm32
);
950 else if ((instr
[0] & 0xf0) == 0x90)
952 int aN
= instr
[0] & 0x03;
955 imm8
= extract_signed_integer (&instr
[1], 1, byte_order
);
957 regs
[E_A0_REGNUM
+ aN
] = pv_constant (imm8
);
961 else if ((instr
[0] & 0xfc) == 0x24)
963 int aN
= instr
[0] & 0x03;
967 status
= target_read_memory (pc
+ 1, buf
, 2);
971 imm16
= extract_signed_integer (buf
, 2, byte_order
);
972 regs
[E_A0_REGNUM
+ aN
] = pv_constant (imm16
);
976 else if (instr
[0] == 0xfc && ((instr
[1] & 0xfc) == 0xdc))
978 int aN
= instr
[1] & 0x03;
982 status
= target_read_memory (pc
+ 2, buf
, 4);
986 imm32
= extract_signed_integer (buf
, 4, byte_order
);
987 regs
[E_A0_REGNUM
+ aN
] = pv_constant (imm32
);
991 else if ((instr
[0] & 0xf0) == 0x80)
993 int dN
= instr
[0] & 0x03;
996 imm8
= extract_signed_integer (&instr
[1], 1, byte_order
);
998 regs
[E_D0_REGNUM
+ dN
] = pv_constant (imm8
);
1002 else if ((instr
[0] & 0xfc) == 0x2c)
1004 int dN
= instr
[0] & 0x03;
1008 status
= target_read_memory (pc
+ 1, buf
, 2);
1012 imm16
= extract_signed_integer (buf
, 2, byte_order
);
1013 regs
[E_D0_REGNUM
+ dN
] = pv_constant (imm16
);
1017 else if (instr
[0] == 0xfc && ((instr
[1] & 0xfc) == 0xcc))
1019 int dN
= instr
[1] & 0x03;
1023 status
= target_read_memory (pc
+ 2, buf
, 4);
1027 imm32
= extract_signed_integer (buf
, 4, byte_order
);
1028 regs
[E_D0_REGNUM
+ dN
] = pv_constant (imm32
);
1033 /* We've hit some instruction that we don't recognize. Hopefully,
1034 we have enough to do prologue analysis. */
1039 /* Is the frame size (offset, really) a known constant? */
1040 if (pv_is_register (regs
[E_SP_REGNUM
], E_SP_REGNUM
))
1041 result
->frame_size
= regs
[E_SP_REGNUM
].k
;
1043 /* Was the frame pointer initialized? */
1044 if (pv_is_register (regs
[E_A3_REGNUM
], E_SP_REGNUM
))
1046 result
->has_frame_ptr
= 1;
1047 result
->frame_ptr_offset
= regs
[E_A3_REGNUM
].k
;
1050 /* Record where all the registers were saved. */
1051 pv_area_scan (stack
, check_for_saved
, (void *) result
);
1053 result
->prologue_end
= after_last_frame_setup_insn
;
1055 do_cleanups (back_to
);
1058 /* Function: skip_prologue
1059 Return the address of the first inst past the prologue of the function. */
1062 mn10300_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
1065 CORE_ADDR func_addr
, func_end
;
1066 struct mn10300_prologue p
;
1068 /* Try to find the extent of the function that contains PC. */
1069 if (!find_pc_partial_function (pc
, &name
, &func_addr
, &func_end
))
1072 mn10300_analyze_prologue (gdbarch
, pc
, func_end
, &p
);
1073 return p
.prologue_end
;
1076 /* Wrapper for mn10300_analyze_prologue: find the function start;
1077 use the current frame PC as the limit, then
1078 invoke mn10300_analyze_prologue and return its result. */
1079 static struct mn10300_prologue
*
1080 mn10300_analyze_frame_prologue (struct frame_info
*this_frame
,
1081 void **this_prologue_cache
)
1083 if (!*this_prologue_cache
)
1085 CORE_ADDR func_start
, stop_addr
;
1087 *this_prologue_cache
= FRAME_OBSTACK_ZALLOC (struct mn10300_prologue
);
1089 func_start
= get_frame_func (this_frame
);
1090 stop_addr
= get_frame_pc (this_frame
);
1092 /* If we couldn't find any function containing the PC, then
1093 just initialize the prologue cache, but don't do anything. */
1095 stop_addr
= func_start
;
1097 mn10300_analyze_prologue (get_frame_arch (this_frame
),
1098 func_start
, stop_addr
, *this_prologue_cache
);
1101 return *this_prologue_cache
;
1104 /* Given the next frame and a prologue cache, return this frame's
1107 mn10300_frame_base (struct frame_info
*this_frame
, void **this_prologue_cache
)
1109 struct mn10300_prologue
*p
1110 = mn10300_analyze_frame_prologue (this_frame
, this_prologue_cache
);
1112 /* In functions that use alloca, the distance between the stack
1113 pointer and the frame base varies dynamically, so we can't use
1114 the SP plus static information like prologue analysis to find the
1115 frame base. However, such functions must have a frame pointer,
1116 to be able to restore the SP on exit. So whenever we do have a
1117 frame pointer, use that to find the base. */
1118 if (p
->has_frame_ptr
)
1120 CORE_ADDR fp
= get_frame_register_unsigned (this_frame
, E_A3_REGNUM
);
1121 return fp
- p
->frame_ptr_offset
;
1125 CORE_ADDR sp
= get_frame_register_unsigned (this_frame
, E_SP_REGNUM
);
1126 return sp
- p
->frame_size
;
1130 /* Here is a dummy implementation. */
1131 static struct frame_id
1132 mn10300_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
1134 CORE_ADDR sp
= get_frame_register_unsigned (this_frame
, E_SP_REGNUM
);
1135 CORE_ADDR pc
= get_frame_register_unsigned (this_frame
, E_PC_REGNUM
);
1136 return frame_id_build (sp
, pc
);
1140 mn10300_frame_this_id (struct frame_info
*this_frame
,
1141 void **this_prologue_cache
,
1142 struct frame_id
*this_id
)
1144 *this_id
= frame_id_build (mn10300_frame_base (this_frame
,
1145 this_prologue_cache
),
1146 get_frame_func (this_frame
));
1150 static struct value
*
1151 mn10300_frame_prev_register (struct frame_info
*this_frame
,
1152 void **this_prologue_cache
, int regnum
)
1154 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (this_frame
));
1155 struct mn10300_prologue
*p
1156 = mn10300_analyze_frame_prologue (this_frame
, this_prologue_cache
);
1157 CORE_ADDR frame_base
= mn10300_frame_base (this_frame
, this_prologue_cache
);
1158 int reg_size
= register_size (get_frame_arch (this_frame
), regnum
);
1160 if (regnum
== E_SP_REGNUM
)
1161 return frame_unwind_got_constant (this_frame
, regnum
, frame_base
);
1163 /* If prologue analysis says we saved this register somewhere,
1164 return a description of the stack slot holding it. */
1165 if (p
->reg_offset
[regnum
] != 1)
1166 return frame_unwind_got_memory (this_frame
, regnum
,
1167 frame_base
+ p
->reg_offset
[regnum
]);
1169 /* Otherwise, presume we haven't changed the value of this
1170 register, and get it from the next frame. */
1171 return frame_unwind_got_register (this_frame
, regnum
, regnum
);
1174 static const struct frame_unwind mn10300_frame_unwind
= {
1176 default_frame_unwind_stop_reason
,
1177 mn10300_frame_this_id
,
1178 mn10300_frame_prev_register
,
1180 default_frame_sniffer
1184 mn10300_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
1188 pc
= frame_unwind_register_unsigned (this_frame
, E_PC_REGNUM
);
1193 mn10300_unwind_sp (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
1197 sp
= frame_unwind_register_unsigned (this_frame
, E_SP_REGNUM
);
1202 mn10300_frame_unwind_init (struct gdbarch
*gdbarch
)
1204 dwarf2_append_unwinders (gdbarch
);
1205 frame_unwind_append_unwinder (gdbarch
, &mn10300_frame_unwind
);
1206 set_gdbarch_dummy_id (gdbarch
, mn10300_dummy_id
);
1207 set_gdbarch_unwind_pc (gdbarch
, mn10300_unwind_pc
);
1208 set_gdbarch_unwind_sp (gdbarch
, mn10300_unwind_sp
);
1211 /* Function: push_dummy_call
1213 * Set up machine state for a target call, including
1214 * function arguments, stack, return address, etc.
1219 mn10300_push_dummy_call (struct gdbarch
*gdbarch
,
1220 struct value
*target_func
,
1221 struct regcache
*regcache
,
1223 int nargs
, struct value
**args
,
1226 CORE_ADDR struct_addr
)
1228 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1229 const int push_size
= register_size (gdbarch
, E_PC_REGNUM
);
1232 int stack_offset
= 0;
1234 char *val
, valbuf
[MAX_REGISTER_SIZE
];
1236 /* This should be a nop, but align the stack just in case something
1237 went wrong. Stacks are four byte aligned on the mn10300. */
1240 /* Now make space on the stack for the args.
1242 XXX This doesn't appear to handle pass-by-invisible reference
1244 regs_used
= struct_return
? 1 : 0;
1245 for (len
= 0, argnum
= 0; argnum
< nargs
; argnum
++)
1247 arg_len
= (TYPE_LENGTH (value_type (args
[argnum
])) + 3) & ~3;
1248 while (regs_used
< 2 && arg_len
> 0)
1251 arg_len
-= push_size
;
1256 /* Allocate stack space. */
1262 regcache_cooked_write_unsigned (regcache
, E_D0_REGNUM
, struct_addr
);
1267 /* Push all arguments onto the stack. */
1268 for (argnum
= 0; argnum
< nargs
; argnum
++)
1270 /* FIXME what about structs? Unions? */
1271 if (TYPE_CODE (value_type (*args
)) == TYPE_CODE_STRUCT
1272 && TYPE_LENGTH (value_type (*args
)) > 8)
1274 /* Change to pointer-to-type. */
1275 arg_len
= push_size
;
1276 store_unsigned_integer (valbuf
, push_size
, byte_order
,
1277 value_address (*args
));
1282 arg_len
= TYPE_LENGTH (value_type (*args
));
1283 val
= (char *) value_contents (*args
);
1286 while (regs_used
< 2 && arg_len
> 0)
1288 regcache_cooked_write_unsigned (regcache
, regs_used
,
1289 extract_unsigned_integer (val
, push_size
, byte_order
));
1291 arg_len
-= push_size
;
1297 write_memory (sp
+ stack_offset
, val
, push_size
);
1298 arg_len
-= push_size
;
1300 stack_offset
+= push_size
;
1306 /* Make space for the flushback area. */
1309 /* Push the return address that contains the magic breakpoint. */
1311 write_memory_unsigned_integer (sp
, push_size
, byte_order
, bp_addr
);
1313 /* The CPU also writes the return address always into the
1314 MDR register on "call". */
1315 regcache_cooked_write_unsigned (regcache
, E_MDR_REGNUM
, bp_addr
);
1318 regcache_cooked_write_unsigned (regcache
, E_SP_REGNUM
, sp
);
1320 /* On the mn10300, it's possible to move some of the stack adjustment
1321 and saving of the caller-save registers out of the prologue and
1322 into the call sites. (When using gcc, this optimization can
1323 occur when using the -mrelax switch.) If this occurs, the dwarf2
1324 info will reflect this fact. We can test to see if this is the
1325 case by creating a new frame using the current stack pointer and
1326 the address of the function that we're about to call. We then
1327 unwind SP and see if it's different than the SP of our newly
1328 created frame. If the SP values are the same, the caller is not
1329 expected to allocate any additional stack. On the other hand, if
1330 the SP values are different, the difference determines the
1331 additional stack that must be allocated.
1333 Note that we don't update the return value though because that's
1334 the value of the stack just after pushing the arguments, but prior
1335 to performing the call. This value is needed in order to
1336 construct the frame ID of the dummy call. */
1338 CORE_ADDR func_addr
= find_function_addr (target_func
, NULL
);
1339 CORE_ADDR unwound_sp
1340 = mn10300_unwind_sp (gdbarch
, create_new_frame (sp
, func_addr
));
1341 if (sp
!= unwound_sp
)
1342 regcache_cooked_write_unsigned (regcache
, E_SP_REGNUM
,
1343 sp
- (unwound_sp
- sp
));
1349 /* If DWARF2 is a register number appearing in Dwarf2 debug info, then
1350 mn10300_dwarf2_reg_to_regnum (DWARF2) is the corresponding GDB
1351 register number. Why don't Dwarf2 and GDB use the same numbering?
1352 Who knows? But since people have object files lying around with
1353 the existing Dwarf2 numbering, and other people have written stubs
1354 to work with the existing GDB, neither of them can change. So we
1355 just have to cope. */
1357 mn10300_dwarf2_reg_to_regnum (struct gdbarch
*gdbarch
, int dwarf2
)
1359 /* This table is supposed to be shaped like the gdbarch_register_name
1360 initializer in gcc/config/mn10300/mn10300.h. Registers which
1361 appear in GCC's numbering, but have no counterpart in GDB's
1362 world, are marked with a -1. */
1363 static int dwarf2_to_gdb
[] = {
1364 0, 1, 2, 3, 4, 5, 6, 7, -1, 8,
1365 15, 16, 17, 18, 19, 20, 21, 22,
1366 32, 33, 34, 35, 36, 37, 38, 39,
1367 40, 41, 42, 43, 44, 45, 46, 47,
1368 48, 49, 50, 51, 52, 53, 54, 55,
1369 56, 57, 58, 59, 60, 61, 62, 63,
1374 || dwarf2
>= ARRAY_SIZE (dwarf2_to_gdb
))
1376 warning (_("Bogus register number in debug info: %d"), dwarf2
);
1380 return dwarf2_to_gdb
[dwarf2
];
1383 static struct gdbarch
*
1384 mn10300_gdbarch_init (struct gdbarch_info info
,
1385 struct gdbarch_list
*arches
)
1387 struct gdbarch
*gdbarch
;
1388 struct gdbarch_tdep
*tdep
;
1391 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1393 return arches
->gdbarch
;
1395 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
1396 gdbarch
= gdbarch_alloc (&info
, tdep
);
1398 switch (info
.bfd_arch_info
->mach
)
1401 case bfd_mach_mn10300
:
1402 set_gdbarch_register_name (gdbarch
, mn10300_generic_register_name
);
1403 tdep
->am33_mode
= 0;
1407 set_gdbarch_register_name (gdbarch
, am33_register_name
);
1408 tdep
->am33_mode
= 1;
1411 case bfd_mach_am33_2
:
1412 set_gdbarch_register_name (gdbarch
, am33_2_register_name
);
1413 tdep
->am33_mode
= 2;
1415 set_gdbarch_fp0_regnum (gdbarch
, 32);
1418 internal_error (__FILE__
, __LINE__
,
1419 _("mn10300_gdbarch_init: Unknown mn10300 variant"));
1423 /* By default, chars are unsigned. */
1424 set_gdbarch_char_signed (gdbarch
, 0);
1427 set_gdbarch_num_regs (gdbarch
, num_regs
);
1428 set_gdbarch_register_type (gdbarch
, mn10300_register_type
);
1429 set_gdbarch_skip_prologue (gdbarch
, mn10300_skip_prologue
);
1430 set_gdbarch_read_pc (gdbarch
, mn10300_read_pc
);
1431 set_gdbarch_write_pc (gdbarch
, mn10300_write_pc
);
1432 set_gdbarch_pc_regnum (gdbarch
, E_PC_REGNUM
);
1433 set_gdbarch_sp_regnum (gdbarch
, E_SP_REGNUM
);
1434 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, mn10300_dwarf2_reg_to_regnum
);
1436 /* Stack unwinding. */
1437 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1439 set_gdbarch_breakpoint_from_pc (gdbarch
, mn10300_breakpoint_from_pc
);
1440 /* decr_pc_after_break? */
1442 set_gdbarch_print_insn (gdbarch
, print_insn_mn10300
);
1445 set_gdbarch_return_value (gdbarch
, mn10300_return_value
);
1447 /* Stage 3 -- get target calls working. */
1448 set_gdbarch_push_dummy_call (gdbarch
, mn10300_push_dummy_call
);
1449 /* set_gdbarch_return_value (store, extract) */
1452 mn10300_frame_unwind_init (gdbarch
);
1454 /* Hook in ABI-specific overrides, if they have been registered. */
1455 gdbarch_init_osabi (info
, gdbarch
);
1460 /* Dump out the mn10300 specific architecture information. */
1463 mn10300_dump_tdep (struct gdbarch
*gdbarch
, struct ui_file
*file
)
1465 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1466 fprintf_unfiltered (file
, "mn10300_dump_tdep: am33_mode = %d\n",
1470 /* Provide a prototype to silence -Wmissing-prototypes. */
1471 extern initialize_file_ftype _initialize_mn10300_tdep
;
1474 _initialize_mn10300_tdep (void)
1476 gdbarch_register (bfd_arch_mn10300
, mn10300_gdbarch_init
, mn10300_dump_tdep
);