Include gdb_assert.h in common-defs.h
[deliverable/binutils-gdb.git] / gdb / mn10300-tdep.c
1 /* Target-dependent code for the Matsushita MN10300 for GDB, the GNU debugger.
2
3 Copyright (C) 1996-2014 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19
20 #include "defs.h"
21 #include "arch-utils.h"
22 #include "dis-asm.h"
23 #include "gdbtypes.h"
24 #include "regcache.h"
25 #include <string.h>
26 #include "gdbcore.h" /* For write_memory_unsigned_integer. */
27 #include "value.h"
28 #include "frame.h"
29 #include "frame-unwind.h"
30 #include "frame-base.h"
31 #include "symtab.h"
32 #include "dwarf2-frame.h"
33 #include "osabi.h"
34 #include "infcall.h"
35 #include "prologue-value.h"
36 #include "target.h"
37
38 #include "mn10300-tdep.h"
39
40
41 /* The am33-2 has 64 registers. */
42 #define MN10300_MAX_NUM_REGS 64
43
44 /* This structure holds the results of a prologue analysis. */
45 struct mn10300_prologue
46 {
47 /* The architecture for which we generated this prologue info. */
48 struct gdbarch *gdbarch;
49
50 /* The offset from the frame base to the stack pointer --- always
51 zero or negative.
52
53 Calling this a "size" is a bit misleading, but given that the
54 stack grows downwards, using offsets for everything keeps one
55 from going completely sign-crazy: you never change anything's
56 sign for an ADD instruction; always change the second operand's
57 sign for a SUB instruction; and everything takes care of
58 itself. */
59 int frame_size;
60
61 /* Non-zero if this function has initialized the frame pointer from
62 the stack pointer, zero otherwise. */
63 int has_frame_ptr;
64
65 /* If has_frame_ptr is non-zero, this is the offset from the frame
66 base to where the frame pointer points. This is always zero or
67 negative. */
68 int frame_ptr_offset;
69
70 /* The address of the first instruction at which the frame has been
71 set up and the arguments are where the debug info says they are
72 --- as best as we can tell. */
73 CORE_ADDR prologue_end;
74
75 /* reg_offset[R] is the offset from the CFA at which register R is
76 saved, or 1 if register R has not been saved. (Real values are
77 always zero or negative.) */
78 int reg_offset[MN10300_MAX_NUM_REGS];
79 };
80
81
82 /* Compute the alignment required by a type. */
83
84 static int
85 mn10300_type_align (struct type *type)
86 {
87 int i, align = 1;
88
89 switch (TYPE_CODE (type))
90 {
91 case TYPE_CODE_INT:
92 case TYPE_CODE_ENUM:
93 case TYPE_CODE_SET:
94 case TYPE_CODE_RANGE:
95 case TYPE_CODE_CHAR:
96 case TYPE_CODE_BOOL:
97 case TYPE_CODE_FLT:
98 case TYPE_CODE_PTR:
99 case TYPE_CODE_REF:
100 return TYPE_LENGTH (type);
101
102 case TYPE_CODE_COMPLEX:
103 return TYPE_LENGTH (type) / 2;
104
105 case TYPE_CODE_STRUCT:
106 case TYPE_CODE_UNION:
107 for (i = 0; i < TYPE_NFIELDS (type); i++)
108 {
109 int falign = mn10300_type_align (TYPE_FIELD_TYPE (type, i));
110 while (align < falign)
111 align <<= 1;
112 }
113 return align;
114
115 case TYPE_CODE_ARRAY:
116 /* HACK! Structures containing arrays, even small ones, are not
117 elligible for returning in registers. */
118 return 256;
119
120 case TYPE_CODE_TYPEDEF:
121 return mn10300_type_align (check_typedef (type));
122
123 default:
124 internal_error (__FILE__, __LINE__, _("bad switch"));
125 }
126 }
127
128 /* Should call_function allocate stack space for a struct return? */
129 static int
130 mn10300_use_struct_convention (struct type *type)
131 {
132 /* Structures bigger than a pair of words can't be returned in
133 registers. */
134 if (TYPE_LENGTH (type) > 8)
135 return 1;
136
137 switch (TYPE_CODE (type))
138 {
139 case TYPE_CODE_STRUCT:
140 case TYPE_CODE_UNION:
141 /* Structures with a single field are handled as the field
142 itself. */
143 if (TYPE_NFIELDS (type) == 1)
144 return mn10300_use_struct_convention (TYPE_FIELD_TYPE (type, 0));
145
146 /* Structures with word or double-word size are passed in memory, as
147 long as they require at least word alignment. */
148 if (mn10300_type_align (type) >= 4)
149 return 0;
150
151 return 1;
152
153 /* Arrays are addressable, so they're never returned in
154 registers. This condition can only hold when the array is
155 the only field of a struct or union. */
156 case TYPE_CODE_ARRAY:
157 return 1;
158
159 case TYPE_CODE_TYPEDEF:
160 return mn10300_use_struct_convention (check_typedef (type));
161
162 default:
163 return 0;
164 }
165 }
166
167 static void
168 mn10300_store_return_value (struct gdbarch *gdbarch, struct type *type,
169 struct regcache *regcache, const gdb_byte *valbuf)
170 {
171 int len = TYPE_LENGTH (type);
172 int reg, regsz;
173
174 if (TYPE_CODE (type) == TYPE_CODE_PTR)
175 reg = 4;
176 else
177 reg = 0;
178
179 regsz = register_size (gdbarch, reg);
180
181 if (len <= regsz)
182 regcache_raw_write_part (regcache, reg, 0, len, valbuf);
183 else if (len <= 2 * regsz)
184 {
185 regcache_raw_write (regcache, reg, valbuf);
186 gdb_assert (regsz == register_size (gdbarch, reg + 1));
187 regcache_raw_write_part (regcache, reg+1, 0,
188 len - regsz, valbuf + regsz);
189 }
190 else
191 internal_error (__FILE__, __LINE__,
192 _("Cannot store return value %d bytes long."), len);
193 }
194
195 static void
196 mn10300_extract_return_value (struct gdbarch *gdbarch, struct type *type,
197 struct regcache *regcache, void *valbuf)
198 {
199 gdb_byte buf[MAX_REGISTER_SIZE];
200 int len = TYPE_LENGTH (type);
201 int reg, regsz;
202
203 if (TYPE_CODE (type) == TYPE_CODE_PTR)
204 reg = 4;
205 else
206 reg = 0;
207
208 regsz = register_size (gdbarch, reg);
209 if (len <= regsz)
210 {
211 regcache_raw_read (regcache, reg, buf);
212 memcpy (valbuf, buf, len);
213 }
214 else if (len <= 2 * regsz)
215 {
216 regcache_raw_read (regcache, reg, buf);
217 memcpy (valbuf, buf, regsz);
218 gdb_assert (regsz == register_size (gdbarch, reg + 1));
219 regcache_raw_read (regcache, reg + 1, buf);
220 memcpy ((char *) valbuf + regsz, buf, len - regsz);
221 }
222 else
223 internal_error (__FILE__, __LINE__,
224 _("Cannot extract return value %d bytes long."), len);
225 }
226
227 /* Determine, for architecture GDBARCH, how a return value of TYPE
228 should be returned. If it is supposed to be returned in registers,
229 and READBUF is non-zero, read the appropriate value from REGCACHE,
230 and copy it into READBUF. If WRITEBUF is non-zero, write the value
231 from WRITEBUF into REGCACHE. */
232
233 static enum return_value_convention
234 mn10300_return_value (struct gdbarch *gdbarch, struct value *function,
235 struct type *type, struct regcache *regcache,
236 gdb_byte *readbuf, const gdb_byte *writebuf)
237 {
238 if (mn10300_use_struct_convention (type))
239 return RETURN_VALUE_STRUCT_CONVENTION;
240
241 if (readbuf)
242 mn10300_extract_return_value (gdbarch, type, regcache, readbuf);
243 if (writebuf)
244 mn10300_store_return_value (gdbarch, type, regcache, writebuf);
245
246 return RETURN_VALUE_REGISTER_CONVENTION;
247 }
248
249 static char *
250 register_name (int reg, char **regs, long sizeof_regs)
251 {
252 if (reg < 0 || reg >= sizeof_regs / sizeof (regs[0]))
253 return NULL;
254 else
255 return regs[reg];
256 }
257
258 static const char *
259 mn10300_generic_register_name (struct gdbarch *gdbarch, int reg)
260 {
261 static char *regs[] =
262 { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
263 "sp", "pc", "mdr", "psw", "lir", "lar", "", "",
264 "", "", "", "", "", "", "", "",
265 "", "", "", "", "", "", "", "fp"
266 };
267 return register_name (reg, regs, sizeof regs);
268 }
269
270
271 static const char *
272 am33_register_name (struct gdbarch *gdbarch, int reg)
273 {
274 static char *regs[] =
275 { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
276 "sp", "pc", "mdr", "psw", "lir", "lar", "",
277 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
278 "ssp", "msp", "usp", "mcrh", "mcrl", "mcvf", "", "", ""
279 };
280 return register_name (reg, regs, sizeof regs);
281 }
282
283 static const char *
284 am33_2_register_name (struct gdbarch *gdbarch, int reg)
285 {
286 static char *regs[] =
287 {
288 "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
289 "sp", "pc", "mdr", "psw", "lir", "lar", "mdrq", "r0",
290 "r1", "r2", "r3", "r4", "r5", "r6", "r7", "ssp",
291 "msp", "usp", "mcrh", "mcrl", "mcvf", "fpcr", "", "",
292 "fs0", "fs1", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7",
293 "fs8", "fs9", "fs10", "fs11", "fs12", "fs13", "fs14", "fs15",
294 "fs16", "fs17", "fs18", "fs19", "fs20", "fs21", "fs22", "fs23",
295 "fs24", "fs25", "fs26", "fs27", "fs28", "fs29", "fs30", "fs31"
296 };
297 return register_name (reg, regs, sizeof regs);
298 }
299
300 static struct type *
301 mn10300_register_type (struct gdbarch *gdbarch, int reg)
302 {
303 return builtin_type (gdbarch)->builtin_int;
304 }
305
306 static CORE_ADDR
307 mn10300_read_pc (struct regcache *regcache)
308 {
309 ULONGEST val;
310 regcache_cooked_read_unsigned (regcache, E_PC_REGNUM, &val);
311 return val;
312 }
313
314 static void
315 mn10300_write_pc (struct regcache *regcache, CORE_ADDR val)
316 {
317 regcache_cooked_write_unsigned (regcache, E_PC_REGNUM, val);
318 }
319
320 /* The breakpoint instruction must be the same size as the smallest
321 instruction in the instruction set.
322
323 The Matsushita mn10x00 processors have single byte instructions
324 so we need a single byte breakpoint. Matsushita hasn't defined
325 one, so we defined it ourselves. */
326
327 static const unsigned char *
328 mn10300_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *bp_addr,
329 int *bp_size)
330 {
331 static gdb_byte breakpoint[] = {0xff};
332 *bp_size = 1;
333 return breakpoint;
334 }
335
336 /* Model the semantics of pushing a register onto the stack. This
337 is a helper function for mn10300_analyze_prologue, below. */
338 static void
339 push_reg (pv_t *regs, struct pv_area *stack, int regnum)
340 {
341 regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], -4);
342 pv_area_store (stack, regs[E_SP_REGNUM], 4, regs[regnum]);
343 }
344
345 /* Translate an "r" register number extracted from an instruction encoding
346 into a GDB register number. Adapted from a simulator function
347 of the same name; see am33.igen. */
348 static int
349 translate_rreg (int rreg)
350 {
351 /* The higher register numbers actually correspond to the
352 basic machine's address and data registers. */
353 if (rreg > 7 && rreg < 12)
354 return E_A0_REGNUM + rreg - 8;
355 else if (rreg > 11 && rreg < 16)
356 return E_D0_REGNUM + rreg - 12;
357 else
358 return E_E0_REGNUM + rreg;
359 }
360
361 /* Find saved registers in a 'struct pv_area'; we pass this to pv_area_scan.
362
363 If VALUE is a saved register, ADDR says it was saved at a constant
364 offset from the frame base, and SIZE indicates that the whole
365 register was saved, record its offset in RESULT_UNTYPED. */
366 static void
367 check_for_saved (void *result_untyped, pv_t addr, CORE_ADDR size, pv_t value)
368 {
369 struct mn10300_prologue *result = (struct mn10300_prologue *) result_untyped;
370
371 if (value.kind == pvk_register
372 && value.k == 0
373 && pv_is_register (addr, E_SP_REGNUM)
374 && size == register_size (result->gdbarch, value.reg))
375 result->reg_offset[value.reg] = addr.k;
376 }
377
378 /* Analyze the prologue to determine where registers are saved,
379 the end of the prologue, etc. The result of this analysis is
380 returned in RESULT. See struct mn10300_prologue above for more
381 information. */
382 static void
383 mn10300_analyze_prologue (struct gdbarch *gdbarch,
384 CORE_ADDR start_pc, CORE_ADDR limit_pc,
385 struct mn10300_prologue *result)
386 {
387 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
388 CORE_ADDR pc;
389 int rn;
390 pv_t regs[MN10300_MAX_NUM_REGS];
391 struct pv_area *stack;
392 struct cleanup *back_to;
393 CORE_ADDR after_last_frame_setup_insn = start_pc;
394 int am33_mode = AM33_MODE (gdbarch);
395
396 memset (result, 0, sizeof (*result));
397 result->gdbarch = gdbarch;
398
399 for (rn = 0; rn < MN10300_MAX_NUM_REGS; rn++)
400 {
401 regs[rn] = pv_register (rn, 0);
402 result->reg_offset[rn] = 1;
403 }
404 stack = make_pv_area (E_SP_REGNUM, gdbarch_addr_bit (gdbarch));
405 back_to = make_cleanup_free_pv_area (stack);
406
407 /* The typical call instruction will have saved the return address on the
408 stack. Space for the return address has already been preallocated in
409 the caller's frame. It's possible, such as when using -mrelax with gcc
410 that other registers were saved as well. If this happens, we really
411 have no chance of deciphering the frame. DWARF info can save the day
412 when this happens. */
413 pv_area_store (stack, regs[E_SP_REGNUM], 4, regs[E_PC_REGNUM]);
414
415 pc = start_pc;
416 while (pc < limit_pc)
417 {
418 int status;
419 gdb_byte instr[2];
420
421 /* Instructions can be as small as one byte; however, we usually
422 need at least two bytes to do the decoding, so fetch that many
423 to begin with. */
424 status = target_read_memory (pc, instr, 2);
425 if (status != 0)
426 break;
427
428 /* movm [regs], sp */
429 if (instr[0] == 0xcf)
430 {
431 gdb_byte save_mask;
432
433 save_mask = instr[1];
434
435 if ((save_mask & movm_exreg0_bit) && am33_mode)
436 {
437 push_reg (regs, stack, E_E2_REGNUM);
438 push_reg (regs, stack, E_E3_REGNUM);
439 }
440 if ((save_mask & movm_exreg1_bit) && am33_mode)
441 {
442 push_reg (regs, stack, E_E4_REGNUM);
443 push_reg (regs, stack, E_E5_REGNUM);
444 push_reg (regs, stack, E_E6_REGNUM);
445 push_reg (regs, stack, E_E7_REGNUM);
446 }
447 if ((save_mask & movm_exother_bit) && am33_mode)
448 {
449 push_reg (regs, stack, E_E0_REGNUM);
450 push_reg (regs, stack, E_E1_REGNUM);
451 push_reg (regs, stack, E_MDRQ_REGNUM);
452 push_reg (regs, stack, E_MCRH_REGNUM);
453 push_reg (regs, stack, E_MCRL_REGNUM);
454 push_reg (regs, stack, E_MCVF_REGNUM);
455 }
456 if (save_mask & movm_d2_bit)
457 push_reg (regs, stack, E_D2_REGNUM);
458 if (save_mask & movm_d3_bit)
459 push_reg (regs, stack, E_D3_REGNUM);
460 if (save_mask & movm_a2_bit)
461 push_reg (regs, stack, E_A2_REGNUM);
462 if (save_mask & movm_a3_bit)
463 push_reg (regs, stack, E_A3_REGNUM);
464 if (save_mask & movm_other_bit)
465 {
466 push_reg (regs, stack, E_D0_REGNUM);
467 push_reg (regs, stack, E_D1_REGNUM);
468 push_reg (regs, stack, E_A0_REGNUM);
469 push_reg (regs, stack, E_A1_REGNUM);
470 push_reg (regs, stack, E_MDR_REGNUM);
471 push_reg (regs, stack, E_LIR_REGNUM);
472 push_reg (regs, stack, E_LAR_REGNUM);
473 /* The `other' bit leaves a blank area of four bytes at
474 the beginning of its block of saved registers, making
475 it 32 bytes long in total. */
476 regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], -4);
477 }
478
479 pc += 2;
480 after_last_frame_setup_insn = pc;
481 }
482 /* mov sp, aN */
483 else if ((instr[0] & 0xfc) == 0x3c)
484 {
485 int aN = instr[0] & 0x03;
486
487 regs[E_A0_REGNUM + aN] = regs[E_SP_REGNUM];
488
489 pc += 1;
490 if (aN == 3)
491 after_last_frame_setup_insn = pc;
492 }
493 /* mov aM, aN */
494 else if ((instr[0] & 0xf0) == 0x90
495 && (instr[0] & 0x03) != ((instr[0] & 0x0c) >> 2))
496 {
497 int aN = instr[0] & 0x03;
498 int aM = (instr[0] & 0x0c) >> 2;
499
500 regs[E_A0_REGNUM + aN] = regs[E_A0_REGNUM + aM];
501
502 pc += 1;
503 }
504 /* mov dM, dN */
505 else if ((instr[0] & 0xf0) == 0x80
506 && (instr[0] & 0x03) != ((instr[0] & 0x0c) >> 2))
507 {
508 int dN = instr[0] & 0x03;
509 int dM = (instr[0] & 0x0c) >> 2;
510
511 regs[E_D0_REGNUM + dN] = regs[E_D0_REGNUM + dM];
512
513 pc += 1;
514 }
515 /* mov aM, dN */
516 else if (instr[0] == 0xf1 && (instr[1] & 0xf0) == 0xd0)
517 {
518 int dN = instr[1] & 0x03;
519 int aM = (instr[1] & 0x0c) >> 2;
520
521 regs[E_D0_REGNUM + dN] = regs[E_A0_REGNUM + aM];
522
523 pc += 2;
524 }
525 /* mov dM, aN */
526 else if (instr[0] == 0xf1 && (instr[1] & 0xf0) == 0xe0)
527 {
528 int aN = instr[1] & 0x03;
529 int dM = (instr[1] & 0x0c) >> 2;
530
531 regs[E_A0_REGNUM + aN] = regs[E_D0_REGNUM + dM];
532
533 pc += 2;
534 }
535 /* add imm8, SP */
536 else if (instr[0] == 0xf8 && instr[1] == 0xfe)
537 {
538 gdb_byte buf[1];
539 LONGEST imm8;
540
541
542 status = target_read_memory (pc + 2, buf, 1);
543 if (status != 0)
544 break;
545
546 imm8 = extract_signed_integer (buf, 1, byte_order);
547 regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], imm8);
548
549 pc += 3;
550 /* Stack pointer adjustments are frame related. */
551 after_last_frame_setup_insn = pc;
552 }
553 /* add imm16, SP */
554 else if (instr[0] == 0xfa && instr[1] == 0xfe)
555 {
556 gdb_byte buf[2];
557 LONGEST imm16;
558
559 status = target_read_memory (pc + 2, buf, 2);
560 if (status != 0)
561 break;
562
563 imm16 = extract_signed_integer (buf, 2, byte_order);
564 regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], imm16);
565
566 pc += 4;
567 /* Stack pointer adjustments are frame related. */
568 after_last_frame_setup_insn = pc;
569 }
570 /* add imm32, SP */
571 else if (instr[0] == 0xfc && instr[1] == 0xfe)
572 {
573 gdb_byte buf[4];
574 LONGEST imm32;
575
576 status = target_read_memory (pc + 2, buf, 4);
577 if (status != 0)
578 break;
579
580
581 imm32 = extract_signed_integer (buf, 4, byte_order);
582 regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], imm32);
583
584 pc += 6;
585 /* Stack pointer adjustments are frame related. */
586 after_last_frame_setup_insn = pc;
587 }
588 /* add imm8, aN */
589 else if ((instr[0] & 0xfc) == 0x20)
590 {
591 int aN;
592 LONGEST imm8;
593
594 aN = instr[0] & 0x03;
595 imm8 = extract_signed_integer (&instr[1], 1, byte_order);
596
597 regs[E_A0_REGNUM + aN] = pv_add_constant (regs[E_A0_REGNUM + aN],
598 imm8);
599
600 pc += 2;
601 }
602 /* add imm16, aN */
603 else if (instr[0] == 0xfa && (instr[1] & 0xfc) == 0xd0)
604 {
605 int aN;
606 LONGEST imm16;
607 gdb_byte buf[2];
608
609 aN = instr[1] & 0x03;
610
611 status = target_read_memory (pc + 2, buf, 2);
612 if (status != 0)
613 break;
614
615
616 imm16 = extract_signed_integer (buf, 2, byte_order);
617
618 regs[E_A0_REGNUM + aN] = pv_add_constant (regs[E_A0_REGNUM + aN],
619 imm16);
620
621 pc += 4;
622 }
623 /* add imm32, aN */
624 else if (instr[0] == 0xfc && (instr[1] & 0xfc) == 0xd0)
625 {
626 int aN;
627 LONGEST imm32;
628 gdb_byte buf[4];
629
630 aN = instr[1] & 0x03;
631
632 status = target_read_memory (pc + 2, buf, 4);
633 if (status != 0)
634 break;
635
636 imm32 = extract_signed_integer (buf, 2, byte_order);
637
638 regs[E_A0_REGNUM + aN] = pv_add_constant (regs[E_A0_REGNUM + aN],
639 imm32);
640 pc += 6;
641 }
642 /* fmov fsM, (rN) */
643 else if (instr[0] == 0xf9 && (instr[1] & 0xfd) == 0x30)
644 {
645 int fsM, sM, Y, rN;
646 gdb_byte buf[1];
647
648 Y = (instr[1] & 0x02) >> 1;
649
650 status = target_read_memory (pc + 2, buf, 1);
651 if (status != 0)
652 break;
653
654 sM = (buf[0] & 0xf0) >> 4;
655 rN = buf[0] & 0x0f;
656 fsM = (Y << 4) | sM;
657
658 pv_area_store (stack, regs[translate_rreg (rN)], 4,
659 regs[E_FS0_REGNUM + fsM]);
660
661 pc += 3;
662 }
663 /* fmov fsM, (sp) */
664 else if (instr[0] == 0xf9 && (instr[1] & 0xfd) == 0x34)
665 {
666 int fsM, sM, Y;
667 gdb_byte buf[1];
668
669 Y = (instr[1] & 0x02) >> 1;
670
671 status = target_read_memory (pc + 2, buf, 1);
672 if (status != 0)
673 break;
674
675 sM = (buf[0] & 0xf0) >> 4;
676 fsM = (Y << 4) | sM;
677
678 pv_area_store (stack, regs[E_SP_REGNUM], 4,
679 regs[E_FS0_REGNUM + fsM]);
680
681 pc += 3;
682 }
683 /* fmov fsM, (rN, rI) */
684 else if (instr[0] == 0xfb && instr[1] == 0x37)
685 {
686 int fsM, sM, Z, rN, rI;
687 gdb_byte buf[2];
688
689
690 status = target_read_memory (pc + 2, buf, 2);
691 if (status != 0)
692 break;
693
694 rI = (buf[0] & 0xf0) >> 4;
695 rN = buf[0] & 0x0f;
696 sM = (buf[1] & 0xf0) >> 4;
697 Z = (buf[1] & 0x02) >> 1;
698 fsM = (Z << 4) | sM;
699
700 pv_area_store (stack,
701 pv_add (regs[translate_rreg (rN)],
702 regs[translate_rreg (rI)]),
703 4, regs[E_FS0_REGNUM + fsM]);
704
705 pc += 4;
706 }
707 /* fmov fsM, (d8, rN) */
708 else if (instr[0] == 0xfb && (instr[1] & 0xfd) == 0x30)
709 {
710 int fsM, sM, Y, rN;
711 LONGEST d8;
712 gdb_byte buf[2];
713
714 Y = (instr[1] & 0x02) >> 1;
715
716 status = target_read_memory (pc + 2, buf, 2);
717 if (status != 0)
718 break;
719
720 sM = (buf[0] & 0xf0) >> 4;
721 rN = buf[0] & 0x0f;
722 fsM = (Y << 4) | sM;
723 d8 = extract_signed_integer (&buf[1], 1, byte_order);
724
725 pv_area_store (stack,
726 pv_add_constant (regs[translate_rreg (rN)], d8),
727 4, regs[E_FS0_REGNUM + fsM]);
728
729 pc += 4;
730 }
731 /* fmov fsM, (d24, rN) */
732 else if (instr[0] == 0xfd && (instr[1] & 0xfd) == 0x30)
733 {
734 int fsM, sM, Y, rN;
735 LONGEST d24;
736 gdb_byte buf[4];
737
738 Y = (instr[1] & 0x02) >> 1;
739
740 status = target_read_memory (pc + 2, buf, 4);
741 if (status != 0)
742 break;
743
744 sM = (buf[0] & 0xf0) >> 4;
745 rN = buf[0] & 0x0f;
746 fsM = (Y << 4) | sM;
747 d24 = extract_signed_integer (&buf[1], 3, byte_order);
748
749 pv_area_store (stack,
750 pv_add_constant (regs[translate_rreg (rN)], d24),
751 4, regs[E_FS0_REGNUM + fsM]);
752
753 pc += 6;
754 }
755 /* fmov fsM, (d32, rN) */
756 else if (instr[0] == 0xfe && (instr[1] & 0xfd) == 0x30)
757 {
758 int fsM, sM, Y, rN;
759 LONGEST d32;
760 gdb_byte buf[5];
761
762 Y = (instr[1] & 0x02) >> 1;
763
764 status = target_read_memory (pc + 2, buf, 5);
765 if (status != 0)
766 break;
767
768 sM = (buf[0] & 0xf0) >> 4;
769 rN = buf[0] & 0x0f;
770 fsM = (Y << 4) | sM;
771 d32 = extract_signed_integer (&buf[1], 4, byte_order);
772
773 pv_area_store (stack,
774 pv_add_constant (regs[translate_rreg (rN)], d32),
775 4, regs[E_FS0_REGNUM + fsM]);
776
777 pc += 7;
778 }
779 /* fmov fsM, (d8, SP) */
780 else if (instr[0] == 0xfb && (instr[1] & 0xfd) == 0x34)
781 {
782 int fsM, sM, Y;
783 LONGEST d8;
784 gdb_byte buf[2];
785
786 Y = (instr[1] & 0x02) >> 1;
787
788 status = target_read_memory (pc + 2, buf, 2);
789 if (status != 0)
790 break;
791
792 sM = (buf[0] & 0xf0) >> 4;
793 fsM = (Y << 4) | sM;
794 d8 = extract_signed_integer (&buf[1], 1, byte_order);
795
796 pv_area_store (stack,
797 pv_add_constant (regs[E_SP_REGNUM], d8),
798 4, regs[E_FS0_REGNUM + fsM]);
799
800 pc += 4;
801 }
802 /* fmov fsM, (d24, SP) */
803 else if (instr[0] == 0xfd && (instr[1] & 0xfd) == 0x34)
804 {
805 int fsM, sM, Y;
806 LONGEST d24;
807 gdb_byte buf[4];
808
809 Y = (instr[1] & 0x02) >> 1;
810
811 status = target_read_memory (pc + 2, buf, 4);
812 if (status != 0)
813 break;
814
815 sM = (buf[0] & 0xf0) >> 4;
816 fsM = (Y << 4) | sM;
817 d24 = extract_signed_integer (&buf[1], 3, byte_order);
818
819 pv_area_store (stack,
820 pv_add_constant (regs[E_SP_REGNUM], d24),
821 4, regs[E_FS0_REGNUM + fsM]);
822
823 pc += 6;
824 }
825 /* fmov fsM, (d32, SP) */
826 else if (instr[0] == 0xfe && (instr[1] & 0xfd) == 0x34)
827 {
828 int fsM, sM, Y;
829 LONGEST d32;
830 gdb_byte buf[5];
831
832 Y = (instr[1] & 0x02) >> 1;
833
834 status = target_read_memory (pc + 2, buf, 5);
835 if (status != 0)
836 break;
837
838 sM = (buf[0] & 0xf0) >> 4;
839 fsM = (Y << 4) | sM;
840 d32 = extract_signed_integer (&buf[1], 4, byte_order);
841
842 pv_area_store (stack,
843 pv_add_constant (regs[E_SP_REGNUM], d32),
844 4, regs[E_FS0_REGNUM + fsM]);
845
846 pc += 7;
847 }
848 /* fmov fsM, (rN+) */
849 else if (instr[0] == 0xf9 && (instr[1] & 0xfd) == 0x31)
850 {
851 int fsM, sM, Y, rN, rN_regnum;
852 gdb_byte buf[1];
853
854 Y = (instr[1] & 0x02) >> 1;
855
856 status = target_read_memory (pc + 2, buf, 1);
857 if (status != 0)
858 break;
859
860 sM = (buf[0] & 0xf0) >> 4;
861 rN = buf[0] & 0x0f;
862 fsM = (Y << 4) | sM;
863
864 rN_regnum = translate_rreg (rN);
865
866 pv_area_store (stack, regs[rN_regnum], 4,
867 regs[E_FS0_REGNUM + fsM]);
868 regs[rN_regnum] = pv_add_constant (regs[rN_regnum], 4);
869
870 pc += 3;
871 }
872 /* fmov fsM, (rN+, imm8) */
873 else if (instr[0] == 0xfb && (instr[1] & 0xfd) == 0x31)
874 {
875 int fsM, sM, Y, rN, rN_regnum;
876 LONGEST imm8;
877 gdb_byte buf[2];
878
879 Y = (instr[1] & 0x02) >> 1;
880
881 status = target_read_memory (pc + 2, buf, 2);
882 if (status != 0)
883 break;
884
885 sM = (buf[0] & 0xf0) >> 4;
886 rN = buf[0] & 0x0f;
887 fsM = (Y << 4) | sM;
888 imm8 = extract_signed_integer (&buf[1], 1, byte_order);
889
890 rN_regnum = translate_rreg (rN);
891
892 pv_area_store (stack, regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
893 regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm8);
894
895 pc += 4;
896 }
897 /* fmov fsM, (rN+, imm24) */
898 else if (instr[0] == 0xfd && (instr[1] & 0xfd) == 0x31)
899 {
900 int fsM, sM, Y, rN, rN_regnum;
901 LONGEST imm24;
902 gdb_byte buf[4];
903
904 Y = (instr[1] & 0x02) >> 1;
905
906 status = target_read_memory (pc + 2, buf, 4);
907 if (status != 0)
908 break;
909
910 sM = (buf[0] & 0xf0) >> 4;
911 rN = buf[0] & 0x0f;
912 fsM = (Y << 4) | sM;
913 imm24 = extract_signed_integer (&buf[1], 3, byte_order);
914
915 rN_regnum = translate_rreg (rN);
916
917 pv_area_store (stack, regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
918 regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm24);
919
920 pc += 6;
921 }
922 /* fmov fsM, (rN+, imm32) */
923 else if (instr[0] == 0xfe && (instr[1] & 0xfd) == 0x31)
924 {
925 int fsM, sM, Y, rN, rN_regnum;
926 LONGEST imm32;
927 gdb_byte buf[5];
928
929 Y = (instr[1] & 0x02) >> 1;
930
931 status = target_read_memory (pc + 2, buf, 5);
932 if (status != 0)
933 break;
934
935 sM = (buf[0] & 0xf0) >> 4;
936 rN = buf[0] & 0x0f;
937 fsM = (Y << 4) | sM;
938 imm32 = extract_signed_integer (&buf[1], 4, byte_order);
939
940 rN_regnum = translate_rreg (rN);
941
942 pv_area_store (stack, regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
943 regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm32);
944
945 pc += 7;
946 }
947 /* mov imm8, aN */
948 else if ((instr[0] & 0xf0) == 0x90)
949 {
950 int aN = instr[0] & 0x03;
951 LONGEST imm8;
952
953 imm8 = extract_signed_integer (&instr[1], 1, byte_order);
954
955 regs[E_A0_REGNUM + aN] = pv_constant (imm8);
956 pc += 2;
957 }
958 /* mov imm16, aN */
959 else if ((instr[0] & 0xfc) == 0x24)
960 {
961 int aN = instr[0] & 0x03;
962 gdb_byte buf[2];
963 LONGEST imm16;
964
965 status = target_read_memory (pc + 1, buf, 2);
966 if (status != 0)
967 break;
968
969 imm16 = extract_signed_integer (buf, 2, byte_order);
970 regs[E_A0_REGNUM + aN] = pv_constant (imm16);
971 pc += 3;
972 }
973 /* mov imm32, aN */
974 else if (instr[0] == 0xfc && ((instr[1] & 0xfc) == 0xdc))
975 {
976 int aN = instr[1] & 0x03;
977 gdb_byte buf[4];
978 LONGEST imm32;
979
980 status = target_read_memory (pc + 2, buf, 4);
981 if (status != 0)
982 break;
983
984 imm32 = extract_signed_integer (buf, 4, byte_order);
985 regs[E_A0_REGNUM + aN] = pv_constant (imm32);
986 pc += 6;
987 }
988 /* mov imm8, dN */
989 else if ((instr[0] & 0xf0) == 0x80)
990 {
991 int dN = instr[0] & 0x03;
992 LONGEST imm8;
993
994 imm8 = extract_signed_integer (&instr[1], 1, byte_order);
995
996 regs[E_D0_REGNUM + dN] = pv_constant (imm8);
997 pc += 2;
998 }
999 /* mov imm16, dN */
1000 else if ((instr[0] & 0xfc) == 0x2c)
1001 {
1002 int dN = instr[0] & 0x03;
1003 gdb_byte buf[2];
1004 LONGEST imm16;
1005
1006 status = target_read_memory (pc + 1, buf, 2);
1007 if (status != 0)
1008 break;
1009
1010 imm16 = extract_signed_integer (buf, 2, byte_order);
1011 regs[E_D0_REGNUM + dN] = pv_constant (imm16);
1012 pc += 3;
1013 }
1014 /* mov imm32, dN */
1015 else if (instr[0] == 0xfc && ((instr[1] & 0xfc) == 0xcc))
1016 {
1017 int dN = instr[1] & 0x03;
1018 gdb_byte buf[4];
1019 LONGEST imm32;
1020
1021 status = target_read_memory (pc + 2, buf, 4);
1022 if (status != 0)
1023 break;
1024
1025 imm32 = extract_signed_integer (buf, 4, byte_order);
1026 regs[E_D0_REGNUM + dN] = pv_constant (imm32);
1027 pc += 6;
1028 }
1029 else
1030 {
1031 /* We've hit some instruction that we don't recognize. Hopefully,
1032 we have enough to do prologue analysis. */
1033 break;
1034 }
1035 }
1036
1037 /* Is the frame size (offset, really) a known constant? */
1038 if (pv_is_register (regs[E_SP_REGNUM], E_SP_REGNUM))
1039 result->frame_size = regs[E_SP_REGNUM].k;
1040
1041 /* Was the frame pointer initialized? */
1042 if (pv_is_register (regs[E_A3_REGNUM], E_SP_REGNUM))
1043 {
1044 result->has_frame_ptr = 1;
1045 result->frame_ptr_offset = regs[E_A3_REGNUM].k;
1046 }
1047
1048 /* Record where all the registers were saved. */
1049 pv_area_scan (stack, check_for_saved, (void *) result);
1050
1051 result->prologue_end = after_last_frame_setup_insn;
1052
1053 do_cleanups (back_to);
1054 }
1055
1056 /* Function: skip_prologue
1057 Return the address of the first inst past the prologue of the function. */
1058
1059 static CORE_ADDR
1060 mn10300_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
1061 {
1062 const char *name;
1063 CORE_ADDR func_addr, func_end;
1064 struct mn10300_prologue p;
1065
1066 /* Try to find the extent of the function that contains PC. */
1067 if (!find_pc_partial_function (pc, &name, &func_addr, &func_end))
1068 return pc;
1069
1070 mn10300_analyze_prologue (gdbarch, pc, func_end, &p);
1071 return p.prologue_end;
1072 }
1073
1074 /* Wrapper for mn10300_analyze_prologue: find the function start;
1075 use the current frame PC as the limit, then
1076 invoke mn10300_analyze_prologue and return its result. */
1077 static struct mn10300_prologue *
1078 mn10300_analyze_frame_prologue (struct frame_info *this_frame,
1079 void **this_prologue_cache)
1080 {
1081 if (!*this_prologue_cache)
1082 {
1083 CORE_ADDR func_start, stop_addr;
1084
1085 *this_prologue_cache = FRAME_OBSTACK_ZALLOC (struct mn10300_prologue);
1086
1087 func_start = get_frame_func (this_frame);
1088 stop_addr = get_frame_pc (this_frame);
1089
1090 /* If we couldn't find any function containing the PC, then
1091 just initialize the prologue cache, but don't do anything. */
1092 if (!func_start)
1093 stop_addr = func_start;
1094
1095 mn10300_analyze_prologue (get_frame_arch (this_frame),
1096 func_start, stop_addr, *this_prologue_cache);
1097 }
1098
1099 return *this_prologue_cache;
1100 }
1101
1102 /* Given the next frame and a prologue cache, return this frame's
1103 base. */
1104 static CORE_ADDR
1105 mn10300_frame_base (struct frame_info *this_frame, void **this_prologue_cache)
1106 {
1107 struct mn10300_prologue *p
1108 = mn10300_analyze_frame_prologue (this_frame, this_prologue_cache);
1109
1110 /* In functions that use alloca, the distance between the stack
1111 pointer and the frame base varies dynamically, so we can't use
1112 the SP plus static information like prologue analysis to find the
1113 frame base. However, such functions must have a frame pointer,
1114 to be able to restore the SP on exit. So whenever we do have a
1115 frame pointer, use that to find the base. */
1116 if (p->has_frame_ptr)
1117 {
1118 CORE_ADDR fp = get_frame_register_unsigned (this_frame, E_A3_REGNUM);
1119 return fp - p->frame_ptr_offset;
1120 }
1121 else
1122 {
1123 CORE_ADDR sp = get_frame_register_unsigned (this_frame, E_SP_REGNUM);
1124 return sp - p->frame_size;
1125 }
1126 }
1127
1128 /* Here is a dummy implementation. */
1129 static struct frame_id
1130 mn10300_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
1131 {
1132 CORE_ADDR sp = get_frame_register_unsigned (this_frame, E_SP_REGNUM);
1133 CORE_ADDR pc = get_frame_register_unsigned (this_frame, E_PC_REGNUM);
1134 return frame_id_build (sp, pc);
1135 }
1136
1137 static void
1138 mn10300_frame_this_id (struct frame_info *this_frame,
1139 void **this_prologue_cache,
1140 struct frame_id *this_id)
1141 {
1142 *this_id = frame_id_build (mn10300_frame_base (this_frame,
1143 this_prologue_cache),
1144 get_frame_func (this_frame));
1145
1146 }
1147
1148 static struct value *
1149 mn10300_frame_prev_register (struct frame_info *this_frame,
1150 void **this_prologue_cache, int regnum)
1151 {
1152 struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (this_frame));
1153 struct mn10300_prologue *p
1154 = mn10300_analyze_frame_prologue (this_frame, this_prologue_cache);
1155 CORE_ADDR frame_base = mn10300_frame_base (this_frame, this_prologue_cache);
1156 int reg_size = register_size (get_frame_arch (this_frame), regnum);
1157
1158 if (regnum == E_SP_REGNUM)
1159 return frame_unwind_got_constant (this_frame, regnum, frame_base);
1160
1161 /* If prologue analysis says we saved this register somewhere,
1162 return a description of the stack slot holding it. */
1163 if (p->reg_offset[regnum] != 1)
1164 return frame_unwind_got_memory (this_frame, regnum,
1165 frame_base + p->reg_offset[regnum]);
1166
1167 /* Otherwise, presume we haven't changed the value of this
1168 register, and get it from the next frame. */
1169 return frame_unwind_got_register (this_frame, regnum, regnum);
1170 }
1171
1172 static const struct frame_unwind mn10300_frame_unwind = {
1173 NORMAL_FRAME,
1174 default_frame_unwind_stop_reason,
1175 mn10300_frame_this_id,
1176 mn10300_frame_prev_register,
1177 NULL,
1178 default_frame_sniffer
1179 };
1180
1181 static CORE_ADDR
1182 mn10300_unwind_pc (struct gdbarch *gdbarch, struct frame_info *this_frame)
1183 {
1184 ULONGEST pc;
1185
1186 pc = frame_unwind_register_unsigned (this_frame, E_PC_REGNUM);
1187 return pc;
1188 }
1189
1190 static CORE_ADDR
1191 mn10300_unwind_sp (struct gdbarch *gdbarch, struct frame_info *this_frame)
1192 {
1193 ULONGEST sp;
1194
1195 sp = frame_unwind_register_unsigned (this_frame, E_SP_REGNUM);
1196 return sp;
1197 }
1198
1199 static void
1200 mn10300_frame_unwind_init (struct gdbarch *gdbarch)
1201 {
1202 dwarf2_append_unwinders (gdbarch);
1203 frame_unwind_append_unwinder (gdbarch, &mn10300_frame_unwind);
1204 set_gdbarch_dummy_id (gdbarch, mn10300_dummy_id);
1205 set_gdbarch_unwind_pc (gdbarch, mn10300_unwind_pc);
1206 set_gdbarch_unwind_sp (gdbarch, mn10300_unwind_sp);
1207 }
1208
1209 /* Function: push_dummy_call
1210 *
1211 * Set up machine state for a target call, including
1212 * function arguments, stack, return address, etc.
1213 *
1214 */
1215
1216 static CORE_ADDR
1217 mn10300_push_dummy_call (struct gdbarch *gdbarch,
1218 struct value *target_func,
1219 struct regcache *regcache,
1220 CORE_ADDR bp_addr,
1221 int nargs, struct value **args,
1222 CORE_ADDR sp,
1223 int struct_return,
1224 CORE_ADDR struct_addr)
1225 {
1226 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1227 const int push_size = register_size (gdbarch, E_PC_REGNUM);
1228 int regs_used;
1229 int len, arg_len;
1230 int stack_offset = 0;
1231 int argnum;
1232 const gdb_byte *val;
1233 gdb_byte valbuf[MAX_REGISTER_SIZE];
1234
1235 /* This should be a nop, but align the stack just in case something
1236 went wrong. Stacks are four byte aligned on the mn10300. */
1237 sp &= ~3;
1238
1239 /* Now make space on the stack for the args.
1240
1241 XXX This doesn't appear to handle pass-by-invisible reference
1242 arguments. */
1243 regs_used = struct_return ? 1 : 0;
1244 for (len = 0, argnum = 0; argnum < nargs; argnum++)
1245 {
1246 arg_len = (TYPE_LENGTH (value_type (args[argnum])) + 3) & ~3;
1247 while (regs_used < 2 && arg_len > 0)
1248 {
1249 regs_used++;
1250 arg_len -= push_size;
1251 }
1252 len += arg_len;
1253 }
1254
1255 /* Allocate stack space. */
1256 sp -= len;
1257
1258 if (struct_return)
1259 {
1260 regs_used = 1;
1261 regcache_cooked_write_unsigned (regcache, E_D0_REGNUM, struct_addr);
1262 }
1263 else
1264 regs_used = 0;
1265
1266 /* Push all arguments onto the stack. */
1267 for (argnum = 0; argnum < nargs; argnum++)
1268 {
1269 /* FIXME what about structs? Unions? */
1270 if (TYPE_CODE (value_type (*args)) == TYPE_CODE_STRUCT
1271 && TYPE_LENGTH (value_type (*args)) > 8)
1272 {
1273 /* Change to pointer-to-type. */
1274 arg_len = push_size;
1275 store_unsigned_integer (valbuf, push_size, byte_order,
1276 value_address (*args));
1277 val = &valbuf[0];
1278 }
1279 else
1280 {
1281 arg_len = TYPE_LENGTH (value_type (*args));
1282 val = value_contents (*args);
1283 }
1284
1285 while (regs_used < 2 && arg_len > 0)
1286 {
1287 regcache_cooked_write_unsigned (regcache, regs_used,
1288 extract_unsigned_integer (val, push_size, byte_order));
1289 val += push_size;
1290 arg_len -= push_size;
1291 regs_used++;
1292 }
1293
1294 while (arg_len > 0)
1295 {
1296 write_memory (sp + stack_offset, val, push_size);
1297 arg_len -= push_size;
1298 val += push_size;
1299 stack_offset += push_size;
1300 }
1301
1302 args++;
1303 }
1304
1305 /* Make space for the flushback area. */
1306 sp -= 8;
1307
1308 /* Push the return address that contains the magic breakpoint. */
1309 sp -= 4;
1310 write_memory_unsigned_integer (sp, push_size, byte_order, bp_addr);
1311
1312 /* The CPU also writes the return address always into the
1313 MDR register on "call". */
1314 regcache_cooked_write_unsigned (regcache, E_MDR_REGNUM, bp_addr);
1315
1316 /* Update $sp. */
1317 regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp);
1318
1319 /* On the mn10300, it's possible to move some of the stack adjustment
1320 and saving of the caller-save registers out of the prologue and
1321 into the call sites. (When using gcc, this optimization can
1322 occur when using the -mrelax switch.) If this occurs, the dwarf2
1323 info will reflect this fact. We can test to see if this is the
1324 case by creating a new frame using the current stack pointer and
1325 the address of the function that we're about to call. We then
1326 unwind SP and see if it's different than the SP of our newly
1327 created frame. If the SP values are the same, the caller is not
1328 expected to allocate any additional stack. On the other hand, if
1329 the SP values are different, the difference determines the
1330 additional stack that must be allocated.
1331
1332 Note that we don't update the return value though because that's
1333 the value of the stack just after pushing the arguments, but prior
1334 to performing the call. This value is needed in order to
1335 construct the frame ID of the dummy call. */
1336 {
1337 CORE_ADDR func_addr = find_function_addr (target_func, NULL);
1338 CORE_ADDR unwound_sp
1339 = mn10300_unwind_sp (gdbarch, create_new_frame (sp, func_addr));
1340 if (sp != unwound_sp)
1341 regcache_cooked_write_unsigned (regcache, E_SP_REGNUM,
1342 sp - (unwound_sp - sp));
1343 }
1344
1345 return sp;
1346 }
1347
1348 /* If DWARF2 is a register number appearing in Dwarf2 debug info, then
1349 mn10300_dwarf2_reg_to_regnum (DWARF2) is the corresponding GDB
1350 register number. Why don't Dwarf2 and GDB use the same numbering?
1351 Who knows? But since people have object files lying around with
1352 the existing Dwarf2 numbering, and other people have written stubs
1353 to work with the existing GDB, neither of them can change. So we
1354 just have to cope. */
1355 static int
1356 mn10300_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int dwarf2)
1357 {
1358 /* This table is supposed to be shaped like the gdbarch_register_name
1359 initializer in gcc/config/mn10300/mn10300.h. Registers which
1360 appear in GCC's numbering, but have no counterpart in GDB's
1361 world, are marked with a -1. */
1362 static int dwarf2_to_gdb[] = {
1363 E_D0_REGNUM, E_D1_REGNUM, E_D2_REGNUM, E_D3_REGNUM,
1364 E_A0_REGNUM, E_A1_REGNUM, E_A2_REGNUM, E_A3_REGNUM,
1365 -1, E_SP_REGNUM,
1366
1367 E_E0_REGNUM, E_E1_REGNUM, E_E2_REGNUM, E_E3_REGNUM,
1368 E_E4_REGNUM, E_E5_REGNUM, E_E6_REGNUM, E_E7_REGNUM,
1369
1370 E_FS0_REGNUM + 0, E_FS0_REGNUM + 1, E_FS0_REGNUM + 2, E_FS0_REGNUM + 3,
1371 E_FS0_REGNUM + 4, E_FS0_REGNUM + 5, E_FS0_REGNUM + 6, E_FS0_REGNUM + 7,
1372
1373 E_FS0_REGNUM + 8, E_FS0_REGNUM + 9, E_FS0_REGNUM + 10, E_FS0_REGNUM + 11,
1374 E_FS0_REGNUM + 12, E_FS0_REGNUM + 13, E_FS0_REGNUM + 14, E_FS0_REGNUM + 15,
1375
1376 E_FS0_REGNUM + 16, E_FS0_REGNUM + 17, E_FS0_REGNUM + 18, E_FS0_REGNUM + 19,
1377 E_FS0_REGNUM + 20, E_FS0_REGNUM + 21, E_FS0_REGNUM + 22, E_FS0_REGNUM + 23,
1378
1379 E_FS0_REGNUM + 24, E_FS0_REGNUM + 25, E_FS0_REGNUM + 26, E_FS0_REGNUM + 27,
1380 E_FS0_REGNUM + 28, E_FS0_REGNUM + 29, E_FS0_REGNUM + 30, E_FS0_REGNUM + 31,
1381
1382 E_MDR_REGNUM, E_PSW_REGNUM, E_PC_REGNUM
1383 };
1384
1385 if (dwarf2 < 0
1386 || dwarf2 >= ARRAY_SIZE (dwarf2_to_gdb))
1387 {
1388 warning (_("Bogus register number in debug info: %d"), dwarf2);
1389 return -1;
1390 }
1391
1392 return dwarf2_to_gdb[dwarf2];
1393 }
1394
1395 static struct gdbarch *
1396 mn10300_gdbarch_init (struct gdbarch_info info,
1397 struct gdbarch_list *arches)
1398 {
1399 struct gdbarch *gdbarch;
1400 struct gdbarch_tdep *tdep;
1401 int num_regs;
1402
1403 arches = gdbarch_list_lookup_by_info (arches, &info);
1404 if (arches != NULL)
1405 return arches->gdbarch;
1406
1407 tdep = xmalloc (sizeof (struct gdbarch_tdep));
1408 gdbarch = gdbarch_alloc (&info, tdep);
1409
1410 switch (info.bfd_arch_info->mach)
1411 {
1412 case 0:
1413 case bfd_mach_mn10300:
1414 set_gdbarch_register_name (gdbarch, mn10300_generic_register_name);
1415 tdep->am33_mode = 0;
1416 num_regs = 32;
1417 break;
1418 case bfd_mach_am33:
1419 set_gdbarch_register_name (gdbarch, am33_register_name);
1420 tdep->am33_mode = 1;
1421 num_regs = 32;
1422 break;
1423 case bfd_mach_am33_2:
1424 set_gdbarch_register_name (gdbarch, am33_2_register_name);
1425 tdep->am33_mode = 2;
1426 num_regs = 64;
1427 set_gdbarch_fp0_regnum (gdbarch, 32);
1428 break;
1429 default:
1430 internal_error (__FILE__, __LINE__,
1431 _("mn10300_gdbarch_init: Unknown mn10300 variant"));
1432 break;
1433 }
1434
1435 /* By default, chars are unsigned. */
1436 set_gdbarch_char_signed (gdbarch, 0);
1437
1438 /* Registers. */
1439 set_gdbarch_num_regs (gdbarch, num_regs);
1440 set_gdbarch_register_type (gdbarch, mn10300_register_type);
1441 set_gdbarch_skip_prologue (gdbarch, mn10300_skip_prologue);
1442 set_gdbarch_read_pc (gdbarch, mn10300_read_pc);
1443 set_gdbarch_write_pc (gdbarch, mn10300_write_pc);
1444 set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM);
1445 set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM);
1446 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, mn10300_dwarf2_reg_to_regnum);
1447
1448 /* Stack unwinding. */
1449 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1450 /* Breakpoints. */
1451 set_gdbarch_breakpoint_from_pc (gdbarch, mn10300_breakpoint_from_pc);
1452 /* decr_pc_after_break? */
1453 /* Disassembly. */
1454 set_gdbarch_print_insn (gdbarch, print_insn_mn10300);
1455
1456 /* Stage 2 */
1457 set_gdbarch_return_value (gdbarch, mn10300_return_value);
1458
1459 /* Stage 3 -- get target calls working. */
1460 set_gdbarch_push_dummy_call (gdbarch, mn10300_push_dummy_call);
1461 /* set_gdbarch_return_value (store, extract) */
1462
1463
1464 mn10300_frame_unwind_init (gdbarch);
1465
1466 /* Hook in ABI-specific overrides, if they have been registered. */
1467 gdbarch_init_osabi (info, gdbarch);
1468
1469 return gdbarch;
1470 }
1471
1472 /* Dump out the mn10300 specific architecture information. */
1473
1474 static void
1475 mn10300_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file)
1476 {
1477 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1478 fprintf_unfiltered (file, "mn10300_dump_tdep: am33_mode = %d\n",
1479 tdep->am33_mode);
1480 }
1481
1482 /* Provide a prototype to silence -Wmissing-prototypes. */
1483 extern initialize_file_ftype _initialize_mn10300_tdep;
1484
1485 void
1486 _initialize_mn10300_tdep (void)
1487 {
1488 gdbarch_register (bfd_arch_mn10300, mn10300_gdbarch_init, mn10300_dump_tdep);
1489 }
1490
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