3ce9b406ee2df35cc267964f76c8b4374704cdea
[deliverable/binutils-gdb.git] / gdb / moxie-tdep.c
1 /* Target-dependent code for Moxie.
2
3 Copyright (C) 2009 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19
20 #include "defs.h"
21 #include "frame.h"
22 #include "frame-unwind.h"
23 #include "frame-base.h"
24 #include "symtab.h"
25 #include "gdbtypes.h"
26 #include "gdbcmd.h"
27 #include "gdbcore.h"
28 #include "gdb_string.h"
29 #include "value.h"
30 #include "inferior.h"
31 #include "symfile.h"
32 #include "objfiles.h"
33 #include "osabi.h"
34 #include "language.h"
35 #include "arch-utils.h"
36 #include "regcache.h"
37 #include "trad-frame.h"
38 #include "dis-asm.h"
39 #include "record.h"
40
41 #include "gdb_assert.h"
42
43 #include "moxie-tdep.h"
44
45 /* Local functions. */
46
47 extern void _initialize_moxie_tdep (void);
48
49 /* Use an invalid address value as 'not available' marker. */
50 enum { REG_UNAVAIL = (CORE_ADDR) -1 };
51
52 struct moxie_frame_cache
53 {
54 /* Base address. */
55 CORE_ADDR base;
56 CORE_ADDR pc;
57 LONGEST framesize;
58 CORE_ADDR saved_regs[MOXIE_NUM_REGS];
59 CORE_ADDR saved_sp;
60 };
61
62 /* Implement the "frame_align" gdbarch method. */
63
64 static CORE_ADDR
65 moxie_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
66 {
67 /* Align to the size of an instruction (so that they can safely be
68 pushed onto the stack. */
69 return sp & ~1;
70 }
71
72 /* Implement the "breakpoint_from_pc" gdbarch method. */
73
74 const static unsigned char *
75 moxie_breakpoint_from_pc (struct gdbarch *gdbarch,
76 CORE_ADDR *pcptr, int *lenptr)
77 {
78 static unsigned char breakpoint[] = { 0x35, 0x00 };
79
80 *lenptr = sizeof (breakpoint);
81 return breakpoint;
82 }
83
84 /* Moxie register names. */
85
86 char *moxie_register_names[] = {
87 "$fp", "$sp", "$r0", "$r1", "$r2",
88 "$r3", "$r4", "$r5", "$r6", "$r7",
89 "$r8", "$r9", "$r10", "$r11", "$r12",
90 "$r13", "$pc", "$cc" };
91
92 /* Implement the "register_name" gdbarch method. */
93
94 static const char *
95 moxie_register_name (struct gdbarch *gdbarch, int reg_nr)
96 {
97 if (reg_nr < 0)
98 return NULL;
99 if (reg_nr >= MOXIE_NUM_REGS)
100 return NULL;
101 return moxie_register_names[reg_nr];
102 }
103
104 /* Implement the "register_type" gdbarch method. */
105
106 static struct type *
107 moxie_register_type (struct gdbarch *gdbarch, int reg_nr)
108 {
109 if (reg_nr == MOXIE_PC_REGNUM)
110 return builtin_type (gdbarch)->builtin_func_ptr;
111 else if (reg_nr == MOXIE_SP_REGNUM || reg_nr == MOXIE_FP_REGNUM)
112 return builtin_type (gdbarch)->builtin_data_ptr;
113 else
114 return builtin_type (gdbarch)->builtin_int32;
115 }
116
117 /* Write into appropriate registers a function return value
118 of type TYPE, given in virtual format. */
119
120 static void
121 moxie_store_return_value (struct type *type, struct regcache *regcache,
122 const void *valbuf)
123 {
124 struct gdbarch *gdbarch = get_regcache_arch (regcache);
125 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
126 CORE_ADDR regval;
127 int len = TYPE_LENGTH (type);
128
129 /* Things always get returned in RET1_REGNUM, RET2_REGNUM. */
130 regval = extract_unsigned_integer (valbuf, len > 4 ? 4 : len, byte_order);
131 regcache_cooked_write_unsigned (regcache, RET1_REGNUM, regval);
132 if (len > 4)
133 {
134 regval = extract_unsigned_integer ((gdb_byte *) valbuf + 4,
135 len - 4, byte_order);
136 regcache_cooked_write_unsigned (regcache, RET1_REGNUM + 1, regval);
137 }
138 }
139
140 /* Decode the instructions within the given address range. Decide
141 when we must have reached the end of the function prologue. If a
142 frame_info pointer is provided, fill in its saved_regs etc.
143
144 Returns the address of the first instruction after the prologue. */
145
146 static CORE_ADDR
147 moxie_analyze_prologue (CORE_ADDR start_addr, CORE_ADDR end_addr,
148 struct moxie_frame_cache *cache,
149 struct frame_info *this_frame)
150 {
151 struct gdbarch *gdbarch = get_frame_arch (this_frame);
152 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
153 CORE_ADDR next_addr;
154 ULONGEST inst, inst2;
155 LONGEST offset;
156 int regnum;
157
158 /* Record where the jsra instruction saves the PC and FP. */
159 cache->saved_regs[MOXIE_PC_REGNUM] = -4;
160 cache->saved_regs[MOXIE_FP_REGNUM] = 0;
161 cache->framesize = 0;
162
163 if (start_addr >= end_addr)
164 return end_addr;
165
166 for (next_addr = start_addr; next_addr < end_addr; )
167 {
168 inst = read_memory_unsigned_integer (next_addr, 2, byte_order);
169
170 /* Match "push $rN" where N is between 2 and 13 inclusive. */
171 if (inst >= 0x0614 && inst <= 0x061f)
172 {
173 regnum = inst & 0x000f;
174 cache->framesize += 4;
175 cache->saved_regs[regnum] = cache->framesize;
176 next_addr += 2;
177 }
178
179 /* Optional stack allocation for args and local vars <= 4
180 byte. */
181 else if (inst == 0x01f0) /* ldi.l $r12, X */
182 {
183 offset = read_memory_integer (next_addr + 2, 4, byte_order);
184 inst2 = read_memory_unsigned_integer (next_addr + 6, 2, byte_order);
185
186 if (inst2 == 0x051f) /* add.l $sp, $r12 */
187 {
188 cache->framesize += offset;
189 }
190
191 return (next_addr + 8);
192 }
193 else /* This is not a prologue instruction. */
194 break;
195 }
196
197 return next_addr;
198 }
199
200 /* Find the end of function prologue. */
201
202 static CORE_ADDR
203 moxie_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
204 {
205 CORE_ADDR func_addr = 0, func_end = 0;
206 char *func_name;
207
208 /* See if we can determine the end of the prologue via the symbol table.
209 If so, then return either PC, or the PC after the prologue, whichever
210 is greater. */
211 if (find_pc_partial_function (pc, &func_name, &func_addr, &func_end))
212 {
213 CORE_ADDR post_prologue_pc
214 = skip_prologue_using_sal (gdbarch, func_addr);
215 if (post_prologue_pc != 0)
216 return max (pc, post_prologue_pc);
217 else
218 {
219 /* Can't determine prologue from the symbol table, need to examine
220 instructions. */
221 struct symtab_and_line sal;
222 struct symbol *sym;
223 struct moxie_frame_cache cache;
224 CORE_ADDR plg_end;
225
226 memset (&cache, 0, sizeof cache);
227
228 plg_end = moxie_analyze_prologue (func_addr,
229 func_end, &cache, NULL);
230 /* Found a function. */
231 sym = lookup_symbol (func_name, NULL, VAR_DOMAIN, NULL);
232 /* Don't use line number debug info for assembly source
233 files. */
234 if (sym && SYMBOL_LANGUAGE (sym) != language_asm)
235 {
236 sal = find_pc_line (func_addr, 0);
237 if (sal.end && sal.end < func_end)
238 {
239 /* Found a line number, use it as end of
240 prologue. */
241 return sal.end;
242 }
243 }
244 /* No useable line symbol. Use result of prologue parsing
245 method. */
246 return plg_end;
247 }
248 }
249
250 /* No function symbol -- just return the PC. */
251 return (CORE_ADDR) pc;
252 }
253
254 struct moxie_unwind_cache
255 {
256 /* The previous frame's inner most stack address. Used as this
257 frame ID's stack_addr. */
258 CORE_ADDR prev_sp;
259 /* The frame's base, optionally used by the high-level debug info. */
260 CORE_ADDR base;
261 int size;
262 /* How far the SP and r13 (FP) have been offset from the start of
263 the stack frame (as defined by the previous frame's stack
264 pointer). */
265 LONGEST sp_offset;
266 LONGEST r13_offset;
267 int uses_frame;
268 /* Table indicating the location of each and every register. */
269 struct trad_frame_saved_reg *saved_regs;
270 };
271
272 /* Implement the "read_pc" gdbarch method. */
273
274 static CORE_ADDR
275 moxie_read_pc (struct regcache *regcache)
276 {
277 ULONGEST pc;
278
279 regcache_cooked_read_unsigned (regcache, MOXIE_PC_REGNUM, &pc);
280 return pc;
281 }
282
283 /* Implement the "write_pc" gdbarch method. */
284
285 static void
286 moxie_write_pc (struct regcache *regcache, CORE_ADDR val)
287 {
288 regcache_cooked_write_unsigned (regcache, MOXIE_PC_REGNUM, val);
289 }
290
291 /* Implement the "unwind_sp" gdbarch method. */
292
293 static CORE_ADDR
294 moxie_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
295 {
296 return frame_unwind_register_unsigned (next_frame, MOXIE_SP_REGNUM);
297 }
298
299 /* Given a return value in `regbuf' with a type `valtype',
300 extract and copy its value into `valbuf'. */
301
302 static void
303 moxie_extract_return_value (struct type *type, struct regcache *regcache,
304 void *dst)
305 {
306 struct gdbarch *gdbarch = get_regcache_arch (regcache);
307 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
308 bfd_byte *valbuf = dst;
309 int len = TYPE_LENGTH (type);
310 ULONGEST tmp;
311
312 /* By using store_unsigned_integer we avoid having to do
313 anything special for small big-endian values. */
314 regcache_cooked_read_unsigned (regcache, RET1_REGNUM, &tmp);
315 store_unsigned_integer (valbuf, (len > 4 ? len - 4 : len), byte_order, tmp);
316
317 /* Ignore return values more than 8 bytes in size because the moxie
318 returns anything more than 8 bytes in the stack. */
319 if (len > 4)
320 {
321 regcache_cooked_read_unsigned (regcache, RET1_REGNUM + 1, &tmp);
322 store_unsigned_integer (valbuf + len - 4, 4, byte_order, tmp);
323 }
324 }
325
326 /* Implement the "return_value" gdbarch method. */
327
328 static enum return_value_convention
329 moxie_return_value (struct gdbarch *gdbarch, struct type *func_type,
330 struct type *valtype, struct regcache *regcache,
331 gdb_byte *readbuf, const gdb_byte *writebuf)
332 {
333 if (TYPE_LENGTH (valtype) > 8)
334 return RETURN_VALUE_STRUCT_CONVENTION;
335 else
336 {
337 if (readbuf != NULL)
338 moxie_extract_return_value (valtype, regcache, readbuf);
339 if (writebuf != NULL)
340 moxie_store_return_value (valtype, regcache, writebuf);
341 return RETURN_VALUE_REGISTER_CONVENTION;
342 }
343 }
344
345 /* Allocate and initialize a moxie_frame_cache object. */
346
347 static struct moxie_frame_cache *
348 moxie_alloc_frame_cache (void)
349 {
350 struct moxie_frame_cache *cache;
351 int i;
352
353 cache = FRAME_OBSTACK_ZALLOC (struct moxie_frame_cache);
354
355 cache->base = 0;
356 cache->saved_sp = 0;
357 cache->pc = 0;
358 cache->framesize = 0;
359 for (i = 0; i < MOXIE_NUM_REGS; ++i)
360 cache->saved_regs[i] = REG_UNAVAIL;
361
362 return cache;
363 }
364
365 /* Populate a moxie_frame_cache object for this_frame. */
366
367 static struct moxie_frame_cache *
368 moxie_frame_cache (struct frame_info *this_frame, void **this_cache)
369 {
370 struct moxie_frame_cache *cache;
371 CORE_ADDR current_pc;
372 int i;
373
374 if (*this_cache)
375 return *this_cache;
376
377 cache = moxie_alloc_frame_cache ();
378 *this_cache = cache;
379
380 cache->base = get_frame_register_unsigned (this_frame, MOXIE_FP_REGNUM);
381 if (cache->base == 0)
382 return cache;
383
384 cache->pc = get_frame_func (this_frame);
385 current_pc = get_frame_pc (this_frame);
386 if (cache->pc)
387 moxie_analyze_prologue (cache->pc, current_pc, cache, this_frame);
388
389 cache->saved_sp = cache->base - cache->framesize;
390
391 for (i = 0; i < MOXIE_NUM_REGS; ++i)
392 if (cache->saved_regs[i] != REG_UNAVAIL)
393 cache->saved_regs[i] = cache->base - cache->saved_regs[i];
394
395 return cache;
396 }
397
398 /* Implement the "unwind_pc" gdbarch method. */
399
400 static CORE_ADDR
401 moxie_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
402 {
403 return frame_unwind_register_unsigned (next_frame, MOXIE_PC_REGNUM);
404 }
405
406 /* Given a GDB frame, determine the address of the calling function's
407 frame. This will be used to create a new GDB frame struct. */
408
409 static void
410 moxie_frame_this_id (struct frame_info *this_frame,
411 void **this_prologue_cache, struct frame_id *this_id)
412 {
413 struct moxie_frame_cache *cache = moxie_frame_cache (this_frame,
414 this_prologue_cache);
415
416 /* This marks the outermost frame. */
417 if (cache->base == 0)
418 return;
419
420 *this_id = frame_id_build (cache->saved_sp, cache->pc);
421 }
422
423 /* Get the value of register regnum in the previous stack frame. */
424
425 static struct value *
426 moxie_frame_prev_register (struct frame_info *this_frame,
427 void **this_prologue_cache, int regnum)
428 {
429 struct moxie_frame_cache *cache = moxie_frame_cache (this_frame,
430 this_prologue_cache);
431
432 gdb_assert (regnum >= 0);
433
434 if (regnum == MOXIE_SP_REGNUM && cache->saved_sp)
435 return frame_unwind_got_constant (this_frame, regnum, cache->saved_sp);
436
437 if (regnum < MOXIE_NUM_REGS && cache->saved_regs[regnum] != REG_UNAVAIL)
438 return frame_unwind_got_memory (this_frame, regnum,
439 cache->saved_regs[regnum]);
440
441 return frame_unwind_got_register (this_frame, regnum, regnum);
442 }
443
444 static const struct frame_unwind moxie_frame_unwind = {
445 NORMAL_FRAME,
446 moxie_frame_this_id,
447 moxie_frame_prev_register,
448 NULL,
449 default_frame_sniffer
450 };
451
452 /* Return the base address of this_frame. */
453
454 static CORE_ADDR
455 moxie_frame_base_address (struct frame_info *this_frame, void **this_cache)
456 {
457 struct moxie_frame_cache *cache = moxie_frame_cache (this_frame,
458 this_cache);
459
460 return cache->base;
461 }
462
463 static const struct frame_base moxie_frame_base = {
464 &moxie_frame_unwind,
465 moxie_frame_base_address,
466 moxie_frame_base_address,
467 moxie_frame_base_address
468 };
469
470 static struct frame_id
471 moxie_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
472 {
473 CORE_ADDR sp = get_frame_register_unsigned (this_frame, MOXIE_SP_REGNUM);
474
475 return frame_id_build (sp, get_frame_pc (this_frame));
476 }
477
478 /* Read an unsigned integer from the inferior, and adjust
479 endianess. */
480 static ULONGEST
481 moxie_process_readu (CORE_ADDR addr, char *buf,
482 int length, enum bfd_endian byte_order)
483 {
484 if (target_read_memory (addr, buf, length))
485 {
486 if (record_debug)
487 printf_unfiltered (_("Process record: error reading memory at "
488 "addr 0x%s len = %d.\n"),
489 paddress (target_gdbarch, addr), length);
490 return -1;
491 }
492
493 return extract_unsigned_integer (buf, length, byte_order);
494 }
495
496 /* Parse the current instruction and record the values of the registers and
497 memory that will be changed in current instruction to "record_arch_list".
498 Return -1 if something wrong. */
499
500 int
501 moxie_process_record (struct gdbarch *gdbarch, struct regcache *regcache,
502 CORE_ADDR addr)
503 {
504 gdb_byte buf[4];
505 uint16_t inst;
506 uint32_t tmpu32;
507 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
508
509 if (record_debug > 1)
510 fprintf_unfiltered (gdb_stdlog, "Process record: moxie_process_record "
511 "addr = 0x%s\n",
512 paddress (target_gdbarch, addr));
513
514 inst = (uint16_t) moxie_process_readu (addr, buf, 2, byte_order);
515
516 /* Decode instruction. */
517 if (inst & (1 << 15))
518 {
519 if (inst & (1 << 14))
520 {
521 /* This is a Form 3 instruction. */
522 int opcode = (inst >> 10 & 0xf);
523
524 switch (opcode)
525 {
526 case 0x00: /* beq */
527 case 0x01: /* bne */
528 case 0x02: /* blt */
529 case 0x03: /* bgt */
530 case 0x04: /* bltu */
531 case 0x05: /* bgtu */
532 case 0x06: /* bge */
533 case 0x07: /* ble */
534 case 0x08: /* bgeu */
535 case 0x09: /* bleu */
536 /* Do nothing. */
537 break;
538 default:
539 {
540 /* Do nothing. */
541 break;
542 }
543 }
544 }
545 else
546 {
547 /* This is a Form 2 instruction. */
548 int opcode = (inst >> 12 & 0x3);
549 switch (opcode)
550 {
551 case 0x00: /* inc */
552 case 0x01: /* dec */
553 case 0x02: /* gsr */
554 {
555 int reg = (inst >> 8) & 0xf;
556 if (record_arch_list_add_reg (regcache, reg))
557 return -1;
558 }
559 break;
560 case 0x03: /* ssr */
561 {
562 /* Do nothing until GDB learns about moxie's special
563 registers. */
564 }
565 break;
566 default:
567 /* Do nothing. */
568 break;
569 }
570 }
571 }
572 else
573 {
574 /* This is a Form 1 instruction. */
575 int opcode = inst >> 8;
576
577 switch (opcode)
578 {
579 case 0x00: /* nop */
580 /* Do nothing. */
581 break;
582 case 0x01: /* ldi.l (immediate) */
583 case 0x02: /* mov (register-to-register) */
584 {
585 int reg = (inst >> 4) & 0xf;
586 if (record_arch_list_add_reg (regcache, reg))
587 return -1;
588 }
589 break;
590 case 0x03: /* jsra */
591 {
592 regcache_raw_read (regcache,
593 MOXIE_SP_REGNUM, (gdb_byte *) & tmpu32);
594 tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32,
595 4, byte_order);
596 if (record_arch_list_add_reg (regcache, MOXIE_FP_REGNUM)
597 || (record_arch_list_add_reg (regcache,
598 MOXIE_SP_REGNUM))
599 || record_arch_list_add_mem (tmpu32 - 12, 12))
600 return -1;
601 }
602 break;
603 case 0x04: /* ret */
604 {
605 if (record_arch_list_add_reg (regcache, MOXIE_FP_REGNUM)
606 || (record_arch_list_add_reg (regcache,
607 MOXIE_SP_REGNUM)))
608 return -1;
609 }
610 break;
611 case 0x05: /* add.l */
612 {
613 int reg = (inst >> 4) & 0xf;
614 if (record_arch_list_add_reg (regcache, reg))
615 return -1;
616 }
617 break;
618 case 0x06: /* push */
619 {
620 int reg = (inst >> 4) & 0xf;
621 regcache_raw_read (regcache, reg, (gdb_byte *) & tmpu32);
622 tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32,
623 4, byte_order);
624 if (record_arch_list_add_reg (regcache, reg)
625 || record_arch_list_add_mem (tmpu32 - 4, 4))
626 return -1;
627 }
628 break;
629 case 0x07: /* pop */
630 {
631 int a = (inst >> 4) & 0xf;
632 int b = inst & 0xf;
633 if (record_arch_list_add_reg (regcache, a)
634 || record_arch_list_add_reg (regcache, b))
635 return -1;
636 }
637 break;
638 case 0x08: /* lda.l */
639 {
640 int reg = (inst >> 4) & 0xf;
641 if (record_arch_list_add_reg (regcache, reg))
642 return -1;
643 }
644 break;
645 case 0x09: /* sta.l */
646 {
647 tmpu32 = (uint32_t) moxie_process_readu (addr+2, buf,
648 4, byte_order);
649 if (record_arch_list_add_mem (tmpu32, 4))
650 return -1;
651 }
652 break;
653 case 0x0a: /* ld.l (register indirect) */
654 {
655 int reg = (inst >> 4) & 0xf;
656 if (record_arch_list_add_reg (regcache, reg))
657 return -1;
658 }
659 break;
660 case 0x0b: /* st.l */
661 {
662 int reg = (inst >> 4) & 0xf;
663 regcache_raw_read (regcache, reg, (gdb_byte *) & tmpu32);
664 tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32,
665 4, byte_order);
666 if (record_arch_list_add_mem (tmpu32, 4))
667 return -1;
668 }
669 break;
670 case 0x0c: /* ldo.l */
671 {
672 int reg = (inst >> 4) & 0xf;
673 if (record_arch_list_add_reg (regcache, reg))
674 return -1;
675 }
676 break;
677 case 0x0d: /* sto.l */
678 {
679 int reg = (inst >> 4) & 0xf;
680 uint32_t offset = (uint32_t) moxie_process_readu (addr+2, buf, 4,
681 byte_order);
682 regcache_raw_read (regcache, reg, (gdb_byte *) & tmpu32);
683 tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32,
684 4, byte_order);
685 tmpu32 += offset;
686 if (record_arch_list_add_mem (tmpu32, 4))
687 return -1;
688 }
689 break;
690 case 0x0e: /* cmp */
691 {
692 if (record_arch_list_add_reg (regcache, MOXIE_CC_REGNUM))
693 return -1;
694 }
695 break;
696 case 0x0f:
697 case 0x10:
698 case 0x11:
699 case 0x12:
700 case 0x13:
701 case 0x14:
702 case 0x15:
703 case 0x16:
704 case 0x17:
705 case 0x18:
706 {
707 /* Do nothing. */
708 break;
709 }
710 case 0x19: /* jsr */
711 {
712 regcache_raw_read (regcache,
713 MOXIE_SP_REGNUM, (gdb_byte *) & tmpu32);
714 tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32,
715 4, byte_order);
716 if (record_arch_list_add_reg (regcache, MOXIE_FP_REGNUM)
717 || (record_arch_list_add_reg (regcache,
718 MOXIE_SP_REGNUM))
719 || record_arch_list_add_mem (tmpu32 - 12, 12))
720 return -1;
721 }
722 break;
723 case 0x1a: /* jmpa */
724 {
725 /* Do nothing. */
726 }
727 break;
728 case 0x1b: /* ldi.b (immediate) */
729 case 0x1c: /* ld.b (register indirect) */
730 case 0x1d: /* lda.b */
731 {
732 int reg = (inst >> 4) & 0xf;
733 if (record_arch_list_add_reg (regcache, reg))
734 return -1;
735 }
736 break;
737 case 0x1e: /* st.b */
738 {
739 int reg = (inst >> 4) & 0xf;
740 regcache_raw_read (regcache, reg, (gdb_byte *) & tmpu32);
741 tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32,
742 4, byte_order);
743 if (record_arch_list_add_mem (tmpu32, 1))
744 return -1;
745 }
746 break;
747 case 0x1f: /* sta.b */
748 {
749 tmpu32 = moxie_process_readu (addr+2, (char *) buf,
750 4, byte_order);
751 if (record_arch_list_add_mem (tmpu32, 1))
752 return -1;
753 }
754 break;
755 case 0x20: /* ldi.s (immediate) */
756 case 0x21: /* ld.s (register indirect) */
757 case 0x22: /* lda.s */
758 {
759 int reg = (inst >> 4) & 0xf;
760 if (record_arch_list_add_reg (regcache, reg))
761 return -1;
762 }
763 break;
764 case 0x23: /* st.s */
765 {
766 int reg = (inst >> 4) & 0xf;
767 regcache_raw_read (regcache, reg, (gdb_byte *) & tmpu32);
768 tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32,
769 4, byte_order);
770 if (record_arch_list_add_mem (tmpu32, 2))
771 return -1;
772 }
773 break;
774 case 0x24: /* sta.s */
775 {
776 tmpu32 = moxie_process_readu (addr+2, (char *) buf,
777 4, byte_order);
778 if (record_arch_list_add_mem (tmpu32, 2))
779 return -1;
780 }
781 break;
782 case 0x25: /* jmp */
783 {
784 /* Do nothing. */
785 }
786 break;
787 case 0x26: /* and */
788 case 0x27: /* lshr */
789 case 0x28: /* ashl */
790 case 0x29: /* sub.l */
791 case 0x2a: /* neg */
792 case 0x2b: /* or */
793 case 0x2c: /* not */
794 case 0x2d: /* ashr */
795 case 0x2e: /* xor */
796 case 0x2f: /* mul.l */
797 {
798 int reg = (inst >> 4) & 0xf;
799 if (record_arch_list_add_reg (regcache, reg))
800 return -1;
801 }
802 break;
803 case 0x30: /* swi */
804 {
805 /* We currently implement support for libgloss'
806 system calls. */
807
808 int inum = moxie_process_readu (addr+2, (char *) buf,
809 4, byte_order);
810
811 switch (inum)
812 {
813 case 0x1: /* SYS_exit */
814 {
815 /* Do nothing. */
816 }
817 break;
818 case 0x2: /* SYS_open */
819 {
820 if (record_arch_list_add_reg (regcache, RET1_REGNUM))
821 return -1;
822 }
823 break;
824 case 0x4: /* SYS_read */
825 {
826 uint32_t length, ptr;
827
828 /* Read buffer pointer is in $r1. */
829 regcache_raw_read (regcache, 3, (gdb_byte *) & ptr);
830 ptr = extract_unsigned_integer ((gdb_byte *) & ptr,
831 4, byte_order);
832
833 /* String length is at 0x12($fp) */
834 regcache_raw_read (regcache,
835 MOXIE_FP_REGNUM, (gdb_byte *) & tmpu32);
836 tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32,
837 4, byte_order);
838 length = moxie_process_readu (tmpu32+20, (char *) buf,
839 4, byte_order);
840
841 if (record_arch_list_add_mem (ptr, length))
842 return -1;
843 }
844 break;
845 case 0x5: /* SYS_write */
846 {
847 if (record_arch_list_add_reg (regcache, RET1_REGNUM))
848 return -1;
849 }
850 break;
851 default:
852 break;
853 }
854 }
855 break;
856 case 0x31: /* div.l */
857 case 0x32: /* udiv.l */
858 case 0x33: /* mod.l */
859 case 0x34: /* umod.l */
860 {
861 int reg = (inst >> 4) & 0xf;
862 if (record_arch_list_add_reg (regcache, reg))
863 return -1;
864 }
865 break;
866 case 0x35: /* brk */
867 /* Do nothing. */
868 break;
869 case 0x36: /* ldo.b */
870 {
871 int reg = (inst >> 4) & 0xf;
872 if (record_arch_list_add_reg (regcache, reg))
873 return -1;
874 }
875 break;
876 case 0x37: /* sto.b */
877 {
878 int reg = (inst >> 4) & 0xf;
879 uint32_t offset = (uint32_t) moxie_process_readu (addr+2, buf, 4,
880 byte_order);
881 regcache_raw_read (regcache, reg, (gdb_byte *) & tmpu32);
882 tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32,
883 4, byte_order);
884 tmpu32 += offset;
885 if (record_arch_list_add_mem (tmpu32, 1))
886 return -1;
887 }
888 break;
889 case 0x38: /* ldo.s */
890 {
891 int reg = (inst >> 4) & 0xf;
892 if (record_arch_list_add_reg (regcache, reg))
893 return -1;
894 }
895 break;
896 case 0x39: /* sto.s */
897 {
898 int reg = (inst >> 4) & 0xf;
899 uint32_t offset = (uint32_t) moxie_process_readu (addr+2, buf, 4,
900 byte_order);
901 regcache_raw_read (regcache, reg, (gdb_byte *) & tmpu32);
902 tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32,
903 4, byte_order);
904 tmpu32 += offset;
905 if (record_arch_list_add_mem (tmpu32, 2))
906 return -1;
907 }
908 break;
909 default:
910 /* Do nothing. */
911 break;
912 }
913 }
914
915 if (record_arch_list_add_reg (regcache, MOXIE_PC_REGNUM))
916 return -1;
917 if (record_arch_list_add_end ())
918 return -1;
919 return 0;
920 }
921
922 /* Allocate and initialize the moxie gdbarch object. */
923
924 static struct gdbarch *
925 moxie_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
926 {
927 struct gdbarch *gdbarch;
928 struct gdbarch_tdep *tdep;
929
930 /* If there is already a candidate, use it. */
931 arches = gdbarch_list_lookup_by_info (arches, &info);
932 if (arches != NULL)
933 return arches->gdbarch;
934
935 /* Allocate space for the new architecture. */
936 tdep = XMALLOC (struct gdbarch_tdep);
937 gdbarch = gdbarch_alloc (&info, tdep);
938
939 set_gdbarch_read_pc (gdbarch, moxie_read_pc);
940 set_gdbarch_write_pc (gdbarch, moxie_write_pc);
941 set_gdbarch_unwind_sp (gdbarch, moxie_unwind_sp);
942
943 set_gdbarch_num_regs (gdbarch, MOXIE_NUM_REGS);
944 set_gdbarch_sp_regnum (gdbarch, MOXIE_SP_REGNUM);
945 set_gdbarch_pc_regnum (gdbarch, MOXIE_PC_REGNUM);
946 set_gdbarch_register_name (gdbarch, moxie_register_name);
947 set_gdbarch_register_type (gdbarch, moxie_register_type);
948
949 set_gdbarch_return_value (gdbarch, moxie_return_value);
950
951 set_gdbarch_skip_prologue (gdbarch, moxie_skip_prologue);
952 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
953 set_gdbarch_breakpoint_from_pc (gdbarch, moxie_breakpoint_from_pc);
954 set_gdbarch_frame_align (gdbarch, moxie_frame_align);
955
956 frame_base_set_default (gdbarch, &moxie_frame_base);
957
958 /* Methods for saving / extracting a dummy frame's ID. The ID's
959 stack address must match the SP value returned by
960 PUSH_DUMMY_CALL, and saved by generic_save_dummy_frame_tos. */
961 set_gdbarch_dummy_id (gdbarch, moxie_dummy_id);
962
963 set_gdbarch_unwind_pc (gdbarch, moxie_unwind_pc);
964
965 set_gdbarch_print_insn (gdbarch, print_insn_moxie);
966
967 /* Hook in ABI-specific overrides, if they have been registered. */
968 gdbarch_init_osabi (info, gdbarch);
969
970 /* Hook in the default unwinders. */
971 frame_unwind_append_unwinder (gdbarch, &moxie_frame_unwind);
972
973 /* Support simple overlay manager. */
974 set_gdbarch_overlay_update (gdbarch, simple_overlay_update);
975
976 /* Support reverse debugging. */
977 set_gdbarch_process_record (gdbarch, moxie_process_record);
978
979 return gdbarch;
980 }
981
982 /* Register this machine's init routine. */
983
984 void
985 _initialize_moxie_tdep (void)
986 {
987 register_gdbarch_init (bfd_arch_moxie, moxie_gdbarch_init);
988 }
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