Fix latent bug in msp430-tdep.c
[deliverable/binutils-gdb.git] / gdb / msp430-tdep.c
1 /* Target-dependent code for the Texas Instruments MSP430 for GDB, the
2 GNU debugger.
3
4 Copyright (C) 2012-2018 Free Software Foundation, Inc.
5
6 Contributed by Red Hat, Inc.
7
8 This file is part of GDB.
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 3 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program. If not, see <http://www.gnu.org/licenses/>. */
22
23 #include "defs.h"
24 #include "arch-utils.h"
25 #include "prologue-value.h"
26 #include "target.h"
27 #include "regcache.h"
28 #include "dis-asm.h"
29 #include "gdbtypes.h"
30 #include "frame.h"
31 #include "frame-unwind.h"
32 #include "frame-base.h"
33 #include "value.h"
34 #include "gdbcore.h"
35 #include "dwarf2-frame.h"
36 #include "reggroups.h"
37
38 #include "elf/msp430.h"
39 #include "opcode/msp430-decode.h"
40 #include "elf-bfd.h"
41
42 /* Register Numbers. */
43
44 enum
45 {
46 MSP430_PC_RAW_REGNUM,
47 MSP430_SP_RAW_REGNUM,
48 MSP430_SR_RAW_REGNUM,
49 MSP430_CG_RAW_REGNUM,
50 MSP430_R4_RAW_REGNUM,
51 MSP430_R5_RAW_REGNUM,
52 MSP430_R6_RAW_REGNUM,
53 MSP430_R7_RAW_REGNUM,
54 MSP430_R8_RAW_REGNUM,
55 MSP430_R9_RAW_REGNUM,
56 MSP430_R10_RAW_REGNUM,
57 MSP430_R11_RAW_REGNUM,
58 MSP430_R12_RAW_REGNUM,
59 MSP430_R13_RAW_REGNUM,
60 MSP430_R14_RAW_REGNUM,
61 MSP430_R15_RAW_REGNUM,
62
63 MSP430_NUM_REGS,
64
65 MSP430_PC_REGNUM = MSP430_NUM_REGS,
66 MSP430_SP_REGNUM,
67 MSP430_SR_REGNUM,
68 MSP430_CG_REGNUM,
69 MSP430_R4_REGNUM,
70 MSP430_R5_REGNUM,
71 MSP430_R6_REGNUM,
72 MSP430_R7_REGNUM,
73 MSP430_R8_REGNUM,
74 MSP430_R9_REGNUM,
75 MSP430_R10_REGNUM,
76 MSP430_R11_REGNUM,
77 MSP430_R12_REGNUM,
78 MSP430_R13_REGNUM,
79 MSP430_R14_REGNUM,
80 MSP430_R15_REGNUM,
81
82 MSP430_NUM_TOTAL_REGS,
83 MSP430_NUM_PSEUDO_REGS = MSP430_NUM_TOTAL_REGS - MSP430_NUM_REGS
84 };
85
86 enum
87 {
88 /* TI MSP430 Architecture. */
89 MSP_ISA_MSP430,
90
91 /* TI MSP430X Architecture. */
92 MSP_ISA_MSP430X
93 };
94
95 enum
96 {
97 /* The small code model limits code addresses to 16 bits. */
98 MSP_SMALL_CODE_MODEL,
99
100 /* The large code model uses 20 bit addresses for function
101 pointers. These are stored in memory using four bytes (32 bits). */
102 MSP_LARGE_CODE_MODEL
103 };
104
105 /* Architecture specific data. */
106
107 struct gdbarch_tdep
108 {
109 /* The ELF header flags specify the multilib used. */
110 int elf_flags;
111
112 /* One of MSP_ISA_MSP430 or MSP_ISA_MSP430X. */
113 int isa;
114
115 /* One of MSP_SMALL_CODE_MODEL or MSP_LARGE_CODE_MODEL. If, at
116 some point, we support different data models too, we'll probably
117 structure things so that we can combine values using logical
118 "or". */
119 int code_model;
120 };
121
122 /* This structure holds the results of a prologue analysis. */
123
124 struct msp430_prologue
125 {
126 /* The offset from the frame base to the stack pointer --- always
127 zero or negative.
128
129 Calling this a "size" is a bit misleading, but given that the
130 stack grows downwards, using offsets for everything keeps one
131 from going completely sign-crazy: you never change anything's
132 sign for an ADD instruction; always change the second operand's
133 sign for a SUB instruction; and everything takes care of
134 itself. */
135 int frame_size;
136
137 /* Non-zero if this function has initialized the frame pointer from
138 the stack pointer, zero otherwise. */
139 int has_frame_ptr;
140
141 /* If has_frame_ptr is non-zero, this is the offset from the frame
142 base to where the frame pointer points. This is always zero or
143 negative. */
144 int frame_ptr_offset;
145
146 /* The address of the first instruction at which the frame has been
147 set up and the arguments are where the debug info says they are
148 --- as best as we can tell. */
149 CORE_ADDR prologue_end;
150
151 /* reg_offset[R] is the offset from the CFA at which register R is
152 saved, or 1 if register R has not been saved. (Real values are
153 always zero or negative.) */
154 int reg_offset[MSP430_NUM_TOTAL_REGS];
155 };
156
157 /* Implement the "register_type" gdbarch method. */
158
159 static struct type *
160 msp430_register_type (struct gdbarch *gdbarch, int reg_nr)
161 {
162 if (reg_nr < MSP430_NUM_REGS)
163 return builtin_type (gdbarch)->builtin_uint32;
164 else if (reg_nr == MSP430_PC_REGNUM)
165 return builtin_type (gdbarch)->builtin_func_ptr;
166 else
167 return builtin_type (gdbarch)->builtin_uint16;
168 }
169
170 /* Implement another version of the "register_type" gdbarch method
171 for msp430x. */
172
173 static struct type *
174 msp430x_register_type (struct gdbarch *gdbarch, int reg_nr)
175 {
176 if (reg_nr < MSP430_NUM_REGS)
177 return builtin_type (gdbarch)->builtin_uint32;
178 else if (reg_nr == MSP430_PC_REGNUM)
179 return builtin_type (gdbarch)->builtin_func_ptr;
180 else
181 return builtin_type (gdbarch)->builtin_uint32;
182 }
183
184 /* Implement the "register_name" gdbarch method. */
185
186 static const char *
187 msp430_register_name (struct gdbarch *gdbarch, int regnr)
188 {
189 static const char *const reg_names[] = {
190 /* Raw registers. */
191 "", "", "", "", "", "", "", "",
192 "", "", "", "", "", "", "", "",
193 /* Pseudo registers. */
194 "pc", "sp", "sr", "cg", "r4", "r5", "r6", "r7",
195 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
196 };
197
198 return reg_names[regnr];
199 }
200
201 /* Implement the "register_reggroup_p" gdbarch method. */
202
203 static int
204 msp430_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
205 struct reggroup *group)
206 {
207 if (group == all_reggroup)
208 return 1;
209
210 /* All other registers are saved and restored. */
211 if (group == save_reggroup || group == restore_reggroup)
212 return (MSP430_NUM_REGS <= regnum && regnum < MSP430_NUM_TOTAL_REGS);
213
214 return group == general_reggroup;
215 }
216
217 /* Implement the "pseudo_register_read" gdbarch method. */
218
219 static enum register_status
220 msp430_pseudo_register_read (struct gdbarch *gdbarch,
221 readable_regcache *regcache,
222 int regnum, gdb_byte *buffer)
223 {
224 if (MSP430_NUM_REGS <= regnum && regnum < MSP430_NUM_TOTAL_REGS)
225 {
226 enum register_status status;
227 ULONGEST val;
228 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
229 int regsize = register_size (gdbarch, regnum);
230 int raw_regnum = regnum - MSP430_NUM_REGS;
231
232 status = regcache->raw_read (raw_regnum, &val);
233 if (status == REG_VALID)
234 store_unsigned_integer (buffer, regsize, byte_order, val);
235
236 return status;
237 }
238 else
239 gdb_assert_not_reached ("invalid pseudo register number");
240 }
241
242 /* Implement the "pseudo_register_write" gdbarch method. */
243
244 static void
245 msp430_pseudo_register_write (struct gdbarch *gdbarch,
246 struct regcache *regcache,
247 int regnum, const gdb_byte *buffer)
248 {
249 if (MSP430_NUM_REGS <= regnum && regnum < MSP430_NUM_TOTAL_REGS)
250
251 {
252 ULONGEST val;
253 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
254 int regsize = register_size (gdbarch, regnum);
255 int raw_regnum = regnum - MSP430_NUM_REGS;
256
257 val = extract_unsigned_integer (buffer, regsize, byte_order);
258 regcache_raw_write_unsigned (regcache, raw_regnum, val);
259
260 }
261 else
262 gdb_assert_not_reached ("invalid pseudo register number");
263 }
264
265 /* Implement the `register_sim_regno' gdbarch method. */
266
267 static int
268 msp430_register_sim_regno (struct gdbarch *gdbarch, int regnum)
269 {
270 gdb_assert (regnum < MSP430_NUM_REGS);
271
272 /* So long as regnum is in [0, RL78_NUM_REGS), it's valid. We
273 just want to override the default here which disallows register
274 numbers which have no names. */
275 return regnum;
276 }
277
278 constexpr gdb_byte msp430_break_insn[] = { 0x43, 0x43 };
279
280 typedef BP_MANIPULATION (msp430_break_insn) msp430_breakpoint;
281
282 /* Define a "handle" struct for fetching the next opcode. */
283
284 struct msp430_get_opcode_byte_handle
285 {
286 CORE_ADDR pc;
287 };
288
289 /* Fetch a byte on behalf of the opcode decoder. HANDLE contains
290 the memory address of the next byte to fetch. If successful,
291 the address in the handle is updated and the byte fetched is
292 returned as the value of the function. If not successful, -1
293 is returned. */
294
295 static int
296 msp430_get_opcode_byte (void *handle)
297 {
298 struct msp430_get_opcode_byte_handle *opcdata
299 = (struct msp430_get_opcode_byte_handle *) handle;
300 int status;
301 gdb_byte byte;
302
303 status = target_read_memory (opcdata->pc, &byte, 1);
304 if (status == 0)
305 {
306 opcdata->pc += 1;
307 return byte;
308 }
309 else
310 return -1;
311 }
312
313 /* Function for finding saved registers in a 'struct pv_area'; this
314 function is passed to pv_area::scan.
315
316 If VALUE is a saved register, ADDR says it was saved at a constant
317 offset from the frame base, and SIZE indicates that the whole
318 register was saved, record its offset. */
319
320 static void
321 check_for_saved (void *result_untyped, pv_t addr, CORE_ADDR size, pv_t value)
322 {
323 struct msp430_prologue *result = (struct msp430_prologue *) result_untyped;
324
325 if (value.kind == pvk_register
326 && value.k == 0
327 && pv_is_register (addr, MSP430_SP_REGNUM)
328 && size == register_size (target_gdbarch (), value.reg))
329 result->reg_offset[value.reg] = addr.k;
330 }
331
332 /* Analyze a prologue starting at START_PC, going no further than
333 LIMIT_PC. Fill in RESULT as appropriate. */
334
335 static void
336 msp430_analyze_prologue (struct gdbarch *gdbarch, CORE_ADDR start_pc,
337 CORE_ADDR limit_pc, struct msp430_prologue *result)
338 {
339 CORE_ADDR pc, next_pc;
340 int rn;
341 pv_t reg[MSP430_NUM_TOTAL_REGS];
342 CORE_ADDR after_last_frame_setup_insn = start_pc;
343 int code_model = gdbarch_tdep (gdbarch)->code_model;
344 int sz;
345
346 memset (result, 0, sizeof (*result));
347
348 for (rn = 0; rn < MSP430_NUM_TOTAL_REGS; rn++)
349 {
350 reg[rn] = pv_register (rn, 0);
351 result->reg_offset[rn] = 1;
352 }
353
354 pv_area stack (MSP430_SP_REGNUM, gdbarch_addr_bit (gdbarch));
355
356 /* The call instruction has saved the return address on the stack. */
357 sz = code_model == MSP_LARGE_CODE_MODEL ? 4 : 2;
358 reg[MSP430_SP_REGNUM] = pv_add_constant (reg[MSP430_SP_REGNUM], -sz);
359 stack.store (reg[MSP430_SP_REGNUM], sz, reg[MSP430_PC_REGNUM]);
360
361 pc = start_pc;
362 while (pc < limit_pc)
363 {
364 int bytes_read;
365 struct msp430_get_opcode_byte_handle opcode_handle;
366 MSP430_Opcode_Decoded opc;
367
368 opcode_handle.pc = pc;
369 bytes_read = msp430_decode_opcode (pc, &opc, msp430_get_opcode_byte,
370 &opcode_handle);
371 next_pc = pc + bytes_read;
372
373 if (opc.id == MSO_push && opc.op[0].type == MSP430_Operand_Register)
374 {
375 int rsrc = opc.op[0].reg;
376
377 reg[MSP430_SP_REGNUM] = pv_add_constant (reg[MSP430_SP_REGNUM], -2);
378 stack.store (reg[MSP430_SP_REGNUM], 2, reg[rsrc]);
379 after_last_frame_setup_insn = next_pc;
380 }
381 else if (opc.id == MSO_push /* PUSHM */
382 && opc.op[0].type == MSP430_Operand_None
383 && opc.op[1].type == MSP430_Operand_Register)
384 {
385 int rsrc = opc.op[1].reg;
386 int count = opc.repeats + 1;
387 int size = opc.size == 16 ? 2 : 4;
388
389 while (count > 0)
390 {
391 reg[MSP430_SP_REGNUM]
392 = pv_add_constant (reg[MSP430_SP_REGNUM], -size);
393 stack.store (reg[MSP430_SP_REGNUM], size, reg[rsrc]);
394 rsrc--;
395 count--;
396 }
397 after_last_frame_setup_insn = next_pc;
398 }
399 else if (opc.id == MSO_sub
400 && opc.op[0].type == MSP430_Operand_Register
401 && opc.op[0].reg == MSR_SP
402 && opc.op[1].type == MSP430_Operand_Immediate)
403 {
404 int addend = opc.op[1].addend;
405
406 reg[MSP430_SP_REGNUM] = pv_add_constant (reg[MSP430_SP_REGNUM],
407 -addend);
408 after_last_frame_setup_insn = next_pc;
409 }
410 else if (opc.id == MSO_mov
411 && opc.op[0].type == MSP430_Operand_Immediate
412 && 12 <= opc.op[0].reg && opc.op[0].reg <= 15)
413 after_last_frame_setup_insn = next_pc;
414 else
415 {
416 /* Terminate the prologue scan. */
417 break;
418 }
419
420 pc = next_pc;
421 }
422
423 /* Is the frame size (offset, really) a known constant? */
424 if (pv_is_register (reg[MSP430_SP_REGNUM], MSP430_SP_REGNUM))
425 result->frame_size = reg[MSP430_SP_REGNUM].k;
426
427 /* Record where all the registers were saved. */
428 stack.scan (check_for_saved, result);
429
430 result->prologue_end = after_last_frame_setup_insn;
431 }
432
433 /* Implement the "skip_prologue" gdbarch method. */
434
435 static CORE_ADDR
436 msp430_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
437 {
438 const char *name;
439 CORE_ADDR func_addr, func_end;
440 struct msp430_prologue p;
441
442 /* Try to find the extent of the function that contains PC. */
443 if (!find_pc_partial_function (pc, &name, &func_addr, &func_end))
444 return pc;
445
446 msp430_analyze_prologue (gdbarch, pc, func_end, &p);
447 return p.prologue_end;
448 }
449
450 /* Implement the "unwind_pc" gdbarch method. */
451
452 static CORE_ADDR
453 msp430_unwind_pc (struct gdbarch *arch, struct frame_info *next_frame)
454 {
455 return frame_unwind_register_unsigned (next_frame, MSP430_PC_REGNUM);
456 }
457
458 /* Implement the "unwind_sp" gdbarch method. */
459
460 static CORE_ADDR
461 msp430_unwind_sp (struct gdbarch *arch, struct frame_info *next_frame)
462 {
463 return frame_unwind_register_unsigned (next_frame, MSP430_SP_REGNUM);
464 }
465
466 /* Given a frame described by THIS_FRAME, decode the prologue of its
467 associated function if there is not cache entry as specified by
468 THIS_PROLOGUE_CACHE. Save the decoded prologue in the cache and
469 return that struct as the value of this function. */
470
471 static struct msp430_prologue *
472 msp430_analyze_frame_prologue (struct frame_info *this_frame,
473 void **this_prologue_cache)
474 {
475 if (!*this_prologue_cache)
476 {
477 CORE_ADDR func_start, stop_addr;
478
479 *this_prologue_cache = FRAME_OBSTACK_ZALLOC (struct msp430_prologue);
480
481 func_start = get_frame_func (this_frame);
482 stop_addr = get_frame_pc (this_frame);
483
484 /* If we couldn't find any function containing the PC, then
485 just initialize the prologue cache, but don't do anything. */
486 if (!func_start)
487 stop_addr = func_start;
488
489 msp430_analyze_prologue (get_frame_arch (this_frame), func_start,
490 stop_addr,
491 (struct msp430_prologue *) *this_prologue_cache);
492 }
493
494 return (struct msp430_prologue *) *this_prologue_cache;
495 }
496
497 /* Given a frame and a prologue cache, return this frame's base. */
498
499 static CORE_ADDR
500 msp430_frame_base (struct frame_info *this_frame, void **this_prologue_cache)
501 {
502 struct msp430_prologue *p
503 = msp430_analyze_frame_prologue (this_frame, this_prologue_cache);
504 CORE_ADDR sp = get_frame_register_unsigned (this_frame, MSP430_SP_REGNUM);
505
506 return sp - p->frame_size;
507 }
508
509 /* Implement the "frame_this_id" method for unwinding frames. */
510
511 static void
512 msp430_this_id (struct frame_info *this_frame,
513 void **this_prologue_cache, struct frame_id *this_id)
514 {
515 *this_id = frame_id_build (msp430_frame_base (this_frame,
516 this_prologue_cache),
517 get_frame_func (this_frame));
518 }
519
520 /* Implement the "frame_prev_register" method for unwinding frames. */
521
522 static struct value *
523 msp430_prev_register (struct frame_info *this_frame,
524 void **this_prologue_cache, int regnum)
525 {
526 struct msp430_prologue *p
527 = msp430_analyze_frame_prologue (this_frame, this_prologue_cache);
528 CORE_ADDR frame_base = msp430_frame_base (this_frame, this_prologue_cache);
529
530 if (regnum == MSP430_SP_REGNUM)
531 return frame_unwind_got_constant (this_frame, regnum, frame_base);
532
533 /* If prologue analysis says we saved this register somewhere,
534 return a description of the stack slot holding it. */
535 else if (p->reg_offset[regnum] != 1)
536 {
537 struct value *rv = frame_unwind_got_memory (this_frame, regnum,
538 frame_base +
539 p->reg_offset[regnum]);
540
541 if (regnum == MSP430_PC_REGNUM)
542 {
543 ULONGEST pc = value_as_long (rv);
544
545 return frame_unwind_got_constant (this_frame, regnum, pc);
546 }
547 return rv;
548 }
549
550 /* Otherwise, presume we haven't changed the value of this
551 register, and get it from the next frame. */
552 else
553 return frame_unwind_got_register (this_frame, regnum, regnum);
554 }
555
556 static const struct frame_unwind msp430_unwind = {
557 NORMAL_FRAME,
558 default_frame_unwind_stop_reason,
559 msp430_this_id,
560 msp430_prev_register,
561 NULL,
562 default_frame_sniffer
563 };
564
565 /* Implement the "dwarf2_reg_to_regnum" gdbarch method. */
566
567 static int
568 msp430_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int reg)
569 {
570 if (reg >= 0 && reg < MSP430_NUM_REGS)
571 return reg + MSP430_NUM_REGS;
572 return -1;
573 }
574
575 /* Implement the "return_value" gdbarch method. */
576
577 static enum return_value_convention
578 msp430_return_value (struct gdbarch *gdbarch,
579 struct value *function,
580 struct type *valtype,
581 struct regcache *regcache,
582 gdb_byte *readbuf, const gdb_byte *writebuf)
583 {
584 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
585 LONGEST valtype_len = TYPE_LENGTH (valtype);
586 int code_model = gdbarch_tdep (gdbarch)->code_model;
587
588 if (TYPE_LENGTH (valtype) > 8
589 || TYPE_CODE (valtype) == TYPE_CODE_STRUCT
590 || TYPE_CODE (valtype) == TYPE_CODE_UNION)
591 return RETURN_VALUE_STRUCT_CONVENTION;
592
593 if (readbuf)
594 {
595 ULONGEST u;
596 int argreg = MSP430_R12_REGNUM;
597 int offset = 0;
598
599 while (valtype_len > 0)
600 {
601 int size = 2;
602
603 if (code_model == MSP_LARGE_CODE_MODEL
604 && TYPE_CODE (valtype) == TYPE_CODE_PTR)
605 {
606 size = 4;
607 }
608
609 regcache_cooked_read_unsigned (regcache, argreg, &u);
610 store_unsigned_integer (readbuf + offset, size, byte_order, u);
611 valtype_len -= size;
612 offset += size;
613 argreg++;
614 }
615 }
616
617 if (writebuf)
618 {
619 ULONGEST u;
620 int argreg = MSP430_R12_REGNUM;
621 int offset = 0;
622
623 while (valtype_len > 0)
624 {
625 int size = 2;
626
627 if (code_model == MSP_LARGE_CODE_MODEL
628 && TYPE_CODE (valtype) == TYPE_CODE_PTR)
629 {
630 size = 4;
631 }
632
633 u = extract_unsigned_integer (writebuf + offset, size, byte_order);
634 regcache_cooked_write_unsigned (regcache, argreg, u);
635 valtype_len -= size;
636 offset += size;
637 argreg++;
638 }
639 }
640
641 return RETURN_VALUE_REGISTER_CONVENTION;
642 }
643
644
645 /* Implement the "frame_align" gdbarch method. */
646
647 static CORE_ADDR
648 msp430_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
649 {
650 return align_down (sp, 2);
651 }
652
653
654 /* Implement the "dummy_id" gdbarch method. */
655
656 static struct frame_id
657 msp430_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
658 {
659 return
660 frame_id_build (get_frame_register_unsigned
661 (this_frame, MSP430_SP_REGNUM),
662 get_frame_pc (this_frame));
663 }
664
665
666 /* Implement the "push_dummy_call" gdbarch method. */
667
668 static CORE_ADDR
669 msp430_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
670 struct regcache *regcache, CORE_ADDR bp_addr,
671 int nargs, struct value **args, CORE_ADDR sp,
672 int struct_return, CORE_ADDR struct_addr)
673 {
674 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
675 int write_pass;
676 int sp_off = 0;
677 CORE_ADDR cfa;
678 int code_model = gdbarch_tdep (gdbarch)->code_model;
679
680 struct type *func_type = value_type (function);
681
682 /* Dereference function pointer types. */
683 while (TYPE_CODE (func_type) == TYPE_CODE_PTR)
684 func_type = TYPE_TARGET_TYPE (func_type);
685
686 /* The end result had better be a function or a method. */
687 gdb_assert (TYPE_CODE (func_type) == TYPE_CODE_FUNC
688 || TYPE_CODE (func_type) == TYPE_CODE_METHOD);
689
690 /* We make two passes; the first does the stack allocation,
691 the second actually stores the arguments. */
692 for (write_pass = 0; write_pass <= 1; write_pass++)
693 {
694 int i;
695 int arg_reg = MSP430_R12_REGNUM;
696 int args_on_stack = 0;
697
698 if (write_pass)
699 sp = align_down (sp - sp_off, 4);
700 sp_off = 0;
701
702 if (struct_return)
703 {
704 if (write_pass)
705 regcache_cooked_write_unsigned (regcache, arg_reg, struct_addr);
706 arg_reg++;
707 }
708
709 /* Push the arguments. */
710 for (i = 0; i < nargs; i++)
711 {
712 struct value *arg = args[i];
713 const gdb_byte *arg_bits = value_contents_all (arg);
714 struct type *arg_type = check_typedef (value_type (arg));
715 ULONGEST arg_size = TYPE_LENGTH (arg_type);
716 int offset;
717 int current_arg_on_stack;
718 gdb_byte struct_addr_buf[4];
719
720 current_arg_on_stack = 0;
721
722 if (TYPE_CODE (arg_type) == TYPE_CODE_STRUCT
723 || TYPE_CODE (arg_type) == TYPE_CODE_UNION)
724 {
725 /* Aggregates of any size are passed by reference. */
726 store_unsigned_integer (struct_addr_buf, 4, byte_order,
727 value_address (arg));
728 arg_bits = struct_addr_buf;
729 arg_size = (code_model == MSP_LARGE_CODE_MODEL) ? 4 : 2;
730 }
731 else
732 {
733 /* Scalars bigger than 8 bytes such as complex doubles are passed
734 on the stack. */
735 if (arg_size > 8)
736 current_arg_on_stack = 1;
737 }
738
739
740 for (offset = 0; offset < arg_size; offset += 2)
741 {
742 /* The condition below prevents 8 byte scalars from being split
743 between registers and memory (stack). It also prevents other
744 splits once the stack has been written to. */
745 if (!current_arg_on_stack
746 && (arg_reg
747 + ((arg_size == 8 || args_on_stack)
748 ? ((arg_size - offset) / 2 - 1)
749 : 0) <= MSP430_R15_REGNUM))
750 {
751 int size = 2;
752
753 if (code_model == MSP_LARGE_CODE_MODEL
754 && (TYPE_CODE (arg_type) == TYPE_CODE_PTR
755 || TYPE_IS_REFERENCE (arg_type)
756 || TYPE_CODE (arg_type) == TYPE_CODE_STRUCT
757 || TYPE_CODE (arg_type) == TYPE_CODE_UNION))
758 {
759 /* When using the large memory model, pointer,
760 reference, struct, and union arguments are
761 passed using the entire register. (As noted
762 earlier, aggregates are always passed by
763 reference.) */
764 if (offset != 0)
765 continue;
766 size = 4;
767 }
768
769 if (write_pass)
770 regcache_cooked_write_unsigned (regcache, arg_reg,
771 extract_unsigned_integer
772 (arg_bits + offset, size,
773 byte_order));
774
775 arg_reg++;
776 }
777 else
778 {
779 if (write_pass)
780 write_memory (sp + sp_off, arg_bits + offset, 2);
781
782 sp_off += 2;
783 args_on_stack = 1;
784 current_arg_on_stack = 1;
785 }
786 }
787 }
788 }
789
790 /* Keep track of the stack address prior to pushing the return address.
791 This is the value that we'll return. */
792 cfa = sp;
793
794 /* Push the return address. */
795 {
796 int sz = (gdbarch_tdep (gdbarch)->code_model == MSP_SMALL_CODE_MODEL)
797 ? 2 : 4;
798 sp = sp - sz;
799 write_memory_unsigned_integer (sp, sz, byte_order, bp_addr);
800 }
801
802 /* Update the stack pointer. */
803 regcache_cooked_write_unsigned (regcache, MSP430_SP_REGNUM, sp);
804
805 return cfa;
806 }
807
808 /* In order to keep code size small, the compiler may create epilogue
809 code through which more than one function epilogue is routed. I.e.
810 the epilogue and return may just be a branch to some common piece of
811 code which is responsible for tearing down the frame and performing
812 the return. These epilog (label) names will have the common prefix
813 defined here. */
814
815 static const char msp430_epilog_name_prefix[] = "__mspabi_func_epilog_";
816
817 /* Implement the "in_return_stub" gdbarch method. */
818
819 static int
820 msp430_in_return_stub (struct gdbarch *gdbarch, CORE_ADDR pc,
821 const char *name)
822 {
823 return (name != NULL
824 && startswith (name, msp430_epilog_name_prefix));
825 }
826
827 /* Implement the "skip_trampoline_code" gdbarch method. */
828 static CORE_ADDR
829 msp430_skip_trampoline_code (struct frame_info *frame, CORE_ADDR pc)
830 {
831 struct bound_minimal_symbol bms;
832 const char *stub_name;
833 struct gdbarch *gdbarch = get_frame_arch (frame);
834
835 bms = lookup_minimal_symbol_by_pc (pc);
836 if (!bms.minsym)
837 return pc;
838
839 stub_name = MSYMBOL_LINKAGE_NAME (bms.minsym);
840
841 if (gdbarch_tdep (gdbarch)->code_model == MSP_SMALL_CODE_MODEL
842 && msp430_in_return_stub (gdbarch, pc, stub_name))
843 {
844 CORE_ADDR sp = get_frame_register_unsigned (frame, MSP430_SP_REGNUM);
845
846 return read_memory_integer
847 (sp + 2 * (stub_name[strlen (msp430_epilog_name_prefix)] - '0'),
848 2, gdbarch_byte_order (gdbarch));
849 }
850
851 return pc;
852 }
853
854 /* Allocate and initialize a gdbarch object. */
855
856 static struct gdbarch *
857 msp430_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
858 {
859 struct gdbarch *gdbarch;
860 struct gdbarch_tdep *tdep;
861 int elf_flags, isa, code_model;
862
863 /* Extract the elf_flags if available. */
864 if (info.abfd != NULL
865 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
866 elf_flags = elf_elfheader (info.abfd)->e_flags;
867 else
868 elf_flags = 0;
869
870 if (info.abfd != NULL)
871 switch (bfd_elf_get_obj_attr_int (info.abfd, OBJ_ATTR_PROC,
872 OFBA_MSPABI_Tag_ISA))
873 {
874 case 1:
875 isa = MSP_ISA_MSP430;
876 code_model = MSP_SMALL_CODE_MODEL;
877 break;
878 case 2:
879 isa = MSP_ISA_MSP430X;
880 switch (bfd_elf_get_obj_attr_int (info.abfd, OBJ_ATTR_PROC,
881 OFBA_MSPABI_Tag_Code_Model))
882 {
883 case 1:
884 code_model = MSP_SMALL_CODE_MODEL;
885 break;
886 case 2:
887 code_model = MSP_LARGE_CODE_MODEL;
888 break;
889 default:
890 internal_error (__FILE__, __LINE__,
891 _("Unknown msp430x code memory model"));
892 break;
893 }
894 break;
895 case 0:
896 /* This can happen when loading a previously dumped data structure.
897 Use the ISA and code model from the current architecture, provided
898 it's compatible. */
899 {
900 struct gdbarch *ca = get_current_arch ();
901 if (ca && gdbarch_bfd_arch_info (ca)->arch == bfd_arch_msp430)
902 {
903 struct gdbarch_tdep *ca_tdep = gdbarch_tdep (ca);
904
905 elf_flags = ca_tdep->elf_flags;
906 isa = ca_tdep->isa;
907 code_model = ca_tdep->code_model;
908 break;
909 }
910 }
911 /* Fall through. */
912 default:
913 error (_("Unknown msp430 isa"));
914 break;
915 }
916 else
917 {
918 isa = MSP_ISA_MSP430;
919 code_model = MSP_SMALL_CODE_MODEL;
920 }
921
922
923 /* Try to find the architecture in the list of already defined
924 architectures. */
925 for (arches = gdbarch_list_lookup_by_info (arches, &info);
926 arches != NULL;
927 arches = gdbarch_list_lookup_by_info (arches->next, &info))
928 {
929 struct gdbarch_tdep *candidate_tdep = gdbarch_tdep (arches->gdbarch);
930
931 if (candidate_tdep->elf_flags != elf_flags
932 || candidate_tdep->isa != isa
933 || candidate_tdep->code_model != code_model)
934 continue;
935
936 return arches->gdbarch;
937 }
938
939 /* None found, create a new architecture from the information
940 provided. */
941 tdep = XCNEW (struct gdbarch_tdep);
942 gdbarch = gdbarch_alloc (&info, tdep);
943 tdep->elf_flags = elf_flags;
944 tdep->isa = isa;
945 tdep->code_model = code_model;
946
947 /* Registers. */
948 set_gdbarch_num_regs (gdbarch, MSP430_NUM_REGS);
949 set_gdbarch_num_pseudo_regs (gdbarch, MSP430_NUM_PSEUDO_REGS);
950 set_gdbarch_register_name (gdbarch, msp430_register_name);
951 if (isa == MSP_ISA_MSP430)
952 set_gdbarch_register_type (gdbarch, msp430_register_type);
953 else
954 set_gdbarch_register_type (gdbarch, msp430x_register_type);
955 set_gdbarch_pc_regnum (gdbarch, MSP430_PC_REGNUM);
956 set_gdbarch_sp_regnum (gdbarch, MSP430_SP_REGNUM);
957 set_gdbarch_register_reggroup_p (gdbarch, msp430_register_reggroup_p);
958 set_gdbarch_pseudo_register_read (gdbarch, msp430_pseudo_register_read);
959 set_gdbarch_pseudo_register_write (gdbarch, msp430_pseudo_register_write);
960 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, msp430_dwarf2_reg_to_regnum);
961 set_gdbarch_register_sim_regno (gdbarch, msp430_register_sim_regno);
962
963 /* Data types. */
964 set_gdbarch_char_signed (gdbarch, 0);
965 set_gdbarch_short_bit (gdbarch, 16);
966 set_gdbarch_int_bit (gdbarch, 16);
967 set_gdbarch_long_bit (gdbarch, 32);
968 set_gdbarch_long_long_bit (gdbarch, 64);
969 if (code_model == MSP_SMALL_CODE_MODEL)
970 {
971 set_gdbarch_ptr_bit (gdbarch, 16);
972 set_gdbarch_addr_bit (gdbarch, 16);
973 }
974 else /* MSP_LARGE_CODE_MODEL */
975 {
976 set_gdbarch_ptr_bit (gdbarch, 32);
977 set_gdbarch_addr_bit (gdbarch, 32);
978 }
979 set_gdbarch_dwarf2_addr_size (gdbarch, 4);
980 set_gdbarch_float_bit (gdbarch, 32);
981 set_gdbarch_float_format (gdbarch, floatformats_ieee_single);
982 set_gdbarch_double_bit (gdbarch, 64);
983 set_gdbarch_long_double_bit (gdbarch, 64);
984 set_gdbarch_double_format (gdbarch, floatformats_ieee_double);
985 set_gdbarch_long_double_format (gdbarch, floatformats_ieee_double);
986
987 /* Breakpoints. */
988 set_gdbarch_breakpoint_kind_from_pc (gdbarch,
989 msp430_breakpoint::kind_from_pc);
990 set_gdbarch_sw_breakpoint_from_kind (gdbarch,
991 msp430_breakpoint::bp_from_kind);
992 set_gdbarch_decr_pc_after_break (gdbarch, 1);
993
994 /* Frames, prologues, etc. */
995 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
996 set_gdbarch_skip_prologue (gdbarch, msp430_skip_prologue);
997 set_gdbarch_unwind_pc (gdbarch, msp430_unwind_pc);
998 set_gdbarch_unwind_sp (gdbarch, msp430_unwind_sp);
999 set_gdbarch_frame_align (gdbarch, msp430_frame_align);
1000 dwarf2_append_unwinders (gdbarch);
1001 frame_unwind_append_unwinder (gdbarch, &msp430_unwind);
1002
1003 /* Dummy frames, return values. */
1004 set_gdbarch_dummy_id (gdbarch, msp430_dummy_id);
1005 set_gdbarch_push_dummy_call (gdbarch, msp430_push_dummy_call);
1006 set_gdbarch_return_value (gdbarch, msp430_return_value);
1007
1008 /* Trampolines. */
1009 set_gdbarch_in_solib_return_trampoline (gdbarch, msp430_in_return_stub);
1010 set_gdbarch_skip_trampoline_code (gdbarch, msp430_skip_trampoline_code);
1011
1012 /* Virtual tables. */
1013 set_gdbarch_vbit_in_delta (gdbarch, 0);
1014
1015 return gdbarch;
1016 }
1017
1018 /* Register the initialization routine. */
1019
1020 void
1021 _initialize_msp430_tdep (void)
1022 {
1023 register_gdbarch_init (bfd_arch_msp430, msp430_gdbarch_init);
1024 }
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