Add some more casts (2/2)
[deliverable/binutils-gdb.git] / gdb / msp430-tdep.c
1 /* Target-dependent code for the Texas Instruments MSP430 for GDB, the
2 GNU debugger.
3
4 Copyright (C) 2012-2015 Free Software Foundation, Inc.
5
6 Contributed by Red Hat, Inc.
7
8 This file is part of GDB.
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 3 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program. If not, see <http://www.gnu.org/licenses/>. */
22
23 #include "defs.h"
24 #include "arch-utils.h"
25 #include "prologue-value.h"
26 #include "target.h"
27 #include "regcache.h"
28 #include "dis-asm.h"
29 #include "gdbtypes.h"
30 #include "frame.h"
31 #include "frame-unwind.h"
32 #include "frame-base.h"
33 #include "value.h"
34 #include "gdbcore.h"
35 #include "dwarf2-frame.h"
36 #include "reggroups.h"
37
38 #include "elf/msp430.h"
39 #include "opcode/msp430-decode.h"
40 #include "elf-bfd.h"
41
42 /* Register Numbers. */
43
44 enum
45 {
46 MSP430_PC_RAW_REGNUM,
47 MSP430_SP_RAW_REGNUM,
48 MSP430_SR_RAW_REGNUM,
49 MSP430_CG_RAW_REGNUM,
50 MSP430_R4_RAW_REGNUM,
51 MSP430_R5_RAW_REGNUM,
52 MSP430_R6_RAW_REGNUM,
53 MSP430_R7_RAW_REGNUM,
54 MSP430_R8_RAW_REGNUM,
55 MSP430_R9_RAW_REGNUM,
56 MSP430_R10_RAW_REGNUM,
57 MSP430_R11_RAW_REGNUM,
58 MSP430_R12_RAW_REGNUM,
59 MSP430_R13_RAW_REGNUM,
60 MSP430_R14_RAW_REGNUM,
61 MSP430_R15_RAW_REGNUM,
62
63 MSP430_NUM_REGS,
64
65 MSP430_PC_REGNUM = MSP430_NUM_REGS,
66 MSP430_SP_REGNUM,
67 MSP430_SR_REGNUM,
68 MSP430_CG_REGNUM,
69 MSP430_R4_REGNUM,
70 MSP430_R5_REGNUM,
71 MSP430_R6_REGNUM,
72 MSP430_R7_REGNUM,
73 MSP430_R8_REGNUM,
74 MSP430_R9_REGNUM,
75 MSP430_R10_REGNUM,
76 MSP430_R11_REGNUM,
77 MSP430_R12_REGNUM,
78 MSP430_R13_REGNUM,
79 MSP430_R14_REGNUM,
80 MSP430_R15_REGNUM,
81
82 MSP430_NUM_TOTAL_REGS,
83 MSP430_NUM_PSEUDO_REGS = MSP430_NUM_TOTAL_REGS - MSP430_NUM_REGS
84 };
85
86 enum
87 {
88 /* TI MSP430 Architecture. */
89 MSP_ISA_MSP430,
90
91 /* TI MSP430X Architecture. */
92 MSP_ISA_MSP430X
93 };
94
95 enum
96 {
97 /* The small code model limits code addresses to 16 bits. */
98 MSP_SMALL_CODE_MODEL,
99
100 /* The large code model uses 20 bit addresses for function
101 pointers. These are stored in memory using four bytes (32 bits). */
102 MSP_LARGE_CODE_MODEL
103 };
104
105 /* Architecture specific data. */
106
107 struct gdbarch_tdep
108 {
109 /* The ELF header flags specify the multilib used. */
110 int elf_flags;
111
112 /* One of MSP_ISA_MSP430 or MSP_ISA_MSP430X. */
113 int isa;
114
115 /* One of MSP_SMALL_CODE_MODEL or MSP_LARGE_CODE_MODEL. If, at
116 some point, we support different data models too, we'll probably
117 structure things so that we can combine values using logical
118 "or". */
119 int code_model;
120 };
121
122 /* This structure holds the results of a prologue analysis. */
123
124 struct msp430_prologue
125 {
126 /* The offset from the frame base to the stack pointer --- always
127 zero or negative.
128
129 Calling this a "size" is a bit misleading, but given that the
130 stack grows downwards, using offsets for everything keeps one
131 from going completely sign-crazy: you never change anything's
132 sign for an ADD instruction; always change the second operand's
133 sign for a SUB instruction; and everything takes care of
134 itself. */
135 int frame_size;
136
137 /* Non-zero if this function has initialized the frame pointer from
138 the stack pointer, zero otherwise. */
139 int has_frame_ptr;
140
141 /* If has_frame_ptr is non-zero, this is the offset from the frame
142 base to where the frame pointer points. This is always zero or
143 negative. */
144 int frame_ptr_offset;
145
146 /* The address of the first instruction at which the frame has been
147 set up and the arguments are where the debug info says they are
148 --- as best as we can tell. */
149 CORE_ADDR prologue_end;
150
151 /* reg_offset[R] is the offset from the CFA at which register R is
152 saved, or 1 if register R has not been saved. (Real values are
153 always zero or negative.) */
154 int reg_offset[MSP430_NUM_TOTAL_REGS];
155 };
156
157 /* Implement the "register_type" gdbarch method. */
158
159 static struct type *
160 msp430_register_type (struct gdbarch *gdbarch, int reg_nr)
161 {
162 if (reg_nr < MSP430_NUM_REGS)
163 return builtin_type (gdbarch)->builtin_uint32;
164 else if (reg_nr == MSP430_PC_REGNUM)
165 return builtin_type (gdbarch)->builtin_func_ptr;
166 else
167 return builtin_type (gdbarch)->builtin_uint16;
168 }
169
170 /* Implement another version of the "register_type" gdbarch method
171 for msp430x. */
172
173 static struct type *
174 msp430x_register_type (struct gdbarch *gdbarch, int reg_nr)
175 {
176 if (reg_nr < MSP430_NUM_REGS)
177 return builtin_type (gdbarch)->builtin_uint32;
178 else if (reg_nr == MSP430_PC_REGNUM)
179 return builtin_type (gdbarch)->builtin_func_ptr;
180 else
181 return builtin_type (gdbarch)->builtin_uint32;
182 }
183
184 /* Implement the "register_name" gdbarch method. */
185
186 static const char *
187 msp430_register_name (struct gdbarch *gdbarch, int regnr)
188 {
189 static const char *const reg_names[] = {
190 /* Raw registers. */
191 "", "", "", "", "", "", "", "",
192 "", "", "", "", "", "", "", "",
193 /* Pseudo registers. */
194 "pc", "sp", "sr", "cg", "r4", "r5", "r6", "r7",
195 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
196 };
197
198 return reg_names[regnr];
199 }
200
201 /* Implement the "register_reggroup_p" gdbarch method. */
202
203 static int
204 msp430_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
205 struct reggroup *group)
206 {
207 if (group == all_reggroup)
208 return 1;
209
210 /* All other registers are saved and restored. */
211 if (group == save_reggroup || group == restore_reggroup)
212 return (MSP430_NUM_REGS <= regnum && regnum < MSP430_NUM_TOTAL_REGS);
213
214 return group == general_reggroup;
215 }
216
217 /* Implement the "pseudo_register_read" gdbarch method. */
218
219 static enum register_status
220 msp430_pseudo_register_read (struct gdbarch *gdbarch,
221 struct regcache *regcache,
222 int regnum, gdb_byte *buffer)
223 {
224 enum register_status status = REG_UNKNOWN;
225
226 if (MSP430_NUM_REGS <= regnum && regnum < MSP430_NUM_TOTAL_REGS)
227 {
228 ULONGEST val;
229 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
230 int regsize = register_size (gdbarch, regnum);
231 int raw_regnum = regnum - MSP430_NUM_REGS;
232
233 status = regcache_raw_read_unsigned (regcache, raw_regnum, &val);
234 if (status == REG_VALID)
235 store_unsigned_integer (buffer, regsize, byte_order, val);
236
237 }
238 else
239 gdb_assert_not_reached ("invalid pseudo register number");
240
241 return status;
242 }
243
244 /* Implement the "pseudo_register_write" gdbarch method. */
245
246 static void
247 msp430_pseudo_register_write (struct gdbarch *gdbarch,
248 struct regcache *regcache,
249 int regnum, const gdb_byte *buffer)
250 {
251 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
252 if (MSP430_NUM_REGS <= regnum && regnum < MSP430_NUM_TOTAL_REGS)
253
254 {
255 ULONGEST val;
256 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
257 int regsize = register_size (gdbarch, regnum);
258 int raw_regnum = regnum - MSP430_NUM_REGS;
259
260 val = extract_unsigned_integer (buffer, regsize, byte_order);
261 regcache_raw_write_unsigned (regcache, raw_regnum, val);
262
263 }
264 else
265 gdb_assert_not_reached ("invalid pseudo register number");
266 }
267
268 /* Implement the `register_sim_regno' gdbarch method. */
269
270 static int
271 msp430_register_sim_regno (struct gdbarch *gdbarch, int regnum)
272 {
273 gdb_assert (regnum < MSP430_NUM_REGS);
274
275 /* So long as regnum is in [0, RL78_NUM_REGS), it's valid. We
276 just want to override the default here which disallows register
277 numbers which have no names. */
278 return regnum;
279 }
280
281 /* Implement the "breakpoint_from_pc" gdbarch method. */
282
283 static const gdb_byte *
284 msp430_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr,
285 int *lenptr)
286 {
287 static gdb_byte breakpoint[] = { 0x43, 0x43 };
288
289 *lenptr = sizeof breakpoint;
290 return breakpoint;
291 }
292
293 /* Define a "handle" struct for fetching the next opcode. */
294
295 struct msp430_get_opcode_byte_handle
296 {
297 CORE_ADDR pc;
298 };
299
300 /* Fetch a byte on behalf of the opcode decoder. HANDLE contains
301 the memory address of the next byte to fetch. If successful,
302 the address in the handle is updated and the byte fetched is
303 returned as the value of the function. If not successful, -1
304 is returned. */
305
306 static int
307 msp430_get_opcode_byte (void *handle)
308 {
309 struct msp430_get_opcode_byte_handle *opcdata
310 = (struct msp430_get_opcode_byte_handle *) handle;
311 int status;
312 gdb_byte byte;
313
314 status = target_read_memory (opcdata->pc, &byte, 1);
315 if (status == 0)
316 {
317 opcdata->pc += 1;
318 return byte;
319 }
320 else
321 return -1;
322 }
323
324 /* Function for finding saved registers in a 'struct pv_area'; this
325 function is passed to pv_area_scan.
326
327 If VALUE is a saved register, ADDR says it was saved at a constant
328 offset from the frame base, and SIZE indicates that the whole
329 register was saved, record its offset. */
330
331 static void
332 check_for_saved (void *result_untyped, pv_t addr, CORE_ADDR size, pv_t value)
333 {
334 struct msp430_prologue *result = (struct msp430_prologue *) result_untyped;
335
336 if (value.kind == pvk_register
337 && value.k == 0
338 && pv_is_register (addr, MSP430_SP_REGNUM)
339 && size == register_size (target_gdbarch (), value.reg))
340 result->reg_offset[value.reg] = addr.k;
341 }
342
343 /* Analyze a prologue starting at START_PC, going no further than
344 LIMIT_PC. Fill in RESULT as appropriate. */
345
346 static void
347 msp430_analyze_prologue (struct gdbarch *gdbarch, CORE_ADDR start_pc,
348 CORE_ADDR limit_pc, struct msp430_prologue *result)
349 {
350 CORE_ADDR pc, next_pc;
351 int rn;
352 pv_t reg[MSP430_NUM_TOTAL_REGS];
353 struct pv_area *stack;
354 struct cleanup *back_to;
355 CORE_ADDR after_last_frame_setup_insn = start_pc;
356 int code_model = gdbarch_tdep (gdbarch)->code_model;
357 int sz;
358
359 memset (result, 0, sizeof (*result));
360
361 for (rn = 0; rn < MSP430_NUM_TOTAL_REGS; rn++)
362 {
363 reg[rn] = pv_register (rn, 0);
364 result->reg_offset[rn] = 1;
365 }
366
367 stack = make_pv_area (MSP430_SP_REGNUM, gdbarch_addr_bit (gdbarch));
368 back_to = make_cleanup_free_pv_area (stack);
369
370 /* The call instruction has saved the return address on the stack. */
371 sz = code_model == MSP_LARGE_CODE_MODEL ? 4 : 2;
372 reg[MSP430_SP_REGNUM] = pv_add_constant (reg[MSP430_SP_REGNUM], -sz);
373 pv_area_store (stack, reg[MSP430_SP_REGNUM], sz, reg[MSP430_PC_REGNUM]);
374
375 pc = start_pc;
376 while (pc < limit_pc)
377 {
378 int bytes_read;
379 struct msp430_get_opcode_byte_handle opcode_handle;
380 MSP430_Opcode_Decoded opc;
381
382 opcode_handle.pc = pc;
383 bytes_read = msp430_decode_opcode (pc, &opc, msp430_get_opcode_byte,
384 &opcode_handle);
385 next_pc = pc + bytes_read;
386
387 if (opc.id == MSO_push && opc.op[0].type == MSP430_Operand_Register)
388 {
389 int rsrc = opc.op[0].reg;
390
391 reg[MSP430_SP_REGNUM] = pv_add_constant (reg[MSP430_SP_REGNUM], -2);
392 pv_area_store (stack, reg[MSP430_SP_REGNUM], 2, reg[rsrc]);
393 after_last_frame_setup_insn = next_pc;
394 }
395 else if (opc.id == MSO_push /* PUSHM */
396 && opc.op[0].type == MSP430_Operand_None
397 && opc.op[1].type == MSP430_Operand_Register)
398 {
399 int rsrc = opc.op[1].reg;
400 int count = opc.repeats + 1;
401 int size = opc.size == 16 ? 2 : 4;
402
403 while (count > 0)
404 {
405 reg[MSP430_SP_REGNUM]
406 = pv_add_constant (reg[MSP430_SP_REGNUM], -size);
407 pv_area_store (stack, reg[MSP430_SP_REGNUM], size, reg[rsrc]);
408 rsrc--;
409 count--;
410 }
411 after_last_frame_setup_insn = next_pc;
412 }
413 else if (opc.id == MSO_sub
414 && opc.op[0].type == MSP430_Operand_Register
415 && opc.op[0].reg == MSR_SP
416 && opc.op[1].type == MSP430_Operand_Immediate)
417 {
418 int addend = opc.op[1].addend;
419
420 reg[MSP430_SP_REGNUM] = pv_add_constant (reg[MSP430_SP_REGNUM],
421 -addend);
422 after_last_frame_setup_insn = next_pc;
423 }
424 else if (opc.id == MSO_mov
425 && opc.op[0].type == MSP430_Operand_Immediate
426 && 12 <= opc.op[0].reg && opc.op[0].reg <= 15)
427 after_last_frame_setup_insn = next_pc;
428 else
429 {
430 /* Terminate the prologue scan. */
431 break;
432 }
433
434 pc = next_pc;
435 }
436
437 /* Is the frame size (offset, really) a known constant? */
438 if (pv_is_register (reg[MSP430_SP_REGNUM], MSP430_SP_REGNUM))
439 result->frame_size = reg[MSP430_SP_REGNUM].k;
440
441 /* Record where all the registers were saved. */
442 pv_area_scan (stack, check_for_saved, result);
443
444 result->prologue_end = after_last_frame_setup_insn;
445
446 do_cleanups (back_to);
447 }
448
449 /* Implement the "skip_prologue" gdbarch method. */
450
451 static CORE_ADDR
452 msp430_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
453 {
454 const char *name;
455 CORE_ADDR func_addr, func_end;
456 struct msp430_prologue p;
457
458 /* Try to find the extent of the function that contains PC. */
459 if (!find_pc_partial_function (pc, &name, &func_addr, &func_end))
460 return pc;
461
462 msp430_analyze_prologue (gdbarch, pc, func_end, &p);
463 return p.prologue_end;
464 }
465
466 /* Implement the "unwind_pc" gdbarch method. */
467
468 static CORE_ADDR
469 msp430_unwind_pc (struct gdbarch *arch, struct frame_info *next_frame)
470 {
471 return frame_unwind_register_unsigned (next_frame, MSP430_PC_REGNUM);
472 }
473
474 /* Implement the "unwind_sp" gdbarch method. */
475
476 static CORE_ADDR
477 msp430_unwind_sp (struct gdbarch *arch, struct frame_info *next_frame)
478 {
479 return frame_unwind_register_unsigned (next_frame, MSP430_SP_REGNUM);
480 }
481
482 /* Given a frame described by THIS_FRAME, decode the prologue of its
483 associated function if there is not cache entry as specified by
484 THIS_PROLOGUE_CACHE. Save the decoded prologue in the cache and
485 return that struct as the value of this function. */
486
487 static struct msp430_prologue *
488 msp430_analyze_frame_prologue (struct frame_info *this_frame,
489 void **this_prologue_cache)
490 {
491 if (!*this_prologue_cache)
492 {
493 CORE_ADDR func_start, stop_addr;
494
495 *this_prologue_cache = FRAME_OBSTACK_ZALLOC (struct msp430_prologue);
496
497 func_start = get_frame_func (this_frame);
498 stop_addr = get_frame_pc (this_frame);
499
500 /* If we couldn't find any function containing the PC, then
501 just initialize the prologue cache, but don't do anything. */
502 if (!func_start)
503 stop_addr = func_start;
504
505 msp430_analyze_prologue (get_frame_arch (this_frame), func_start,
506 stop_addr,
507 (struct msp430_prologue *) *this_prologue_cache);
508 }
509
510 return (struct msp430_prologue *) *this_prologue_cache;
511 }
512
513 /* Given a frame and a prologue cache, return this frame's base. */
514
515 static CORE_ADDR
516 msp430_frame_base (struct frame_info *this_frame, void **this_prologue_cache)
517 {
518 struct msp430_prologue *p
519 = msp430_analyze_frame_prologue (this_frame, this_prologue_cache);
520 CORE_ADDR sp = get_frame_register_unsigned (this_frame, MSP430_SP_REGNUM);
521
522 return sp - p->frame_size;
523 }
524
525 /* Implement the "frame_this_id" method for unwinding frames. */
526
527 static void
528 msp430_this_id (struct frame_info *this_frame,
529 void **this_prologue_cache, struct frame_id *this_id)
530 {
531 *this_id = frame_id_build (msp430_frame_base (this_frame,
532 this_prologue_cache),
533 get_frame_func (this_frame));
534 }
535
536 /* Implement the "frame_prev_register" method for unwinding frames. */
537
538 static struct value *
539 msp430_prev_register (struct frame_info *this_frame,
540 void **this_prologue_cache, int regnum)
541 {
542 struct msp430_prologue *p
543 = msp430_analyze_frame_prologue (this_frame, this_prologue_cache);
544 CORE_ADDR frame_base = msp430_frame_base (this_frame, this_prologue_cache);
545
546 if (regnum == MSP430_SP_REGNUM)
547 return frame_unwind_got_constant (this_frame, regnum, frame_base);
548
549 /* If prologue analysis says we saved this register somewhere,
550 return a description of the stack slot holding it. */
551 else if (p->reg_offset[regnum] != 1)
552 {
553 struct value *rv = frame_unwind_got_memory (this_frame, regnum,
554 frame_base +
555 p->reg_offset[regnum]);
556
557 if (regnum == MSP430_PC_REGNUM)
558 {
559 ULONGEST pc = value_as_long (rv);
560
561 return frame_unwind_got_constant (this_frame, regnum, pc);
562 }
563 return rv;
564 }
565
566 /* Otherwise, presume we haven't changed the value of this
567 register, and get it from the next frame. */
568 else
569 return frame_unwind_got_register (this_frame, regnum, regnum);
570 }
571
572 static const struct frame_unwind msp430_unwind = {
573 NORMAL_FRAME,
574 default_frame_unwind_stop_reason,
575 msp430_this_id,
576 msp430_prev_register,
577 NULL,
578 default_frame_sniffer
579 };
580
581 /* Implement the "dwarf2_reg_to_regnum" gdbarch method. */
582
583 static int
584 msp430_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int reg)
585 {
586 if (reg < MSP430_NUM_REGS)
587 return reg + MSP430_NUM_REGS;
588 else
589 {
590 warning (_("Unmapped DWARF Register #%d encountered."), reg);
591 return -1;
592 }
593 }
594
595 /* Implement the "return_value" gdbarch method. */
596
597 static enum return_value_convention
598 msp430_return_value (struct gdbarch *gdbarch,
599 struct value *function,
600 struct type *valtype,
601 struct regcache *regcache,
602 gdb_byte *readbuf, const gdb_byte *writebuf)
603 {
604 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
605 LONGEST valtype_len = TYPE_LENGTH (valtype);
606 int code_model = gdbarch_tdep (gdbarch)->code_model;
607
608 if (TYPE_LENGTH (valtype) > 8
609 || TYPE_CODE (valtype) == TYPE_CODE_STRUCT
610 || TYPE_CODE (valtype) == TYPE_CODE_UNION)
611 return RETURN_VALUE_STRUCT_CONVENTION;
612
613 if (readbuf)
614 {
615 ULONGEST u;
616 int argreg = MSP430_R12_REGNUM;
617 int offset = 0;
618
619 while (valtype_len > 0)
620 {
621 int size = 2;
622
623 if (code_model == MSP_LARGE_CODE_MODEL
624 && TYPE_CODE (valtype) == TYPE_CODE_PTR)
625 {
626 size = 4;
627 }
628
629 regcache_cooked_read_unsigned (regcache, argreg, &u);
630 store_unsigned_integer (readbuf + offset, size, byte_order, u);
631 valtype_len -= size;
632 offset += size;
633 argreg++;
634 }
635 }
636
637 if (writebuf)
638 {
639 ULONGEST u;
640 int argreg = MSP430_R12_REGNUM;
641 int offset = 0;
642
643 while (valtype_len > 0)
644 {
645 int size = 2;
646
647 if (code_model == MSP_LARGE_CODE_MODEL
648 && TYPE_CODE (valtype) == TYPE_CODE_PTR)
649 {
650 size = 4;
651 }
652
653 u = extract_unsigned_integer (writebuf + offset, size, byte_order);
654 regcache_cooked_write_unsigned (regcache, argreg, u);
655 valtype_len -= size;
656 offset += size;
657 argreg++;
658 }
659 }
660
661 return RETURN_VALUE_REGISTER_CONVENTION;
662 }
663
664
665 /* Implement the "frame_align" gdbarch method. */
666
667 static CORE_ADDR
668 msp430_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
669 {
670 return align_down (sp, 2);
671 }
672
673
674 /* Implement the "dummy_id" gdbarch method. */
675
676 static struct frame_id
677 msp430_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
678 {
679 return
680 frame_id_build (get_frame_register_unsigned
681 (this_frame, MSP430_SP_REGNUM),
682 get_frame_pc (this_frame));
683 }
684
685
686 /* Implement the "push_dummy_call" gdbarch method. */
687
688 static CORE_ADDR
689 msp430_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
690 struct regcache *regcache, CORE_ADDR bp_addr,
691 int nargs, struct value **args, CORE_ADDR sp,
692 int struct_return, CORE_ADDR struct_addr)
693 {
694 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
695 int write_pass;
696 int sp_off = 0;
697 CORE_ADDR cfa;
698 int code_model = gdbarch_tdep (gdbarch)->code_model;
699
700 struct type *func_type = value_type (function);
701
702 /* Dereference function pointer types. */
703 while (TYPE_CODE (func_type) == TYPE_CODE_PTR)
704 func_type = TYPE_TARGET_TYPE (func_type);
705
706 /* The end result had better be a function or a method. */
707 gdb_assert (TYPE_CODE (func_type) == TYPE_CODE_FUNC
708 || TYPE_CODE (func_type) == TYPE_CODE_METHOD);
709
710 /* We make two passes; the first does the stack allocation,
711 the second actually stores the arguments. */
712 for (write_pass = 0; write_pass <= 1; write_pass++)
713 {
714 int i;
715 int arg_reg = MSP430_R12_REGNUM;
716 int args_on_stack = 0;
717
718 if (write_pass)
719 sp = align_down (sp - sp_off, 4);
720 sp_off = 0;
721
722 if (struct_return)
723 {
724 if (write_pass)
725 regcache_cooked_write_unsigned (regcache, arg_reg, struct_addr);
726 arg_reg++;
727 }
728
729 /* Push the arguments. */
730 for (i = 0; i < nargs; i++)
731 {
732 struct value *arg = args[i];
733 const gdb_byte *arg_bits = value_contents_all (arg);
734 struct type *arg_type = check_typedef (value_type (arg));
735 ULONGEST arg_size = TYPE_LENGTH (arg_type);
736 int offset;
737 int current_arg_on_stack;
738
739 current_arg_on_stack = 0;
740
741 if (TYPE_CODE (arg_type) == TYPE_CODE_STRUCT
742 || TYPE_CODE (arg_type) == TYPE_CODE_UNION)
743 {
744 /* Aggregates of any size are passed by reference. */
745 gdb_byte struct_addr[4];
746
747 store_unsigned_integer (struct_addr, 4, byte_order,
748 value_address (arg));
749 arg_bits = struct_addr;
750 arg_size = (code_model == MSP_LARGE_CODE_MODEL) ? 4 : 2;
751 }
752 else
753 {
754 /* Scalars bigger than 8 bytes such as complex doubles are passed
755 on the stack. */
756 if (arg_size > 8)
757 current_arg_on_stack = 1;
758 }
759
760
761 for (offset = 0; offset < arg_size; offset += 2)
762 {
763 /* The condition below prevents 8 byte scalars from being split
764 between registers and memory (stack). It also prevents other
765 splits once the stack has been written to. */
766 if (!current_arg_on_stack
767 && (arg_reg
768 + ((arg_size == 8 || args_on_stack)
769 ? ((arg_size - offset) / 2 - 1)
770 : 0) <= MSP430_R15_REGNUM))
771 {
772 int size = 2;
773
774 if (code_model == MSP_LARGE_CODE_MODEL
775 && TYPE_CODE (arg_type) == TYPE_CODE_PTR)
776 {
777 /* Pointer arguments using large memory model are passed
778 using entire register. */
779 if (offset != 0)
780 continue;
781 size = 4;
782 }
783
784 if (write_pass)
785 regcache_cooked_write_unsigned (regcache, arg_reg,
786 extract_unsigned_integer
787 (arg_bits + offset, size,
788 byte_order));
789
790 arg_reg++;
791 }
792 else
793 {
794 if (write_pass)
795 write_memory (sp + sp_off, arg_bits + offset, 2);
796
797 sp_off += 2;
798 args_on_stack = 1;
799 current_arg_on_stack = 1;
800 }
801 }
802 }
803 }
804
805 /* Keep track of the stack address prior to pushing the return address.
806 This is the value that we'll return. */
807 cfa = sp;
808
809 /* Push the return address. */
810 {
811 int sz = (gdbarch_tdep (gdbarch)->code_model == MSP_SMALL_CODE_MODEL)
812 ? 2 : 4;
813 sp = sp - sz;
814 write_memory_unsigned_integer (sp, sz, byte_order, bp_addr);
815 }
816
817 /* Update the stack pointer. */
818 regcache_cooked_write_unsigned (regcache, MSP430_SP_REGNUM, sp);
819
820 return cfa;
821 }
822
823 /* In order to keep code size small, the compiler may create epilogue
824 code through which more than one function epilogue is routed. I.e.
825 the epilogue and return may just be a branch to some common piece of
826 code which is responsible for tearing down the frame and performing
827 the return. These epilog (label) names will have the common prefix
828 defined here. */
829
830 static const char msp430_epilog_name_prefix[] = "__mspabi_func_epilog_";
831
832 /* Implement the "in_return_stub" gdbarch method. */
833
834 static int
835 msp430_in_return_stub (struct gdbarch *gdbarch, CORE_ADDR pc,
836 const char *name)
837 {
838 return (name != NULL
839 && startswith (name, msp430_epilog_name_prefix));
840 }
841
842 /* Implement the "skip_trampoline_code" gdbarch method. */
843 static CORE_ADDR
844 msp430_skip_trampoline_code (struct frame_info *frame, CORE_ADDR pc)
845 {
846 struct bound_minimal_symbol bms;
847 const char *stub_name;
848 struct gdbarch *gdbarch = get_frame_arch (frame);
849
850 bms = lookup_minimal_symbol_by_pc (pc);
851 if (!bms.minsym)
852 return pc;
853
854 stub_name = MSYMBOL_LINKAGE_NAME (bms.minsym);
855
856 if (gdbarch_tdep (gdbarch)->code_model == MSP_SMALL_CODE_MODEL
857 && msp430_in_return_stub (gdbarch, pc, stub_name))
858 {
859 CORE_ADDR sp = get_frame_register_unsigned (frame, MSP430_SP_REGNUM);
860
861 return read_memory_integer
862 (sp + 2 * (stub_name[strlen (msp430_epilog_name_prefix)] - '0'),
863 2, gdbarch_byte_order (gdbarch));
864 }
865
866 return pc;
867 }
868
869 /* Allocate and initialize a gdbarch object. */
870
871 static struct gdbarch *
872 msp430_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
873 {
874 struct gdbarch *gdbarch;
875 struct gdbarch_tdep *tdep;
876 int elf_flags, isa, code_model;
877
878 /* Extract the elf_flags if available. */
879 if (info.abfd != NULL
880 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
881 elf_flags = elf_elfheader (info.abfd)->e_flags;
882 else
883 elf_flags = 0;
884
885 if (info.abfd != NULL)
886 switch (bfd_elf_get_obj_attr_int (info.abfd, OBJ_ATTR_PROC,
887 OFBA_MSPABI_Tag_ISA))
888 {
889 case 1:
890 isa = MSP_ISA_MSP430;
891 code_model = MSP_SMALL_CODE_MODEL;
892 break;
893 case 2:
894 isa = MSP_ISA_MSP430X;
895 switch (bfd_elf_get_obj_attr_int (info.abfd, OBJ_ATTR_PROC,
896 OFBA_MSPABI_Tag_Code_Model))
897 {
898 case 1:
899 code_model = MSP_SMALL_CODE_MODEL;
900 break;
901 case 2:
902 code_model = MSP_LARGE_CODE_MODEL;
903 break;
904 default:
905 internal_error (__FILE__, __LINE__,
906 _("Unknown msp430x code memory model"));
907 break;
908 }
909 break;
910 case 0:
911 /* This can happen when loading a previously dumped data structure.
912 Use the ISA and code model from the current architecture, provided
913 it's compatible. */
914 {
915 struct gdbarch *ca = get_current_arch ();
916 if (ca && gdbarch_bfd_arch_info (ca)->arch == bfd_arch_msp430)
917 {
918 struct gdbarch_tdep *ca_tdep = gdbarch_tdep (ca);
919
920 elf_flags = ca_tdep->elf_flags;
921 isa = ca_tdep->isa;
922 code_model = ca_tdep->code_model;
923 break;
924 }
925 /* Otherwise, fall through... */
926 }
927 default:
928 error (_("Unknown msp430 isa"));
929 break;
930 }
931 else
932 {
933 isa = MSP_ISA_MSP430;
934 code_model = MSP_SMALL_CODE_MODEL;
935 }
936
937
938 /* Try to find the architecture in the list of already defined
939 architectures. */
940 for (arches = gdbarch_list_lookup_by_info (arches, &info);
941 arches != NULL;
942 arches = gdbarch_list_lookup_by_info (arches->next, &info))
943 {
944 struct gdbarch_tdep *candidate_tdep = gdbarch_tdep (arches->gdbarch);
945
946 if (candidate_tdep->elf_flags != elf_flags
947 || candidate_tdep->isa != isa
948 || candidate_tdep->code_model != code_model)
949 continue;
950
951 return arches->gdbarch;
952 }
953
954 /* None found, create a new architecture from the information
955 provided. */
956 tdep = XNEW (struct gdbarch_tdep);
957 gdbarch = gdbarch_alloc (&info, tdep);
958 tdep->elf_flags = elf_flags;
959 tdep->isa = isa;
960 tdep->code_model = code_model;
961
962 /* Registers. */
963 set_gdbarch_num_regs (gdbarch, MSP430_NUM_REGS);
964 set_gdbarch_num_pseudo_regs (gdbarch, MSP430_NUM_PSEUDO_REGS);
965 set_gdbarch_register_name (gdbarch, msp430_register_name);
966 if (isa == MSP_ISA_MSP430)
967 set_gdbarch_register_type (gdbarch, msp430_register_type);
968 else
969 set_gdbarch_register_type (gdbarch, msp430x_register_type);
970 set_gdbarch_pc_regnum (gdbarch, MSP430_PC_REGNUM);
971 set_gdbarch_sp_regnum (gdbarch, MSP430_SP_REGNUM);
972 set_gdbarch_register_reggroup_p (gdbarch, msp430_register_reggroup_p);
973 set_gdbarch_pseudo_register_read (gdbarch, msp430_pseudo_register_read);
974 set_gdbarch_pseudo_register_write (gdbarch, msp430_pseudo_register_write);
975 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, msp430_dwarf2_reg_to_regnum);
976 set_gdbarch_register_sim_regno (gdbarch, msp430_register_sim_regno);
977
978 /* Data types. */
979 set_gdbarch_char_signed (gdbarch, 0);
980 set_gdbarch_short_bit (gdbarch, 16);
981 set_gdbarch_int_bit (gdbarch, 16);
982 set_gdbarch_long_bit (gdbarch, 32);
983 set_gdbarch_long_long_bit (gdbarch, 64);
984 if (code_model == MSP_SMALL_CODE_MODEL)
985 {
986 set_gdbarch_ptr_bit (gdbarch, 16);
987 set_gdbarch_addr_bit (gdbarch, 16);
988 }
989 else /* MSP_LARGE_CODE_MODEL */
990 {
991 set_gdbarch_ptr_bit (gdbarch, 32);
992 set_gdbarch_addr_bit (gdbarch, 32);
993 }
994 set_gdbarch_dwarf2_addr_size (gdbarch, 4);
995 set_gdbarch_float_bit (gdbarch, 32);
996 set_gdbarch_float_format (gdbarch, floatformats_ieee_single);
997 set_gdbarch_double_bit (gdbarch, 64);
998 set_gdbarch_long_double_bit (gdbarch, 64);
999 set_gdbarch_double_format (gdbarch, floatformats_ieee_double);
1000 set_gdbarch_long_double_format (gdbarch, floatformats_ieee_double);
1001
1002 /* Breakpoints. */
1003 set_gdbarch_breakpoint_from_pc (gdbarch, msp430_breakpoint_from_pc);
1004 set_gdbarch_decr_pc_after_break (gdbarch, 1);
1005
1006 /* Disassembly. */
1007 set_gdbarch_print_insn (gdbarch, print_insn_msp430);
1008
1009 /* Frames, prologues, etc. */
1010 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1011 set_gdbarch_skip_prologue (gdbarch, msp430_skip_prologue);
1012 set_gdbarch_unwind_pc (gdbarch, msp430_unwind_pc);
1013 set_gdbarch_unwind_sp (gdbarch, msp430_unwind_sp);
1014 set_gdbarch_frame_align (gdbarch, msp430_frame_align);
1015 dwarf2_append_unwinders (gdbarch);
1016 frame_unwind_append_unwinder (gdbarch, &msp430_unwind);
1017
1018 /* Dummy frames, return values. */
1019 set_gdbarch_dummy_id (gdbarch, msp430_dummy_id);
1020 set_gdbarch_push_dummy_call (gdbarch, msp430_push_dummy_call);
1021 set_gdbarch_return_value (gdbarch, msp430_return_value);
1022
1023 /* Trampolines. */
1024 set_gdbarch_in_solib_return_trampoline (gdbarch, msp430_in_return_stub);
1025 set_gdbarch_skip_trampoline_code (gdbarch, msp430_skip_trampoline_code);
1026
1027 /* Virtual tables. */
1028 set_gdbarch_vbit_in_delta (gdbarch, 0);
1029
1030 return gdbarch;
1031 }
1032
1033 /* -Wmissing-prototypes */
1034 extern initialize_file_ftype _initialize_msp430_tdep;
1035
1036 /* Register the initialization routine. */
1037
1038 void
1039 _initialize_msp430_tdep (void)
1040 {
1041 register_gdbarch_init (bfd_arch_msp430, msp430_gdbarch_init);
1042 }
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