gdb/nat/i386-dregs.h

   1 /* Debug register code for the i386.
   2
   3    Copyright (C) 2009-2014 Free Software Foundation, Inc.
   4
   5    This file is part of GDB.
   6
   7    This program is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 3 of the License, or
  10    (at your option) any later version.
  11
  12    This program is distributed in the hope that it will be useful,
  13    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15    GNU General Public License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  19
  20 /* Support for hardware watchpoints and breakpoints using the i386
  21    debug registers.
  22
  23    This provides several functions for inserting and removing
  24    hardware-assisted breakpoints and watchpoints, testing if one or
  25    more of the watchpoints triggered and at what address, checking
  26    whether a given region can be watched, etc.
  27
  28    The functions below implement debug registers sharing by reference
  29    counts, and allow to watch regions up to 16 bytes long
  30    (32 bytes on 64 bit hosts).  */
  31
  32 #ifndef I386_DREGS_H
  33 #define I386_DREGS_H 1
  34
  35 /* Forward declaration.  */
  36 enum target_hw_bp_type;
  37
  38 /* Debug registers' indices.  */
  39 #define DR_FIRSTADDR 0
  40 #define DR_LASTADDR  3
  41 #define DR_NADDR     4  /* The number of debug address registers.  */
  42 #define DR_STATUS    6  /* Index of debug status register (DR6).  */
  43 #define DR_CONTROL   7  /* Index of debug control register (DR7).  */
  44
  45 /* Global state needed to track h/w watchpoints.  */
  46
  47 struct i386_debug_reg_state
  48 {
  49   /* Mirror the inferior's DRi registers.  We keep the status and
  50      control registers separated because they don't hold addresses.
  51      Note that since we can change these mirrors while threads are
  52      running, we never trust them to explain a cause of a trap.
  53      For that, we need to peek directly in the inferior registers.  */
  54   CORE_ADDR dr_mirror[DR_NADDR];
  55   unsigned dr_status_mirror, dr_control_mirror;
  56
  57   /* Reference counts for each debug register.  */
  58   int dr_ref_count[DR_NADDR];
  59 };
  60
  61 /* A macro to loop over all debug registers.  */
  62 #define ALL_DEBUG_REGISTERS(i)  for (i = 0; i < DR_NADDR; i++)
  63 \f
  64 /* High-level functions.  */
  65
  66 /* Insert a watchpoint to watch a memory region which starts at
  67    address ADDR and whose length is LEN bytes.  Watch memory accesses
  68    of the type TYPE.  Return 0 on success, -1 on failure.  */
  69 extern int i386_dr_insert_watchpoint (struct i386_debug_reg_state *state,
  70                                       enum target_hw_bp_type type,
  71                                       CORE_ADDR addr,
  72                                       int len);
  73
  74 /* Remove a watchpoint that watched the memory region which starts at
  75    address ADDR, whose length is LEN bytes, and for accesses of the
  76    type TYPE.  Return 0 on success, -1 on failure.  */
  77 extern int i386_dr_remove_watchpoint (struct i386_debug_reg_state *state,
  78                                       enum target_hw_bp_type type,
  79                                       CORE_ADDR addr,
  80                                       int len);
  81
  82 /* Return non-zero if we can watch a memory region that starts at
  83    address ADDR and whose length is LEN bytes.  */
  84 extern int i386_dr_region_ok_for_watchpoint (struct i386_debug_reg_state *state,
  85                                              CORE_ADDR addr, int len);
  86
  87 /* If the inferior has some break/watchpoint that triggered, set the
  88    address associated with that break/watchpoint and return true.
  89    Otherwise, return false.  */
  90 extern int i386_dr_stopped_data_address (struct i386_debug_reg_state *state,
  91                                          CORE_ADDR *addr_p);
  92
  93 /* Return true if the inferior has some watchpoint that triggered.
  94    Otherwise return false.  */
  95 extern int i386_dr_stopped_by_watchpoint (struct i386_debug_reg_state *state);
  96 \f
  97 /* Low-level functions.  */
  98
  99 /* Print the values of the mirrored debug registers.  */
 100
 101 extern void i386_dr_show (struct i386_debug_reg_state *state,
 102                           const char *func, CORE_ADDR addr,
 103                           int len, enum target_hw_bp_type type);
 104
 105 /* Return the value of a 4-bit field for DR7 suitable for watching a
 106    region of LEN bytes for accesses of type TYPE.  LEN is assumed to
 107    have the value of 1, 2, or 4.  */
 108
 109 extern unsigned i386_dr_length_and_rw_bits (int len,
 110                                             enum target_hw_bp_type type);
 111
 112 /* Insert a watchpoint at address ADDR, which is assumed to be aligned
 113    according to the length of the region to watch.  LEN_RW_BITS is the
 114    value of the bits from DR7 which describes the length and access
 115    type of the region to be watched by this watchpoint.  Return 0 on
 116    success, -1 on failure.  */
 117
 118 extern int i386_dr_insert_aligned_watchpoint (struct i386_debug_reg_state *state,
 119                                               CORE_ADDR addr,
 120                                               unsigned len_rw_bits);
 121
 122 /* Remove a watchpoint at address ADDR, which is assumed to be aligned
 123    according to the length of the region to watch.  LEN_RW_BITS is the
 124    value of the bits from DR7 which describes the length and access
 125    type of the region watched by this watchpoint.  Return 0 on
 126    success, -1 on failure.  */
 127
 128 extern int i386_dr_remove_aligned_watchpoint (struct i386_debug_reg_state *state,
 129                                               CORE_ADDR addr,
 130                                               unsigned len_rw_bits);
 131
 132 /* Update the inferior debug registers state, in STATE, with the
 133    new debug registers state, in NEW_STATE.  */
 134
 135 extern void i386_dr_update_inferior_debug_regs (struct i386_debug_reg_state *state,
 136                                                 struct i386_debug_reg_state *new_state);
 137
 138 #endif /* I386_DREGS_H */