1 /* PPC GNU/Linux native support.
3 Copyright (C) 1988-2019 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21 #include "observable.h"
24 #include "gdbthread.h"
29 #include "linux-nat.h"
30 #include <sys/types.h>
33 #include <sys/ioctl.h>
35 #include "common/gdb_wait.h"
37 #include <sys/procfs.h>
38 #include "nat/gdb_ptrace.h"
39 #include "nat/linux-ptrace.h"
40 #include "inf-ptrace.h"
42 /* Prototypes for supply_gregset etc. */
45 #include "ppc-linux-tdep.h"
47 /* Required when using the AUXV. */
48 #include "elf/common.h"
51 #include "arch/ppc-linux-common.h"
52 #include "arch/ppc-linux-tdesc.h"
53 #include "nat/ppc-linux.h"
55 /* Similarly for the hardware watchpoint support. These requests are used
56 when the PowerPC HWDEBUG ptrace interface is not available. */
57 #ifndef PTRACE_GET_DEBUGREG
58 #define PTRACE_GET_DEBUGREG 25
60 #ifndef PTRACE_SET_DEBUGREG
61 #define PTRACE_SET_DEBUGREG 26
63 #ifndef PTRACE_GETSIGINFO
64 #define PTRACE_GETSIGINFO 0x4202
67 /* These requests are used when the PowerPC HWDEBUG ptrace interface is
68 available. It exposes the debug facilities of PowerPC processors, as well
69 as additional features of BookE processors, such as ranged breakpoints and
70 watchpoints and hardware-accelerated condition evaluation. */
71 #ifndef PPC_PTRACE_GETHWDBGINFO
73 /* Not having PPC_PTRACE_GETHWDBGINFO defined means that the PowerPC HWDEBUG
74 ptrace interface is not present in ptrace.h, so we'll have to pretty much
75 include it all here so that the code at least compiles on older systems. */
76 #define PPC_PTRACE_GETHWDBGINFO 0x89
77 #define PPC_PTRACE_SETHWDEBUG 0x88
78 #define PPC_PTRACE_DELHWDEBUG 0x87
82 uint32_t version
; /* Only version 1 exists to date. */
83 uint32_t num_instruction_bps
;
84 uint32_t num_data_bps
;
85 uint32_t num_condition_regs
;
86 uint32_t data_bp_alignment
;
87 uint32_t sizeof_condition
; /* size of the DVC register. */
91 /* Features will have bits indicating whether there is support for: */
92 #define PPC_DEBUG_FEATURE_INSN_BP_RANGE 0x1
93 #define PPC_DEBUG_FEATURE_INSN_BP_MASK 0x2
94 #define PPC_DEBUG_FEATURE_DATA_BP_RANGE 0x4
95 #define PPC_DEBUG_FEATURE_DATA_BP_MASK 0x8
97 struct ppc_hw_breakpoint
99 uint32_t version
; /* currently, version must be 1 */
100 uint32_t trigger_type
; /* only some combinations allowed */
101 uint32_t addr_mode
; /* address match mode */
102 uint32_t condition_mode
; /* break/watchpoint condition flags */
103 uint64_t addr
; /* break/watchpoint address */
104 uint64_t addr2
; /* range end or mask */
105 uint64_t condition_value
; /* contents of the DVC register */
109 #define PPC_BREAKPOINT_TRIGGER_EXECUTE 0x1
110 #define PPC_BREAKPOINT_TRIGGER_READ 0x2
111 #define PPC_BREAKPOINT_TRIGGER_WRITE 0x4
112 #define PPC_BREAKPOINT_TRIGGER_RW 0x6
115 #define PPC_BREAKPOINT_MODE_EXACT 0x0
116 #define PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE 0x1
117 #define PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE 0x2
118 #define PPC_BREAKPOINT_MODE_MASK 0x3
120 /* Condition mode. */
121 #define PPC_BREAKPOINT_CONDITION_NONE 0x0
122 #define PPC_BREAKPOINT_CONDITION_AND 0x1
123 #define PPC_BREAKPOINT_CONDITION_EXACT 0x1
124 #define PPC_BREAKPOINT_CONDITION_OR 0x2
125 #define PPC_BREAKPOINT_CONDITION_AND_OR 0x3
126 #define PPC_BREAKPOINT_CONDITION_BE_ALL 0x00ff0000
127 #define PPC_BREAKPOINT_CONDITION_BE_SHIFT 16
128 #define PPC_BREAKPOINT_CONDITION_BE(n) \
129 (1<<((n)+PPC_BREAKPOINT_CONDITION_BE_SHIFT))
130 #endif /* PPC_PTRACE_GETHWDBGINFO */
132 /* Feature defined on Linux kernel v3.9: DAWR interface, that enables wider
133 watchpoint (up to 512 bytes). */
134 #ifndef PPC_DEBUG_FEATURE_DATA_BP_DAWR
135 #define PPC_DEBUG_FEATURE_DATA_BP_DAWR 0x10
136 #endif /* PPC_DEBUG_FEATURE_DATA_BP_DAWR */
138 /* Similarly for the general-purpose (gp0 -- gp31)
139 and floating-point registers (fp0 -- fp31). */
140 #ifndef PTRACE_GETREGS
141 #define PTRACE_GETREGS 12
143 #ifndef PTRACE_SETREGS
144 #define PTRACE_SETREGS 13
146 #ifndef PTRACE_GETFPREGS
147 #define PTRACE_GETFPREGS 14
149 #ifndef PTRACE_SETFPREGS
150 #define PTRACE_SETFPREGS 15
153 /* This oddity is because the Linux kernel defines elf_vrregset_t as
154 an array of 33 16 bytes long elements. I.e. it leaves out vrsave.
155 However the PTRACE_GETVRREGS and PTRACE_SETVRREGS requests return
156 the vrsave as an extra 4 bytes at the end. I opted for creating a
157 flat array of chars, so that it is easier to manipulate for gdb.
159 There are 32 vector registers 16 bytes longs, plus a VSCR register
160 which is only 4 bytes long, but is fetched as a 16 bytes
161 quantity. Up to here we have the elf_vrregset_t structure.
162 Appended to this there is space for the VRSAVE register: 4 bytes.
163 Even though this vrsave register is not included in the regset
164 typedef, it is handled by the ptrace requests.
166 The layout is like this (where x is the actual value of the vscr reg): */
171 |.|.|.|.|.....|.|.|.|.||.|.|.|x||.|
172 <-------> <-------><-------><->
175 |.|.|.|.|.....|.|.|.|.||X|.|.|.||.|
176 <-------> <-------><-------><->
181 typedef char gdb_vrregset_t
[PPC_LINUX_SIZEOF_VRREGSET
];
183 /* This is the layout of the POWER7 VSX registers and the way they overlap
184 with the existing FPR and VMX registers.
186 VSR doubleword 0 VSR doubleword 1
187 ----------------------------------------------------------------
189 ----------------------------------------------------------------
191 ----------------------------------------------------------------
194 ----------------------------------------------------------------
195 VSR[30] | FPR[30] | |
196 ----------------------------------------------------------------
197 VSR[31] | FPR[31] | |
198 ----------------------------------------------------------------
200 ----------------------------------------------------------------
202 ----------------------------------------------------------------
205 ----------------------------------------------------------------
207 ----------------------------------------------------------------
209 ----------------------------------------------------------------
211 VSX has 64 128bit registers. The first 32 registers overlap with
212 the FP registers (doubleword 0) and hence extend them with additional
213 64 bits (doubleword 1). The other 32 regs overlap with the VMX
215 typedef char gdb_vsxregset_t
[PPC_LINUX_SIZEOF_VSXREGSET
];
217 /* On PPC processors that support the Signal Processing Extension
218 (SPE) APU, the general-purpose registers are 64 bits long.
219 However, the ordinary Linux kernel PTRACE_PEEKUSER / PTRACE_POKEUSER
220 ptrace calls only access the lower half of each register, to allow
221 them to behave the same way they do on non-SPE systems. There's a
222 separate pair of calls, PTRACE_GETEVRREGS / PTRACE_SETEVRREGS, that
223 read and write the top halves of all the general-purpose registers
224 at once, along with some SPE-specific registers.
226 GDB itself continues to claim the general-purpose registers are 32
227 bits long. It has unnamed raw registers that hold the upper halves
228 of the gprs, and the full 64-bit SIMD views of the registers,
229 'ev0' -- 'ev31', are pseudo-registers that splice the top and
230 bottom halves together.
232 This is the structure filled in by PTRACE_GETEVRREGS and written to
233 the inferior's registers by PTRACE_SETEVRREGS. */
234 struct gdb_evrregset_t
236 unsigned long evr
[32];
237 unsigned long long acc
;
238 unsigned long spefscr
;
241 /* Non-zero if our kernel may support the PTRACE_GETVSXREGS and
242 PTRACE_SETVSXREGS requests, for reading and writing the VSX
243 POWER7 registers 0 through 31. Zero if we've tried one of them and
244 gotten an error. Note that VSX registers 32 through 63 overlap
245 with VR registers 0 through 31. */
246 int have_ptrace_getsetvsxregs
= 1;
248 /* Non-zero if our kernel may support the PTRACE_GETVRREGS and
249 PTRACE_SETVRREGS requests, for reading and writing the Altivec
250 registers. Zero if we've tried one of them and gotten an
252 int have_ptrace_getvrregs
= 1;
254 /* Non-zero if our kernel may support the PTRACE_GETEVRREGS and
255 PTRACE_SETEVRREGS requests, for reading and writing the SPE
256 registers. Zero if we've tried one of them and gotten an
258 int have_ptrace_getsetevrregs
= 1;
260 /* Non-zero if our kernel may support the PTRACE_GETREGS and
261 PTRACE_SETREGS requests, for reading and writing the
262 general-purpose registers. Zero if we've tried one of
263 them and gotten an error. */
264 int have_ptrace_getsetregs
= 1;
266 /* Non-zero if our kernel may support the PTRACE_GETFPREGS and
267 PTRACE_SETFPREGS requests, for reading and writing the
268 floating-pointers registers. Zero if we've tried one of
269 them and gotten an error. */
270 int have_ptrace_getsetfpregs
= 1;
272 struct ppc_linux_nat_target final
: public linux_nat_target
274 /* Add our register access methods. */
275 void fetch_registers (struct regcache
*, int) override
;
276 void store_registers (struct regcache
*, int) override
;
278 /* Add our breakpoint/watchpoint methods. */
279 int can_use_hw_breakpoint (enum bptype
, int, int) override
;
281 int insert_hw_breakpoint (struct gdbarch
*, struct bp_target_info
*)
284 int remove_hw_breakpoint (struct gdbarch
*, struct bp_target_info
*)
287 int region_ok_for_hw_watchpoint (CORE_ADDR
, int) override
;
289 int insert_watchpoint (CORE_ADDR
, int, enum target_hw_bp_type
,
290 struct expression
*) override
;
292 int remove_watchpoint (CORE_ADDR
, int, enum target_hw_bp_type
,
293 struct expression
*) override
;
295 int insert_mask_watchpoint (CORE_ADDR
, CORE_ADDR
, enum target_hw_bp_type
)
298 int remove_mask_watchpoint (CORE_ADDR
, CORE_ADDR
, enum target_hw_bp_type
)
301 bool stopped_by_watchpoint () override
;
303 bool stopped_data_address (CORE_ADDR
*) override
;
305 bool watchpoint_addr_within_range (CORE_ADDR
, CORE_ADDR
, int) override
;
307 bool can_accel_watchpoint_condition (CORE_ADDR
, int, int, struct expression
*)
310 int masked_watch_num_registers (CORE_ADDR
, CORE_ADDR
) override
;
312 int ranged_break_num_registers () override
;
314 const struct target_desc
*read_description () override
;
316 int auxv_parse (gdb_byte
**readptr
,
317 gdb_byte
*endptr
, CORE_ADDR
*typep
, CORE_ADDR
*valp
)
320 /* Override linux_nat_target low methods. */
321 void low_new_thread (struct lwp_info
*lp
) override
;
324 static ppc_linux_nat_target the_ppc_linux_nat_target
;
327 /* registers layout, as presented by the ptrace interface:
328 PT_R0, PT_R1, PT_R2, PT_R3, PT_R4, PT_R5, PT_R6, PT_R7,
329 PT_R8, PT_R9, PT_R10, PT_R11, PT_R12, PT_R13, PT_R14, PT_R15,
330 PT_R16, PT_R17, PT_R18, PT_R19, PT_R20, PT_R21, PT_R22, PT_R23,
331 PT_R24, PT_R25, PT_R26, PT_R27, PT_R28, PT_R29, PT_R30, PT_R31,
332 PT_FPR0, PT_FPR0 + 2, PT_FPR0 + 4, PT_FPR0 + 6,
333 PT_FPR0 + 8, PT_FPR0 + 10, PT_FPR0 + 12, PT_FPR0 + 14,
334 PT_FPR0 + 16, PT_FPR0 + 18, PT_FPR0 + 20, PT_FPR0 + 22,
335 PT_FPR0 + 24, PT_FPR0 + 26, PT_FPR0 + 28, PT_FPR0 + 30,
336 PT_FPR0 + 32, PT_FPR0 + 34, PT_FPR0 + 36, PT_FPR0 + 38,
337 PT_FPR0 + 40, PT_FPR0 + 42, PT_FPR0 + 44, PT_FPR0 + 46,
338 PT_FPR0 + 48, PT_FPR0 + 50, PT_FPR0 + 52, PT_FPR0 + 54,
339 PT_FPR0 + 56, PT_FPR0 + 58, PT_FPR0 + 60, PT_FPR0 + 62,
340 PT_NIP, PT_MSR, PT_CCR, PT_LNK, PT_CTR, PT_XER, PT_MQ */
344 ppc_register_u_addr (struct gdbarch
*gdbarch
, int regno
)
347 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
348 /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace
349 interface, and not the wordsize of the program's ABI. */
350 int wordsize
= sizeof (long);
352 /* General purpose registers occupy 1 slot each in the buffer. */
353 if (regno
>= tdep
->ppc_gp0_regnum
354 && regno
< tdep
->ppc_gp0_regnum
+ ppc_num_gprs
)
355 u_addr
= ((regno
- tdep
->ppc_gp0_regnum
+ PT_R0
) * wordsize
);
357 /* Floating point regs: eight bytes each in both 32- and 64-bit
358 ptrace interfaces. Thus, two slots each in 32-bit interface, one
359 slot each in 64-bit interface. */
360 if (tdep
->ppc_fp0_regnum
>= 0
361 && regno
>= tdep
->ppc_fp0_regnum
362 && regno
< tdep
->ppc_fp0_regnum
+ ppc_num_fprs
)
363 u_addr
= (PT_FPR0
* wordsize
) + ((regno
- tdep
->ppc_fp0_regnum
) * 8);
365 /* UISA special purpose registers: 1 slot each. */
366 if (regno
== gdbarch_pc_regnum (gdbarch
))
367 u_addr
= PT_NIP
* wordsize
;
368 if (regno
== tdep
->ppc_lr_regnum
)
369 u_addr
= PT_LNK
* wordsize
;
370 if (regno
== tdep
->ppc_cr_regnum
)
371 u_addr
= PT_CCR
* wordsize
;
372 if (regno
== tdep
->ppc_xer_regnum
)
373 u_addr
= PT_XER
* wordsize
;
374 if (regno
== tdep
->ppc_ctr_regnum
)
375 u_addr
= PT_CTR
* wordsize
;
377 if (regno
== tdep
->ppc_mq_regnum
)
378 u_addr
= PT_MQ
* wordsize
;
380 if (regno
== tdep
->ppc_ps_regnum
)
381 u_addr
= PT_MSR
* wordsize
;
382 if (regno
== PPC_ORIG_R3_REGNUM
)
383 u_addr
= PT_ORIG_R3
* wordsize
;
384 if (regno
== PPC_TRAP_REGNUM
)
385 u_addr
= PT_TRAP
* wordsize
;
386 if (tdep
->ppc_fpscr_regnum
>= 0
387 && regno
== tdep
->ppc_fpscr_regnum
)
389 /* NOTE: cagney/2005-02-08: On some 64-bit GNU/Linux systems the
390 kernel headers incorrectly contained the 32-bit definition of
391 PT_FPSCR. For the 32-bit definition, floating-point
392 registers occupy two 32-bit "slots", and the FPSCR lives in
393 the second half of such a slot-pair (hence +1). For 64-bit,
394 the FPSCR instead occupies the full 64-bit 2-word-slot and
395 hence no adjustment is necessary. Hack around this. */
396 if (wordsize
== 8 && PT_FPSCR
== (48 + 32 + 1))
397 u_addr
= (48 + 32) * wordsize
;
398 /* If the FPSCR is 64-bit wide, we need to fetch the whole 64-bit
399 slot and not just its second word. The PT_FPSCR supplied when
400 GDB is compiled as a 32-bit app doesn't reflect this. */
401 else if (wordsize
== 4 && register_size (gdbarch
, regno
) == 8
402 && PT_FPSCR
== (48 + 2*32 + 1))
403 u_addr
= (48 + 2*32) * wordsize
;
405 u_addr
= PT_FPSCR
* wordsize
;
410 /* The Linux kernel ptrace interface for POWER7 VSX registers uses the
411 registers set mechanism, as opposed to the interface for all the
412 other registers, that stores/fetches each register individually. */
414 fetch_vsx_registers (struct regcache
*regcache
, int tid
, int regno
)
417 gdb_vsxregset_t regs
;
418 const struct regset
*vsxregset
= ppc_linux_vsxregset ();
420 ret
= ptrace (PTRACE_GETVSXREGS
, tid
, 0, ®s
);
425 have_ptrace_getsetvsxregs
= 0;
428 perror_with_name (_("Unable to fetch VSX registers"));
431 vsxregset
->supply_regset (vsxregset
, regcache
, regno
, ®s
,
432 PPC_LINUX_SIZEOF_VSXREGSET
);
435 /* The Linux kernel ptrace interface for AltiVec registers uses the
436 registers set mechanism, as opposed to the interface for all the
437 other registers, that stores/fetches each register individually. */
439 fetch_altivec_registers (struct regcache
*regcache
, int tid
,
444 struct gdbarch
*gdbarch
= regcache
->arch ();
445 const struct regset
*vrregset
= ppc_linux_vrregset (gdbarch
);
447 ret
= ptrace (PTRACE_GETVRREGS
, tid
, 0, ®s
);
452 have_ptrace_getvrregs
= 0;
455 perror_with_name (_("Unable to fetch AltiVec registers"));
458 vrregset
->supply_regset (vrregset
, regcache
, regno
, ®s
,
459 PPC_LINUX_SIZEOF_VRREGSET
);
462 /* Fetch the top 32 bits of TID's general-purpose registers and the
463 SPE-specific registers, and place the results in EVRREGSET. If we
464 don't support PTRACE_GETEVRREGS, then just fill EVRREGSET with
467 All the logic to deal with whether or not the PTRACE_GETEVRREGS and
468 PTRACE_SETEVRREGS requests are supported is isolated here, and in
469 set_spe_registers. */
471 get_spe_registers (int tid
, struct gdb_evrregset_t
*evrregset
)
473 if (have_ptrace_getsetevrregs
)
475 if (ptrace (PTRACE_GETEVRREGS
, tid
, 0, evrregset
) >= 0)
479 /* EIO means that the PTRACE_GETEVRREGS request isn't supported;
480 we just return zeros. */
482 have_ptrace_getsetevrregs
= 0;
484 /* Anything else needs to be reported. */
485 perror_with_name (_("Unable to fetch SPE registers"));
489 memset (evrregset
, 0, sizeof (*evrregset
));
492 /* Supply values from TID for SPE-specific raw registers: the upper
493 halves of the GPRs, the accumulator, and the spefscr. REGNO must
494 be the number of an upper half register, acc, spefscr, or -1 to
495 supply the values of all registers. */
497 fetch_spe_register (struct regcache
*regcache
, int tid
, int regno
)
499 struct gdbarch
*gdbarch
= regcache
->arch ();
500 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
501 struct gdb_evrregset_t evrregs
;
503 gdb_assert (sizeof (evrregs
.evr
[0])
504 == register_size (gdbarch
, tdep
->ppc_ev0_upper_regnum
));
505 gdb_assert (sizeof (evrregs
.acc
)
506 == register_size (gdbarch
, tdep
->ppc_acc_regnum
));
507 gdb_assert (sizeof (evrregs
.spefscr
)
508 == register_size (gdbarch
, tdep
->ppc_spefscr_regnum
));
510 get_spe_registers (tid
, &evrregs
);
516 for (i
= 0; i
< ppc_num_gprs
; i
++)
517 regcache
->raw_supply (tdep
->ppc_ev0_upper_regnum
+ i
, &evrregs
.evr
[i
]);
519 else if (tdep
->ppc_ev0_upper_regnum
<= regno
520 && regno
< tdep
->ppc_ev0_upper_regnum
+ ppc_num_gprs
)
521 regcache
->raw_supply (regno
,
522 &evrregs
.evr
[regno
- tdep
->ppc_ev0_upper_regnum
]);
525 || regno
== tdep
->ppc_acc_regnum
)
526 regcache
->raw_supply (tdep
->ppc_acc_regnum
, &evrregs
.acc
);
529 || regno
== tdep
->ppc_spefscr_regnum
)
530 regcache
->raw_supply (tdep
->ppc_spefscr_regnum
, &evrregs
.spefscr
);
533 /* Use ptrace to fetch all registers from the register set with note
534 type REGSET_ID, size REGSIZE, and layout described by REGSET, from
535 process/thread TID and supply their values to REGCACHE. If ptrace
536 returns ENODATA to indicate the regset is unavailable, mark the
537 registers as unavailable in REGCACHE. */
540 fetch_regset (struct regcache
*regcache
, int tid
,
541 int regset_id
, int regsetsize
, const struct regset
*regset
)
543 void *buf
= alloca (regsetsize
);
547 iov
.iov_len
= regsetsize
;
549 if (ptrace (PTRACE_GETREGSET
, tid
, regset_id
, &iov
) < 0)
551 if (errno
== ENODATA
)
552 regset
->supply_regset (regset
, regcache
, -1, NULL
, regsetsize
);
554 perror_with_name (_("Couldn't get register set"));
557 regset
->supply_regset (regset
, regcache
, -1, buf
, regsetsize
);
560 /* Use ptrace to store register REGNUM of the regset with note type
561 REGSET_ID, size REGSETSIZE, and layout described by REGSET, from
562 REGCACHE back to process/thread TID. If REGNUM is -1 all registers
563 in the set are collected and stored. */
566 store_regset (const struct regcache
*regcache
, int tid
, int regnum
,
567 int regset_id
, int regsetsize
, const struct regset
*regset
)
569 void *buf
= alloca (regsetsize
);
573 iov
.iov_len
= regsetsize
;
575 /* Make sure that the buffer that will be stored has up to date values
576 for the registers that won't be collected. */
577 if (ptrace (PTRACE_GETREGSET
, tid
, regset_id
, &iov
) < 0)
578 perror_with_name (_("Couldn't get register set"));
580 regset
->collect_regset (regset
, regcache
, regnum
, buf
, regsetsize
);
582 if (ptrace (PTRACE_SETREGSET
, tid
, regset_id
, &iov
) < 0)
583 perror_with_name (_("Couldn't set register set"));
586 /* Check whether the kernel provides a register set with number
587 REGSET_ID of size REGSETSIZE for process/thread TID. */
590 check_regset (int tid
, int regset_id
, int regsetsize
)
592 void *buf
= alloca (regsetsize
);
596 iov
.iov_len
= regsetsize
;
598 if (ptrace (PTRACE_GETREGSET
, tid
, regset_id
, &iov
) >= 0
606 fetch_register (struct regcache
*regcache
, int tid
, int regno
)
608 struct gdbarch
*gdbarch
= regcache
->arch ();
609 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
610 /* This isn't really an address. But ptrace thinks of it as one. */
611 CORE_ADDR regaddr
= ppc_register_u_addr (gdbarch
, regno
);
612 int bytes_transferred
;
613 gdb_byte buf
[PPC_MAX_REGISTER_SIZE
];
615 if (altivec_register_p (gdbarch
, regno
))
617 /* If this is the first time through, or if it is not the first
618 time through, and we have comfirmed that there is kernel
619 support for such a ptrace request, then go and fetch the
621 if (have_ptrace_getvrregs
)
623 fetch_altivec_registers (regcache
, tid
, regno
);
626 /* If we have discovered that there is no ptrace support for
627 AltiVec registers, fall through and return zeroes, because
628 regaddr will be -1 in this case. */
630 else if (vsx_register_p (gdbarch
, regno
))
632 if (have_ptrace_getsetvsxregs
)
634 fetch_vsx_registers (regcache
, tid
, regno
);
638 else if (spe_register_p (gdbarch
, regno
))
640 fetch_spe_register (regcache
, tid
, regno
);
643 else if (regno
== PPC_DSCR_REGNUM
)
645 gdb_assert (tdep
->ppc_dscr_regnum
!= -1);
647 fetch_regset (regcache
, tid
, NT_PPC_DSCR
,
648 PPC_LINUX_SIZEOF_DSCRREGSET
,
649 &ppc32_linux_dscrregset
);
652 else if (regno
== PPC_PPR_REGNUM
)
654 gdb_assert (tdep
->ppc_ppr_regnum
!= -1);
656 fetch_regset (regcache
, tid
, NT_PPC_PPR
,
657 PPC_LINUX_SIZEOF_PPRREGSET
,
658 &ppc32_linux_pprregset
);
661 else if (regno
== PPC_TAR_REGNUM
)
663 gdb_assert (tdep
->ppc_tar_regnum
!= -1);
665 fetch_regset (regcache
, tid
, NT_PPC_TAR
,
666 PPC_LINUX_SIZEOF_TARREGSET
,
667 &ppc32_linux_tarregset
);
670 else if (PPC_IS_EBB_REGNUM (regno
))
672 gdb_assert (tdep
->have_ebb
);
674 fetch_regset (regcache
, tid
, NT_PPC_EBB
,
675 PPC_LINUX_SIZEOF_EBBREGSET
,
676 &ppc32_linux_ebbregset
);
679 else if (PPC_IS_PMU_REGNUM (regno
))
681 gdb_assert (tdep
->ppc_mmcr0_regnum
!= -1);
683 fetch_regset (regcache
, tid
, NT_PPC_PMU
,
684 PPC_LINUX_SIZEOF_PMUREGSET
,
685 &ppc32_linux_pmuregset
);
688 else if (PPC_IS_TMSPR_REGNUM (regno
))
690 gdb_assert (tdep
->have_htm_spr
);
692 fetch_regset (regcache
, tid
, NT_PPC_TM_SPR
,
693 PPC_LINUX_SIZEOF_TM_SPRREGSET
,
694 &ppc32_linux_tm_sprregset
);
697 else if (PPC_IS_CKPTGP_REGNUM (regno
))
699 gdb_assert (tdep
->have_htm_core
);
701 const struct regset
*cgprregset
= ppc_linux_cgprregset (gdbarch
);
702 fetch_regset (regcache
, tid
, NT_PPC_TM_CGPR
,
703 (tdep
->wordsize
== 4?
704 PPC32_LINUX_SIZEOF_CGPRREGSET
705 : PPC64_LINUX_SIZEOF_CGPRREGSET
),
709 else if (PPC_IS_CKPTFP_REGNUM (regno
))
711 gdb_assert (tdep
->have_htm_fpu
);
713 fetch_regset (regcache
, tid
, NT_PPC_TM_CFPR
,
714 PPC_LINUX_SIZEOF_CFPRREGSET
,
715 &ppc32_linux_cfprregset
);
718 else if (PPC_IS_CKPTVMX_REGNUM (regno
))
720 gdb_assert (tdep
->have_htm_altivec
);
722 const struct regset
*cvmxregset
= ppc_linux_cvmxregset (gdbarch
);
723 fetch_regset (regcache
, tid
, NT_PPC_TM_CVMX
,
724 PPC_LINUX_SIZEOF_CVMXREGSET
,
728 else if (PPC_IS_CKPTVSX_REGNUM (regno
))
730 gdb_assert (tdep
->have_htm_vsx
);
732 fetch_regset (regcache
, tid
, NT_PPC_TM_CVSX
,
733 PPC_LINUX_SIZEOF_CVSXREGSET
,
734 &ppc32_linux_cvsxregset
);
737 else if (regno
== PPC_CPPR_REGNUM
)
739 gdb_assert (tdep
->ppc_cppr_regnum
!= -1);
741 fetch_regset (regcache
, tid
, NT_PPC_TM_CPPR
,
742 PPC_LINUX_SIZEOF_CPPRREGSET
,
743 &ppc32_linux_cpprregset
);
746 else if (regno
== PPC_CDSCR_REGNUM
)
748 gdb_assert (tdep
->ppc_cdscr_regnum
!= -1);
750 fetch_regset (regcache
, tid
, NT_PPC_TM_CDSCR
,
751 PPC_LINUX_SIZEOF_CDSCRREGSET
,
752 &ppc32_linux_cdscrregset
);
755 else if (regno
== PPC_CTAR_REGNUM
)
757 gdb_assert (tdep
->ppc_ctar_regnum
!= -1);
759 fetch_regset (regcache
, tid
, NT_PPC_TM_CTAR
,
760 PPC_LINUX_SIZEOF_CTARREGSET
,
761 &ppc32_linux_ctarregset
);
767 memset (buf
, '\0', register_size (gdbarch
, regno
)); /* Supply zeroes */
768 regcache
->raw_supply (regno
, buf
);
772 /* Read the raw register using sizeof(long) sized chunks. On a
773 32-bit platform, 64-bit floating-point registers will require two
775 for (bytes_transferred
= 0;
776 bytes_transferred
< register_size (gdbarch
, regno
);
777 bytes_transferred
+= sizeof (long))
782 l
= ptrace (PTRACE_PEEKUSER
, tid
, (PTRACE_TYPE_ARG3
) regaddr
, 0);
783 regaddr
+= sizeof (long);
787 xsnprintf (message
, sizeof (message
), "reading register %s (#%d)",
788 gdbarch_register_name (gdbarch
, regno
), regno
);
789 perror_with_name (message
);
791 memcpy (&buf
[bytes_transferred
], &l
, sizeof (l
));
794 /* Now supply the register. Keep in mind that the regcache's idea
795 of the register's size may not be a multiple of sizeof
797 if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_LITTLE
)
799 /* Little-endian values are always found at the left end of the
800 bytes transferred. */
801 regcache
->raw_supply (regno
, buf
);
803 else if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
)
805 /* Big-endian values are found at the right end of the bytes
807 size_t padding
= (bytes_transferred
- register_size (gdbarch
, regno
));
808 regcache
->raw_supply (regno
, buf
+ padding
);
811 internal_error (__FILE__
, __LINE__
,
812 _("fetch_register: unexpected byte order: %d"),
813 gdbarch_byte_order (gdbarch
));
816 /* This function actually issues the request to ptrace, telling
817 it to get all general-purpose registers and put them into the
820 If the ptrace request does not exist, this function returns 0
821 and properly sets the have_ptrace_* flag. If the request fails,
822 this function calls perror_with_name. Otherwise, if the request
823 succeeds, then the regcache gets filled and 1 is returned. */
825 fetch_all_gp_regs (struct regcache
*regcache
, int tid
)
827 gdb_gregset_t gregset
;
829 if (ptrace (PTRACE_GETREGS
, tid
, 0, (void *) &gregset
) < 0)
833 have_ptrace_getsetregs
= 0;
836 perror_with_name (_("Couldn't get general-purpose registers."));
839 supply_gregset (regcache
, (const gdb_gregset_t
*) &gregset
);
844 /* This is a wrapper for the fetch_all_gp_regs function. It is
845 responsible for verifying if this target has the ptrace request
846 that can be used to fetch all general-purpose registers at one
847 shot. If it doesn't, then we should fetch them using the
848 old-fashioned way, which is to iterate over the registers and
849 request them one by one. */
851 fetch_gp_regs (struct regcache
*regcache
, int tid
)
853 struct gdbarch
*gdbarch
= regcache
->arch ();
854 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
857 if (have_ptrace_getsetregs
)
858 if (fetch_all_gp_regs (regcache
, tid
))
861 /* If we've hit this point, it doesn't really matter which
862 architecture we are using. We just need to read the
863 registers in the "old-fashioned way". */
864 for (i
= 0; i
< ppc_num_gprs
; i
++)
865 fetch_register (regcache
, tid
, tdep
->ppc_gp0_regnum
+ i
);
868 /* This function actually issues the request to ptrace, telling
869 it to get all floating-point registers and put them into the
872 If the ptrace request does not exist, this function returns 0
873 and properly sets the have_ptrace_* flag. If the request fails,
874 this function calls perror_with_name. Otherwise, if the request
875 succeeds, then the regcache gets filled and 1 is returned. */
877 fetch_all_fp_regs (struct regcache
*regcache
, int tid
)
879 gdb_fpregset_t fpregs
;
881 if (ptrace (PTRACE_GETFPREGS
, tid
, 0, (void *) &fpregs
) < 0)
885 have_ptrace_getsetfpregs
= 0;
888 perror_with_name (_("Couldn't get floating-point registers."));
891 supply_fpregset (regcache
, (const gdb_fpregset_t
*) &fpregs
);
896 /* This is a wrapper for the fetch_all_fp_regs function. It is
897 responsible for verifying if this target has the ptrace request
898 that can be used to fetch all floating-point registers at one
899 shot. If it doesn't, then we should fetch them using the
900 old-fashioned way, which is to iterate over the registers and
901 request them one by one. */
903 fetch_fp_regs (struct regcache
*regcache
, int tid
)
905 struct gdbarch
*gdbarch
= regcache
->arch ();
906 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
909 if (have_ptrace_getsetfpregs
)
910 if (fetch_all_fp_regs (regcache
, tid
))
913 /* If we've hit this point, it doesn't really matter which
914 architecture we are using. We just need to read the
915 registers in the "old-fashioned way". */
916 for (i
= 0; i
< ppc_num_fprs
; i
++)
917 fetch_register (regcache
, tid
, tdep
->ppc_fp0_regnum
+ i
);
921 fetch_ppc_registers (struct regcache
*regcache
, int tid
)
923 struct gdbarch
*gdbarch
= regcache
->arch ();
924 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
926 fetch_gp_regs (regcache
, tid
);
927 if (tdep
->ppc_fp0_regnum
>= 0)
928 fetch_fp_regs (regcache
, tid
);
929 fetch_register (regcache
, tid
, gdbarch_pc_regnum (gdbarch
));
930 if (tdep
->ppc_ps_regnum
!= -1)
931 fetch_register (regcache
, tid
, tdep
->ppc_ps_regnum
);
932 if (tdep
->ppc_cr_regnum
!= -1)
933 fetch_register (regcache
, tid
, tdep
->ppc_cr_regnum
);
934 if (tdep
->ppc_lr_regnum
!= -1)
935 fetch_register (regcache
, tid
, tdep
->ppc_lr_regnum
);
936 if (tdep
->ppc_ctr_regnum
!= -1)
937 fetch_register (regcache
, tid
, tdep
->ppc_ctr_regnum
);
938 if (tdep
->ppc_xer_regnum
!= -1)
939 fetch_register (regcache
, tid
, tdep
->ppc_xer_regnum
);
940 if (tdep
->ppc_mq_regnum
!= -1)
941 fetch_register (regcache
, tid
, tdep
->ppc_mq_regnum
);
942 if (ppc_linux_trap_reg_p (gdbarch
))
944 fetch_register (regcache
, tid
, PPC_ORIG_R3_REGNUM
);
945 fetch_register (regcache
, tid
, PPC_TRAP_REGNUM
);
947 if (tdep
->ppc_fpscr_regnum
!= -1)
948 fetch_register (regcache
, tid
, tdep
->ppc_fpscr_regnum
);
949 if (have_ptrace_getvrregs
)
950 if (tdep
->ppc_vr0_regnum
!= -1 && tdep
->ppc_vrsave_regnum
!= -1)
951 fetch_altivec_registers (regcache
, tid
, -1);
952 if (have_ptrace_getsetvsxregs
)
953 if (tdep
->ppc_vsr0_upper_regnum
!= -1)
954 fetch_vsx_registers (regcache
, tid
, -1);
955 if (tdep
->ppc_ev0_upper_regnum
>= 0)
956 fetch_spe_register (regcache
, tid
, -1);
957 if (tdep
->ppc_ppr_regnum
!= -1)
958 fetch_regset (regcache
, tid
, NT_PPC_PPR
,
959 PPC_LINUX_SIZEOF_PPRREGSET
,
960 &ppc32_linux_pprregset
);
961 if (tdep
->ppc_dscr_regnum
!= -1)
962 fetch_regset (regcache
, tid
, NT_PPC_DSCR
,
963 PPC_LINUX_SIZEOF_DSCRREGSET
,
964 &ppc32_linux_dscrregset
);
965 if (tdep
->ppc_tar_regnum
!= -1)
966 fetch_regset (regcache
, tid
, NT_PPC_TAR
,
967 PPC_LINUX_SIZEOF_TARREGSET
,
968 &ppc32_linux_tarregset
);
970 fetch_regset (regcache
, tid
, NT_PPC_EBB
,
971 PPC_LINUX_SIZEOF_EBBREGSET
,
972 &ppc32_linux_ebbregset
);
973 if (tdep
->ppc_mmcr0_regnum
!= -1)
974 fetch_regset (regcache
, tid
, NT_PPC_PMU
,
975 PPC_LINUX_SIZEOF_PMUREGSET
,
976 &ppc32_linux_pmuregset
);
977 if (tdep
->have_htm_spr
)
978 fetch_regset (regcache
, tid
, NT_PPC_TM_SPR
,
979 PPC_LINUX_SIZEOF_TM_SPRREGSET
,
980 &ppc32_linux_tm_sprregset
);
981 if (tdep
->have_htm_core
)
983 const struct regset
*cgprregset
= ppc_linux_cgprregset (gdbarch
);
984 fetch_regset (regcache
, tid
, NT_PPC_TM_CGPR
,
985 (tdep
->wordsize
== 4?
986 PPC32_LINUX_SIZEOF_CGPRREGSET
987 : PPC64_LINUX_SIZEOF_CGPRREGSET
),
990 if (tdep
->have_htm_fpu
)
991 fetch_regset (regcache
, tid
, NT_PPC_TM_CFPR
,
992 PPC_LINUX_SIZEOF_CFPRREGSET
,
993 &ppc32_linux_cfprregset
);
994 if (tdep
->have_htm_altivec
)
996 const struct regset
*cvmxregset
= ppc_linux_cvmxregset (gdbarch
);
997 fetch_regset (regcache
, tid
, NT_PPC_TM_CVMX
,
998 PPC_LINUX_SIZEOF_CVMXREGSET
,
1001 if (tdep
->have_htm_vsx
)
1002 fetch_regset (regcache
, tid
, NT_PPC_TM_CVSX
,
1003 PPC_LINUX_SIZEOF_CVSXREGSET
,
1004 &ppc32_linux_cvsxregset
);
1005 if (tdep
->ppc_cppr_regnum
!= -1)
1006 fetch_regset (regcache
, tid
, NT_PPC_TM_CPPR
,
1007 PPC_LINUX_SIZEOF_CPPRREGSET
,
1008 &ppc32_linux_cpprregset
);
1009 if (tdep
->ppc_cdscr_regnum
!= -1)
1010 fetch_regset (regcache
, tid
, NT_PPC_TM_CDSCR
,
1011 PPC_LINUX_SIZEOF_CDSCRREGSET
,
1012 &ppc32_linux_cdscrregset
);
1013 if (tdep
->ppc_ctar_regnum
!= -1)
1014 fetch_regset (regcache
, tid
, NT_PPC_TM_CTAR
,
1015 PPC_LINUX_SIZEOF_CTARREGSET
,
1016 &ppc32_linux_ctarregset
);
1019 /* Fetch registers from the child process. Fetch all registers if
1020 regno == -1, otherwise fetch all general registers or all floating
1021 point registers depending upon the value of regno. */
1023 ppc_linux_nat_target::fetch_registers (struct regcache
*regcache
, int regno
)
1025 pid_t tid
= get_ptrace_pid (regcache
->ptid ());
1028 fetch_ppc_registers (regcache
, tid
);
1030 fetch_register (regcache
, tid
, regno
);
1034 store_vsx_registers (const struct regcache
*regcache
, int tid
, int regno
)
1037 gdb_vsxregset_t regs
;
1038 const struct regset
*vsxregset
= ppc_linux_vsxregset ();
1040 ret
= ptrace (PTRACE_GETVSXREGS
, tid
, 0, ®s
);
1045 have_ptrace_getsetvsxregs
= 0;
1048 perror_with_name (_("Unable to fetch VSX registers"));
1051 vsxregset
->collect_regset (vsxregset
, regcache
, regno
, ®s
,
1052 PPC_LINUX_SIZEOF_VSXREGSET
);
1054 ret
= ptrace (PTRACE_SETVSXREGS
, tid
, 0, ®s
);
1056 perror_with_name (_("Unable to store VSX registers"));
1060 store_altivec_registers (const struct regcache
*regcache
, int tid
,
1064 gdb_vrregset_t regs
;
1065 struct gdbarch
*gdbarch
= regcache
->arch ();
1066 const struct regset
*vrregset
= ppc_linux_vrregset (gdbarch
);
1068 ret
= ptrace (PTRACE_GETVRREGS
, tid
, 0, ®s
);
1073 have_ptrace_getvrregs
= 0;
1076 perror_with_name (_("Unable to fetch AltiVec registers"));
1079 vrregset
->collect_regset (vrregset
, regcache
, regno
, ®s
,
1080 PPC_LINUX_SIZEOF_VRREGSET
);
1082 ret
= ptrace (PTRACE_SETVRREGS
, tid
, 0, ®s
);
1084 perror_with_name (_("Unable to store AltiVec registers"));
1087 /* Assuming TID referrs to an SPE process, set the top halves of TID's
1088 general-purpose registers and its SPE-specific registers to the
1089 values in EVRREGSET. If we don't support PTRACE_SETEVRREGS, do
1092 All the logic to deal with whether or not the PTRACE_GETEVRREGS and
1093 PTRACE_SETEVRREGS requests are supported is isolated here, and in
1094 get_spe_registers. */
1096 set_spe_registers (int tid
, struct gdb_evrregset_t
*evrregset
)
1098 if (have_ptrace_getsetevrregs
)
1100 if (ptrace (PTRACE_SETEVRREGS
, tid
, 0, evrregset
) >= 0)
1104 /* EIO means that the PTRACE_SETEVRREGS request isn't
1105 supported; we fail silently, and don't try the call
1108 have_ptrace_getsetevrregs
= 0;
1110 /* Anything else needs to be reported. */
1111 perror_with_name (_("Unable to set SPE registers"));
1116 /* Write GDB's value for the SPE-specific raw register REGNO to TID.
1117 If REGNO is -1, write the values of all the SPE-specific
1120 store_spe_register (const struct regcache
*regcache
, int tid
, int regno
)
1122 struct gdbarch
*gdbarch
= regcache
->arch ();
1123 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1124 struct gdb_evrregset_t evrregs
;
1126 gdb_assert (sizeof (evrregs
.evr
[0])
1127 == register_size (gdbarch
, tdep
->ppc_ev0_upper_regnum
));
1128 gdb_assert (sizeof (evrregs
.acc
)
1129 == register_size (gdbarch
, tdep
->ppc_acc_regnum
));
1130 gdb_assert (sizeof (evrregs
.spefscr
)
1131 == register_size (gdbarch
, tdep
->ppc_spefscr_regnum
));
1134 /* Since we're going to write out every register, the code below
1135 should store to every field of evrregs; if that doesn't happen,
1136 make it obvious by initializing it with suspicious values. */
1137 memset (&evrregs
, 42, sizeof (evrregs
));
1139 /* We can only read and write the entire EVR register set at a
1140 time, so to write just a single register, we do a
1141 read-modify-write maneuver. */
1142 get_spe_registers (tid
, &evrregs
);
1148 for (i
= 0; i
< ppc_num_gprs
; i
++)
1149 regcache
->raw_collect (tdep
->ppc_ev0_upper_regnum
+ i
,
1152 else if (tdep
->ppc_ev0_upper_regnum
<= regno
1153 && regno
< tdep
->ppc_ev0_upper_regnum
+ ppc_num_gprs
)
1154 regcache
->raw_collect (regno
,
1155 &evrregs
.evr
[regno
- tdep
->ppc_ev0_upper_regnum
]);
1158 || regno
== tdep
->ppc_acc_regnum
)
1159 regcache
->raw_collect (tdep
->ppc_acc_regnum
,
1163 || regno
== tdep
->ppc_spefscr_regnum
)
1164 regcache
->raw_collect (tdep
->ppc_spefscr_regnum
,
1167 /* Write back the modified register set. */
1168 set_spe_registers (tid
, &evrregs
);
1172 store_register (const struct regcache
*regcache
, int tid
, int regno
)
1174 struct gdbarch
*gdbarch
= regcache
->arch ();
1175 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1176 /* This isn't really an address. But ptrace thinks of it as one. */
1177 CORE_ADDR regaddr
= ppc_register_u_addr (gdbarch
, regno
);
1179 size_t bytes_to_transfer
;
1180 gdb_byte buf
[PPC_MAX_REGISTER_SIZE
];
1182 if (altivec_register_p (gdbarch
, regno
))
1184 store_altivec_registers (regcache
, tid
, regno
);
1187 else if (vsx_register_p (gdbarch
, regno
))
1189 store_vsx_registers (regcache
, tid
, regno
);
1192 else if (spe_register_p (gdbarch
, regno
))
1194 store_spe_register (regcache
, tid
, regno
);
1197 else if (regno
== PPC_DSCR_REGNUM
)
1199 gdb_assert (tdep
->ppc_dscr_regnum
!= -1);
1201 store_regset (regcache
, tid
, regno
, NT_PPC_DSCR
,
1202 PPC_LINUX_SIZEOF_DSCRREGSET
,
1203 &ppc32_linux_dscrregset
);
1206 else if (regno
== PPC_PPR_REGNUM
)
1208 gdb_assert (tdep
->ppc_ppr_regnum
!= -1);
1210 store_regset (regcache
, tid
, regno
, NT_PPC_PPR
,
1211 PPC_LINUX_SIZEOF_PPRREGSET
,
1212 &ppc32_linux_pprregset
);
1215 else if (regno
== PPC_TAR_REGNUM
)
1217 gdb_assert (tdep
->ppc_tar_regnum
!= -1);
1219 store_regset (regcache
, tid
, regno
, NT_PPC_TAR
,
1220 PPC_LINUX_SIZEOF_TARREGSET
,
1221 &ppc32_linux_tarregset
);
1224 else if (PPC_IS_EBB_REGNUM (regno
))
1226 gdb_assert (tdep
->have_ebb
);
1228 store_regset (regcache
, tid
, regno
, NT_PPC_EBB
,
1229 PPC_LINUX_SIZEOF_EBBREGSET
,
1230 &ppc32_linux_ebbregset
);
1233 else if (PPC_IS_PMU_REGNUM (regno
))
1235 gdb_assert (tdep
->ppc_mmcr0_regnum
!= -1);
1237 store_regset (regcache
, tid
, regno
, NT_PPC_PMU
,
1238 PPC_LINUX_SIZEOF_PMUREGSET
,
1239 &ppc32_linux_pmuregset
);
1242 else if (PPC_IS_TMSPR_REGNUM (regno
))
1244 gdb_assert (tdep
->have_htm_spr
);
1246 store_regset (regcache
, tid
, regno
, NT_PPC_TM_SPR
,
1247 PPC_LINUX_SIZEOF_TM_SPRREGSET
,
1248 &ppc32_linux_tm_sprregset
);
1251 else if (PPC_IS_CKPTGP_REGNUM (regno
))
1253 gdb_assert (tdep
->have_htm_core
);
1255 const struct regset
*cgprregset
= ppc_linux_cgprregset (gdbarch
);
1256 store_regset (regcache
, tid
, regno
, NT_PPC_TM_CGPR
,
1257 (tdep
->wordsize
== 4?
1258 PPC32_LINUX_SIZEOF_CGPRREGSET
1259 : PPC64_LINUX_SIZEOF_CGPRREGSET
),
1263 else if (PPC_IS_CKPTFP_REGNUM (regno
))
1265 gdb_assert (tdep
->have_htm_fpu
);
1267 store_regset (regcache
, tid
, regno
, NT_PPC_TM_CFPR
,
1268 PPC_LINUX_SIZEOF_CFPRREGSET
,
1269 &ppc32_linux_cfprregset
);
1272 else if (PPC_IS_CKPTVMX_REGNUM (regno
))
1274 gdb_assert (tdep
->have_htm_altivec
);
1276 const struct regset
*cvmxregset
= ppc_linux_cvmxregset (gdbarch
);
1277 store_regset (regcache
, tid
, regno
, NT_PPC_TM_CVMX
,
1278 PPC_LINUX_SIZEOF_CVMXREGSET
,
1282 else if (PPC_IS_CKPTVSX_REGNUM (regno
))
1284 gdb_assert (tdep
->have_htm_vsx
);
1286 store_regset (regcache
, tid
, regno
, NT_PPC_TM_CVSX
,
1287 PPC_LINUX_SIZEOF_CVSXREGSET
,
1288 &ppc32_linux_cvsxregset
);
1291 else if (regno
== PPC_CPPR_REGNUM
)
1293 gdb_assert (tdep
->ppc_cppr_regnum
!= -1);
1295 store_regset (regcache
, tid
, regno
, NT_PPC_TM_CPPR
,
1296 PPC_LINUX_SIZEOF_CPPRREGSET
,
1297 &ppc32_linux_cpprregset
);
1300 else if (regno
== PPC_CDSCR_REGNUM
)
1302 gdb_assert (tdep
->ppc_cdscr_regnum
!= -1);
1304 store_regset (regcache
, tid
, regno
, NT_PPC_TM_CDSCR
,
1305 PPC_LINUX_SIZEOF_CDSCRREGSET
,
1306 &ppc32_linux_cdscrregset
);
1309 else if (regno
== PPC_CTAR_REGNUM
)
1311 gdb_assert (tdep
->ppc_ctar_regnum
!= -1);
1313 store_regset (regcache
, tid
, regno
, NT_PPC_TM_CTAR
,
1314 PPC_LINUX_SIZEOF_CTARREGSET
,
1315 &ppc32_linux_ctarregset
);
1322 /* First collect the register. Keep in mind that the regcache's
1323 idea of the register's size may not be a multiple of sizeof
1325 memset (buf
, 0, sizeof buf
);
1326 bytes_to_transfer
= align_up (register_size (gdbarch
, regno
), sizeof (long));
1327 if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_LITTLE
)
1329 /* Little-endian values always sit at the left end of the buffer. */
1330 regcache
->raw_collect (regno
, buf
);
1332 else if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
)
1334 /* Big-endian values sit at the right end of the buffer. */
1335 size_t padding
= (bytes_to_transfer
- register_size (gdbarch
, regno
));
1336 regcache
->raw_collect (regno
, buf
+ padding
);
1339 for (i
= 0; i
< bytes_to_transfer
; i
+= sizeof (long))
1343 memcpy (&l
, &buf
[i
], sizeof (l
));
1345 ptrace (PTRACE_POKEUSER
, tid
, (PTRACE_TYPE_ARG3
) regaddr
, l
);
1346 regaddr
+= sizeof (long);
1349 && (regno
== tdep
->ppc_fpscr_regnum
1350 || regno
== PPC_ORIG_R3_REGNUM
1351 || regno
== PPC_TRAP_REGNUM
))
1353 /* Some older kernel versions don't allow fpscr, orig_r3
1354 or trap to be written. */
1361 xsnprintf (message
, sizeof (message
), "writing register %s (#%d)",
1362 gdbarch_register_name (gdbarch
, regno
), regno
);
1363 perror_with_name (message
);
1368 /* This function actually issues the request to ptrace, telling
1369 it to store all general-purpose registers present in the specified
1372 If the ptrace request does not exist, this function returns 0
1373 and properly sets the have_ptrace_* flag. If the request fails,
1374 this function calls perror_with_name. Otherwise, if the request
1375 succeeds, then the regcache is stored and 1 is returned. */
1377 store_all_gp_regs (const struct regcache
*regcache
, int tid
, int regno
)
1379 gdb_gregset_t gregset
;
1381 if (ptrace (PTRACE_GETREGS
, tid
, 0, (void *) &gregset
) < 0)
1385 have_ptrace_getsetregs
= 0;
1388 perror_with_name (_("Couldn't get general-purpose registers."));
1391 fill_gregset (regcache
, &gregset
, regno
);
1393 if (ptrace (PTRACE_SETREGS
, tid
, 0, (void *) &gregset
) < 0)
1397 have_ptrace_getsetregs
= 0;
1400 perror_with_name (_("Couldn't set general-purpose registers."));
1406 /* This is a wrapper for the store_all_gp_regs function. It is
1407 responsible for verifying if this target has the ptrace request
1408 that can be used to store all general-purpose registers at one
1409 shot. If it doesn't, then we should store them using the
1410 old-fashioned way, which is to iterate over the registers and
1411 store them one by one. */
1413 store_gp_regs (const struct regcache
*regcache
, int tid
, int regno
)
1415 struct gdbarch
*gdbarch
= regcache
->arch ();
1416 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1419 if (have_ptrace_getsetregs
)
1420 if (store_all_gp_regs (regcache
, tid
, regno
))
1423 /* If we hit this point, it doesn't really matter which
1424 architecture we are using. We just need to store the
1425 registers in the "old-fashioned way". */
1426 for (i
= 0; i
< ppc_num_gprs
; i
++)
1427 store_register (regcache
, tid
, tdep
->ppc_gp0_regnum
+ i
);
1430 /* This function actually issues the request to ptrace, telling
1431 it to store all floating-point registers present in the specified
1434 If the ptrace request does not exist, this function returns 0
1435 and properly sets the have_ptrace_* flag. If the request fails,
1436 this function calls perror_with_name. Otherwise, if the request
1437 succeeds, then the regcache is stored and 1 is returned. */
1439 store_all_fp_regs (const struct regcache
*regcache
, int tid
, int regno
)
1441 gdb_fpregset_t fpregs
;
1443 if (ptrace (PTRACE_GETFPREGS
, tid
, 0, (void *) &fpregs
) < 0)
1447 have_ptrace_getsetfpregs
= 0;
1450 perror_with_name (_("Couldn't get floating-point registers."));
1453 fill_fpregset (regcache
, &fpregs
, regno
);
1455 if (ptrace (PTRACE_SETFPREGS
, tid
, 0, (void *) &fpregs
) < 0)
1459 have_ptrace_getsetfpregs
= 0;
1462 perror_with_name (_("Couldn't set floating-point registers."));
1468 /* This is a wrapper for the store_all_fp_regs function. It is
1469 responsible for verifying if this target has the ptrace request
1470 that can be used to store all floating-point registers at one
1471 shot. If it doesn't, then we should store them using the
1472 old-fashioned way, which is to iterate over the registers and
1473 store them one by one. */
1475 store_fp_regs (const struct regcache
*regcache
, int tid
, int regno
)
1477 struct gdbarch
*gdbarch
= regcache
->arch ();
1478 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1481 if (have_ptrace_getsetfpregs
)
1482 if (store_all_fp_regs (regcache
, tid
, regno
))
1485 /* If we hit this point, it doesn't really matter which
1486 architecture we are using. We just need to store the
1487 registers in the "old-fashioned way". */
1488 for (i
= 0; i
< ppc_num_fprs
; i
++)
1489 store_register (regcache
, tid
, tdep
->ppc_fp0_regnum
+ i
);
1493 store_ppc_registers (const struct regcache
*regcache
, int tid
)
1495 struct gdbarch
*gdbarch
= regcache
->arch ();
1496 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1498 store_gp_regs (regcache
, tid
, -1);
1499 if (tdep
->ppc_fp0_regnum
>= 0)
1500 store_fp_regs (regcache
, tid
, -1);
1501 store_register (regcache
, tid
, gdbarch_pc_regnum (gdbarch
));
1502 if (tdep
->ppc_ps_regnum
!= -1)
1503 store_register (regcache
, tid
, tdep
->ppc_ps_regnum
);
1504 if (tdep
->ppc_cr_regnum
!= -1)
1505 store_register (regcache
, tid
, tdep
->ppc_cr_regnum
);
1506 if (tdep
->ppc_lr_regnum
!= -1)
1507 store_register (regcache
, tid
, tdep
->ppc_lr_regnum
);
1508 if (tdep
->ppc_ctr_regnum
!= -1)
1509 store_register (regcache
, tid
, tdep
->ppc_ctr_regnum
);
1510 if (tdep
->ppc_xer_regnum
!= -1)
1511 store_register (regcache
, tid
, tdep
->ppc_xer_regnum
);
1512 if (tdep
->ppc_mq_regnum
!= -1)
1513 store_register (regcache
, tid
, tdep
->ppc_mq_regnum
);
1514 if (tdep
->ppc_fpscr_regnum
!= -1)
1515 store_register (regcache
, tid
, tdep
->ppc_fpscr_regnum
);
1516 if (ppc_linux_trap_reg_p (gdbarch
))
1518 store_register (regcache
, tid
, PPC_ORIG_R3_REGNUM
);
1519 store_register (regcache
, tid
, PPC_TRAP_REGNUM
);
1521 if (have_ptrace_getvrregs
)
1522 if (tdep
->ppc_vr0_regnum
!= -1 && tdep
->ppc_vrsave_regnum
!= -1)
1523 store_altivec_registers (regcache
, tid
, -1);
1524 if (have_ptrace_getsetvsxregs
)
1525 if (tdep
->ppc_vsr0_upper_regnum
!= -1)
1526 store_vsx_registers (regcache
, tid
, -1);
1527 if (tdep
->ppc_ev0_upper_regnum
>= 0)
1528 store_spe_register (regcache
, tid
, -1);
1529 if (tdep
->ppc_ppr_regnum
!= -1)
1530 store_regset (regcache
, tid
, -1, NT_PPC_PPR
,
1531 PPC_LINUX_SIZEOF_PPRREGSET
,
1532 &ppc32_linux_pprregset
);
1533 if (tdep
->ppc_dscr_regnum
!= -1)
1534 store_regset (regcache
, tid
, -1, NT_PPC_DSCR
,
1535 PPC_LINUX_SIZEOF_DSCRREGSET
,
1536 &ppc32_linux_dscrregset
);
1537 if (tdep
->ppc_tar_regnum
!= -1)
1538 store_regset (regcache
, tid
, -1, NT_PPC_TAR
,
1539 PPC_LINUX_SIZEOF_TARREGSET
,
1540 &ppc32_linux_tarregset
);
1542 if (tdep
->ppc_mmcr0_regnum
!= -1)
1543 store_regset (regcache
, tid
, -1, NT_PPC_PMU
,
1544 PPC_LINUX_SIZEOF_PMUREGSET
,
1545 &ppc32_linux_pmuregset
);
1547 if (tdep
->have_htm_spr
)
1548 store_regset (regcache
, tid
, -1, NT_PPC_TM_SPR
,
1549 PPC_LINUX_SIZEOF_TM_SPRREGSET
,
1550 &ppc32_linux_tm_sprregset
);
1552 /* Because the EBB and checkpointed HTM registers can be
1553 unavailable, attempts to store them here would cause this
1554 function to fail most of the time, so we ignore them. */
1557 /* The cached DABR value, to install in new threads.
1558 This variable is used when the PowerPC HWDEBUG ptrace
1559 interface is not available. */
1560 static long saved_dabr_value
;
1562 /* Global structure that will store information about the available
1563 features provided by the PowerPC HWDEBUG ptrace interface. */
1564 static struct ppc_debug_info hwdebug_info
;
1566 /* Global variable that holds the maximum number of slots that the
1567 kernel will use. This is only used when PowerPC HWDEBUG ptrace interface
1569 static size_t max_slots_number
= 0;
1571 struct hw_break_tuple
1574 struct ppc_hw_breakpoint
*hw_break
;
1577 /* This is an internal VEC created to store information about *points inserted
1578 for each thread. This is used when PowerPC HWDEBUG ptrace interface is
1580 typedef struct thread_points
1582 /* The TID to which this *point relates. */
1584 /* Information about the *point, such as its address, type, etc.
1586 Each element inside this vector corresponds to a hardware
1587 breakpoint or watchpoint in the thread represented by TID. The maximum
1588 size of these vector is MAX_SLOTS_NUMBER. If the hw_break element of
1589 the tuple is NULL, then the position in the vector is free. */
1590 struct hw_break_tuple
*hw_breaks
;
1592 DEF_VEC_P (thread_points_p
);
1594 VEC(thread_points_p
) *ppc_threads
= NULL
;
1596 /* The version of the PowerPC HWDEBUG kernel interface that we will use, if
1598 #define PPC_DEBUG_CURRENT_VERSION 1
1600 /* Returns non-zero if we support the PowerPC HWDEBUG ptrace interface. */
1602 have_ptrace_hwdebug_interface (void)
1604 static int have_ptrace_hwdebug_interface
= -1;
1606 if (have_ptrace_hwdebug_interface
== -1)
1610 tid
= inferior_ptid
.lwp ();
1612 tid
= inferior_ptid
.pid ();
1614 /* Check for kernel support for PowerPC HWDEBUG ptrace interface. */
1615 if (ptrace (PPC_PTRACE_GETHWDBGINFO
, tid
, 0, &hwdebug_info
) >= 0)
1617 /* Check whether PowerPC HWDEBUG ptrace interface is functional and
1618 provides any supported feature. */
1619 if (hwdebug_info
.features
!= 0)
1621 have_ptrace_hwdebug_interface
= 1;
1622 max_slots_number
= hwdebug_info
.num_instruction_bps
1623 + hwdebug_info
.num_data_bps
1624 + hwdebug_info
.num_condition_regs
;
1625 return have_ptrace_hwdebug_interface
;
1628 /* Old school interface and no PowerPC HWDEBUG ptrace support. */
1629 have_ptrace_hwdebug_interface
= 0;
1630 memset (&hwdebug_info
, 0, sizeof (struct ppc_debug_info
));
1633 return have_ptrace_hwdebug_interface
;
1637 ppc_linux_nat_target::can_use_hw_breakpoint (enum bptype type
, int cnt
, int ot
)
1639 int total_hw_wp
, total_hw_bp
;
1641 if (have_ptrace_hwdebug_interface ())
1643 /* When PowerPC HWDEBUG ptrace interface is available, the number of
1644 available hardware watchpoints and breakpoints is stored at the
1645 hwdebug_info struct. */
1646 total_hw_bp
= hwdebug_info
.num_instruction_bps
;
1647 total_hw_wp
= hwdebug_info
.num_data_bps
;
1651 /* When we do not have PowerPC HWDEBUG ptrace interface, we should
1652 consider having 1 hardware watchpoint and no hardware breakpoints. */
1657 if (type
== bp_hardware_watchpoint
|| type
== bp_read_watchpoint
1658 || type
== bp_access_watchpoint
|| type
== bp_watchpoint
)
1660 if (cnt
+ ot
> total_hw_wp
)
1663 else if (type
== bp_hardware_breakpoint
)
1665 if (total_hw_bp
== 0)
1667 /* No hardware breakpoint support. */
1670 if (cnt
> total_hw_bp
)
1674 if (!have_ptrace_hwdebug_interface ())
1677 ptid_t ptid
= inferior_ptid
;
1679 /* We need to know whether ptrace supports PTRACE_SET_DEBUGREG
1680 and whether the target has DABR. If either answer is no, the
1681 ptrace call will return -1. Fail in that case. */
1686 if (ptrace (PTRACE_SET_DEBUGREG
, tid
, 0, 0) == -1)
1694 ppc_linux_nat_target::region_ok_for_hw_watchpoint (CORE_ADDR addr
, int len
)
1696 /* Handle sub-8-byte quantities. */
1700 /* The PowerPC HWDEBUG ptrace interface tells if there are alignment
1701 restrictions for watchpoints in the processors. In that case, we use that
1702 information to determine the hardcoded watchable region for
1704 if (have_ptrace_hwdebug_interface ())
1707 /* Embedded DAC-based processors, like the PowerPC 440 have ranged
1708 watchpoints and can watch any access within an arbitrary memory
1709 region. This is useful to watch arrays and structs, for instance. It
1710 takes two hardware watchpoints though. */
1712 && hwdebug_info
.features
& PPC_DEBUG_FEATURE_DATA_BP_RANGE
1713 && linux_get_hwcap (current_top_target ()) & PPC_FEATURE_BOOKE
)
1715 /* Check if the processor provides DAWR interface. */
1716 if (hwdebug_info
.features
& PPC_DEBUG_FEATURE_DATA_BP_DAWR
)
1717 /* DAWR interface allows to watch up to 512 byte wide ranges which
1718 can't cross a 512 byte boundary. */
1721 region_size
= hwdebug_info
.data_bp_alignment
;
1722 /* Server processors provide one hardware watchpoint and addr+len should
1723 fall in the watchable region provided by the ptrace interface. */
1725 && (addr
+ len
> (addr
& ~(region_size
- 1)) + region_size
))
1728 /* addr+len must fall in the 8 byte watchable region for DABR-based
1729 processors (i.e., server processors). Without the new PowerPC HWDEBUG
1730 ptrace interface, DAC-based processors (i.e., embedded processors) will
1731 use addresses aligned to 4-bytes due to the way the read/write flags are
1732 passed in the old ptrace interface. */
1733 else if (((linux_get_hwcap (current_top_target ()) & PPC_FEATURE_BOOKE
)
1734 && (addr
+ len
) > (addr
& ~3) + 4)
1735 || (addr
+ len
) > (addr
& ~7) + 8)
1741 /* This function compares two ppc_hw_breakpoint structs field-by-field. */
1743 hwdebug_point_cmp (struct ppc_hw_breakpoint
*a
, struct ppc_hw_breakpoint
*b
)
1745 return (a
->trigger_type
== b
->trigger_type
1746 && a
->addr_mode
== b
->addr_mode
1747 && a
->condition_mode
== b
->condition_mode
1748 && a
->addr
== b
->addr
1749 && a
->addr2
== b
->addr2
1750 && a
->condition_value
== b
->condition_value
);
1753 /* This function can be used to retrieve a thread_points by the TID of the
1754 related process/thread. If nothing has been found, and ALLOC_NEW is 0,
1755 it returns NULL. If ALLOC_NEW is non-zero, a new thread_points for the
1756 provided TID will be created and returned. */
1757 static struct thread_points
*
1758 hwdebug_find_thread_points_by_tid (int tid
, int alloc_new
)
1761 struct thread_points
*t
;
1763 for (i
= 0; VEC_iterate (thread_points_p
, ppc_threads
, i
, t
); i
++)
1769 /* Do we need to allocate a new point_item
1770 if the wanted one does not exist? */
1773 t
= XNEW (struct thread_points
);
1774 t
->hw_breaks
= XCNEWVEC (struct hw_break_tuple
, max_slots_number
);
1776 VEC_safe_push (thread_points_p
, ppc_threads
, t
);
1782 /* This function is a generic wrapper that is responsible for inserting a
1783 *point (i.e., calling `ptrace' in order to issue the request to the
1784 kernel) and registering it internally in GDB. */
1786 hwdebug_insert_point (struct ppc_hw_breakpoint
*b
, int tid
)
1790 gdb::unique_xmalloc_ptr
<ppc_hw_breakpoint
> p (XDUP (ppc_hw_breakpoint
, b
));
1791 struct hw_break_tuple
*hw_breaks
;
1792 struct thread_points
*t
;
1795 slot
= ptrace (PPC_PTRACE_SETHWDEBUG
, tid
, 0, p
.get ());
1797 perror_with_name (_("Unexpected error setting breakpoint or watchpoint"));
1799 /* Everything went fine, so we have to register this *point. */
1800 t
= hwdebug_find_thread_points_by_tid (tid
, 1);
1801 gdb_assert (t
!= NULL
);
1802 hw_breaks
= t
->hw_breaks
;
1804 /* Find a free element in the hw_breaks vector. */
1805 for (i
= 0; i
< max_slots_number
; i
++)
1806 if (hw_breaks
[i
].hw_break
== NULL
)
1808 hw_breaks
[i
].slot
= slot
;
1809 hw_breaks
[i
].hw_break
= p
.release ();
1813 gdb_assert (i
!= max_slots_number
);
1816 /* This function is a generic wrapper that is responsible for removing a
1817 *point (i.e., calling `ptrace' in order to issue the request to the
1818 kernel), and unregistering it internally at GDB. */
1820 hwdebug_remove_point (struct ppc_hw_breakpoint
*b
, int tid
)
1823 struct hw_break_tuple
*hw_breaks
;
1824 struct thread_points
*t
;
1826 t
= hwdebug_find_thread_points_by_tid (tid
, 0);
1827 gdb_assert (t
!= NULL
);
1828 hw_breaks
= t
->hw_breaks
;
1830 for (i
= 0; i
< max_slots_number
; i
++)
1831 if (hw_breaks
[i
].hw_break
&& hwdebug_point_cmp (hw_breaks
[i
].hw_break
, b
))
1834 gdb_assert (i
!= max_slots_number
);
1836 /* We have to ignore ENOENT errors because the kernel implements hardware
1837 breakpoints/watchpoints as "one-shot", that is, they are automatically
1838 deleted when hit. */
1840 if (ptrace (PPC_PTRACE_DELHWDEBUG
, tid
, 0, hw_breaks
[i
].slot
) < 0)
1841 if (errno
!= ENOENT
)
1842 perror_with_name (_("Unexpected error deleting "
1843 "breakpoint or watchpoint"));
1845 xfree (hw_breaks
[i
].hw_break
);
1846 hw_breaks
[i
].hw_break
= NULL
;
1849 /* Return the number of registers needed for a ranged breakpoint. */
1852 ppc_linux_nat_target::ranged_break_num_registers ()
1854 return ((have_ptrace_hwdebug_interface ()
1855 && hwdebug_info
.features
& PPC_DEBUG_FEATURE_INSN_BP_RANGE
)?
1859 /* Insert the hardware breakpoint described by BP_TGT. Returns 0 for
1860 success, 1 if hardware breakpoints are not supported or -1 for failure. */
1863 ppc_linux_nat_target::insert_hw_breakpoint (struct gdbarch
*gdbarch
,
1864 struct bp_target_info
*bp_tgt
)
1866 struct lwp_info
*lp
;
1867 struct ppc_hw_breakpoint p
;
1869 if (!have_ptrace_hwdebug_interface ())
1872 p
.version
= PPC_DEBUG_CURRENT_VERSION
;
1873 p
.trigger_type
= PPC_BREAKPOINT_TRIGGER_EXECUTE
;
1874 p
.condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
1875 p
.addr
= (uint64_t) (bp_tgt
->placed_address
= bp_tgt
->reqstd_address
);
1876 p
.condition_value
= 0;
1880 p
.addr_mode
= PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE
;
1882 /* The breakpoint will trigger if the address of the instruction is
1883 within the defined range, as follows: p.addr <= address < p.addr2. */
1884 p
.addr2
= (uint64_t) bp_tgt
->placed_address
+ bp_tgt
->length
;
1888 p
.addr_mode
= PPC_BREAKPOINT_MODE_EXACT
;
1893 hwdebug_insert_point (&p
, lp
->ptid
.lwp ());
1899 ppc_linux_nat_target::remove_hw_breakpoint (struct gdbarch
*gdbarch
,
1900 struct bp_target_info
*bp_tgt
)
1902 struct lwp_info
*lp
;
1903 struct ppc_hw_breakpoint p
;
1905 if (!have_ptrace_hwdebug_interface ())
1908 p
.version
= PPC_DEBUG_CURRENT_VERSION
;
1909 p
.trigger_type
= PPC_BREAKPOINT_TRIGGER_EXECUTE
;
1910 p
.condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
1911 p
.addr
= (uint64_t) bp_tgt
->placed_address
;
1912 p
.condition_value
= 0;
1916 p
.addr_mode
= PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE
;
1918 /* The breakpoint will trigger if the address of the instruction is within
1919 the defined range, as follows: p.addr <= address < p.addr2. */
1920 p
.addr2
= (uint64_t) bp_tgt
->placed_address
+ bp_tgt
->length
;
1924 p
.addr_mode
= PPC_BREAKPOINT_MODE_EXACT
;
1929 hwdebug_remove_point (&p
, lp
->ptid
.lwp ());
1935 get_trigger_type (enum target_hw_bp_type type
)
1939 if (type
== hw_read
)
1940 t
= PPC_BREAKPOINT_TRIGGER_READ
;
1941 else if (type
== hw_write
)
1942 t
= PPC_BREAKPOINT_TRIGGER_WRITE
;
1944 t
= PPC_BREAKPOINT_TRIGGER_READ
| PPC_BREAKPOINT_TRIGGER_WRITE
;
1949 /* Insert a new masked watchpoint at ADDR using the mask MASK.
1950 RW may be hw_read for a read watchpoint, hw_write for a write watchpoint
1951 or hw_access for an access watchpoint. Returns 0 on success and throws
1952 an error on failure. */
1955 ppc_linux_nat_target::insert_mask_watchpoint (CORE_ADDR addr
, CORE_ADDR mask
,
1956 target_hw_bp_type rw
)
1958 struct lwp_info
*lp
;
1959 struct ppc_hw_breakpoint p
;
1961 gdb_assert (have_ptrace_hwdebug_interface ());
1963 p
.version
= PPC_DEBUG_CURRENT_VERSION
;
1964 p
.trigger_type
= get_trigger_type (rw
);
1965 p
.addr_mode
= PPC_BREAKPOINT_MODE_MASK
;
1966 p
.condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
1969 p
.condition_value
= 0;
1972 hwdebug_insert_point (&p
, lp
->ptid
.lwp ());
1977 /* Remove a masked watchpoint at ADDR with the mask MASK.
1978 RW may be hw_read for a read watchpoint, hw_write for a write watchpoint
1979 or hw_access for an access watchpoint. Returns 0 on success and throws
1980 an error on failure. */
1983 ppc_linux_nat_target::remove_mask_watchpoint (CORE_ADDR addr
, CORE_ADDR mask
,
1984 target_hw_bp_type rw
)
1986 struct lwp_info
*lp
;
1987 struct ppc_hw_breakpoint p
;
1989 gdb_assert (have_ptrace_hwdebug_interface ());
1991 p
.version
= PPC_DEBUG_CURRENT_VERSION
;
1992 p
.trigger_type
= get_trigger_type (rw
);
1993 p
.addr_mode
= PPC_BREAKPOINT_MODE_MASK
;
1994 p
.condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
1997 p
.condition_value
= 0;
2000 hwdebug_remove_point (&p
, lp
->ptid
.lwp ());
2005 /* Check whether we have at least one free DVC register. */
2007 can_use_watchpoint_cond_accel (void)
2009 struct thread_points
*p
;
2010 int tid
= inferior_ptid
.lwp ();
2011 int cnt
= hwdebug_info
.num_condition_regs
, i
;
2013 if (!have_ptrace_hwdebug_interface () || cnt
== 0)
2016 p
= hwdebug_find_thread_points_by_tid (tid
, 0);
2020 for (i
= 0; i
< max_slots_number
; i
++)
2021 if (p
->hw_breaks
[i
].hw_break
!= NULL
2022 && (p
->hw_breaks
[i
].hw_break
->condition_mode
2023 != PPC_BREAKPOINT_CONDITION_NONE
))
2026 /* There are no available slots now. */
2034 /* Calculate the enable bits and the contents of the Data Value Compare
2035 debug register present in BookE processors.
2037 ADDR is the address to be watched, LEN is the length of watched data
2038 and DATA_VALUE is the value which will trigger the watchpoint.
2039 On exit, CONDITION_MODE will hold the enable bits for the DVC, and
2040 CONDITION_VALUE will hold the value which should be put in the
2043 calculate_dvc (CORE_ADDR addr
, int len
, CORE_ADDR data_value
,
2044 uint32_t *condition_mode
, uint64_t *condition_value
)
2046 int i
, num_byte_enable
, align_offset
, num_bytes_off_dvc
,
2047 rightmost_enabled_byte
;
2048 CORE_ADDR addr_end_data
, addr_end_dvc
;
2050 /* The DVC register compares bytes within fixed-length windows which
2051 are word-aligned, with length equal to that of the DVC register.
2052 We need to calculate where our watch region is relative to that
2053 window and enable comparison of the bytes which fall within it. */
2055 align_offset
= addr
% hwdebug_info
.sizeof_condition
;
2056 addr_end_data
= addr
+ len
;
2057 addr_end_dvc
= (addr
- align_offset
2058 + hwdebug_info
.sizeof_condition
);
2059 num_bytes_off_dvc
= (addr_end_data
> addr_end_dvc
)?
2060 addr_end_data
- addr_end_dvc
: 0;
2061 num_byte_enable
= len
- num_bytes_off_dvc
;
2062 /* Here, bytes are numbered from right to left. */
2063 rightmost_enabled_byte
= (addr_end_data
< addr_end_dvc
)?
2064 addr_end_dvc
- addr_end_data
: 0;
2066 *condition_mode
= PPC_BREAKPOINT_CONDITION_AND
;
2067 for (i
= 0; i
< num_byte_enable
; i
++)
2069 |= PPC_BREAKPOINT_CONDITION_BE (i
+ rightmost_enabled_byte
);
2071 /* Now we need to match the position within the DVC of the comparison
2072 value with where the watch region is relative to the window
2073 (i.e., the ALIGN_OFFSET). */
2075 *condition_value
= ((uint64_t) data_value
>> num_bytes_off_dvc
* 8
2076 << rightmost_enabled_byte
* 8);
2079 /* Return the number of memory locations that need to be accessed to
2080 evaluate the expression which generated the given value chain.
2081 Returns -1 if there's any register access involved, or if there are
2082 other kinds of values which are not acceptable in a condition
2083 expression (e.g., lval_computed or lval_internalvar). */
2085 num_memory_accesses (const std::vector
<value_ref_ptr
> &chain
)
2087 int found_memory_cnt
= 0;
2089 /* The idea here is that evaluating an expression generates a series
2090 of values, one holding the value of every subexpression. (The
2091 expression a*b+c has five subexpressions: a, b, a*b, c, and
2092 a*b+c.) GDB's values hold almost enough information to establish
2093 the criteria given above --- they identify memory lvalues,
2094 register lvalues, computed values, etcetera. So we can evaluate
2095 the expression, and then scan the chain of values that leaves
2096 behind to determine the memory locations involved in the evaluation
2099 However, I don't think that the values returned by inferior
2100 function calls are special in any way. So this function may not
2101 notice that an expression contains an inferior function call.
2104 for (const value_ref_ptr
&iter
: chain
)
2106 struct value
*v
= iter
.get ();
2108 /* Constants and values from the history are fine. */
2109 if (VALUE_LVAL (v
) == not_lval
|| deprecated_value_modifiable (v
) == 0)
2111 else if (VALUE_LVAL (v
) == lval_memory
)
2113 /* A lazy memory lvalue is one that GDB never needed to fetch;
2114 we either just used its address (e.g., `a' in `a.b') or
2115 we never needed it at all (e.g., `a' in `a,b'). */
2116 if (!value_lazy (v
))
2119 /* Other kinds of values are not fine. */
2124 return found_memory_cnt
;
2127 /* Verifies whether the expression COND can be implemented using the
2128 DVC (Data Value Compare) register in BookE processors. The expression
2129 must test the watch value for equality with a constant expression.
2130 If the function returns 1, DATA_VALUE will contain the constant against
2131 which the watch value should be compared and LEN will contain the size
2134 check_condition (CORE_ADDR watch_addr
, struct expression
*cond
,
2135 CORE_ADDR
*data_value
, int *len
)
2137 int pc
= 1, num_accesses_left
, num_accesses_right
;
2138 struct value
*left_val
, *right_val
;
2139 std::vector
<value_ref_ptr
> left_chain
, right_chain
;
2141 if (cond
->elts
[0].opcode
!= BINOP_EQUAL
)
2144 fetch_subexp_value (cond
, &pc
, &left_val
, NULL
, &left_chain
, 0);
2145 num_accesses_left
= num_memory_accesses (left_chain
);
2147 if (left_val
== NULL
|| num_accesses_left
< 0)
2150 fetch_subexp_value (cond
, &pc
, &right_val
, NULL
, &right_chain
, 0);
2151 num_accesses_right
= num_memory_accesses (right_chain
);
2153 if (right_val
== NULL
|| num_accesses_right
< 0)
2156 if (num_accesses_left
== 1 && num_accesses_right
== 0
2157 && VALUE_LVAL (left_val
) == lval_memory
2158 && value_address (left_val
) == watch_addr
)
2160 *data_value
= value_as_long (right_val
);
2162 /* DATA_VALUE is the constant in RIGHT_VAL, but actually has
2163 the same type as the memory region referenced by LEFT_VAL. */
2164 *len
= TYPE_LENGTH (check_typedef (value_type (left_val
)));
2166 else if (num_accesses_left
== 0 && num_accesses_right
== 1
2167 && VALUE_LVAL (right_val
) == lval_memory
2168 && value_address (right_val
) == watch_addr
)
2170 *data_value
= value_as_long (left_val
);
2172 /* DATA_VALUE is the constant in LEFT_VAL, but actually has
2173 the same type as the memory region referenced by RIGHT_VAL. */
2174 *len
= TYPE_LENGTH (check_typedef (value_type (right_val
)));
2182 /* Return non-zero if the target is capable of using hardware to evaluate
2183 the condition expression, thus only triggering the watchpoint when it is
2186 ppc_linux_nat_target::can_accel_watchpoint_condition (CORE_ADDR addr
, int len
,
2188 struct expression
*cond
)
2190 CORE_ADDR data_value
;
2192 return (have_ptrace_hwdebug_interface ()
2193 && hwdebug_info
.num_condition_regs
> 0
2194 && check_condition (addr
, cond
, &data_value
, &len
));
2197 /* Set up P with the parameters necessary to request a watchpoint covering
2198 LEN bytes starting at ADDR and if possible with condition expression COND
2199 evaluated by hardware. INSERT tells if we are creating a request for
2200 inserting or removing the watchpoint. */
2203 create_watchpoint_request (struct ppc_hw_breakpoint
*p
, CORE_ADDR addr
,
2204 int len
, enum target_hw_bp_type type
,
2205 struct expression
*cond
, int insert
)
2208 || !(hwdebug_info
.features
& PPC_DEBUG_FEATURE_DATA_BP_RANGE
))
2211 CORE_ADDR data_value
;
2213 use_condition
= (insert
? can_use_watchpoint_cond_accel ()
2214 : hwdebug_info
.num_condition_regs
> 0);
2215 if (cond
&& use_condition
&& check_condition (addr
, cond
,
2217 calculate_dvc (addr
, len
, data_value
, &p
->condition_mode
,
2218 &p
->condition_value
);
2221 p
->condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
2222 p
->condition_value
= 0;
2225 p
->addr_mode
= PPC_BREAKPOINT_MODE_EXACT
;
2230 p
->addr_mode
= PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE
;
2231 p
->condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
2232 p
->condition_value
= 0;
2234 /* The watchpoint will trigger if the address of the memory access is
2235 within the defined range, as follows: p->addr <= address < p->addr2.
2237 Note that the above sentence just documents how ptrace interprets
2238 its arguments; the watchpoint is set to watch the range defined by
2239 the user _inclusively_, as specified by the user interface. */
2240 p
->addr2
= (uint64_t) addr
+ len
;
2243 p
->version
= PPC_DEBUG_CURRENT_VERSION
;
2244 p
->trigger_type
= get_trigger_type (type
);
2245 p
->addr
= (uint64_t) addr
;
2249 ppc_linux_nat_target::insert_watchpoint (CORE_ADDR addr
, int len
,
2250 enum target_hw_bp_type type
,
2251 struct expression
*cond
)
2253 struct lwp_info
*lp
;
2256 if (have_ptrace_hwdebug_interface ())
2258 struct ppc_hw_breakpoint p
;
2260 create_watchpoint_request (&p
, addr
, len
, type
, cond
, 1);
2263 hwdebug_insert_point (&p
, lp
->ptid
.lwp ());
2270 long read_mode
, write_mode
;
2272 if (linux_get_hwcap (current_top_target ()) & PPC_FEATURE_BOOKE
)
2274 /* PowerPC 440 requires only the read/write flags to be passed
2281 /* PowerPC 970 and other DABR-based processors are required to pass
2282 the Breakpoint Translation bit together with the flags. */
2287 dabr_value
= addr
& ~(read_mode
| write_mode
);
2291 /* Set read and translate bits. */
2292 dabr_value
|= read_mode
;
2295 /* Set write and translate bits. */
2296 dabr_value
|= write_mode
;
2299 /* Set read, write and translate bits. */
2300 dabr_value
|= read_mode
| write_mode
;
2304 saved_dabr_value
= dabr_value
;
2307 if (ptrace (PTRACE_SET_DEBUGREG
, lp
->ptid
.lwp (), 0,
2308 saved_dabr_value
) < 0)
2318 ppc_linux_nat_target::remove_watchpoint (CORE_ADDR addr
, int len
,
2319 enum target_hw_bp_type type
,
2320 struct expression
*cond
)
2322 struct lwp_info
*lp
;
2325 if (have_ptrace_hwdebug_interface ())
2327 struct ppc_hw_breakpoint p
;
2329 create_watchpoint_request (&p
, addr
, len
, type
, cond
, 0);
2332 hwdebug_remove_point (&p
, lp
->ptid
.lwp ());
2338 saved_dabr_value
= 0;
2340 if (ptrace (PTRACE_SET_DEBUGREG
, lp
->ptid
.lwp (), 0,
2341 saved_dabr_value
) < 0)
2351 ppc_linux_nat_target::low_new_thread (struct lwp_info
*lp
)
2353 int tid
= lp
->ptid
.lwp ();
2355 if (have_ptrace_hwdebug_interface ())
2358 struct thread_points
*p
;
2359 struct hw_break_tuple
*hw_breaks
;
2361 if (VEC_empty (thread_points_p
, ppc_threads
))
2364 /* Get a list of breakpoints from any thread. */
2365 p
= VEC_last (thread_points_p
, ppc_threads
);
2366 hw_breaks
= p
->hw_breaks
;
2368 /* Copy that thread's breakpoints and watchpoints to the new thread. */
2369 for (i
= 0; i
< max_slots_number
; i
++)
2370 if (hw_breaks
[i
].hw_break
)
2372 /* Older kernels did not make new threads inherit their parent
2373 thread's debug state, so we always clear the slot and replicate
2374 the debug state ourselves, ensuring compatibility with all
2377 /* The ppc debug resource accounting is done through "slots".
2378 Ask the kernel the deallocate this specific *point's slot. */
2379 ptrace (PPC_PTRACE_DELHWDEBUG
, tid
, 0, hw_breaks
[i
].slot
);
2381 hwdebug_insert_point (hw_breaks
[i
].hw_break
, tid
);
2385 ptrace (PTRACE_SET_DEBUGREG
, tid
, 0, saved_dabr_value
);
2389 ppc_linux_thread_exit (struct thread_info
*tp
, int silent
)
2392 int tid
= tp
->ptid
.lwp ();
2393 struct hw_break_tuple
*hw_breaks
;
2394 struct thread_points
*t
= NULL
, *p
;
2396 if (!have_ptrace_hwdebug_interface ())
2399 for (i
= 0; VEC_iterate (thread_points_p
, ppc_threads
, i
, p
); i
++)
2409 VEC_unordered_remove (thread_points_p
, ppc_threads
, i
);
2411 hw_breaks
= t
->hw_breaks
;
2413 for (i
= 0; i
< max_slots_number
; i
++)
2414 if (hw_breaks
[i
].hw_break
)
2415 xfree (hw_breaks
[i
].hw_break
);
2417 xfree (t
->hw_breaks
);
2422 ppc_linux_nat_target::stopped_data_address (CORE_ADDR
*addr_p
)
2426 if (!linux_nat_get_siginfo (inferior_ptid
, &siginfo
))
2429 if (siginfo
.si_signo
!= SIGTRAP
2430 || (siginfo
.si_code
& 0xffff) != 0x0004 /* TRAP_HWBKPT */)
2433 if (have_ptrace_hwdebug_interface ())
2436 struct thread_points
*t
;
2437 struct hw_break_tuple
*hw_breaks
;
2438 /* The index (or slot) of the *point is passed in the si_errno field. */
2439 int slot
= siginfo
.si_errno
;
2441 t
= hwdebug_find_thread_points_by_tid (inferior_ptid
.lwp (), 0);
2443 /* Find out if this *point is a hardware breakpoint.
2444 If so, we should return 0. */
2447 hw_breaks
= t
->hw_breaks
;
2448 for (i
= 0; i
< max_slots_number
; i
++)
2449 if (hw_breaks
[i
].hw_break
&& hw_breaks
[i
].slot
== slot
2450 && hw_breaks
[i
].hw_break
->trigger_type
2451 == PPC_BREAKPOINT_TRIGGER_EXECUTE
)
2456 *addr_p
= (CORE_ADDR
) (uintptr_t) siginfo
.si_addr
;
2461 ppc_linux_nat_target::stopped_by_watchpoint ()
2464 return stopped_data_address (&addr
);
2468 ppc_linux_nat_target::watchpoint_addr_within_range (CORE_ADDR addr
,
2474 if (have_ptrace_hwdebug_interface ()
2475 && linux_get_hwcap (current_top_target ()) & PPC_FEATURE_BOOKE
)
2476 return start
<= addr
&& start
+ length
>= addr
;
2477 else if (linux_get_hwcap (current_top_target ()) & PPC_FEATURE_BOOKE
)
2484 /* Check whether [start, start+length-1] intersects [addr, addr+mask]. */
2485 return start
<= addr
+ mask
&& start
+ length
- 1 >= addr
;
2488 /* Return the number of registers needed for a masked hardware watchpoint. */
2491 ppc_linux_nat_target::masked_watch_num_registers (CORE_ADDR addr
, CORE_ADDR mask
)
2493 if (!have_ptrace_hwdebug_interface ()
2494 || (hwdebug_info
.features
& PPC_DEBUG_FEATURE_DATA_BP_MASK
) == 0)
2496 else if ((mask
& 0xC0000000) != 0xC0000000)
2498 warning (_("The given mask covers kernel address space "
2499 "and cannot be used.\n"));
2508 ppc_linux_nat_target::store_registers (struct regcache
*regcache
, int regno
)
2510 pid_t tid
= get_ptrace_pid (regcache
->ptid ());
2513 store_register (regcache
, tid
, regno
);
2515 store_ppc_registers (regcache
, tid
);
2518 /* Functions for transferring registers between a gregset_t or fpregset_t
2519 (see sys/ucontext.h) and gdb's regcache. The word size is that used
2520 by the ptrace interface, not the current program's ABI. Eg. if a
2521 powerpc64-linux gdb is being used to debug a powerpc32-linux app, we
2522 read or write 64-bit gregsets. This is to suit the host libthread_db. */
2525 supply_gregset (struct regcache
*regcache
, const gdb_gregset_t
*gregsetp
)
2527 const struct regset
*regset
= ppc_linux_gregset (sizeof (long));
2529 ppc_supply_gregset (regset
, regcache
, -1, gregsetp
, sizeof (*gregsetp
));
2533 fill_gregset (const struct regcache
*regcache
,
2534 gdb_gregset_t
*gregsetp
, int regno
)
2536 const struct regset
*regset
= ppc_linux_gregset (sizeof (long));
2539 memset (gregsetp
, 0, sizeof (*gregsetp
));
2540 ppc_collect_gregset (regset
, regcache
, regno
, gregsetp
, sizeof (*gregsetp
));
2544 supply_fpregset (struct regcache
*regcache
, const gdb_fpregset_t
* fpregsetp
)
2546 const struct regset
*regset
= ppc_linux_fpregset ();
2548 ppc_supply_fpregset (regset
, regcache
, -1,
2549 fpregsetp
, sizeof (*fpregsetp
));
2553 fill_fpregset (const struct regcache
*regcache
,
2554 gdb_fpregset_t
*fpregsetp
, int regno
)
2556 const struct regset
*regset
= ppc_linux_fpregset ();
2558 ppc_collect_fpregset (regset
, regcache
, regno
,
2559 fpregsetp
, sizeof (*fpregsetp
));
2563 ppc_linux_nat_target::auxv_parse (gdb_byte
**readptr
,
2564 gdb_byte
*endptr
, CORE_ADDR
*typep
,
2567 int tid
= inferior_ptid
.lwp ();
2569 tid
= inferior_ptid
.pid ();
2571 int sizeof_auxv_field
= ppc_linux_target_wordsize (tid
);
2573 enum bfd_endian byte_order
= gdbarch_byte_order (target_gdbarch ());
2574 gdb_byte
*ptr
= *readptr
;
2579 if (endptr
- ptr
< sizeof_auxv_field
* 2)
2582 *typep
= extract_unsigned_integer (ptr
, sizeof_auxv_field
, byte_order
);
2583 ptr
+= sizeof_auxv_field
;
2584 *valp
= extract_unsigned_integer (ptr
, sizeof_auxv_field
, byte_order
);
2585 ptr
+= sizeof_auxv_field
;
2591 const struct target_desc
*
2592 ppc_linux_nat_target::read_description ()
2594 int tid
= inferior_ptid
.lwp ();
2596 tid
= inferior_ptid
.pid ();
2598 if (have_ptrace_getsetevrregs
)
2600 struct gdb_evrregset_t evrregset
;
2602 if (ptrace (PTRACE_GETEVRREGS
, tid
, 0, &evrregset
) >= 0)
2603 return tdesc_powerpc_e500l
;
2605 /* EIO means that the PTRACE_GETEVRREGS request isn't supported.
2606 Anything else needs to be reported. */
2607 else if (errno
!= EIO
)
2608 perror_with_name (_("Unable to fetch SPE registers"));
2611 struct ppc_linux_features features
= ppc_linux_no_features
;
2613 features
.wordsize
= ppc_linux_target_wordsize (tid
);
2615 CORE_ADDR hwcap
= linux_get_hwcap (current_top_target ());
2616 CORE_ADDR hwcap2
= linux_get_hwcap2 (current_top_target ());
2618 if (have_ptrace_getsetvsxregs
2619 && (hwcap
& PPC_FEATURE_HAS_VSX
))
2621 gdb_vsxregset_t vsxregset
;
2623 if (ptrace (PTRACE_GETVSXREGS
, tid
, 0, &vsxregset
) >= 0)
2624 features
.vsx
= true;
2626 /* EIO means that the PTRACE_GETVSXREGS request isn't supported.
2627 Anything else needs to be reported. */
2628 else if (errno
!= EIO
)
2629 perror_with_name (_("Unable to fetch VSX registers"));
2632 if (have_ptrace_getvrregs
2633 && (hwcap
& PPC_FEATURE_HAS_ALTIVEC
))
2635 gdb_vrregset_t vrregset
;
2637 if (ptrace (PTRACE_GETVRREGS
, tid
, 0, &vrregset
) >= 0)
2638 features
.altivec
= true;
2640 /* EIO means that the PTRACE_GETVRREGS request isn't supported.
2641 Anything else needs to be reported. */
2642 else if (errno
!= EIO
)
2643 perror_with_name (_("Unable to fetch AltiVec registers"));
2646 if (hwcap
& PPC_FEATURE_CELL
)
2647 features
.cell
= true;
2649 features
.isa205
= ppc_linux_has_isa205 (hwcap
);
2651 if ((hwcap2
& PPC_FEATURE2_DSCR
)
2652 && check_regset (tid
, NT_PPC_PPR
, PPC_LINUX_SIZEOF_PPRREGSET
)
2653 && check_regset (tid
, NT_PPC_DSCR
, PPC_LINUX_SIZEOF_DSCRREGSET
))
2655 features
.ppr_dscr
= true;
2656 if ((hwcap2
& PPC_FEATURE2_ARCH_2_07
)
2657 && (hwcap2
& PPC_FEATURE2_TAR
)
2658 && (hwcap2
& PPC_FEATURE2_EBB
)
2659 && check_regset (tid
, NT_PPC_TAR
, PPC_LINUX_SIZEOF_TARREGSET
)
2660 && check_regset (tid
, NT_PPC_EBB
, PPC_LINUX_SIZEOF_EBBREGSET
)
2661 && check_regset (tid
, NT_PPC_PMU
, PPC_LINUX_SIZEOF_PMUREGSET
))
2663 features
.isa207
= true;
2664 if ((hwcap2
& PPC_FEATURE2_HTM
)
2665 && check_regset (tid
, NT_PPC_TM_SPR
,
2666 PPC_LINUX_SIZEOF_TM_SPRREGSET
))
2667 features
.htm
= true;
2671 return ppc_linux_match_description (features
);
2675 _initialize_ppc_linux_nat (void)
2677 linux_target
= &the_ppc_linux_nat_target
;
2679 gdb::observers::thread_exit
.attach (ppc_linux_thread_exit
);
2681 /* Register the target. */
2682 add_inf_child_target (linux_target
);