1 /* PPC GNU/Linux native support.
3 Copyright 1988, 1989, 1991, 1992, 1994, 1996, 2000, 2001, 2002,
4 2003 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
24 #include "gdb_string.h"
29 #include "gdb_assert.h"
31 #include <sys/types.h>
32 #include <sys/param.h>
35 #include <sys/ioctl.h>
38 #include <sys/procfs.h>
39 #include <sys/ptrace.h>
41 /* Prototypes for supply_gregset etc. */
46 #define PT_READ_U PTRACE_PEEKUSR
49 #define PT_WRITE_U PTRACE_POKEUSR
52 /* Default the type of the ptrace transfer to int. */
53 #ifndef PTRACE_XFER_TYPE
54 #define PTRACE_XFER_TYPE int
57 /* Glibc's headers don't define PTRACE_GETVRREGS so we cannot use a
58 configure time check. Some older glibc's (for instance 2.2.1)
59 don't have a specific powerpc version of ptrace.h, and fall back on
60 a generic one. In such cases, sys/ptrace.h defines
61 PTRACE_GETFPXREGS and PTRACE_SETFPXREGS to the same numbers that
62 ppc kernel's asm/ptrace.h defines PTRACE_GETVRREGS and
63 PTRACE_SETVRREGS to be. This also makes a configury check pretty
66 /* These definitions should really come from the glibc header files,
67 but Glibc doesn't know about the vrregs yet. */
68 #ifndef PTRACE_GETVRREGS
69 #define PTRACE_GETVRREGS 18
70 #define PTRACE_SETVRREGS 19
74 /* Similarly for the ptrace requests for getting / setting the SPE
75 registers (ev0 -- ev31, acc, and spefscr). See the description of
76 gdb_evrregset_t for details. */
77 #ifndef PTRACE_GETEVRREGS
78 #define PTRACE_GETEVRREGS 20
79 #define PTRACE_SETEVRREGS 21
83 /* This oddity is because the Linux kernel defines elf_vrregset_t as
84 an array of 33 16 bytes long elements. I.e. it leaves out vrsave.
85 However the PTRACE_GETVRREGS and PTRACE_SETVRREGS requests return
86 the vrsave as an extra 4 bytes at the end. I opted for creating a
87 flat array of chars, so that it is easier to manipulate for gdb.
89 There are 32 vector registers 16 bytes longs, plus a VSCR register
90 which is only 4 bytes long, but is fetched as a 16 bytes
91 quantity. Up to here we have the elf_vrregset_t structure.
92 Appended to this there is space for the VRSAVE register: 4 bytes.
93 Even though this vrsave register is not included in the regset
94 typedef, it is handled by the ptrace requests.
96 Note that GNU/Linux doesn't support little endian PPC hardware,
97 therefore the offset at which the real value of the VSCR register
98 is located will be always 12 bytes.
100 The layout is like this (where x is the actual value of the vscr reg): */
104 |.|.|.|.|.....|.|.|.|.||.|.|.|x||.|
105 <-------> <-------><-------><->
110 #define SIZEOF_VRREGS 33*16+4
112 typedef char gdb_vrregset_t
[SIZEOF_VRREGS
];
115 /* On PPC processors that support the the Signal Processing Extension
116 (SPE) APU, the general-purpose registers are 64 bits long.
117 However, the ordinary Linux kernel PTRACE_PEEKUSR / PTRACE_POKEUSR
118 / PT_READ_U / PT_WRITE_U ptrace calls only access the lower half of
119 each register, to allow them to behave the same way they do on
120 non-SPE systems. There's a separate pair of calls,
121 PTRACE_GETEVRREGS / PTRACE_SETEVRREGS, that read and write the top
122 halves of all the general-purpose registers at once, along with
123 some SPE-specific registers.
125 GDB itself continues to claim the general-purpose registers are 32
126 bits long; the full 64-bit registers are called 'ev0' -- 'ev31'.
127 The ev registers are raw registers, and the GPR's are pseudo-
128 registers mapped onto their lower halves. This means that reading
129 and writing ev registers involves a mix of regset-at-once
130 PTRACE_{GET,SET}EVRREGS calls and register-at-a-time
131 PTRACE_{PEEK,POKE}USR calls.
133 This is the structure filled in by PTRACE_GETEVRREGS and written to
134 the inferior's registers by PTRACE_SETEVRREGS. */
135 struct gdb_evrregset_t
137 unsigned long evr
[32];
138 unsigned long long acc
;
139 unsigned long spefscr
;
143 /* Non-zero if our kernel may support the PTRACE_GETVRREGS and
144 PTRACE_SETVRREGS requests, for reading and writing the Altivec
145 registers. Zero if we've tried one of them and gotten an
147 int have_ptrace_getvrregs
= 1;
150 /* Non-zero if our kernel may support the PTRACE_GETEVRREGS and
151 PTRACE_SETEVRREGS requests, for reading and writing the SPE
152 registers. Zero if we've tried one of them and gotten an
154 int have_ptrace_getsetevrregs
= 1;
160 return (sizeof (struct user
));
164 /* registers layout, as presented by the ptrace interface:
165 PT_R0, PT_R1, PT_R2, PT_R3, PT_R4, PT_R5, PT_R6, PT_R7,
166 PT_R8, PT_R9, PT_R10, PT_R11, PT_R12, PT_R13, PT_R14, PT_R15,
167 PT_R16, PT_R17, PT_R18, PT_R19, PT_R20, PT_R21, PT_R22, PT_R23,
168 PT_R24, PT_R25, PT_R26, PT_R27, PT_R28, PT_R29, PT_R30, PT_R31,
169 PT_FPR0, PT_FPR0 + 2, PT_FPR0 + 4, PT_FPR0 + 6, PT_FPR0 + 8, PT_FPR0 + 10, PT_FPR0 + 12, PT_FPR0 + 14,
170 PT_FPR0 + 16, PT_FPR0 + 18, PT_FPR0 + 20, PT_FPR0 + 22, PT_FPR0 + 24, PT_FPR0 + 26, PT_FPR0 + 28, PT_FPR0 + 30,
171 PT_FPR0 + 32, PT_FPR0 + 34, PT_FPR0 + 36, PT_FPR0 + 38, PT_FPR0 + 40, PT_FPR0 + 42, PT_FPR0 + 44, PT_FPR0 + 46,
172 PT_FPR0 + 48, PT_FPR0 + 50, PT_FPR0 + 52, PT_FPR0 + 54, PT_FPR0 + 56, PT_FPR0 + 58, PT_FPR0 + 60, PT_FPR0 + 62,
173 PT_NIP, PT_MSR, PT_CCR, PT_LNK, PT_CTR, PT_XER, PT_MQ */
177 ppc_register_u_addr (int regno
)
180 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
181 /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace
182 interface, and not the wordsize of the program's ABI. */
183 int wordsize
= sizeof (PTRACE_XFER_TYPE
);
185 /* General purpose registers occupy 1 slot each in the buffer */
186 if (regno
>= tdep
->ppc_gp0_regnum
187 && regno
< tdep
->ppc_gp0_regnum
+ ppc_num_gprs
)
188 u_addr
= ((regno
- tdep
->ppc_gp0_regnum
+ PT_R0
) * wordsize
);
190 /* Floating point regs: eight bytes each in both 32- and 64-bit
191 ptrace interfaces. Thus, two slots each in 32-bit interface, one
192 slot each in 64-bit interface. */
193 if (tdep
->ppc_fp0_regnum
>= 0
194 && regno
>= tdep
->ppc_fp0_regnum
195 && regno
< tdep
->ppc_fp0_regnum
+ ppc_num_fprs
)
196 u_addr
= (PT_FPR0
* wordsize
) + ((regno
- tdep
->ppc_fp0_regnum
) * 8);
198 /* UISA special purpose registers: 1 slot each */
199 if (regno
== PC_REGNUM
)
200 u_addr
= PT_NIP
* wordsize
;
201 if (regno
== tdep
->ppc_lr_regnum
)
202 u_addr
= PT_LNK
* wordsize
;
203 if (regno
== tdep
->ppc_cr_regnum
)
204 u_addr
= PT_CCR
* wordsize
;
205 if (regno
== tdep
->ppc_xer_regnum
)
206 u_addr
= PT_XER
* wordsize
;
207 if (regno
== tdep
->ppc_ctr_regnum
)
208 u_addr
= PT_CTR
* wordsize
;
210 if (regno
== tdep
->ppc_mq_regnum
)
211 u_addr
= PT_MQ
* wordsize
;
213 if (regno
== tdep
->ppc_ps_regnum
)
214 u_addr
= PT_MSR
* wordsize
;
215 if (tdep
->ppc_fpscr_regnum
>= 0
216 && regno
== tdep
->ppc_fpscr_regnum
)
217 u_addr
= PT_FPSCR
* wordsize
;
222 /* The Linux kernel ptrace interface for AltiVec registers uses the
223 registers set mechanism, as opposed to the interface for all the
224 other registers, that stores/fetches each register individually. */
226 fetch_altivec_register (int tid
, int regno
)
231 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
232 int vrregsize
= DEPRECATED_REGISTER_RAW_SIZE (tdep
->ppc_vr0_regnum
);
234 ret
= ptrace (PTRACE_GETVRREGS
, tid
, 0, ®s
);
239 have_ptrace_getvrregs
= 0;
242 perror_with_name ("Unable to fetch AltiVec register");
245 /* VSCR is fetched as a 16 bytes quantity, but it is really 4 bytes
246 long on the hardware. We deal only with the lower 4 bytes of the
247 vector. VRSAVE is at the end of the array in a 4 bytes slot, so
248 there is no need to define an offset for it. */
249 if (regno
== (tdep
->ppc_vrsave_regnum
- 1))
250 offset
= vrregsize
- DEPRECATED_REGISTER_RAW_SIZE (tdep
->ppc_vrsave_regnum
);
252 supply_register (regno
,
253 regs
+ (regno
- tdep
->ppc_vr0_regnum
) * vrregsize
+ offset
);
256 /* Fetch the top 32 bits of TID's general-purpose registers and the
257 SPE-specific registers, and place the results in EVRREGSET. If we
258 don't support PTRACE_GETEVRREGS, then just fill EVRREGSET with
261 All the logic to deal with whether or not the PTRACE_GETEVRREGS and
262 PTRACE_SETEVRREGS requests are supported is isolated here, and in
263 set_spe_registers. */
265 get_spe_registers (int tid
, struct gdb_evrregset_t
*evrregset
)
267 if (have_ptrace_getsetevrregs
)
269 if (ptrace (PTRACE_GETEVRREGS
, tid
, 0, evrregset
) >= 0)
273 /* EIO means that the PTRACE_GETEVRREGS request isn't supported;
274 we just return zeros. */
276 have_ptrace_getsetevrregs
= 0;
278 /* Anything else needs to be reported. */
279 perror_with_name ("Unable to fetch SPE registers");
283 memset (evrregset
, 0, sizeof (*evrregset
));
286 /* Assuming TID refers to an SPE process, store the full 64-bit value
287 of TID's ev register EV_REGNUM in DEST, getting the high bits from
288 EVRREGS and the low bits from the kernel via ptrace. */
290 read_spliced_spe_reg (int tid
, int ev_regnum
,
291 struct gdb_evrregset_t
*evrregs
,
294 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
296 /* Make sure we're trying to read an EV register; that's all we
298 gdb_assert (tdep
->ppc_ev0_regnum
<= ev_regnum
299 && ev_regnum
<= tdep
->ppc_ev31_regnum
);
301 /* Make sure the sizes for the splicing add up. */
302 gdb_assert (sizeof (evrregs
->evr
[0]) + sizeof (PTRACE_XFER_TYPE
)
303 == register_size (current_gdbarch
, ev_regnum
));
306 /* The index of ev_regnum in evrregs->evr[]. */
307 int ev_index
= ev_regnum
- tdep
->ppc_ev0_regnum
;
309 /* The number of the corresponding general-purpose register, which
310 holds the lower 32 bits of the EV register. */
311 int gpr_regnum
= tdep
->ppc_gp0_regnum
+ ev_index
;
313 /* The offset of gpr_regnum in the process's uarea. */
314 CORE_ADDR gpr_uoffset
= ppc_register_u_addr (gpr_regnum
);
316 /* The low word of the EV register's value. */
317 PTRACE_XFER_TYPE low_word
;
319 /* The PTRACE_PEEKUSR / PT_READ_U ptrace requests need to be able
320 to return arbitrary register values, so they can't return -1 to
321 indicate an error. So we clear errno, and then check it after
324 low_word
= ptrace (PT_READ_U
, tid
, (PTRACE_ARG3_TYPE
) gpr_uoffset
, 0);
329 sprintf (message
, "reading register %s (#%d)",
330 REGISTER_NAME (ev_regnum
), ev_regnum
);
331 perror_with_name (message
);
334 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
336 memcpy (dest
, &evrregs
->evr
[ev_index
],
337 sizeof (evrregs
->evr
[ev_index
]));
338 * (PTRACE_XFER_TYPE
*) (dest
+ sizeof (evrregs
->evr
[ev_index
]))
341 else if (TARGET_BYTE_ORDER
== BFD_ENDIAN_LITTLE
)
343 * (PTRACE_XFER_TYPE
*) dest
= low_word
;
344 memcpy (dest
+ sizeof (PTRACE_XFER_TYPE
),
345 &evrregs
->evr
[ev_index
], sizeof (evrregs
->evr
[ev_index
]));
353 /* On SPE machines, supply the full value of the SPE register REGNO
354 from TID. This handles ev0 -- ev31 and acc, which are 64 bits
355 long, and spefscr, which is 32 bits long. */
357 fetch_spe_register (int tid
, int regno
)
359 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
360 struct gdb_evrregset_t evrregs
;
362 get_spe_registers (tid
, &evrregs
);
364 if (tdep
->ppc_ev0_regnum
<= regno
365 && regno
<= tdep
->ppc_ev31_regnum
)
367 char buf
[MAX_REGISTER_SIZE
];
368 read_spliced_spe_reg (tid
, regno
, &evrregs
, buf
);
369 supply_register (regno
, buf
);
371 else if (regno
== tdep
->ppc_acc_regnum
)
373 gdb_assert (sizeof (evrregs
.acc
)
374 == register_size (current_gdbarch
, regno
));
375 supply_register (regno
, &evrregs
.acc
);
377 else if (regno
== tdep
->ppc_spefscr_regnum
)
379 gdb_assert (sizeof (evrregs
.spefscr
)
380 == register_size (current_gdbarch
, regno
));
381 supply_register (regno
, &evrregs
.spefscr
);
388 fetch_register (int tid
, int regno
)
390 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
391 /* This isn't really an address. But ptrace thinks of it as one. */
392 CORE_ADDR regaddr
= ppc_register_u_addr (regno
);
393 int bytes_transferred
;
394 unsigned int offset
; /* Offset of registers within the u area. */
395 char buf
[MAX_REGISTER_SIZE
];
397 /* Sanity check: this function should only be called to fetch raw
398 registers' values, never pseudoregisters' values. */
399 if (tdep
->ppc_gp0_regnum
<= regno
400 && regno
< tdep
->ppc_gp0_regnum
+ ppc_num_gprs
)
401 gdb_assert (! tdep
->ppc_gprs_pseudo_p
);
403 if (altivec_register_p (regno
))
405 /* If this is the first time through, or if it is not the first
406 time through, and we have comfirmed that there is kernel
407 support for such a ptrace request, then go and fetch the
409 if (have_ptrace_getvrregs
)
411 fetch_altivec_register (tid
, regno
);
414 /* If we have discovered that there is no ptrace support for
415 AltiVec registers, fall through and return zeroes, because
416 regaddr will be -1 in this case. */
418 else if (spe_register_p (regno
))
420 fetch_spe_register (tid
, regno
);
426 memset (buf
, '\0', DEPRECATED_REGISTER_RAW_SIZE (regno
)); /* Supply zeroes */
427 supply_register (regno
, buf
);
431 /* Read the raw register using PTRACE_XFER_TYPE sized chunks. On a
432 32-bit platform, 64-bit floating-point registers will require two
434 for (bytes_transferred
= 0;
435 bytes_transferred
< register_size (current_gdbarch
, regno
);
436 bytes_transferred
+= sizeof (PTRACE_XFER_TYPE
))
439 *(PTRACE_XFER_TYPE
*) & buf
[bytes_transferred
]
440 = ptrace (PT_READ_U
, tid
, (PTRACE_ARG3_TYPE
) regaddr
, 0);
441 regaddr
+= sizeof (PTRACE_XFER_TYPE
);
445 sprintf (message
, "reading register %s (#%d)",
446 REGISTER_NAME (regno
), regno
);
447 perror_with_name (message
);
451 /* Now supply the register. Keep in mind that the regcache's idea
452 of the register's size may not be a multiple of sizeof
453 (PTRACE_XFER_TYPE). */
454 if (gdbarch_byte_order (current_gdbarch
) == BFD_ENDIAN_LITTLE
)
456 /* Little-endian values are always found at the left end of the
457 bytes transferred. */
458 regcache_raw_supply (current_regcache
, regno
, buf
);
460 else if (gdbarch_byte_order (current_gdbarch
) == BFD_ENDIAN_BIG
)
462 /* Big-endian values are found at the right end of the bytes
464 size_t padding
= (bytes_transferred
465 - register_size (current_gdbarch
, regno
));
466 regcache_raw_supply (current_regcache
, regno
, buf
+ padding
);
473 supply_vrregset (gdb_vrregset_t
*vrregsetp
)
476 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
477 int num_of_vrregs
= tdep
->ppc_vrsave_regnum
- tdep
->ppc_vr0_regnum
+ 1;
478 int vrregsize
= DEPRECATED_REGISTER_RAW_SIZE (tdep
->ppc_vr0_regnum
);
479 int offset
= vrregsize
- DEPRECATED_REGISTER_RAW_SIZE (tdep
->ppc_vrsave_regnum
);
481 for (i
= 0; i
< num_of_vrregs
; i
++)
483 /* The last 2 registers of this set are only 32 bit long, not
484 128. However an offset is necessary only for VSCR because it
485 occupies a whole vector, while VRSAVE occupies a full 4 bytes
487 if (i
== (num_of_vrregs
- 2))
488 supply_register (tdep
->ppc_vr0_regnum
+ i
,
489 *vrregsetp
+ i
* vrregsize
+ offset
);
491 supply_register (tdep
->ppc_vr0_regnum
+ i
, *vrregsetp
+ i
* vrregsize
);
496 fetch_altivec_registers (int tid
)
501 ret
= ptrace (PTRACE_GETVRREGS
, tid
, 0, ®s
);
506 have_ptrace_getvrregs
= 0;
509 perror_with_name ("Unable to fetch AltiVec registers");
511 supply_vrregset (®s
);
514 /* On SPE machines, fetch the full 64 bits of all the general-purpose
515 registers, as well as the SPE-specific registers 'acc' and
518 fetch_spe_registers (int tid
)
520 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
521 struct gdb_evrregset_t evrregs
;
524 get_spe_registers (tid
, &evrregs
);
526 /* Splice and supply each of the EV registers. */
527 for (i
= 0; i
< ppc_num_gprs
; i
++)
529 char buf
[MAX_REGISTER_SIZE
];
531 read_spliced_spe_reg (tid
, tdep
->ppc_ev0_regnum
+ i
, &evrregs
, buf
);
532 supply_register (tdep
->ppc_ev0_regnum
+ i
, buf
);
535 /* Supply the SPE-specific registers. */
536 supply_register (tdep
->ppc_acc_regnum
, &evrregs
.acc
);
537 supply_register (tdep
->ppc_spefscr_regnum
, &evrregs
.spefscr
);
541 fetch_ppc_registers (int tid
)
544 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
546 if (! tdep
->ppc_gprs_pseudo_p
)
547 for (i
= 0; i
< ppc_num_gprs
; i
++)
548 fetch_register (tid
, tdep
->ppc_gp0_regnum
+ i
);
549 if (tdep
->ppc_fp0_regnum
>= 0)
550 for (i
= 0; i
< ppc_num_fprs
; i
++)
551 fetch_register (tid
, tdep
->ppc_fp0_regnum
+ i
);
552 fetch_register (tid
, PC_REGNUM
);
553 if (tdep
->ppc_ps_regnum
!= -1)
554 fetch_register (tid
, tdep
->ppc_ps_regnum
);
555 if (tdep
->ppc_cr_regnum
!= -1)
556 fetch_register (tid
, tdep
->ppc_cr_regnum
);
557 if (tdep
->ppc_lr_regnum
!= -1)
558 fetch_register (tid
, tdep
->ppc_lr_regnum
);
559 if (tdep
->ppc_ctr_regnum
!= -1)
560 fetch_register (tid
, tdep
->ppc_ctr_regnum
);
561 if (tdep
->ppc_xer_regnum
!= -1)
562 fetch_register (tid
, tdep
->ppc_xer_regnum
);
563 if (tdep
->ppc_mq_regnum
!= -1)
564 fetch_register (tid
, tdep
->ppc_mq_regnum
);
565 if (tdep
->ppc_fpscr_regnum
!= -1)
566 fetch_register (tid
, tdep
->ppc_fpscr_regnum
);
567 if (have_ptrace_getvrregs
)
568 if (tdep
->ppc_vr0_regnum
!= -1 && tdep
->ppc_vrsave_regnum
!= -1)
569 fetch_altivec_registers (tid
);
570 if (tdep
->ppc_ev0_regnum
>= 0)
571 fetch_spe_registers (tid
);
574 /* Fetch registers from the child process. Fetch all registers if
575 regno == -1, otherwise fetch all general registers or all floating
576 point registers depending upon the value of regno. */
578 fetch_inferior_registers (int regno
)
580 /* Overload thread id onto process id */
581 int tid
= TIDGET (inferior_ptid
);
583 /* No thread id, just use process id */
585 tid
= PIDGET (inferior_ptid
);
588 fetch_ppc_registers (tid
);
590 fetch_register (tid
, regno
);
593 /* Store one register. */
595 store_altivec_register (int tid
, int regno
)
600 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
601 int vrregsize
= DEPRECATED_REGISTER_RAW_SIZE (tdep
->ppc_vr0_regnum
);
603 ret
= ptrace (PTRACE_GETVRREGS
, tid
, 0, ®s
);
608 have_ptrace_getvrregs
= 0;
611 perror_with_name ("Unable to fetch AltiVec register");
614 /* VSCR is fetched as a 16 bytes quantity, but it is really 4 bytes
615 long on the hardware. */
616 if (regno
== (tdep
->ppc_vrsave_regnum
- 1))
617 offset
= vrregsize
- DEPRECATED_REGISTER_RAW_SIZE (tdep
->ppc_vrsave_regnum
);
619 regcache_collect (regno
,
620 regs
+ (regno
- tdep
->ppc_vr0_regnum
) * vrregsize
+ offset
);
622 ret
= ptrace (PTRACE_SETVRREGS
, tid
, 0, ®s
);
624 perror_with_name ("Unable to store AltiVec register");
627 /* Assuming TID referrs to an SPE process, set the top halves of TID's
628 general-purpose registers and its SPE-specific registers to the
629 values in EVRREGSET. If we don't support PTRACE_SETEVRREGS, do
632 All the logic to deal with whether or not the PTRACE_GETEVRREGS and
633 PTRACE_SETEVRREGS requests are supported is isolated here, and in
634 get_spe_registers. */
636 set_spe_registers (int tid
, struct gdb_evrregset_t
*evrregset
)
638 if (have_ptrace_getsetevrregs
)
640 if (ptrace (PTRACE_SETEVRREGS
, tid
, 0, evrregset
) >= 0)
644 /* EIO means that the PTRACE_SETEVRREGS request isn't
645 supported; we fail silently, and don't try the call
648 have_ptrace_getsetevrregs
= 0;
650 /* Anything else needs to be reported. */
651 perror_with_name ("Unable to set SPE registers");
656 /* Store the bytes at SRC as the contents of TID's EV register EV_REGNUM.
657 Write the less significant word to TID using ptrace, and copy the
658 more significant word to the appropriate slot in EVRREGS. */
660 write_spliced_spe_reg (int tid
, int ev_regnum
,
661 struct gdb_evrregset_t
*evrregs
,
664 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
666 /* Make sure we're trying to write an EV register; that's all we
668 gdb_assert (tdep
->ppc_ev0_regnum
<= ev_regnum
669 && ev_regnum
<= tdep
->ppc_ev31_regnum
);
671 /* Make sure the sizes for the splicing add up. */
672 gdb_assert (sizeof (evrregs
->evr
[0]) + sizeof (PTRACE_XFER_TYPE
)
673 == register_size (current_gdbarch
, ev_regnum
));
676 int ev_index
= ev_regnum
- tdep
->ppc_ev0_regnum
;
678 /* The number of the corresponding general-purpose register, which
679 holds the lower 32 bits of the EV register. */
680 int gpr_regnum
= tdep
->ppc_gp0_regnum
+ ev_index
;
682 /* The offset of gpr_regnum in the process's uarea. */
683 CORE_ADDR gpr_uoffset
= ppc_register_u_addr (gpr_regnum
);
685 /* The PTRACE_POKEUSR / PT_WRITE_U ptrace requests need to be able
686 to return arbitrary register values, so they can't return -1 to
687 indicate an error. So we clear errno, and check it again
691 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
693 memcpy (&evrregs
->evr
[ev_index
], src
, sizeof (evrregs
->evr
[ev_index
]));
694 ptrace (PT_WRITE_U
, tid
, (PTRACE_ARG3_TYPE
) gpr_uoffset
,
695 * (PTRACE_XFER_TYPE
*) (src
+ sizeof (evrregs
->evr
[0])));
697 else if (TARGET_BYTE_ORDER
== BFD_ENDIAN_LITTLE
)
699 ptrace (PT_WRITE_U
, tid
, (PTRACE_ARG3_TYPE
) gpr_uoffset
,
700 * (PTRACE_XFER_TYPE
*) src
);
701 memcpy (&evrregs
->evr
[ev_index
], src
+ sizeof (PTRACE_XFER_TYPE
),
702 sizeof (evrregs
->evr
[ev_index
]));
710 sprintf (message
, "writing register %s (#%d)",
711 REGISTER_NAME (ev_regnum
), ev_regnum
);
712 perror_with_name (message
);
717 /* Write GDB's value for the SPE register REGNO to TID. */
719 store_spe_register (int tid
, int regno
)
721 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
722 struct gdb_evrregset_t evrregs
;
724 /* We can only read and write the entire EVR register set at a time,
725 so to write just a single register, we do a read-modify-write
727 get_spe_registers (tid
, &evrregs
);
729 if (tdep
->ppc_ev0_regnum
>= 0
730 && tdep
->ppc_ev0_regnum
<= regno
&& regno
<= tdep
->ppc_ev31_regnum
)
732 char buf
[MAX_REGISTER_SIZE
];
733 regcache_collect (regno
, buf
);
734 write_spliced_spe_reg (tid
, regno
, &evrregs
, buf
);
736 else if (tdep
->ppc_acc_regnum
>= 0
737 && regno
== tdep
->ppc_acc_regnum
)
739 gdb_assert (sizeof (evrregs
.acc
)
740 == register_size (current_gdbarch
, regno
));
741 regcache_collect (regno
, &evrregs
.acc
);
743 else if (tdep
->ppc_spefscr_regnum
>= 0
744 && regno
== tdep
->ppc_spefscr_regnum
)
746 gdb_assert (sizeof (evrregs
.spefscr
)
747 == register_size (current_gdbarch
, regno
));
748 regcache_collect (regno
, &evrregs
.spefscr
);
753 /* Write back the modified register set. */
754 set_spe_registers (tid
, &evrregs
);
758 store_register (int tid
, int regno
)
760 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
761 /* This isn't really an address. But ptrace thinks of it as one. */
762 CORE_ADDR regaddr
= ppc_register_u_addr (regno
);
764 size_t bytes_to_transfer
;
765 char buf
[MAX_REGISTER_SIZE
];
767 /* Sanity check: this function should only be called to store raw
768 registers' values, never pseudoregisters' values. */
769 if (tdep
->ppc_gp0_regnum
<= regno
770 && regno
< tdep
->ppc_gp0_regnum
+ ppc_num_gprs
)
771 gdb_assert (! tdep
->ppc_gprs_pseudo_p
);
773 if (altivec_register_p (regno
))
775 store_altivec_register (tid
, regno
);
778 else if (spe_register_p (regno
))
780 store_spe_register (tid
, regno
);
787 /* First collect the register. Keep in mind that the regcache's
788 idea of the register's size may not be a multiple of sizeof
789 (PTRACE_XFER_TYPE). */
790 memset (buf
, 0, sizeof buf
);
791 bytes_to_transfer
= align_up (register_size (current_gdbarch
, regno
),
792 sizeof (PTRACE_XFER_TYPE
));
793 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_LITTLE
)
795 /* Little-endian values always sit at the left end of the buffer. */
796 regcache_raw_collect (current_regcache
, regno
, buf
);
798 else if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
800 /* Big-endian values sit at the right end of the buffer. */
801 size_t padding
= (bytes_to_transfer
802 - register_size (current_gdbarch
, regno
));
803 regcache_raw_collect (current_regcache
, regno
, buf
+ padding
);
806 for (i
= 0; i
< bytes_to_transfer
; i
+= sizeof (PTRACE_XFER_TYPE
))
809 ptrace (PT_WRITE_U
, tid
, (PTRACE_ARG3_TYPE
) regaddr
,
810 *(PTRACE_XFER_TYPE
*) & buf
[i
]);
811 regaddr
+= sizeof (PTRACE_XFER_TYPE
);
814 && regno
== tdep
->ppc_fpscr_regnum
)
816 /* Some older kernel versions don't allow fpscr to be written. */
823 sprintf (message
, "writing register %s (#%d)",
824 REGISTER_NAME (regno
), regno
);
825 perror_with_name (message
);
831 fill_vrregset (gdb_vrregset_t
*vrregsetp
)
834 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
835 int num_of_vrregs
= tdep
->ppc_vrsave_regnum
- tdep
->ppc_vr0_regnum
+ 1;
836 int vrregsize
= DEPRECATED_REGISTER_RAW_SIZE (tdep
->ppc_vr0_regnum
);
837 int offset
= vrregsize
- DEPRECATED_REGISTER_RAW_SIZE (tdep
->ppc_vrsave_regnum
);
839 for (i
= 0; i
< num_of_vrregs
; i
++)
841 /* The last 2 registers of this set are only 32 bit long, not
842 128, but only VSCR is fetched as a 16 bytes quantity. */
843 if (i
== (num_of_vrregs
- 2))
844 regcache_collect (tdep
->ppc_vr0_regnum
+ i
,
845 *vrregsetp
+ i
* vrregsize
+ offset
);
847 regcache_collect (tdep
->ppc_vr0_regnum
+ i
, *vrregsetp
+ i
* vrregsize
);
852 store_altivec_registers (int tid
)
857 ret
= ptrace (PTRACE_GETVRREGS
, tid
, 0, ®s
);
862 have_ptrace_getvrregs
= 0;
865 perror_with_name ("Couldn't get AltiVec registers");
868 fill_vrregset (®s
);
870 if (ptrace (PTRACE_SETVRREGS
, tid
, 0, ®s
) < 0)
871 perror_with_name ("Couldn't write AltiVec registers");
875 store_spe_registers (int tid
)
877 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
878 struct gdb_evrregset_t evrregs
;
881 /* The code below should store to every field of evrregs; if that
882 doesn't happen, make it obvious by initializing it with
883 suspicious values. */
884 memset (&evrregs
, 42, sizeof (evrregs
));
886 for (i
= 0; i
< ppc_num_gprs
; i
++)
888 char buf
[MAX_REGISTER_SIZE
];
890 regcache_collect (tdep
->ppc_ev0_regnum
+ i
, buf
);
891 write_spliced_spe_reg (tid
, tdep
->ppc_ev0_regnum
+ i
, &evrregs
, buf
);
894 gdb_assert (sizeof (evrregs
.acc
)
895 == register_size (current_gdbarch
, tdep
->ppc_acc_regnum
));
896 regcache_collect (tdep
->ppc_acc_regnum
, &evrregs
.acc
);
897 gdb_assert (sizeof (evrregs
.spefscr
)
898 == register_size (current_gdbarch
, tdep
->ppc_spefscr_regnum
));
899 regcache_collect (tdep
->ppc_acc_regnum
, &evrregs
.spefscr
);
901 set_spe_registers (tid
, &evrregs
);
905 store_ppc_registers (int tid
)
908 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
910 if (! tdep
->ppc_gprs_pseudo_p
)
911 for (i
= 0; i
< ppc_num_gprs
; i
++)
912 store_register (tid
, tdep
->ppc_gp0_regnum
+ i
);
913 if (tdep
->ppc_fp0_regnum
>= 0)
914 for (i
= 0; i
< ppc_num_fprs
; i
++)
915 store_register (tid
, tdep
->ppc_fp0_regnum
+ i
);
916 store_register (tid
, PC_REGNUM
);
917 if (tdep
->ppc_ps_regnum
!= -1)
918 store_register (tid
, tdep
->ppc_ps_regnum
);
919 if (tdep
->ppc_cr_regnum
!= -1)
920 store_register (tid
, tdep
->ppc_cr_regnum
);
921 if (tdep
->ppc_lr_regnum
!= -1)
922 store_register (tid
, tdep
->ppc_lr_regnum
);
923 if (tdep
->ppc_ctr_regnum
!= -1)
924 store_register (tid
, tdep
->ppc_ctr_regnum
);
925 if (tdep
->ppc_xer_regnum
!= -1)
926 store_register (tid
, tdep
->ppc_xer_regnum
);
927 if (tdep
->ppc_mq_regnum
!= -1)
928 store_register (tid
, tdep
->ppc_mq_regnum
);
929 if (tdep
->ppc_fpscr_regnum
!= -1)
930 store_register (tid
, tdep
->ppc_fpscr_regnum
);
931 if (have_ptrace_getvrregs
)
932 if (tdep
->ppc_vr0_regnum
!= -1 && tdep
->ppc_vrsave_regnum
!= -1)
933 store_altivec_registers (tid
);
934 if (tdep
->ppc_ev0_regnum
>= 0)
935 store_spe_registers (tid
);
939 store_inferior_registers (int regno
)
941 /* Overload thread id onto process id */
942 int tid
= TIDGET (inferior_ptid
);
944 /* No thread id, just use process id */
946 tid
= PIDGET (inferior_ptid
);
949 store_register (tid
, regno
);
951 store_ppc_registers (tid
);
955 supply_gregset (gdb_gregset_t
*gregsetp
)
957 /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace
958 interface, and not the wordsize of the program's ABI. */
959 int wordsize
= sizeof (PTRACE_XFER_TYPE
);
960 ppc_linux_supply_gregset (current_regcache
, -1, gregsetp
,
961 sizeof (gdb_gregset_t
), wordsize
);
965 right_fill_reg (int regnum
, void *reg
)
967 /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace
968 interface, and not the wordsize of the program's ABI. */
969 int wordsize
= sizeof (PTRACE_XFER_TYPE
);
970 /* Right fill the register. */
971 regcache_raw_collect (current_regcache
, regnum
,
974 - register_size (current_gdbarch
, regnum
)));
978 fill_gregset (gdb_gregset_t
*gregsetp
, int regno
)
981 elf_greg_t
*regp
= (elf_greg_t
*) gregsetp
;
982 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
983 const int elf_ngreg
= 48;
986 /* Start with zeros. */
987 memset (regp
, 0, elf_ngreg
* sizeof (*regp
));
989 for (regi
= 0; regi
< ppc_num_gprs
; regi
++)
991 if ((regno
== -1) || regno
== tdep
->ppc_gp0_regnum
+ regi
)
992 right_fill_reg (tdep
->ppc_gp0_regnum
+ regi
, (regp
+ PT_R0
+ regi
));
995 if ((regno
== -1) || regno
== PC_REGNUM
)
996 right_fill_reg (PC_REGNUM
, regp
+ PT_NIP
);
997 if ((regno
== -1) || regno
== tdep
->ppc_lr_regnum
)
998 right_fill_reg (tdep
->ppc_lr_regnum
, regp
+ PT_LNK
);
999 if ((regno
== -1) || regno
== tdep
->ppc_cr_regnum
)
1000 regcache_collect (tdep
->ppc_cr_regnum
, regp
+ PT_CCR
);
1001 if ((regno
== -1) || regno
== tdep
->ppc_xer_regnum
)
1002 regcache_collect (tdep
->ppc_xer_regnum
, regp
+ PT_XER
);
1003 if ((regno
== -1) || regno
== tdep
->ppc_ctr_regnum
)
1004 right_fill_reg (tdep
->ppc_ctr_regnum
, regp
+ PT_CTR
);
1006 if (((regno
== -1) || regno
== tdep
->ppc_mq_regnum
)
1007 && (tdep
->ppc_mq_regnum
!= -1))
1008 right_fill_reg (tdep
->ppc_mq_regnum
, regp
+ PT_MQ
);
1010 if ((regno
== -1) || regno
== tdep
->ppc_ps_regnum
)
1011 right_fill_reg (tdep
->ppc_ps_regnum
, regp
+ PT_MSR
);
1015 supply_fpregset (gdb_fpregset_t
* fpregsetp
)
1017 ppc_linux_supply_fpregset (NULL
, current_regcache
, -1, fpregsetp
,
1018 sizeof (gdb_fpregset_t
));
1021 /* Given a pointer to a floating point register set in /proc format
1022 (fpregset_t *), update the register specified by REGNO from gdb's
1023 idea of the current floating point register set. If REGNO is -1,
1026 fill_fpregset (gdb_fpregset_t
*fpregsetp
, int regno
)
1029 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1030 bfd_byte
*fpp
= (void *) fpregsetp
;
1032 if (ppc_floating_point_unit_p (current_gdbarch
))
1034 for (regi
= 0; regi
< ppc_num_fprs
; regi
++)
1036 if ((regno
== -1) || (regno
== tdep
->ppc_fp0_regnum
+ regi
))
1037 regcache_collect (tdep
->ppc_fp0_regnum
+ regi
, fpp
+ 8 * regi
);
1039 if (regno
== -1 || regno
== tdep
->ppc_fpscr_regnum
)
1040 right_fill_reg (tdep
->ppc_fpscr_regnum
, (fpp
+ 8 * 32));