1 /* PPC GNU/Linux native support.
3 Copyright (C) 1988-2018 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21 #include "observable.h"
24 #include "gdbthread.h"
29 #include "linux-nat.h"
30 #include <sys/types.h>
33 #include <sys/ioctl.h>
37 #include <sys/procfs.h>
38 #include "nat/gdb_ptrace.h"
39 #include "inf-ptrace.h"
41 /* Prototypes for supply_gregset etc. */
44 #include "ppc-linux-tdep.h"
46 /* Required when using the AUXV. */
47 #include "elf/common.h"
50 #include "arch/ppc-linux-common.h"
51 #include "arch/ppc-linux-tdesc.h"
52 #include "nat/ppc-linux.h"
54 /* Similarly for the hardware watchpoint support. These requests are used
55 when the PowerPC HWDEBUG ptrace interface is not available. */
56 #ifndef PTRACE_GET_DEBUGREG
57 #define PTRACE_GET_DEBUGREG 25
59 #ifndef PTRACE_SET_DEBUGREG
60 #define PTRACE_SET_DEBUGREG 26
62 #ifndef PTRACE_GETSIGINFO
63 #define PTRACE_GETSIGINFO 0x4202
66 /* These requests are used when the PowerPC HWDEBUG ptrace interface is
67 available. It exposes the debug facilities of PowerPC processors, as well
68 as additional features of BookE processors, such as ranged breakpoints and
69 watchpoints and hardware-accelerated condition evaluation. */
70 #ifndef PPC_PTRACE_GETHWDBGINFO
72 /* Not having PPC_PTRACE_GETHWDBGINFO defined means that the PowerPC HWDEBUG
73 ptrace interface is not present in ptrace.h, so we'll have to pretty much
74 include it all here so that the code at least compiles on older systems. */
75 #define PPC_PTRACE_GETHWDBGINFO 0x89
76 #define PPC_PTRACE_SETHWDEBUG 0x88
77 #define PPC_PTRACE_DELHWDEBUG 0x87
81 uint32_t version
; /* Only version 1 exists to date. */
82 uint32_t num_instruction_bps
;
83 uint32_t num_data_bps
;
84 uint32_t num_condition_regs
;
85 uint32_t data_bp_alignment
;
86 uint32_t sizeof_condition
; /* size of the DVC register. */
90 /* Features will have bits indicating whether there is support for: */
91 #define PPC_DEBUG_FEATURE_INSN_BP_RANGE 0x1
92 #define PPC_DEBUG_FEATURE_INSN_BP_MASK 0x2
93 #define PPC_DEBUG_FEATURE_DATA_BP_RANGE 0x4
94 #define PPC_DEBUG_FEATURE_DATA_BP_MASK 0x8
96 struct ppc_hw_breakpoint
98 uint32_t version
; /* currently, version must be 1 */
99 uint32_t trigger_type
; /* only some combinations allowed */
100 uint32_t addr_mode
; /* address match mode */
101 uint32_t condition_mode
; /* break/watchpoint condition flags */
102 uint64_t addr
; /* break/watchpoint address */
103 uint64_t addr2
; /* range end or mask */
104 uint64_t condition_value
; /* contents of the DVC register */
108 #define PPC_BREAKPOINT_TRIGGER_EXECUTE 0x1
109 #define PPC_BREAKPOINT_TRIGGER_READ 0x2
110 #define PPC_BREAKPOINT_TRIGGER_WRITE 0x4
111 #define PPC_BREAKPOINT_TRIGGER_RW 0x6
114 #define PPC_BREAKPOINT_MODE_EXACT 0x0
115 #define PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE 0x1
116 #define PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE 0x2
117 #define PPC_BREAKPOINT_MODE_MASK 0x3
119 /* Condition mode. */
120 #define PPC_BREAKPOINT_CONDITION_NONE 0x0
121 #define PPC_BREAKPOINT_CONDITION_AND 0x1
122 #define PPC_BREAKPOINT_CONDITION_EXACT 0x1
123 #define PPC_BREAKPOINT_CONDITION_OR 0x2
124 #define PPC_BREAKPOINT_CONDITION_AND_OR 0x3
125 #define PPC_BREAKPOINT_CONDITION_BE_ALL 0x00ff0000
126 #define PPC_BREAKPOINT_CONDITION_BE_SHIFT 16
127 #define PPC_BREAKPOINT_CONDITION_BE(n) \
128 (1<<((n)+PPC_BREAKPOINT_CONDITION_BE_SHIFT))
129 #endif /* PPC_PTRACE_GETHWDBGINFO */
131 /* Feature defined on Linux kernel v3.9: DAWR interface, that enables wider
132 watchpoint (up to 512 bytes). */
133 #ifndef PPC_DEBUG_FEATURE_DATA_BP_DAWR
134 #define PPC_DEBUG_FEATURE_DATA_BP_DAWR 0x10
135 #endif /* PPC_DEBUG_FEATURE_DATA_BP_DAWR */
137 /* Similarly for the general-purpose (gp0 -- gp31)
138 and floating-point registers (fp0 -- fp31). */
139 #ifndef PTRACE_GETREGS
140 #define PTRACE_GETREGS 12
142 #ifndef PTRACE_SETREGS
143 #define PTRACE_SETREGS 13
145 #ifndef PTRACE_GETFPREGS
146 #define PTRACE_GETFPREGS 14
148 #ifndef PTRACE_SETFPREGS
149 #define PTRACE_SETFPREGS 15
152 /* This oddity is because the Linux kernel defines elf_vrregset_t as
153 an array of 33 16 bytes long elements. I.e. it leaves out vrsave.
154 However the PTRACE_GETVRREGS and PTRACE_SETVRREGS requests return
155 the vrsave as an extra 4 bytes at the end. I opted for creating a
156 flat array of chars, so that it is easier to manipulate for gdb.
158 There are 32 vector registers 16 bytes longs, plus a VSCR register
159 which is only 4 bytes long, but is fetched as a 16 bytes
160 quantity. Up to here we have the elf_vrregset_t structure.
161 Appended to this there is space for the VRSAVE register: 4 bytes.
162 Even though this vrsave register is not included in the regset
163 typedef, it is handled by the ptrace requests.
165 The layout is like this (where x is the actual value of the vscr reg): */
170 |.|.|.|.|.....|.|.|.|.||.|.|.|x||.|
171 <-------> <-------><-------><->
174 |.|.|.|.|.....|.|.|.|.||X|.|.|.||.|
175 <-------> <-------><-------><->
180 typedef char gdb_vrregset_t
[PPC_LINUX_SIZEOF_VRREGSET
];
182 /* This is the layout of the POWER7 VSX registers and the way they overlap
183 with the existing FPR and VMX registers.
185 VSR doubleword 0 VSR doubleword 1
186 ----------------------------------------------------------------
188 ----------------------------------------------------------------
190 ----------------------------------------------------------------
193 ----------------------------------------------------------------
194 VSR[30] | FPR[30] | |
195 ----------------------------------------------------------------
196 VSR[31] | FPR[31] | |
197 ----------------------------------------------------------------
199 ----------------------------------------------------------------
201 ----------------------------------------------------------------
204 ----------------------------------------------------------------
206 ----------------------------------------------------------------
208 ----------------------------------------------------------------
210 VSX has 64 128bit registers. The first 32 registers overlap with
211 the FP registers (doubleword 0) and hence extend them with additional
212 64 bits (doubleword 1). The other 32 regs overlap with the VMX
214 typedef char gdb_vsxregset_t
[PPC_LINUX_SIZEOF_VSXREGSET
];
216 /* On PPC processors that support the Signal Processing Extension
217 (SPE) APU, the general-purpose registers are 64 bits long.
218 However, the ordinary Linux kernel PTRACE_PEEKUSER / PTRACE_POKEUSER
219 ptrace calls only access the lower half of each register, to allow
220 them to behave the same way they do on non-SPE systems. There's a
221 separate pair of calls, PTRACE_GETEVRREGS / PTRACE_SETEVRREGS, that
222 read and write the top halves of all the general-purpose registers
223 at once, along with some SPE-specific registers.
225 GDB itself continues to claim the general-purpose registers are 32
226 bits long. It has unnamed raw registers that hold the upper halves
227 of the gprs, and the full 64-bit SIMD views of the registers,
228 'ev0' -- 'ev31', are pseudo-registers that splice the top and
229 bottom halves together.
231 This is the structure filled in by PTRACE_GETEVRREGS and written to
232 the inferior's registers by PTRACE_SETEVRREGS. */
233 struct gdb_evrregset_t
235 unsigned long evr
[32];
236 unsigned long long acc
;
237 unsigned long spefscr
;
240 /* Non-zero if our kernel may support the PTRACE_GETVSXREGS and
241 PTRACE_SETVSXREGS requests, for reading and writing the VSX
242 POWER7 registers 0 through 31. Zero if we've tried one of them and
243 gotten an error. Note that VSX registers 32 through 63 overlap
244 with VR registers 0 through 31. */
245 int have_ptrace_getsetvsxregs
= 1;
247 /* Non-zero if our kernel may support the PTRACE_GETVRREGS and
248 PTRACE_SETVRREGS requests, for reading and writing the Altivec
249 registers. Zero if we've tried one of them and gotten an
251 int have_ptrace_getvrregs
= 1;
253 /* Non-zero if our kernel may support the PTRACE_GETEVRREGS and
254 PTRACE_SETEVRREGS requests, for reading and writing the SPE
255 registers. Zero if we've tried one of them and gotten an
257 int have_ptrace_getsetevrregs
= 1;
259 /* Non-zero if our kernel may support the PTRACE_GETREGS and
260 PTRACE_SETREGS requests, for reading and writing the
261 general-purpose registers. Zero if we've tried one of
262 them and gotten an error. */
263 int have_ptrace_getsetregs
= 1;
265 /* Non-zero if our kernel may support the PTRACE_GETFPREGS and
266 PTRACE_SETFPREGS requests, for reading and writing the
267 floating-pointers registers. Zero if we've tried one of
268 them and gotten an error. */
269 int have_ptrace_getsetfpregs
= 1;
271 struct ppc_linux_nat_target final
: public linux_nat_target
273 /* Add our register access methods. */
274 void fetch_registers (struct regcache
*, int) override
;
275 void store_registers (struct regcache
*, int) override
;
277 /* Add our breakpoint/watchpoint methods. */
278 int can_use_hw_breakpoint (enum bptype
, int, int) override
;
280 int insert_hw_breakpoint (struct gdbarch
*, struct bp_target_info
*)
283 int remove_hw_breakpoint (struct gdbarch
*, struct bp_target_info
*)
286 int region_ok_for_hw_watchpoint (CORE_ADDR
, int) override
;
288 int insert_watchpoint (CORE_ADDR
, int, enum target_hw_bp_type
,
289 struct expression
*) override
;
291 int remove_watchpoint (CORE_ADDR
, int, enum target_hw_bp_type
,
292 struct expression
*) override
;
294 int insert_mask_watchpoint (CORE_ADDR
, CORE_ADDR
, enum target_hw_bp_type
)
297 int remove_mask_watchpoint (CORE_ADDR
, CORE_ADDR
, enum target_hw_bp_type
)
300 bool stopped_by_watchpoint () override
;
302 bool stopped_data_address (CORE_ADDR
*) override
;
304 bool watchpoint_addr_within_range (CORE_ADDR
, CORE_ADDR
, int) override
;
306 bool can_accel_watchpoint_condition (CORE_ADDR
, int, int, struct expression
*)
309 int masked_watch_num_registers (CORE_ADDR
, CORE_ADDR
) override
;
311 int ranged_break_num_registers () override
;
313 const struct target_desc
*read_description () override
;
315 int auxv_parse (gdb_byte
**readptr
,
316 gdb_byte
*endptr
, CORE_ADDR
*typep
, CORE_ADDR
*valp
)
319 /* Override linux_nat_target low methods. */
320 void low_new_thread (struct lwp_info
*lp
) override
;
323 static ppc_linux_nat_target the_ppc_linux_nat_target
;
326 /* registers layout, as presented by the ptrace interface:
327 PT_R0, PT_R1, PT_R2, PT_R3, PT_R4, PT_R5, PT_R6, PT_R7,
328 PT_R8, PT_R9, PT_R10, PT_R11, PT_R12, PT_R13, PT_R14, PT_R15,
329 PT_R16, PT_R17, PT_R18, PT_R19, PT_R20, PT_R21, PT_R22, PT_R23,
330 PT_R24, PT_R25, PT_R26, PT_R27, PT_R28, PT_R29, PT_R30, PT_R31,
331 PT_FPR0, PT_FPR0 + 2, PT_FPR0 + 4, PT_FPR0 + 6,
332 PT_FPR0 + 8, PT_FPR0 + 10, PT_FPR0 + 12, PT_FPR0 + 14,
333 PT_FPR0 + 16, PT_FPR0 + 18, PT_FPR0 + 20, PT_FPR0 + 22,
334 PT_FPR0 + 24, PT_FPR0 + 26, PT_FPR0 + 28, PT_FPR0 + 30,
335 PT_FPR0 + 32, PT_FPR0 + 34, PT_FPR0 + 36, PT_FPR0 + 38,
336 PT_FPR0 + 40, PT_FPR0 + 42, PT_FPR0 + 44, PT_FPR0 + 46,
337 PT_FPR0 + 48, PT_FPR0 + 50, PT_FPR0 + 52, PT_FPR0 + 54,
338 PT_FPR0 + 56, PT_FPR0 + 58, PT_FPR0 + 60, PT_FPR0 + 62,
339 PT_NIP, PT_MSR, PT_CCR, PT_LNK, PT_CTR, PT_XER, PT_MQ */
343 ppc_register_u_addr (struct gdbarch
*gdbarch
, int regno
)
346 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
347 /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace
348 interface, and not the wordsize of the program's ABI. */
349 int wordsize
= sizeof (long);
351 /* General purpose registers occupy 1 slot each in the buffer. */
352 if (regno
>= tdep
->ppc_gp0_regnum
353 && regno
< tdep
->ppc_gp0_regnum
+ ppc_num_gprs
)
354 u_addr
= ((regno
- tdep
->ppc_gp0_regnum
+ PT_R0
) * wordsize
);
356 /* Floating point regs: eight bytes each in both 32- and 64-bit
357 ptrace interfaces. Thus, two slots each in 32-bit interface, one
358 slot each in 64-bit interface. */
359 if (tdep
->ppc_fp0_regnum
>= 0
360 && regno
>= tdep
->ppc_fp0_regnum
361 && regno
< tdep
->ppc_fp0_regnum
+ ppc_num_fprs
)
362 u_addr
= (PT_FPR0
* wordsize
) + ((regno
- tdep
->ppc_fp0_regnum
) * 8);
364 /* UISA special purpose registers: 1 slot each. */
365 if (regno
== gdbarch_pc_regnum (gdbarch
))
366 u_addr
= PT_NIP
* wordsize
;
367 if (regno
== tdep
->ppc_lr_regnum
)
368 u_addr
= PT_LNK
* wordsize
;
369 if (regno
== tdep
->ppc_cr_regnum
)
370 u_addr
= PT_CCR
* wordsize
;
371 if (regno
== tdep
->ppc_xer_regnum
)
372 u_addr
= PT_XER
* wordsize
;
373 if (regno
== tdep
->ppc_ctr_regnum
)
374 u_addr
= PT_CTR
* wordsize
;
376 if (regno
== tdep
->ppc_mq_regnum
)
377 u_addr
= PT_MQ
* wordsize
;
379 if (regno
== tdep
->ppc_ps_regnum
)
380 u_addr
= PT_MSR
* wordsize
;
381 if (regno
== PPC_ORIG_R3_REGNUM
)
382 u_addr
= PT_ORIG_R3
* wordsize
;
383 if (regno
== PPC_TRAP_REGNUM
)
384 u_addr
= PT_TRAP
* wordsize
;
385 if (tdep
->ppc_fpscr_regnum
>= 0
386 && regno
== tdep
->ppc_fpscr_regnum
)
388 /* NOTE: cagney/2005-02-08: On some 64-bit GNU/Linux systems the
389 kernel headers incorrectly contained the 32-bit definition of
390 PT_FPSCR. For the 32-bit definition, floating-point
391 registers occupy two 32-bit "slots", and the FPSCR lives in
392 the second half of such a slot-pair (hence +1). For 64-bit,
393 the FPSCR instead occupies the full 64-bit 2-word-slot and
394 hence no adjustment is necessary. Hack around this. */
395 if (wordsize
== 8 && PT_FPSCR
== (48 + 32 + 1))
396 u_addr
= (48 + 32) * wordsize
;
397 /* If the FPSCR is 64-bit wide, we need to fetch the whole 64-bit
398 slot and not just its second word. The PT_FPSCR supplied when
399 GDB is compiled as a 32-bit app doesn't reflect this. */
400 else if (wordsize
== 4 && register_size (gdbarch
, regno
) == 8
401 && PT_FPSCR
== (48 + 2*32 + 1))
402 u_addr
= (48 + 2*32) * wordsize
;
404 u_addr
= PT_FPSCR
* wordsize
;
409 /* The Linux kernel ptrace interface for POWER7 VSX registers uses the
410 registers set mechanism, as opposed to the interface for all the
411 other registers, that stores/fetches each register individually. */
413 fetch_vsx_registers (struct regcache
*regcache
, int tid
, int regno
)
416 gdb_vsxregset_t regs
;
417 const struct regset
*vsxregset
= ppc_linux_vsxregset ();
419 ret
= ptrace (PTRACE_GETVSXREGS
, tid
, 0, ®s
);
424 have_ptrace_getsetvsxregs
= 0;
427 perror_with_name (_("Unable to fetch VSX registers"));
430 vsxregset
->supply_regset (vsxregset
, regcache
, regno
, ®s
,
431 PPC_LINUX_SIZEOF_VSXREGSET
);
434 /* The Linux kernel ptrace interface for AltiVec registers uses the
435 registers set mechanism, as opposed to the interface for all the
436 other registers, that stores/fetches each register individually. */
438 fetch_altivec_registers (struct regcache
*regcache
, int tid
,
443 struct gdbarch
*gdbarch
= regcache
->arch ();
444 const struct regset
*vrregset
= ppc_linux_vrregset (gdbarch
);
446 ret
= ptrace (PTRACE_GETVRREGS
, tid
, 0, ®s
);
451 have_ptrace_getvrregs
= 0;
454 perror_with_name (_("Unable to fetch AltiVec registers"));
457 vrregset
->supply_regset (vrregset
, regcache
, regno
, ®s
,
458 PPC_LINUX_SIZEOF_VRREGSET
);
461 /* Fetch the top 32 bits of TID's general-purpose registers and the
462 SPE-specific registers, and place the results in EVRREGSET. If we
463 don't support PTRACE_GETEVRREGS, then just fill EVRREGSET with
466 All the logic to deal with whether or not the PTRACE_GETEVRREGS and
467 PTRACE_SETEVRREGS requests are supported is isolated here, and in
468 set_spe_registers. */
470 get_spe_registers (int tid
, struct gdb_evrregset_t
*evrregset
)
472 if (have_ptrace_getsetevrregs
)
474 if (ptrace (PTRACE_GETEVRREGS
, tid
, 0, evrregset
) >= 0)
478 /* EIO means that the PTRACE_GETEVRREGS request isn't supported;
479 we just return zeros. */
481 have_ptrace_getsetevrregs
= 0;
483 /* Anything else needs to be reported. */
484 perror_with_name (_("Unable to fetch SPE registers"));
488 memset (evrregset
, 0, sizeof (*evrregset
));
491 /* Supply values from TID for SPE-specific raw registers: the upper
492 halves of the GPRs, the accumulator, and the spefscr. REGNO must
493 be the number of an upper half register, acc, spefscr, or -1 to
494 supply the values of all registers. */
496 fetch_spe_register (struct regcache
*regcache
, int tid
, int regno
)
498 struct gdbarch
*gdbarch
= regcache
->arch ();
499 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
500 struct gdb_evrregset_t evrregs
;
502 gdb_assert (sizeof (evrregs
.evr
[0])
503 == register_size (gdbarch
, tdep
->ppc_ev0_upper_regnum
));
504 gdb_assert (sizeof (evrregs
.acc
)
505 == register_size (gdbarch
, tdep
->ppc_acc_regnum
));
506 gdb_assert (sizeof (evrregs
.spefscr
)
507 == register_size (gdbarch
, tdep
->ppc_spefscr_regnum
));
509 get_spe_registers (tid
, &evrregs
);
515 for (i
= 0; i
< ppc_num_gprs
; i
++)
516 regcache
->raw_supply (tdep
->ppc_ev0_upper_regnum
+ i
, &evrregs
.evr
[i
]);
518 else if (tdep
->ppc_ev0_upper_regnum
<= regno
519 && regno
< tdep
->ppc_ev0_upper_regnum
+ ppc_num_gprs
)
520 regcache
->raw_supply (regno
,
521 &evrregs
.evr
[regno
- tdep
->ppc_ev0_upper_regnum
]);
524 || regno
== tdep
->ppc_acc_regnum
)
525 regcache
->raw_supply (tdep
->ppc_acc_regnum
, &evrregs
.acc
);
528 || regno
== tdep
->ppc_spefscr_regnum
)
529 regcache
->raw_supply (tdep
->ppc_spefscr_regnum
, &evrregs
.spefscr
);
532 /* Use ptrace to fetch all registers from the register set with note
533 type REGSET_ID, size REGSIZE, and layout described by REGSET, from
534 process/thread TID and supply their values to REGCACHE. If ptrace
535 returns ENODATA to indicate the regset is unavailable, mark the
536 registers as unavailable in REGCACHE. */
539 fetch_regset (struct regcache
*regcache
, int tid
,
540 int regset_id
, int regsetsize
, const struct regset
*regset
)
542 void *buf
= alloca (regsetsize
);
546 iov
.iov_len
= regsetsize
;
548 if (ptrace (PTRACE_GETREGSET
, tid
, regset_id
, &iov
) < 0)
550 if (errno
== ENODATA
)
551 regset
->supply_regset (regset
, regcache
, -1, NULL
, regsetsize
);
553 perror_with_name (_("Couldn't get register set"));
556 regset
->supply_regset (regset
, regcache
, -1, buf
, regsetsize
);
559 /* Use ptrace to store register REGNUM of the regset with note type
560 REGSET_ID, size REGSETSIZE, and layout described by REGSET, from
561 REGCACHE back to process/thread TID. If REGNUM is -1 all registers
562 in the set are collected and stored. */
565 store_regset (const struct regcache
*regcache
, int tid
, int regnum
,
566 int regset_id
, int regsetsize
, const struct regset
*regset
)
568 void *buf
= alloca (regsetsize
);
572 iov
.iov_len
= regsetsize
;
574 /* Make sure that the buffer that will be stored has up to date values
575 for the registers that won't be collected. */
576 if (ptrace (PTRACE_GETREGSET
, tid
, regset_id
, &iov
) < 0)
577 perror_with_name (_("Couldn't get register set"));
579 regset
->collect_regset (regset
, regcache
, regnum
, buf
, regsetsize
);
581 if (ptrace (PTRACE_SETREGSET
, tid
, regset_id
, &iov
) < 0)
582 perror_with_name (_("Couldn't set register set"));
585 /* Check whether the kernel provides a register set with number
586 REGSET_ID of size REGSETSIZE for process/thread TID. */
589 check_regset (int tid
, int regset_id
, int regsetsize
)
591 void *buf
= alloca (regsetsize
);
595 iov
.iov_len
= regsetsize
;
597 if (ptrace (PTRACE_GETREGSET
, tid
, regset_id
, &iov
) >= 0
605 fetch_register (struct regcache
*regcache
, int tid
, int regno
)
607 struct gdbarch
*gdbarch
= regcache
->arch ();
608 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
609 /* This isn't really an address. But ptrace thinks of it as one. */
610 CORE_ADDR regaddr
= ppc_register_u_addr (gdbarch
, regno
);
611 int bytes_transferred
;
612 gdb_byte buf
[PPC_MAX_REGISTER_SIZE
];
614 if (altivec_register_p (gdbarch
, regno
))
616 /* If this is the first time through, or if it is not the first
617 time through, and we have comfirmed that there is kernel
618 support for such a ptrace request, then go and fetch the
620 if (have_ptrace_getvrregs
)
622 fetch_altivec_registers (regcache
, tid
, regno
);
625 /* If we have discovered that there is no ptrace support for
626 AltiVec registers, fall through and return zeroes, because
627 regaddr will be -1 in this case. */
629 else if (vsx_register_p (gdbarch
, regno
))
631 if (have_ptrace_getsetvsxregs
)
633 fetch_vsx_registers (regcache
, tid
, regno
);
637 else if (spe_register_p (gdbarch
, regno
))
639 fetch_spe_register (regcache
, tid
, regno
);
642 else if (regno
== PPC_DSCR_REGNUM
)
644 gdb_assert (tdep
->ppc_dscr_regnum
!= -1);
646 fetch_regset (regcache
, tid
, NT_PPC_DSCR
,
647 PPC_LINUX_SIZEOF_DSCRREGSET
,
648 &ppc32_linux_dscrregset
);
651 else if (regno
== PPC_PPR_REGNUM
)
653 gdb_assert (tdep
->ppc_ppr_regnum
!= -1);
655 fetch_regset (regcache
, tid
, NT_PPC_PPR
,
656 PPC_LINUX_SIZEOF_PPRREGSET
,
657 &ppc32_linux_pprregset
);
660 else if (regno
== PPC_TAR_REGNUM
)
662 gdb_assert (tdep
->ppc_tar_regnum
!= -1);
664 fetch_regset (regcache
, tid
, NT_PPC_TAR
,
665 PPC_LINUX_SIZEOF_TARREGSET
,
666 &ppc32_linux_tarregset
);
669 else if (PPC_IS_EBB_REGNUM (regno
))
671 gdb_assert (tdep
->have_ebb
);
673 fetch_regset (regcache
, tid
, NT_PPC_EBB
,
674 PPC_LINUX_SIZEOF_EBBREGSET
,
675 &ppc32_linux_ebbregset
);
678 else if (PPC_IS_PMU_REGNUM (regno
))
680 gdb_assert (tdep
->ppc_mmcr0_regnum
!= -1);
682 fetch_regset (regcache
, tid
, NT_PPC_PMU
,
683 PPC_LINUX_SIZEOF_PMUREGSET
,
684 &ppc32_linux_pmuregset
);
687 else if (PPC_IS_TMSPR_REGNUM (regno
))
689 gdb_assert (tdep
->have_htm_spr
);
691 fetch_regset (regcache
, tid
, NT_PPC_TM_SPR
,
692 PPC_LINUX_SIZEOF_TM_SPRREGSET
,
693 &ppc32_linux_tm_sprregset
);
696 else if (PPC_IS_CKPTGP_REGNUM (regno
))
698 gdb_assert (tdep
->have_htm_core
);
700 const struct regset
*cgprregset
= ppc_linux_cgprregset (gdbarch
);
701 fetch_regset (regcache
, tid
, NT_PPC_TM_CGPR
,
702 (tdep
->wordsize
== 4?
703 PPC32_LINUX_SIZEOF_CGPRREGSET
704 : PPC64_LINUX_SIZEOF_CGPRREGSET
),
708 else if (PPC_IS_CKPTFP_REGNUM (regno
))
710 gdb_assert (tdep
->have_htm_fpu
);
712 fetch_regset (regcache
, tid
, NT_PPC_TM_CFPR
,
713 PPC_LINUX_SIZEOF_CFPRREGSET
,
714 &ppc32_linux_cfprregset
);
717 else if (PPC_IS_CKPTVMX_REGNUM (regno
))
719 gdb_assert (tdep
->have_htm_altivec
);
721 const struct regset
*cvmxregset
= ppc_linux_cvmxregset (gdbarch
);
722 fetch_regset (regcache
, tid
, NT_PPC_TM_CVMX
,
723 PPC_LINUX_SIZEOF_CVMXREGSET
,
727 else if (PPC_IS_CKPTVSX_REGNUM (regno
))
729 gdb_assert (tdep
->have_htm_vsx
);
731 fetch_regset (regcache
, tid
, NT_PPC_TM_CVSX
,
732 PPC_LINUX_SIZEOF_CVSXREGSET
,
733 &ppc32_linux_cvsxregset
);
736 else if (regno
== PPC_CPPR_REGNUM
)
738 gdb_assert (tdep
->ppc_cppr_regnum
!= -1);
740 fetch_regset (regcache
, tid
, NT_PPC_TM_CPPR
,
741 PPC_LINUX_SIZEOF_CPPRREGSET
,
742 &ppc32_linux_cpprregset
);
745 else if (regno
== PPC_CDSCR_REGNUM
)
747 gdb_assert (tdep
->ppc_cdscr_regnum
!= -1);
749 fetch_regset (regcache
, tid
, NT_PPC_TM_CDSCR
,
750 PPC_LINUX_SIZEOF_CDSCRREGSET
,
751 &ppc32_linux_cdscrregset
);
754 else if (regno
== PPC_CTAR_REGNUM
)
756 gdb_assert (tdep
->ppc_ctar_regnum
!= -1);
758 fetch_regset (regcache
, tid
, NT_PPC_TM_CTAR
,
759 PPC_LINUX_SIZEOF_CTARREGSET
,
760 &ppc32_linux_ctarregset
);
766 memset (buf
, '\0', register_size (gdbarch
, regno
)); /* Supply zeroes */
767 regcache
->raw_supply (regno
, buf
);
771 /* Read the raw register using sizeof(long) sized chunks. On a
772 32-bit platform, 64-bit floating-point registers will require two
774 for (bytes_transferred
= 0;
775 bytes_transferred
< register_size (gdbarch
, regno
);
776 bytes_transferred
+= sizeof (long))
781 l
= ptrace (PTRACE_PEEKUSER
, tid
, (PTRACE_TYPE_ARG3
) regaddr
, 0);
782 regaddr
+= sizeof (long);
786 xsnprintf (message
, sizeof (message
), "reading register %s (#%d)",
787 gdbarch_register_name (gdbarch
, regno
), regno
);
788 perror_with_name (message
);
790 memcpy (&buf
[bytes_transferred
], &l
, sizeof (l
));
793 /* Now supply the register. Keep in mind that the regcache's idea
794 of the register's size may not be a multiple of sizeof
796 if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_LITTLE
)
798 /* Little-endian values are always found at the left end of the
799 bytes transferred. */
800 regcache
->raw_supply (regno
, buf
);
802 else if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
)
804 /* Big-endian values are found at the right end of the bytes
806 size_t padding
= (bytes_transferred
- register_size (gdbarch
, regno
));
807 regcache
->raw_supply (regno
, buf
+ padding
);
810 internal_error (__FILE__
, __LINE__
,
811 _("fetch_register: unexpected byte order: %d"),
812 gdbarch_byte_order (gdbarch
));
815 /* This function actually issues the request to ptrace, telling
816 it to get all general-purpose registers and put them into the
819 If the ptrace request does not exist, this function returns 0
820 and properly sets the have_ptrace_* flag. If the request fails,
821 this function calls perror_with_name. Otherwise, if the request
822 succeeds, then the regcache gets filled and 1 is returned. */
824 fetch_all_gp_regs (struct regcache
*regcache
, int tid
)
826 gdb_gregset_t gregset
;
828 if (ptrace (PTRACE_GETREGS
, tid
, 0, (void *) &gregset
) < 0)
832 have_ptrace_getsetregs
= 0;
835 perror_with_name (_("Couldn't get general-purpose registers."));
838 supply_gregset (regcache
, (const gdb_gregset_t
*) &gregset
);
843 /* This is a wrapper for the fetch_all_gp_regs function. It is
844 responsible for verifying if this target has the ptrace request
845 that can be used to fetch all general-purpose registers at one
846 shot. If it doesn't, then we should fetch them using the
847 old-fashioned way, which is to iterate over the registers and
848 request them one by one. */
850 fetch_gp_regs (struct regcache
*regcache
, int tid
)
852 struct gdbarch
*gdbarch
= regcache
->arch ();
853 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
856 if (have_ptrace_getsetregs
)
857 if (fetch_all_gp_regs (regcache
, tid
))
860 /* If we've hit this point, it doesn't really matter which
861 architecture we are using. We just need to read the
862 registers in the "old-fashioned way". */
863 for (i
= 0; i
< ppc_num_gprs
; i
++)
864 fetch_register (regcache
, tid
, tdep
->ppc_gp0_regnum
+ i
);
867 /* This function actually issues the request to ptrace, telling
868 it to get all floating-point registers and put them into the
871 If the ptrace request does not exist, this function returns 0
872 and properly sets the have_ptrace_* flag. If the request fails,
873 this function calls perror_with_name. Otherwise, if the request
874 succeeds, then the regcache gets filled and 1 is returned. */
876 fetch_all_fp_regs (struct regcache
*regcache
, int tid
)
878 gdb_fpregset_t fpregs
;
880 if (ptrace (PTRACE_GETFPREGS
, tid
, 0, (void *) &fpregs
) < 0)
884 have_ptrace_getsetfpregs
= 0;
887 perror_with_name (_("Couldn't get floating-point registers."));
890 supply_fpregset (regcache
, (const gdb_fpregset_t
*) &fpregs
);
895 /* This is a wrapper for the fetch_all_fp_regs function. It is
896 responsible for verifying if this target has the ptrace request
897 that can be used to fetch all floating-point registers at one
898 shot. If it doesn't, then we should fetch them using the
899 old-fashioned way, which is to iterate over the registers and
900 request them one by one. */
902 fetch_fp_regs (struct regcache
*regcache
, int tid
)
904 struct gdbarch
*gdbarch
= regcache
->arch ();
905 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
908 if (have_ptrace_getsetfpregs
)
909 if (fetch_all_fp_regs (regcache
, tid
))
912 /* If we've hit this point, it doesn't really matter which
913 architecture we are using. We just need to read the
914 registers in the "old-fashioned way". */
915 for (i
= 0; i
< ppc_num_fprs
; i
++)
916 fetch_register (regcache
, tid
, tdep
->ppc_fp0_regnum
+ i
);
920 fetch_ppc_registers (struct regcache
*regcache
, int tid
)
922 struct gdbarch
*gdbarch
= regcache
->arch ();
923 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
925 fetch_gp_regs (regcache
, tid
);
926 if (tdep
->ppc_fp0_regnum
>= 0)
927 fetch_fp_regs (regcache
, tid
);
928 fetch_register (regcache
, tid
, gdbarch_pc_regnum (gdbarch
));
929 if (tdep
->ppc_ps_regnum
!= -1)
930 fetch_register (regcache
, tid
, tdep
->ppc_ps_regnum
);
931 if (tdep
->ppc_cr_regnum
!= -1)
932 fetch_register (regcache
, tid
, tdep
->ppc_cr_regnum
);
933 if (tdep
->ppc_lr_regnum
!= -1)
934 fetch_register (regcache
, tid
, tdep
->ppc_lr_regnum
);
935 if (tdep
->ppc_ctr_regnum
!= -1)
936 fetch_register (regcache
, tid
, tdep
->ppc_ctr_regnum
);
937 if (tdep
->ppc_xer_regnum
!= -1)
938 fetch_register (regcache
, tid
, tdep
->ppc_xer_regnum
);
939 if (tdep
->ppc_mq_regnum
!= -1)
940 fetch_register (regcache
, tid
, tdep
->ppc_mq_regnum
);
941 if (ppc_linux_trap_reg_p (gdbarch
))
943 fetch_register (regcache
, tid
, PPC_ORIG_R3_REGNUM
);
944 fetch_register (regcache
, tid
, PPC_TRAP_REGNUM
);
946 if (tdep
->ppc_fpscr_regnum
!= -1)
947 fetch_register (regcache
, tid
, tdep
->ppc_fpscr_regnum
);
948 if (have_ptrace_getvrregs
)
949 if (tdep
->ppc_vr0_regnum
!= -1 && tdep
->ppc_vrsave_regnum
!= -1)
950 fetch_altivec_registers (regcache
, tid
, -1);
951 if (have_ptrace_getsetvsxregs
)
952 if (tdep
->ppc_vsr0_upper_regnum
!= -1)
953 fetch_vsx_registers (regcache
, tid
, -1);
954 if (tdep
->ppc_ev0_upper_regnum
>= 0)
955 fetch_spe_register (regcache
, tid
, -1);
956 if (tdep
->ppc_ppr_regnum
!= -1)
957 fetch_regset (regcache
, tid
, NT_PPC_PPR
,
958 PPC_LINUX_SIZEOF_PPRREGSET
,
959 &ppc32_linux_pprregset
);
960 if (tdep
->ppc_dscr_regnum
!= -1)
961 fetch_regset (regcache
, tid
, NT_PPC_DSCR
,
962 PPC_LINUX_SIZEOF_DSCRREGSET
,
963 &ppc32_linux_dscrregset
);
964 if (tdep
->ppc_tar_regnum
!= -1)
965 fetch_regset (regcache
, tid
, NT_PPC_TAR
,
966 PPC_LINUX_SIZEOF_TARREGSET
,
967 &ppc32_linux_tarregset
);
969 fetch_regset (regcache
, tid
, NT_PPC_EBB
,
970 PPC_LINUX_SIZEOF_EBBREGSET
,
971 &ppc32_linux_ebbregset
);
972 if (tdep
->ppc_mmcr0_regnum
!= -1)
973 fetch_regset (regcache
, tid
, NT_PPC_PMU
,
974 PPC_LINUX_SIZEOF_PMUREGSET
,
975 &ppc32_linux_pmuregset
);
976 if (tdep
->have_htm_spr
)
977 fetch_regset (regcache
, tid
, NT_PPC_TM_SPR
,
978 PPC_LINUX_SIZEOF_TM_SPRREGSET
,
979 &ppc32_linux_tm_sprregset
);
980 if (tdep
->have_htm_core
)
982 const struct regset
*cgprregset
= ppc_linux_cgprregset (gdbarch
);
983 fetch_regset (regcache
, tid
, NT_PPC_TM_CGPR
,
984 (tdep
->wordsize
== 4?
985 PPC32_LINUX_SIZEOF_CGPRREGSET
986 : PPC64_LINUX_SIZEOF_CGPRREGSET
),
989 if (tdep
->have_htm_fpu
)
990 fetch_regset (regcache
, tid
, NT_PPC_TM_CFPR
,
991 PPC_LINUX_SIZEOF_CFPRREGSET
,
992 &ppc32_linux_cfprregset
);
993 if (tdep
->have_htm_altivec
)
995 const struct regset
*cvmxregset
= ppc_linux_cvmxregset (gdbarch
);
996 fetch_regset (regcache
, tid
, NT_PPC_TM_CVMX
,
997 PPC_LINUX_SIZEOF_CVMXREGSET
,
1000 if (tdep
->have_htm_vsx
)
1001 fetch_regset (regcache
, tid
, NT_PPC_TM_CVSX
,
1002 PPC_LINUX_SIZEOF_CVSXREGSET
,
1003 &ppc32_linux_cvsxregset
);
1004 if (tdep
->ppc_cppr_regnum
!= -1)
1005 fetch_regset (regcache
, tid
, NT_PPC_TM_CPPR
,
1006 PPC_LINUX_SIZEOF_CPPRREGSET
,
1007 &ppc32_linux_cpprregset
);
1008 if (tdep
->ppc_cdscr_regnum
!= -1)
1009 fetch_regset (regcache
, tid
, NT_PPC_TM_CDSCR
,
1010 PPC_LINUX_SIZEOF_CDSCRREGSET
,
1011 &ppc32_linux_cdscrregset
);
1012 if (tdep
->ppc_ctar_regnum
!= -1)
1013 fetch_regset (regcache
, tid
, NT_PPC_TM_CTAR
,
1014 PPC_LINUX_SIZEOF_CTARREGSET
,
1015 &ppc32_linux_ctarregset
);
1018 /* Fetch registers from the child process. Fetch all registers if
1019 regno == -1, otherwise fetch all general registers or all floating
1020 point registers depending upon the value of regno. */
1022 ppc_linux_nat_target::fetch_registers (struct regcache
*regcache
, int regno
)
1024 pid_t tid
= get_ptrace_pid (regcache
->ptid ());
1027 fetch_ppc_registers (regcache
, tid
);
1029 fetch_register (regcache
, tid
, regno
);
1033 store_vsx_registers (const struct regcache
*regcache
, int tid
, int regno
)
1036 gdb_vsxregset_t regs
;
1037 const struct regset
*vsxregset
= ppc_linux_vsxregset ();
1039 ret
= ptrace (PTRACE_GETVSXREGS
, tid
, 0, ®s
);
1044 have_ptrace_getsetvsxregs
= 0;
1047 perror_with_name (_("Unable to fetch VSX registers"));
1050 vsxregset
->collect_regset (vsxregset
, regcache
, regno
, ®s
,
1051 PPC_LINUX_SIZEOF_VSXREGSET
);
1053 ret
= ptrace (PTRACE_SETVSXREGS
, tid
, 0, ®s
);
1055 perror_with_name (_("Unable to store VSX registers"));
1059 store_altivec_registers (const struct regcache
*regcache
, int tid
,
1063 gdb_vrregset_t regs
;
1064 struct gdbarch
*gdbarch
= regcache
->arch ();
1065 const struct regset
*vrregset
= ppc_linux_vrregset (gdbarch
);
1067 ret
= ptrace (PTRACE_GETVRREGS
, tid
, 0, ®s
);
1072 have_ptrace_getvrregs
= 0;
1075 perror_with_name (_("Unable to fetch AltiVec registers"));
1078 vrregset
->collect_regset (vrregset
, regcache
, regno
, ®s
,
1079 PPC_LINUX_SIZEOF_VRREGSET
);
1081 ret
= ptrace (PTRACE_SETVRREGS
, tid
, 0, ®s
);
1083 perror_with_name (_("Unable to store AltiVec registers"));
1086 /* Assuming TID referrs to an SPE process, set the top halves of TID's
1087 general-purpose registers and its SPE-specific registers to the
1088 values in EVRREGSET. If we don't support PTRACE_SETEVRREGS, do
1091 All the logic to deal with whether or not the PTRACE_GETEVRREGS and
1092 PTRACE_SETEVRREGS requests are supported is isolated here, and in
1093 get_spe_registers. */
1095 set_spe_registers (int tid
, struct gdb_evrregset_t
*evrregset
)
1097 if (have_ptrace_getsetevrregs
)
1099 if (ptrace (PTRACE_SETEVRREGS
, tid
, 0, evrregset
) >= 0)
1103 /* EIO means that the PTRACE_SETEVRREGS request isn't
1104 supported; we fail silently, and don't try the call
1107 have_ptrace_getsetevrregs
= 0;
1109 /* Anything else needs to be reported. */
1110 perror_with_name (_("Unable to set SPE registers"));
1115 /* Write GDB's value for the SPE-specific raw register REGNO to TID.
1116 If REGNO is -1, write the values of all the SPE-specific
1119 store_spe_register (const struct regcache
*regcache
, int tid
, int regno
)
1121 struct gdbarch
*gdbarch
= regcache
->arch ();
1122 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1123 struct gdb_evrregset_t evrregs
;
1125 gdb_assert (sizeof (evrregs
.evr
[0])
1126 == register_size (gdbarch
, tdep
->ppc_ev0_upper_regnum
));
1127 gdb_assert (sizeof (evrregs
.acc
)
1128 == register_size (gdbarch
, tdep
->ppc_acc_regnum
));
1129 gdb_assert (sizeof (evrregs
.spefscr
)
1130 == register_size (gdbarch
, tdep
->ppc_spefscr_regnum
));
1133 /* Since we're going to write out every register, the code below
1134 should store to every field of evrregs; if that doesn't happen,
1135 make it obvious by initializing it with suspicious values. */
1136 memset (&evrregs
, 42, sizeof (evrregs
));
1138 /* We can only read and write the entire EVR register set at a
1139 time, so to write just a single register, we do a
1140 read-modify-write maneuver. */
1141 get_spe_registers (tid
, &evrregs
);
1147 for (i
= 0; i
< ppc_num_gprs
; i
++)
1148 regcache
->raw_collect (tdep
->ppc_ev0_upper_regnum
+ i
,
1151 else if (tdep
->ppc_ev0_upper_regnum
<= regno
1152 && regno
< tdep
->ppc_ev0_upper_regnum
+ ppc_num_gprs
)
1153 regcache
->raw_collect (regno
,
1154 &evrregs
.evr
[regno
- tdep
->ppc_ev0_upper_regnum
]);
1157 || regno
== tdep
->ppc_acc_regnum
)
1158 regcache
->raw_collect (tdep
->ppc_acc_regnum
,
1162 || regno
== tdep
->ppc_spefscr_regnum
)
1163 regcache
->raw_collect (tdep
->ppc_spefscr_regnum
,
1166 /* Write back the modified register set. */
1167 set_spe_registers (tid
, &evrregs
);
1171 store_register (const struct regcache
*regcache
, int tid
, int regno
)
1173 struct gdbarch
*gdbarch
= regcache
->arch ();
1174 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1175 /* This isn't really an address. But ptrace thinks of it as one. */
1176 CORE_ADDR regaddr
= ppc_register_u_addr (gdbarch
, regno
);
1178 size_t bytes_to_transfer
;
1179 gdb_byte buf
[PPC_MAX_REGISTER_SIZE
];
1181 if (altivec_register_p (gdbarch
, regno
))
1183 store_altivec_registers (regcache
, tid
, regno
);
1186 else if (vsx_register_p (gdbarch
, regno
))
1188 store_vsx_registers (regcache
, tid
, regno
);
1191 else if (spe_register_p (gdbarch
, regno
))
1193 store_spe_register (regcache
, tid
, regno
);
1196 else if (regno
== PPC_DSCR_REGNUM
)
1198 gdb_assert (tdep
->ppc_dscr_regnum
!= -1);
1200 store_regset (regcache
, tid
, regno
, NT_PPC_DSCR
,
1201 PPC_LINUX_SIZEOF_DSCRREGSET
,
1202 &ppc32_linux_dscrregset
);
1205 else if (regno
== PPC_PPR_REGNUM
)
1207 gdb_assert (tdep
->ppc_ppr_regnum
!= -1);
1209 store_regset (regcache
, tid
, regno
, NT_PPC_PPR
,
1210 PPC_LINUX_SIZEOF_PPRREGSET
,
1211 &ppc32_linux_pprregset
);
1214 else if (regno
== PPC_TAR_REGNUM
)
1216 gdb_assert (tdep
->ppc_tar_regnum
!= -1);
1218 store_regset (regcache
, tid
, regno
, NT_PPC_TAR
,
1219 PPC_LINUX_SIZEOF_TARREGSET
,
1220 &ppc32_linux_tarregset
);
1223 else if (PPC_IS_EBB_REGNUM (regno
))
1225 gdb_assert (tdep
->have_ebb
);
1227 store_regset (regcache
, tid
, regno
, NT_PPC_EBB
,
1228 PPC_LINUX_SIZEOF_EBBREGSET
,
1229 &ppc32_linux_ebbregset
);
1232 else if (PPC_IS_PMU_REGNUM (regno
))
1234 gdb_assert (tdep
->ppc_mmcr0_regnum
!= -1);
1236 store_regset (regcache
, tid
, regno
, NT_PPC_PMU
,
1237 PPC_LINUX_SIZEOF_PMUREGSET
,
1238 &ppc32_linux_pmuregset
);
1241 else if (PPC_IS_TMSPR_REGNUM (regno
))
1243 gdb_assert (tdep
->have_htm_spr
);
1245 store_regset (regcache
, tid
, regno
, NT_PPC_TM_SPR
,
1246 PPC_LINUX_SIZEOF_TM_SPRREGSET
,
1247 &ppc32_linux_tm_sprregset
);
1250 else if (PPC_IS_CKPTGP_REGNUM (regno
))
1252 gdb_assert (tdep
->have_htm_core
);
1254 const struct regset
*cgprregset
= ppc_linux_cgprregset (gdbarch
);
1255 store_regset (regcache
, tid
, regno
, NT_PPC_TM_CGPR
,
1256 (tdep
->wordsize
== 4?
1257 PPC32_LINUX_SIZEOF_CGPRREGSET
1258 : PPC64_LINUX_SIZEOF_CGPRREGSET
),
1262 else if (PPC_IS_CKPTFP_REGNUM (regno
))
1264 gdb_assert (tdep
->have_htm_fpu
);
1266 store_regset (regcache
, tid
, regno
, NT_PPC_TM_CFPR
,
1267 PPC_LINUX_SIZEOF_CFPRREGSET
,
1268 &ppc32_linux_cfprregset
);
1271 else if (PPC_IS_CKPTVMX_REGNUM (regno
))
1273 gdb_assert (tdep
->have_htm_altivec
);
1275 const struct regset
*cvmxregset
= ppc_linux_cvmxregset (gdbarch
);
1276 store_regset (regcache
, tid
, regno
, NT_PPC_TM_CVMX
,
1277 PPC_LINUX_SIZEOF_CVMXREGSET
,
1281 else if (PPC_IS_CKPTVSX_REGNUM (regno
))
1283 gdb_assert (tdep
->have_htm_vsx
);
1285 store_regset (regcache
, tid
, regno
, NT_PPC_TM_CVSX
,
1286 PPC_LINUX_SIZEOF_CVSXREGSET
,
1287 &ppc32_linux_cvsxregset
);
1290 else if (regno
== PPC_CPPR_REGNUM
)
1292 gdb_assert (tdep
->ppc_cppr_regnum
!= -1);
1294 store_regset (regcache
, tid
, regno
, NT_PPC_TM_CPPR
,
1295 PPC_LINUX_SIZEOF_CPPRREGSET
,
1296 &ppc32_linux_cpprregset
);
1299 else if (regno
== PPC_CDSCR_REGNUM
)
1301 gdb_assert (tdep
->ppc_cdscr_regnum
!= -1);
1303 store_regset (regcache
, tid
, regno
, NT_PPC_TM_CDSCR
,
1304 PPC_LINUX_SIZEOF_CDSCRREGSET
,
1305 &ppc32_linux_cdscrregset
);
1308 else if (regno
== PPC_CTAR_REGNUM
)
1310 gdb_assert (tdep
->ppc_ctar_regnum
!= -1);
1312 store_regset (regcache
, tid
, regno
, NT_PPC_TM_CTAR
,
1313 PPC_LINUX_SIZEOF_CTARREGSET
,
1314 &ppc32_linux_ctarregset
);
1321 /* First collect the register. Keep in mind that the regcache's
1322 idea of the register's size may not be a multiple of sizeof
1324 memset (buf
, 0, sizeof buf
);
1325 bytes_to_transfer
= align_up (register_size (gdbarch
, regno
), sizeof (long));
1326 if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_LITTLE
)
1328 /* Little-endian values always sit at the left end of the buffer. */
1329 regcache
->raw_collect (regno
, buf
);
1331 else if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
)
1333 /* Big-endian values sit at the right end of the buffer. */
1334 size_t padding
= (bytes_to_transfer
- register_size (gdbarch
, regno
));
1335 regcache
->raw_collect (regno
, buf
+ padding
);
1338 for (i
= 0; i
< bytes_to_transfer
; i
+= sizeof (long))
1342 memcpy (&l
, &buf
[i
], sizeof (l
));
1344 ptrace (PTRACE_POKEUSER
, tid
, (PTRACE_TYPE_ARG3
) regaddr
, l
);
1345 regaddr
+= sizeof (long);
1348 && (regno
== tdep
->ppc_fpscr_regnum
1349 || regno
== PPC_ORIG_R3_REGNUM
1350 || regno
== PPC_TRAP_REGNUM
))
1352 /* Some older kernel versions don't allow fpscr, orig_r3
1353 or trap to be written. */
1360 xsnprintf (message
, sizeof (message
), "writing register %s (#%d)",
1361 gdbarch_register_name (gdbarch
, regno
), regno
);
1362 perror_with_name (message
);
1367 /* This function actually issues the request to ptrace, telling
1368 it to store all general-purpose registers present in the specified
1371 If the ptrace request does not exist, this function returns 0
1372 and properly sets the have_ptrace_* flag. If the request fails,
1373 this function calls perror_with_name. Otherwise, if the request
1374 succeeds, then the regcache is stored and 1 is returned. */
1376 store_all_gp_regs (const struct regcache
*regcache
, int tid
, int regno
)
1378 gdb_gregset_t gregset
;
1380 if (ptrace (PTRACE_GETREGS
, tid
, 0, (void *) &gregset
) < 0)
1384 have_ptrace_getsetregs
= 0;
1387 perror_with_name (_("Couldn't get general-purpose registers."));
1390 fill_gregset (regcache
, &gregset
, regno
);
1392 if (ptrace (PTRACE_SETREGS
, tid
, 0, (void *) &gregset
) < 0)
1396 have_ptrace_getsetregs
= 0;
1399 perror_with_name (_("Couldn't set general-purpose registers."));
1405 /* This is a wrapper for the store_all_gp_regs function. It is
1406 responsible for verifying if this target has the ptrace request
1407 that can be used to store all general-purpose registers at one
1408 shot. If it doesn't, then we should store them using the
1409 old-fashioned way, which is to iterate over the registers and
1410 store them one by one. */
1412 store_gp_regs (const struct regcache
*regcache
, int tid
, int regno
)
1414 struct gdbarch
*gdbarch
= regcache
->arch ();
1415 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1418 if (have_ptrace_getsetregs
)
1419 if (store_all_gp_regs (regcache
, tid
, regno
))
1422 /* If we hit this point, it doesn't really matter which
1423 architecture we are using. We just need to store the
1424 registers in the "old-fashioned way". */
1425 for (i
= 0; i
< ppc_num_gprs
; i
++)
1426 store_register (regcache
, tid
, tdep
->ppc_gp0_regnum
+ i
);
1429 /* This function actually issues the request to ptrace, telling
1430 it to store all floating-point registers present in the specified
1433 If the ptrace request does not exist, this function returns 0
1434 and properly sets the have_ptrace_* flag. If the request fails,
1435 this function calls perror_with_name. Otherwise, if the request
1436 succeeds, then the regcache is stored and 1 is returned. */
1438 store_all_fp_regs (const struct regcache
*regcache
, int tid
, int regno
)
1440 gdb_fpregset_t fpregs
;
1442 if (ptrace (PTRACE_GETFPREGS
, tid
, 0, (void *) &fpregs
) < 0)
1446 have_ptrace_getsetfpregs
= 0;
1449 perror_with_name (_("Couldn't get floating-point registers."));
1452 fill_fpregset (regcache
, &fpregs
, regno
);
1454 if (ptrace (PTRACE_SETFPREGS
, tid
, 0, (void *) &fpregs
) < 0)
1458 have_ptrace_getsetfpregs
= 0;
1461 perror_with_name (_("Couldn't set floating-point registers."));
1467 /* This is a wrapper for the store_all_fp_regs function. It is
1468 responsible for verifying if this target has the ptrace request
1469 that can be used to store all floating-point registers at one
1470 shot. If it doesn't, then we should store them using the
1471 old-fashioned way, which is to iterate over the registers and
1472 store them one by one. */
1474 store_fp_regs (const struct regcache
*regcache
, int tid
, int regno
)
1476 struct gdbarch
*gdbarch
= regcache
->arch ();
1477 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1480 if (have_ptrace_getsetfpregs
)
1481 if (store_all_fp_regs (regcache
, tid
, regno
))
1484 /* If we hit this point, it doesn't really matter which
1485 architecture we are using. We just need to store the
1486 registers in the "old-fashioned way". */
1487 for (i
= 0; i
< ppc_num_fprs
; i
++)
1488 store_register (regcache
, tid
, tdep
->ppc_fp0_regnum
+ i
);
1492 store_ppc_registers (const struct regcache
*regcache
, int tid
)
1494 struct gdbarch
*gdbarch
= regcache
->arch ();
1495 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1497 store_gp_regs (regcache
, tid
, -1);
1498 if (tdep
->ppc_fp0_regnum
>= 0)
1499 store_fp_regs (regcache
, tid
, -1);
1500 store_register (regcache
, tid
, gdbarch_pc_regnum (gdbarch
));
1501 if (tdep
->ppc_ps_regnum
!= -1)
1502 store_register (regcache
, tid
, tdep
->ppc_ps_regnum
);
1503 if (tdep
->ppc_cr_regnum
!= -1)
1504 store_register (regcache
, tid
, tdep
->ppc_cr_regnum
);
1505 if (tdep
->ppc_lr_regnum
!= -1)
1506 store_register (regcache
, tid
, tdep
->ppc_lr_regnum
);
1507 if (tdep
->ppc_ctr_regnum
!= -1)
1508 store_register (regcache
, tid
, tdep
->ppc_ctr_regnum
);
1509 if (tdep
->ppc_xer_regnum
!= -1)
1510 store_register (regcache
, tid
, tdep
->ppc_xer_regnum
);
1511 if (tdep
->ppc_mq_regnum
!= -1)
1512 store_register (regcache
, tid
, tdep
->ppc_mq_regnum
);
1513 if (tdep
->ppc_fpscr_regnum
!= -1)
1514 store_register (regcache
, tid
, tdep
->ppc_fpscr_regnum
);
1515 if (ppc_linux_trap_reg_p (gdbarch
))
1517 store_register (regcache
, tid
, PPC_ORIG_R3_REGNUM
);
1518 store_register (regcache
, tid
, PPC_TRAP_REGNUM
);
1520 if (have_ptrace_getvrregs
)
1521 if (tdep
->ppc_vr0_regnum
!= -1 && tdep
->ppc_vrsave_regnum
!= -1)
1522 store_altivec_registers (regcache
, tid
, -1);
1523 if (have_ptrace_getsetvsxregs
)
1524 if (tdep
->ppc_vsr0_upper_regnum
!= -1)
1525 store_vsx_registers (regcache
, tid
, -1);
1526 if (tdep
->ppc_ev0_upper_regnum
>= 0)
1527 store_spe_register (regcache
, tid
, -1);
1528 if (tdep
->ppc_ppr_regnum
!= -1)
1529 store_regset (regcache
, tid
, -1, NT_PPC_PPR
,
1530 PPC_LINUX_SIZEOF_PPRREGSET
,
1531 &ppc32_linux_pprregset
);
1532 if (tdep
->ppc_dscr_regnum
!= -1)
1533 store_regset (regcache
, tid
, -1, NT_PPC_DSCR
,
1534 PPC_LINUX_SIZEOF_DSCRREGSET
,
1535 &ppc32_linux_dscrregset
);
1536 if (tdep
->ppc_tar_regnum
!= -1)
1537 store_regset (regcache
, tid
, -1, NT_PPC_TAR
,
1538 PPC_LINUX_SIZEOF_TARREGSET
,
1539 &ppc32_linux_tarregset
);
1541 if (tdep
->ppc_mmcr0_regnum
!= -1)
1542 store_regset (regcache
, tid
, -1, NT_PPC_PMU
,
1543 PPC_LINUX_SIZEOF_PMUREGSET
,
1544 &ppc32_linux_pmuregset
);
1546 if (tdep
->have_htm_spr
)
1547 store_regset (regcache
, tid
, -1, NT_PPC_TM_SPR
,
1548 PPC_LINUX_SIZEOF_TM_SPRREGSET
,
1549 &ppc32_linux_tm_sprregset
);
1551 /* Because the EBB and checkpointed HTM registers can be
1552 unavailable, attempts to store them here would cause this
1553 function to fail most of the time, so we ignore them. */
1556 /* Fetch the AT_HWCAP entry from the aux vector. */
1558 ppc_linux_get_hwcap (void)
1562 if (target_auxv_search (current_top_target (), AT_HWCAP
, &field
) != 1)
1568 /* Fetch the AT_HWCAP2 entry from the aux vector. */
1571 ppc_linux_get_hwcap2 (void)
1575 if (target_auxv_search (current_top_target (), AT_HWCAP2
, &field
) != 1)
1581 /* The cached DABR value, to install in new threads.
1582 This variable is used when the PowerPC HWDEBUG ptrace
1583 interface is not available. */
1584 static long saved_dabr_value
;
1586 /* Global structure that will store information about the available
1587 features provided by the PowerPC HWDEBUG ptrace interface. */
1588 static struct ppc_debug_info hwdebug_info
;
1590 /* Global variable that holds the maximum number of slots that the
1591 kernel will use. This is only used when PowerPC HWDEBUG ptrace interface
1593 static size_t max_slots_number
= 0;
1595 struct hw_break_tuple
1598 struct ppc_hw_breakpoint
*hw_break
;
1601 /* This is an internal VEC created to store information about *points inserted
1602 for each thread. This is used when PowerPC HWDEBUG ptrace interface is
1604 typedef struct thread_points
1606 /* The TID to which this *point relates. */
1608 /* Information about the *point, such as its address, type, etc.
1610 Each element inside this vector corresponds to a hardware
1611 breakpoint or watchpoint in the thread represented by TID. The maximum
1612 size of these vector is MAX_SLOTS_NUMBER. If the hw_break element of
1613 the tuple is NULL, then the position in the vector is free. */
1614 struct hw_break_tuple
*hw_breaks
;
1616 DEF_VEC_P (thread_points_p
);
1618 VEC(thread_points_p
) *ppc_threads
= NULL
;
1620 /* The version of the PowerPC HWDEBUG kernel interface that we will use, if
1622 #define PPC_DEBUG_CURRENT_VERSION 1
1624 /* Returns non-zero if we support the PowerPC HWDEBUG ptrace interface. */
1626 have_ptrace_hwdebug_interface (void)
1628 static int have_ptrace_hwdebug_interface
= -1;
1630 if (have_ptrace_hwdebug_interface
== -1)
1634 tid
= inferior_ptid
.lwp ();
1636 tid
= inferior_ptid
.pid ();
1638 /* Check for kernel support for PowerPC HWDEBUG ptrace interface. */
1639 if (ptrace (PPC_PTRACE_GETHWDBGINFO
, tid
, 0, &hwdebug_info
) >= 0)
1641 /* Check whether PowerPC HWDEBUG ptrace interface is functional and
1642 provides any supported feature. */
1643 if (hwdebug_info
.features
!= 0)
1645 have_ptrace_hwdebug_interface
= 1;
1646 max_slots_number
= hwdebug_info
.num_instruction_bps
1647 + hwdebug_info
.num_data_bps
1648 + hwdebug_info
.num_condition_regs
;
1649 return have_ptrace_hwdebug_interface
;
1652 /* Old school interface and no PowerPC HWDEBUG ptrace support. */
1653 have_ptrace_hwdebug_interface
= 0;
1654 memset (&hwdebug_info
, 0, sizeof (struct ppc_debug_info
));
1657 return have_ptrace_hwdebug_interface
;
1661 ppc_linux_nat_target::can_use_hw_breakpoint (enum bptype type
, int cnt
, int ot
)
1663 int total_hw_wp
, total_hw_bp
;
1665 if (have_ptrace_hwdebug_interface ())
1667 /* When PowerPC HWDEBUG ptrace interface is available, the number of
1668 available hardware watchpoints and breakpoints is stored at the
1669 hwdebug_info struct. */
1670 total_hw_bp
= hwdebug_info
.num_instruction_bps
;
1671 total_hw_wp
= hwdebug_info
.num_data_bps
;
1675 /* When we do not have PowerPC HWDEBUG ptrace interface, we should
1676 consider having 1 hardware watchpoint and no hardware breakpoints. */
1681 if (type
== bp_hardware_watchpoint
|| type
== bp_read_watchpoint
1682 || type
== bp_access_watchpoint
|| type
== bp_watchpoint
)
1684 if (cnt
+ ot
> total_hw_wp
)
1687 else if (type
== bp_hardware_breakpoint
)
1689 if (total_hw_bp
== 0)
1691 /* No hardware breakpoint support. */
1694 if (cnt
> total_hw_bp
)
1698 if (!have_ptrace_hwdebug_interface ())
1701 ptid_t ptid
= inferior_ptid
;
1703 /* We need to know whether ptrace supports PTRACE_SET_DEBUGREG
1704 and whether the target has DABR. If either answer is no, the
1705 ptrace call will return -1. Fail in that case. */
1710 if (ptrace (PTRACE_SET_DEBUGREG
, tid
, 0, 0) == -1)
1718 ppc_linux_nat_target::region_ok_for_hw_watchpoint (CORE_ADDR addr
, int len
)
1720 /* Handle sub-8-byte quantities. */
1724 /* The PowerPC HWDEBUG ptrace interface tells if there are alignment
1725 restrictions for watchpoints in the processors. In that case, we use that
1726 information to determine the hardcoded watchable region for
1728 if (have_ptrace_hwdebug_interface ())
1731 /* Embedded DAC-based processors, like the PowerPC 440 have ranged
1732 watchpoints and can watch any access within an arbitrary memory
1733 region. This is useful to watch arrays and structs, for instance. It
1734 takes two hardware watchpoints though. */
1736 && hwdebug_info
.features
& PPC_DEBUG_FEATURE_DATA_BP_RANGE
1737 && ppc_linux_get_hwcap () & PPC_FEATURE_BOOKE
)
1739 /* Check if the processor provides DAWR interface. */
1740 if (hwdebug_info
.features
& PPC_DEBUG_FEATURE_DATA_BP_DAWR
)
1741 /* DAWR interface allows to watch up to 512 byte wide ranges which
1742 can't cross a 512 byte boundary. */
1745 region_size
= hwdebug_info
.data_bp_alignment
;
1746 /* Server processors provide one hardware watchpoint and addr+len should
1747 fall in the watchable region provided by the ptrace interface. */
1749 && (addr
+ len
> (addr
& ~(region_size
- 1)) + region_size
))
1752 /* addr+len must fall in the 8 byte watchable region for DABR-based
1753 processors (i.e., server processors). Without the new PowerPC HWDEBUG
1754 ptrace interface, DAC-based processors (i.e., embedded processors) will
1755 use addresses aligned to 4-bytes due to the way the read/write flags are
1756 passed in the old ptrace interface. */
1757 else if (((ppc_linux_get_hwcap () & PPC_FEATURE_BOOKE
)
1758 && (addr
+ len
) > (addr
& ~3) + 4)
1759 || (addr
+ len
) > (addr
& ~7) + 8)
1765 /* This function compares two ppc_hw_breakpoint structs field-by-field. */
1767 hwdebug_point_cmp (struct ppc_hw_breakpoint
*a
, struct ppc_hw_breakpoint
*b
)
1769 return (a
->trigger_type
== b
->trigger_type
1770 && a
->addr_mode
== b
->addr_mode
1771 && a
->condition_mode
== b
->condition_mode
1772 && a
->addr
== b
->addr
1773 && a
->addr2
== b
->addr2
1774 && a
->condition_value
== b
->condition_value
);
1777 /* This function can be used to retrieve a thread_points by the TID of the
1778 related process/thread. If nothing has been found, and ALLOC_NEW is 0,
1779 it returns NULL. If ALLOC_NEW is non-zero, a new thread_points for the
1780 provided TID will be created and returned. */
1781 static struct thread_points
*
1782 hwdebug_find_thread_points_by_tid (int tid
, int alloc_new
)
1785 struct thread_points
*t
;
1787 for (i
= 0; VEC_iterate (thread_points_p
, ppc_threads
, i
, t
); i
++)
1793 /* Do we need to allocate a new point_item
1794 if the wanted one does not exist? */
1797 t
= XNEW (struct thread_points
);
1798 t
->hw_breaks
= XCNEWVEC (struct hw_break_tuple
, max_slots_number
);
1800 VEC_safe_push (thread_points_p
, ppc_threads
, t
);
1806 /* This function is a generic wrapper that is responsible for inserting a
1807 *point (i.e., calling `ptrace' in order to issue the request to the
1808 kernel) and registering it internally in GDB. */
1810 hwdebug_insert_point (struct ppc_hw_breakpoint
*b
, int tid
)
1814 gdb::unique_xmalloc_ptr
<ppc_hw_breakpoint
> p (XDUP (ppc_hw_breakpoint
, b
));
1815 struct hw_break_tuple
*hw_breaks
;
1816 struct thread_points
*t
;
1819 slot
= ptrace (PPC_PTRACE_SETHWDEBUG
, tid
, 0, p
.get ());
1821 perror_with_name (_("Unexpected error setting breakpoint or watchpoint"));
1823 /* Everything went fine, so we have to register this *point. */
1824 t
= hwdebug_find_thread_points_by_tid (tid
, 1);
1825 gdb_assert (t
!= NULL
);
1826 hw_breaks
= t
->hw_breaks
;
1828 /* Find a free element in the hw_breaks vector. */
1829 for (i
= 0; i
< max_slots_number
; i
++)
1830 if (hw_breaks
[i
].hw_break
== NULL
)
1832 hw_breaks
[i
].slot
= slot
;
1833 hw_breaks
[i
].hw_break
= p
.release ();
1837 gdb_assert (i
!= max_slots_number
);
1840 /* This function is a generic wrapper that is responsible for removing a
1841 *point (i.e., calling `ptrace' in order to issue the request to the
1842 kernel), and unregistering it internally at GDB. */
1844 hwdebug_remove_point (struct ppc_hw_breakpoint
*b
, int tid
)
1847 struct hw_break_tuple
*hw_breaks
;
1848 struct thread_points
*t
;
1850 t
= hwdebug_find_thread_points_by_tid (tid
, 0);
1851 gdb_assert (t
!= NULL
);
1852 hw_breaks
= t
->hw_breaks
;
1854 for (i
= 0; i
< max_slots_number
; i
++)
1855 if (hw_breaks
[i
].hw_break
&& hwdebug_point_cmp (hw_breaks
[i
].hw_break
, b
))
1858 gdb_assert (i
!= max_slots_number
);
1860 /* We have to ignore ENOENT errors because the kernel implements hardware
1861 breakpoints/watchpoints as "one-shot", that is, they are automatically
1862 deleted when hit. */
1864 if (ptrace (PPC_PTRACE_DELHWDEBUG
, tid
, 0, hw_breaks
[i
].slot
) < 0)
1865 if (errno
!= ENOENT
)
1866 perror_with_name (_("Unexpected error deleting "
1867 "breakpoint or watchpoint"));
1869 xfree (hw_breaks
[i
].hw_break
);
1870 hw_breaks
[i
].hw_break
= NULL
;
1873 /* Return the number of registers needed for a ranged breakpoint. */
1876 ppc_linux_nat_target::ranged_break_num_registers ()
1878 return ((have_ptrace_hwdebug_interface ()
1879 && hwdebug_info
.features
& PPC_DEBUG_FEATURE_INSN_BP_RANGE
)?
1883 /* Insert the hardware breakpoint described by BP_TGT. Returns 0 for
1884 success, 1 if hardware breakpoints are not supported or -1 for failure. */
1887 ppc_linux_nat_target::insert_hw_breakpoint (struct gdbarch
*gdbarch
,
1888 struct bp_target_info
*bp_tgt
)
1890 struct lwp_info
*lp
;
1891 struct ppc_hw_breakpoint p
;
1893 if (!have_ptrace_hwdebug_interface ())
1896 p
.version
= PPC_DEBUG_CURRENT_VERSION
;
1897 p
.trigger_type
= PPC_BREAKPOINT_TRIGGER_EXECUTE
;
1898 p
.condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
1899 p
.addr
= (uint64_t) (bp_tgt
->placed_address
= bp_tgt
->reqstd_address
);
1900 p
.condition_value
= 0;
1904 p
.addr_mode
= PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE
;
1906 /* The breakpoint will trigger if the address of the instruction is
1907 within the defined range, as follows: p.addr <= address < p.addr2. */
1908 p
.addr2
= (uint64_t) bp_tgt
->placed_address
+ bp_tgt
->length
;
1912 p
.addr_mode
= PPC_BREAKPOINT_MODE_EXACT
;
1917 hwdebug_insert_point (&p
, lp
->ptid
.lwp ());
1923 ppc_linux_nat_target::remove_hw_breakpoint (struct gdbarch
*gdbarch
,
1924 struct bp_target_info
*bp_tgt
)
1926 struct lwp_info
*lp
;
1927 struct ppc_hw_breakpoint p
;
1929 if (!have_ptrace_hwdebug_interface ())
1932 p
.version
= PPC_DEBUG_CURRENT_VERSION
;
1933 p
.trigger_type
= PPC_BREAKPOINT_TRIGGER_EXECUTE
;
1934 p
.condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
1935 p
.addr
= (uint64_t) bp_tgt
->placed_address
;
1936 p
.condition_value
= 0;
1940 p
.addr_mode
= PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE
;
1942 /* The breakpoint will trigger if the address of the instruction is within
1943 the defined range, as follows: p.addr <= address < p.addr2. */
1944 p
.addr2
= (uint64_t) bp_tgt
->placed_address
+ bp_tgt
->length
;
1948 p
.addr_mode
= PPC_BREAKPOINT_MODE_EXACT
;
1953 hwdebug_remove_point (&p
, lp
->ptid
.lwp ());
1959 get_trigger_type (enum target_hw_bp_type type
)
1963 if (type
== hw_read
)
1964 t
= PPC_BREAKPOINT_TRIGGER_READ
;
1965 else if (type
== hw_write
)
1966 t
= PPC_BREAKPOINT_TRIGGER_WRITE
;
1968 t
= PPC_BREAKPOINT_TRIGGER_READ
| PPC_BREAKPOINT_TRIGGER_WRITE
;
1973 /* Insert a new masked watchpoint at ADDR using the mask MASK.
1974 RW may be hw_read for a read watchpoint, hw_write for a write watchpoint
1975 or hw_access for an access watchpoint. Returns 0 on success and throws
1976 an error on failure. */
1979 ppc_linux_nat_target::insert_mask_watchpoint (CORE_ADDR addr
, CORE_ADDR mask
,
1980 target_hw_bp_type rw
)
1982 struct lwp_info
*lp
;
1983 struct ppc_hw_breakpoint p
;
1985 gdb_assert (have_ptrace_hwdebug_interface ());
1987 p
.version
= PPC_DEBUG_CURRENT_VERSION
;
1988 p
.trigger_type
= get_trigger_type (rw
);
1989 p
.addr_mode
= PPC_BREAKPOINT_MODE_MASK
;
1990 p
.condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
1993 p
.condition_value
= 0;
1996 hwdebug_insert_point (&p
, lp
->ptid
.lwp ());
2001 /* Remove a masked watchpoint at ADDR with the mask MASK.
2002 RW may be hw_read for a read watchpoint, hw_write for a write watchpoint
2003 or hw_access for an access watchpoint. Returns 0 on success and throws
2004 an error on failure. */
2007 ppc_linux_nat_target::remove_mask_watchpoint (CORE_ADDR addr
, CORE_ADDR mask
,
2008 target_hw_bp_type rw
)
2010 struct lwp_info
*lp
;
2011 struct ppc_hw_breakpoint p
;
2013 gdb_assert (have_ptrace_hwdebug_interface ());
2015 p
.version
= PPC_DEBUG_CURRENT_VERSION
;
2016 p
.trigger_type
= get_trigger_type (rw
);
2017 p
.addr_mode
= PPC_BREAKPOINT_MODE_MASK
;
2018 p
.condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
2021 p
.condition_value
= 0;
2024 hwdebug_remove_point (&p
, lp
->ptid
.lwp ());
2029 /* Check whether we have at least one free DVC register. */
2031 can_use_watchpoint_cond_accel (void)
2033 struct thread_points
*p
;
2034 int tid
= inferior_ptid
.lwp ();
2035 int cnt
= hwdebug_info
.num_condition_regs
, i
;
2037 if (!have_ptrace_hwdebug_interface () || cnt
== 0)
2040 p
= hwdebug_find_thread_points_by_tid (tid
, 0);
2044 for (i
= 0; i
< max_slots_number
; i
++)
2045 if (p
->hw_breaks
[i
].hw_break
!= NULL
2046 && (p
->hw_breaks
[i
].hw_break
->condition_mode
2047 != PPC_BREAKPOINT_CONDITION_NONE
))
2050 /* There are no available slots now. */
2058 /* Calculate the enable bits and the contents of the Data Value Compare
2059 debug register present in BookE processors.
2061 ADDR is the address to be watched, LEN is the length of watched data
2062 and DATA_VALUE is the value which will trigger the watchpoint.
2063 On exit, CONDITION_MODE will hold the enable bits for the DVC, and
2064 CONDITION_VALUE will hold the value which should be put in the
2067 calculate_dvc (CORE_ADDR addr
, int len
, CORE_ADDR data_value
,
2068 uint32_t *condition_mode
, uint64_t *condition_value
)
2070 int i
, num_byte_enable
, align_offset
, num_bytes_off_dvc
,
2071 rightmost_enabled_byte
;
2072 CORE_ADDR addr_end_data
, addr_end_dvc
;
2074 /* The DVC register compares bytes within fixed-length windows which
2075 are word-aligned, with length equal to that of the DVC register.
2076 We need to calculate where our watch region is relative to that
2077 window and enable comparison of the bytes which fall within it. */
2079 align_offset
= addr
% hwdebug_info
.sizeof_condition
;
2080 addr_end_data
= addr
+ len
;
2081 addr_end_dvc
= (addr
- align_offset
2082 + hwdebug_info
.sizeof_condition
);
2083 num_bytes_off_dvc
= (addr_end_data
> addr_end_dvc
)?
2084 addr_end_data
- addr_end_dvc
: 0;
2085 num_byte_enable
= len
- num_bytes_off_dvc
;
2086 /* Here, bytes are numbered from right to left. */
2087 rightmost_enabled_byte
= (addr_end_data
< addr_end_dvc
)?
2088 addr_end_dvc
- addr_end_data
: 0;
2090 *condition_mode
= PPC_BREAKPOINT_CONDITION_AND
;
2091 for (i
= 0; i
< num_byte_enable
; i
++)
2093 |= PPC_BREAKPOINT_CONDITION_BE (i
+ rightmost_enabled_byte
);
2095 /* Now we need to match the position within the DVC of the comparison
2096 value with where the watch region is relative to the window
2097 (i.e., the ALIGN_OFFSET). */
2099 *condition_value
= ((uint64_t) data_value
>> num_bytes_off_dvc
* 8
2100 << rightmost_enabled_byte
* 8);
2103 /* Return the number of memory locations that need to be accessed to
2104 evaluate the expression which generated the given value chain.
2105 Returns -1 if there's any register access involved, or if there are
2106 other kinds of values which are not acceptable in a condition
2107 expression (e.g., lval_computed or lval_internalvar). */
2109 num_memory_accesses (const std::vector
<value_ref_ptr
> &chain
)
2111 int found_memory_cnt
= 0;
2113 /* The idea here is that evaluating an expression generates a series
2114 of values, one holding the value of every subexpression. (The
2115 expression a*b+c has five subexpressions: a, b, a*b, c, and
2116 a*b+c.) GDB's values hold almost enough information to establish
2117 the criteria given above --- they identify memory lvalues,
2118 register lvalues, computed values, etcetera. So we can evaluate
2119 the expression, and then scan the chain of values that leaves
2120 behind to determine the memory locations involved in the evaluation
2123 However, I don't think that the values returned by inferior
2124 function calls are special in any way. So this function may not
2125 notice that an expression contains an inferior function call.
2128 for (const value_ref_ptr
&iter
: chain
)
2130 struct value
*v
= iter
.get ();
2132 /* Constants and values from the history are fine. */
2133 if (VALUE_LVAL (v
) == not_lval
|| deprecated_value_modifiable (v
) == 0)
2135 else if (VALUE_LVAL (v
) == lval_memory
)
2137 /* A lazy memory lvalue is one that GDB never needed to fetch;
2138 we either just used its address (e.g., `a' in `a.b') or
2139 we never needed it at all (e.g., `a' in `a,b'). */
2140 if (!value_lazy (v
))
2143 /* Other kinds of values are not fine. */
2148 return found_memory_cnt
;
2151 /* Verifies whether the expression COND can be implemented using the
2152 DVC (Data Value Compare) register in BookE processors. The expression
2153 must test the watch value for equality with a constant expression.
2154 If the function returns 1, DATA_VALUE will contain the constant against
2155 which the watch value should be compared and LEN will contain the size
2158 check_condition (CORE_ADDR watch_addr
, struct expression
*cond
,
2159 CORE_ADDR
*data_value
, int *len
)
2161 int pc
= 1, num_accesses_left
, num_accesses_right
;
2162 struct value
*left_val
, *right_val
;
2163 std::vector
<value_ref_ptr
> left_chain
, right_chain
;
2165 if (cond
->elts
[0].opcode
!= BINOP_EQUAL
)
2168 fetch_subexp_value (cond
, &pc
, &left_val
, NULL
, &left_chain
, 0);
2169 num_accesses_left
= num_memory_accesses (left_chain
);
2171 if (left_val
== NULL
|| num_accesses_left
< 0)
2174 fetch_subexp_value (cond
, &pc
, &right_val
, NULL
, &right_chain
, 0);
2175 num_accesses_right
= num_memory_accesses (right_chain
);
2177 if (right_val
== NULL
|| num_accesses_right
< 0)
2180 if (num_accesses_left
== 1 && num_accesses_right
== 0
2181 && VALUE_LVAL (left_val
) == lval_memory
2182 && value_address (left_val
) == watch_addr
)
2184 *data_value
= value_as_long (right_val
);
2186 /* DATA_VALUE is the constant in RIGHT_VAL, but actually has
2187 the same type as the memory region referenced by LEFT_VAL. */
2188 *len
= TYPE_LENGTH (check_typedef (value_type (left_val
)));
2190 else if (num_accesses_left
== 0 && num_accesses_right
== 1
2191 && VALUE_LVAL (right_val
) == lval_memory
2192 && value_address (right_val
) == watch_addr
)
2194 *data_value
= value_as_long (left_val
);
2196 /* DATA_VALUE is the constant in LEFT_VAL, but actually has
2197 the same type as the memory region referenced by RIGHT_VAL. */
2198 *len
= TYPE_LENGTH (check_typedef (value_type (right_val
)));
2206 /* Return non-zero if the target is capable of using hardware to evaluate
2207 the condition expression, thus only triggering the watchpoint when it is
2210 ppc_linux_nat_target::can_accel_watchpoint_condition (CORE_ADDR addr
, int len
,
2212 struct expression
*cond
)
2214 CORE_ADDR data_value
;
2216 return (have_ptrace_hwdebug_interface ()
2217 && hwdebug_info
.num_condition_regs
> 0
2218 && check_condition (addr
, cond
, &data_value
, &len
));
2221 /* Set up P with the parameters necessary to request a watchpoint covering
2222 LEN bytes starting at ADDR and if possible with condition expression COND
2223 evaluated by hardware. INSERT tells if we are creating a request for
2224 inserting or removing the watchpoint. */
2227 create_watchpoint_request (struct ppc_hw_breakpoint
*p
, CORE_ADDR addr
,
2228 int len
, enum target_hw_bp_type type
,
2229 struct expression
*cond
, int insert
)
2232 || !(hwdebug_info
.features
& PPC_DEBUG_FEATURE_DATA_BP_RANGE
))
2235 CORE_ADDR data_value
;
2237 use_condition
= (insert
? can_use_watchpoint_cond_accel ()
2238 : hwdebug_info
.num_condition_regs
> 0);
2239 if (cond
&& use_condition
&& check_condition (addr
, cond
,
2241 calculate_dvc (addr
, len
, data_value
, &p
->condition_mode
,
2242 &p
->condition_value
);
2245 p
->condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
2246 p
->condition_value
= 0;
2249 p
->addr_mode
= PPC_BREAKPOINT_MODE_EXACT
;
2254 p
->addr_mode
= PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE
;
2255 p
->condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
2256 p
->condition_value
= 0;
2258 /* The watchpoint will trigger if the address of the memory access is
2259 within the defined range, as follows: p->addr <= address < p->addr2.
2261 Note that the above sentence just documents how ptrace interprets
2262 its arguments; the watchpoint is set to watch the range defined by
2263 the user _inclusively_, as specified by the user interface. */
2264 p
->addr2
= (uint64_t) addr
+ len
;
2267 p
->version
= PPC_DEBUG_CURRENT_VERSION
;
2268 p
->trigger_type
= get_trigger_type (type
);
2269 p
->addr
= (uint64_t) addr
;
2273 ppc_linux_nat_target::insert_watchpoint (CORE_ADDR addr
, int len
,
2274 enum target_hw_bp_type type
,
2275 struct expression
*cond
)
2277 struct lwp_info
*lp
;
2280 if (have_ptrace_hwdebug_interface ())
2282 struct ppc_hw_breakpoint p
;
2284 create_watchpoint_request (&p
, addr
, len
, type
, cond
, 1);
2287 hwdebug_insert_point (&p
, lp
->ptid
.lwp ());
2294 long read_mode
, write_mode
;
2296 if (ppc_linux_get_hwcap () & PPC_FEATURE_BOOKE
)
2298 /* PowerPC 440 requires only the read/write flags to be passed
2305 /* PowerPC 970 and other DABR-based processors are required to pass
2306 the Breakpoint Translation bit together with the flags. */
2311 dabr_value
= addr
& ~(read_mode
| write_mode
);
2315 /* Set read and translate bits. */
2316 dabr_value
|= read_mode
;
2319 /* Set write and translate bits. */
2320 dabr_value
|= write_mode
;
2323 /* Set read, write and translate bits. */
2324 dabr_value
|= read_mode
| write_mode
;
2328 saved_dabr_value
= dabr_value
;
2331 if (ptrace (PTRACE_SET_DEBUGREG
, lp
->ptid
.lwp (), 0,
2332 saved_dabr_value
) < 0)
2342 ppc_linux_nat_target::remove_watchpoint (CORE_ADDR addr
, int len
,
2343 enum target_hw_bp_type type
,
2344 struct expression
*cond
)
2346 struct lwp_info
*lp
;
2349 if (have_ptrace_hwdebug_interface ())
2351 struct ppc_hw_breakpoint p
;
2353 create_watchpoint_request (&p
, addr
, len
, type
, cond
, 0);
2356 hwdebug_remove_point (&p
, lp
->ptid
.lwp ());
2362 saved_dabr_value
= 0;
2364 if (ptrace (PTRACE_SET_DEBUGREG
, lp
->ptid
.lwp (), 0,
2365 saved_dabr_value
) < 0)
2375 ppc_linux_nat_target::low_new_thread (struct lwp_info
*lp
)
2377 int tid
= lp
->ptid
.lwp ();
2379 if (have_ptrace_hwdebug_interface ())
2382 struct thread_points
*p
;
2383 struct hw_break_tuple
*hw_breaks
;
2385 if (VEC_empty (thread_points_p
, ppc_threads
))
2388 /* Get a list of breakpoints from any thread. */
2389 p
= VEC_last (thread_points_p
, ppc_threads
);
2390 hw_breaks
= p
->hw_breaks
;
2392 /* Copy that thread's breakpoints and watchpoints to the new thread. */
2393 for (i
= 0; i
< max_slots_number
; i
++)
2394 if (hw_breaks
[i
].hw_break
)
2396 /* Older kernels did not make new threads inherit their parent
2397 thread's debug state, so we always clear the slot and replicate
2398 the debug state ourselves, ensuring compatibility with all
2401 /* The ppc debug resource accounting is done through "slots".
2402 Ask the kernel the deallocate this specific *point's slot. */
2403 ptrace (PPC_PTRACE_DELHWDEBUG
, tid
, 0, hw_breaks
[i
].slot
);
2405 hwdebug_insert_point (hw_breaks
[i
].hw_break
, tid
);
2409 ptrace (PTRACE_SET_DEBUGREG
, tid
, 0, saved_dabr_value
);
2413 ppc_linux_thread_exit (struct thread_info
*tp
, int silent
)
2416 int tid
= tp
->ptid
.lwp ();
2417 struct hw_break_tuple
*hw_breaks
;
2418 struct thread_points
*t
= NULL
, *p
;
2420 if (!have_ptrace_hwdebug_interface ())
2423 for (i
= 0; VEC_iterate (thread_points_p
, ppc_threads
, i
, p
); i
++)
2433 VEC_unordered_remove (thread_points_p
, ppc_threads
, i
);
2435 hw_breaks
= t
->hw_breaks
;
2437 for (i
= 0; i
< max_slots_number
; i
++)
2438 if (hw_breaks
[i
].hw_break
)
2439 xfree (hw_breaks
[i
].hw_break
);
2441 xfree (t
->hw_breaks
);
2446 ppc_linux_nat_target::stopped_data_address (CORE_ADDR
*addr_p
)
2450 if (!linux_nat_get_siginfo (inferior_ptid
, &siginfo
))
2453 if (siginfo
.si_signo
!= SIGTRAP
2454 || (siginfo
.si_code
& 0xffff) != 0x0004 /* TRAP_HWBKPT */)
2457 if (have_ptrace_hwdebug_interface ())
2460 struct thread_points
*t
;
2461 struct hw_break_tuple
*hw_breaks
;
2462 /* The index (or slot) of the *point is passed in the si_errno field. */
2463 int slot
= siginfo
.si_errno
;
2465 t
= hwdebug_find_thread_points_by_tid (inferior_ptid
.lwp (), 0);
2467 /* Find out if this *point is a hardware breakpoint.
2468 If so, we should return 0. */
2471 hw_breaks
= t
->hw_breaks
;
2472 for (i
= 0; i
< max_slots_number
; i
++)
2473 if (hw_breaks
[i
].hw_break
&& hw_breaks
[i
].slot
== slot
2474 && hw_breaks
[i
].hw_break
->trigger_type
2475 == PPC_BREAKPOINT_TRIGGER_EXECUTE
)
2480 *addr_p
= (CORE_ADDR
) (uintptr_t) siginfo
.si_addr
;
2485 ppc_linux_nat_target::stopped_by_watchpoint ()
2488 return stopped_data_address (&addr
);
2492 ppc_linux_nat_target::watchpoint_addr_within_range (CORE_ADDR addr
,
2498 if (have_ptrace_hwdebug_interface ()
2499 && ppc_linux_get_hwcap () & PPC_FEATURE_BOOKE
)
2500 return start
<= addr
&& start
+ length
>= addr
;
2501 else if (ppc_linux_get_hwcap () & PPC_FEATURE_BOOKE
)
2508 /* Check whether [start, start+length-1] intersects [addr, addr+mask]. */
2509 return start
<= addr
+ mask
&& start
+ length
- 1 >= addr
;
2512 /* Return the number of registers needed for a masked hardware watchpoint. */
2515 ppc_linux_nat_target::masked_watch_num_registers (CORE_ADDR addr
, CORE_ADDR mask
)
2517 if (!have_ptrace_hwdebug_interface ()
2518 || (hwdebug_info
.features
& PPC_DEBUG_FEATURE_DATA_BP_MASK
) == 0)
2520 else if ((mask
& 0xC0000000) != 0xC0000000)
2522 warning (_("The given mask covers kernel address space "
2523 "and cannot be used.\n"));
2532 ppc_linux_nat_target::store_registers (struct regcache
*regcache
, int regno
)
2534 pid_t tid
= get_ptrace_pid (regcache
->ptid ());
2537 store_register (regcache
, tid
, regno
);
2539 store_ppc_registers (regcache
, tid
);
2542 /* Functions for transferring registers between a gregset_t or fpregset_t
2543 (see sys/ucontext.h) and gdb's regcache. The word size is that used
2544 by the ptrace interface, not the current program's ABI. Eg. if a
2545 powerpc64-linux gdb is being used to debug a powerpc32-linux app, we
2546 read or write 64-bit gregsets. This is to suit the host libthread_db. */
2549 supply_gregset (struct regcache
*regcache
, const gdb_gregset_t
*gregsetp
)
2551 const struct regset
*regset
= ppc_linux_gregset (sizeof (long));
2553 ppc_supply_gregset (regset
, regcache
, -1, gregsetp
, sizeof (*gregsetp
));
2557 fill_gregset (const struct regcache
*regcache
,
2558 gdb_gregset_t
*gregsetp
, int regno
)
2560 const struct regset
*regset
= ppc_linux_gregset (sizeof (long));
2563 memset (gregsetp
, 0, sizeof (*gregsetp
));
2564 ppc_collect_gregset (regset
, regcache
, regno
, gregsetp
, sizeof (*gregsetp
));
2568 supply_fpregset (struct regcache
*regcache
, const gdb_fpregset_t
* fpregsetp
)
2570 const struct regset
*regset
= ppc_linux_fpregset ();
2572 ppc_supply_fpregset (regset
, regcache
, -1,
2573 fpregsetp
, sizeof (*fpregsetp
));
2577 fill_fpregset (const struct regcache
*regcache
,
2578 gdb_fpregset_t
*fpregsetp
, int regno
)
2580 const struct regset
*regset
= ppc_linux_fpregset ();
2582 ppc_collect_fpregset (regset
, regcache
, regno
,
2583 fpregsetp
, sizeof (*fpregsetp
));
2587 ppc_linux_nat_target::auxv_parse (gdb_byte
**readptr
,
2588 gdb_byte
*endptr
, CORE_ADDR
*typep
,
2591 int tid
= inferior_ptid
.lwp ();
2593 tid
= inferior_ptid
.pid ();
2595 int sizeof_auxv_field
= ppc_linux_target_wordsize (tid
);
2597 enum bfd_endian byte_order
= gdbarch_byte_order (target_gdbarch ());
2598 gdb_byte
*ptr
= *readptr
;
2603 if (endptr
- ptr
< sizeof_auxv_field
* 2)
2606 *typep
= extract_unsigned_integer (ptr
, sizeof_auxv_field
, byte_order
);
2607 ptr
+= sizeof_auxv_field
;
2608 *valp
= extract_unsigned_integer (ptr
, sizeof_auxv_field
, byte_order
);
2609 ptr
+= sizeof_auxv_field
;
2615 const struct target_desc
*
2616 ppc_linux_nat_target::read_description ()
2618 int tid
= inferior_ptid
.lwp ();
2620 tid
= inferior_ptid
.pid ();
2622 if (have_ptrace_getsetevrregs
)
2624 struct gdb_evrregset_t evrregset
;
2626 if (ptrace (PTRACE_GETEVRREGS
, tid
, 0, &evrregset
) >= 0)
2627 return tdesc_powerpc_e500l
;
2629 /* EIO means that the PTRACE_GETEVRREGS request isn't supported.
2630 Anything else needs to be reported. */
2631 else if (errno
!= EIO
)
2632 perror_with_name (_("Unable to fetch SPE registers"));
2635 struct ppc_linux_features features
= ppc_linux_no_features
;
2637 features
.wordsize
= ppc_linux_target_wordsize (tid
);
2639 CORE_ADDR hwcap
= ppc_linux_get_hwcap ();
2640 CORE_ADDR hwcap2
= ppc_linux_get_hwcap2 ();
2642 if (have_ptrace_getsetvsxregs
2643 && (hwcap
& PPC_FEATURE_HAS_VSX
))
2645 gdb_vsxregset_t vsxregset
;
2647 if (ptrace (PTRACE_GETVSXREGS
, tid
, 0, &vsxregset
) >= 0)
2648 features
.vsx
= true;
2650 /* EIO means that the PTRACE_GETVSXREGS request isn't supported.
2651 Anything else needs to be reported. */
2652 else if (errno
!= EIO
)
2653 perror_with_name (_("Unable to fetch VSX registers"));
2656 if (have_ptrace_getvrregs
2657 && (hwcap
& PPC_FEATURE_HAS_ALTIVEC
))
2659 gdb_vrregset_t vrregset
;
2661 if (ptrace (PTRACE_GETVRREGS
, tid
, 0, &vrregset
) >= 0)
2662 features
.altivec
= true;
2664 /* EIO means that the PTRACE_GETVRREGS request isn't supported.
2665 Anything else needs to be reported. */
2666 else if (errno
!= EIO
)
2667 perror_with_name (_("Unable to fetch AltiVec registers"));
2670 if (hwcap
& PPC_FEATURE_CELL
)
2671 features
.cell
= true;
2673 features
.isa205
= ppc_linux_has_isa205 (hwcap
);
2675 if ((hwcap2
& PPC_FEATURE2_DSCR
)
2676 && check_regset (tid
, NT_PPC_PPR
, PPC_LINUX_SIZEOF_PPRREGSET
)
2677 && check_regset (tid
, NT_PPC_DSCR
, PPC_LINUX_SIZEOF_DSCRREGSET
))
2679 features
.ppr_dscr
= true;
2680 if ((hwcap2
& PPC_FEATURE2_ARCH_2_07
)
2681 && (hwcap2
& PPC_FEATURE2_TAR
)
2682 && (hwcap2
& PPC_FEATURE2_EBB
)
2683 && check_regset (tid
, NT_PPC_TAR
, PPC_LINUX_SIZEOF_TARREGSET
)
2684 && check_regset (tid
, NT_PPC_EBB
, PPC_LINUX_SIZEOF_EBBREGSET
)
2685 && check_regset (tid
, NT_PPC_PMU
, PPC_LINUX_SIZEOF_PMUREGSET
))
2687 features
.isa207
= true;
2688 if ((hwcap2
& PPC_FEATURE2_HTM
)
2689 && check_regset (tid
, NT_PPC_TM_SPR
,
2690 PPC_LINUX_SIZEOF_TM_SPRREGSET
))
2691 features
.htm
= true;
2695 return ppc_linux_match_description (features
);
2699 _initialize_ppc_linux_nat (void)
2701 linux_target
= &the_ppc_linux_nat_target
;
2703 gdb::observers::thread_exit
.attach (ppc_linux_thread_exit
);
2705 /* Register the target. */
2706 add_inf_child_target (linux_target
);