gdb/ppc-linux-nat.c

   1 /* PPC GNU/Linux native support.
   2
   3    Copyright (C) 1988, 1989, 1991, 1992, 1994, 1996, 2000, 2001, 2002,
   4    2003, 2004, 2005 Free Software Foundation, Inc.
   5
   6    This file is part of GDB.
   7
   8    This program is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 2 of the License, or
  11    (at your option) any later version.
  12
  13    This program is distributed in the hope that it will be useful,
  14    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16    GNU General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program; if not, write to the Free Software
  20    Foundation, Inc., 51 Franklin Street, Fifth Floor,
  21    Boston, MA 02110-1301, USA.  */
  22
  23 #include "defs.h"
  24 #include "gdb_string.h"
  25 #include "frame.h"
  26 #include "inferior.h"
  27 #include "gdbcore.h"
  28 #include "regcache.h"
  29 #include "gdb_assert.h"
  30 #include "target.h"
  31 #include "linux-nat.h"
  32
  33 #include <sys/types.h>
  34 #include <sys/param.h>
  35 #include <signal.h>
  36 #include <sys/user.h>
  37 #include <sys/ioctl.h>
  38 #include "gdb_wait.h"
  39 #include <fcntl.h>
  40 #include <sys/procfs.h>
  41 #include <sys/ptrace.h>
  42
  43 /* Prototypes for supply_gregset etc. */
  44 #include "gregset.h"
  45 #include "ppc-tdep.h"
  46
  47 #ifndef PT_READ_U
  48 #define PT_READ_U PTRACE_PEEKUSR
  49 #endif
  50 #ifndef PT_WRITE_U
  51 #define PT_WRITE_U PTRACE_POKEUSR
  52 #endif
  53
  54 /* Default the type of the ptrace transfer to int.  */
  55 #ifndef PTRACE_XFER_TYPE
  56 #define PTRACE_XFER_TYPE int
  57 #endif
  58
  59 /* Glibc's headers don't define PTRACE_GETVRREGS so we cannot use a
  60    configure time check.  Some older glibc's (for instance 2.2.1)
  61    don't have a specific powerpc version of ptrace.h, and fall back on
  62    a generic one.  In such cases, sys/ptrace.h defines
  63    PTRACE_GETFPXREGS and PTRACE_SETFPXREGS to the same numbers that
  64    ppc kernel's asm/ptrace.h defines PTRACE_GETVRREGS and
  65    PTRACE_SETVRREGS to be.  This also makes a configury check pretty
  66    much useless.  */
  67
  68 /* These definitions should really come from the glibc header files,
  69    but Glibc doesn't know about the vrregs yet.  */
  70 #ifndef PTRACE_GETVRREGS
  71 #define PTRACE_GETVRREGS 18
  72 #define PTRACE_SETVRREGS 19
  73 #endif
  74
  75
  76 /* Similarly for the ptrace requests for getting / setting the SPE
  77    registers (ev0 -- ev31, acc, and spefscr).  See the description of
  78    gdb_evrregset_t for details.  */
  79 #ifndef PTRACE_GETEVRREGS
  80 #define PTRACE_GETEVRREGS 20
  81 #define PTRACE_SETEVRREGS 21
  82 #endif
  83
  84
  85 /* This oddity is because the Linux kernel defines elf_vrregset_t as
  86    an array of 33 16 bytes long elements.  I.e. it leaves out vrsave.
  87    However the PTRACE_GETVRREGS and PTRACE_SETVRREGS requests return
  88    the vrsave as an extra 4 bytes at the end.  I opted for creating a
  89    flat array of chars, so that it is easier to manipulate for gdb.
  90
  91    There are 32 vector registers 16 bytes longs, plus a VSCR register
  92    which is only 4 bytes long, but is fetched as a 16 bytes
  93    quantity. Up to here we have the elf_vrregset_t structure.
  94    Appended to this there is space for the VRSAVE register: 4 bytes.
  95    Even though this vrsave register is not included in the regset
  96    typedef, it is handled by the ptrace requests.
  97
  98    Note that GNU/Linux doesn't support little endian PPC hardware,
  99    therefore the offset at which the real value of the VSCR register
 100    is located will be always 12 bytes.
 101
 102    The layout is like this (where x is the actual value of the vscr reg): */
 103
 104 /* *INDENT-OFF* */
 105 /*
 106    |.|.|.|.|.....|.|.|.|.||.|.|.|x||.|
 107    <------->     <-------><-------><->
 108      VR0           VR31     VSCR    VRSAVE
 109 */
 110 /* *INDENT-ON* */
 111
 112 #define SIZEOF_VRREGS 33*16+4
 113
 114 typedef char gdb_vrregset_t[SIZEOF_VRREGS];
 115
 116
 117 /* On PPC processors that support the the Signal Processing Extension
 118    (SPE) APU, the general-purpose registers are 64 bits long.
 119    However, the ordinary Linux kernel PTRACE_PEEKUSR / PTRACE_POKEUSR
 120    / PT_READ_U / PT_WRITE_U ptrace calls only access the lower half of
 121    each register, to allow them to behave the same way they do on
 122    non-SPE systems.  There's a separate pair of calls,
 123    PTRACE_GETEVRREGS / PTRACE_SETEVRREGS, that read and write the top
 124    halves of all the general-purpose registers at once, along with
 125    some SPE-specific registers.
 126
 127    GDB itself continues to claim the general-purpose registers are 32
 128    bits long.  It has unnamed raw registers that hold the upper halves
 129    of the gprs, and the the full 64-bit SIMD views of the registers,
 130    'ev0' -- 'ev31', are pseudo-registers that splice the top and
 131    bottom halves together.
 132
 133    This is the structure filled in by PTRACE_GETEVRREGS and written to
 134    the inferior's registers by PTRACE_SETEVRREGS.  */
 135 struct gdb_evrregset_t
 136 {
 137   unsigned long evr[32];
 138   unsigned long long acc;
 139   unsigned long spefscr;
 140 };
 141
 142
 143 /* Non-zero if our kernel may support the PTRACE_GETVRREGS and
 144    PTRACE_SETVRREGS requests, for reading and writing the Altivec
 145    registers.  Zero if we've tried one of them and gotten an
 146    error.  */
 147 int have_ptrace_getvrregs = 1;
 148
 149
 150 /* Non-zero if our kernel may support the PTRACE_GETEVRREGS and
 151    PTRACE_SETEVRREGS requests, for reading and writing the SPE
 152    registers.  Zero if we've tried one of them and gotten an
 153    error.  */
 154 int have_ptrace_getsetevrregs = 1;
 155
 156
 157 int
 158 kernel_u_size (void)
 159 {
 160   return (sizeof (struct user));
 161 }
 162
 163 /* *INDENT-OFF* */
 164 /* registers layout, as presented by the ptrace interface:
 165 PT_R0, PT_R1, PT_R2, PT_R3, PT_R4, PT_R5, PT_R6, PT_R7,
 166 PT_R8, PT_R9, PT_R10, PT_R11, PT_R12, PT_R13, PT_R14, PT_R15,
 167 PT_R16, PT_R17, PT_R18, PT_R19, PT_R20, PT_R21, PT_R22, PT_R23,
 168 PT_R24, PT_R25, PT_R26, PT_R27, PT_R28, PT_R29, PT_R30, PT_R31,
 169 PT_FPR0, PT_FPR0 + 2, PT_FPR0 + 4, PT_FPR0 + 6, PT_FPR0 + 8, PT_FPR0 + 10, PT_FPR0 + 12, PT_FPR0 + 14,
 170 PT_FPR0 + 16, PT_FPR0 + 18, PT_FPR0 + 20, PT_FPR0 + 22, PT_FPR0 + 24, PT_FPR0 + 26, PT_FPR0 + 28, PT_FPR0 + 30,
 171 PT_FPR0 + 32, PT_FPR0 + 34, PT_FPR0 + 36, PT_FPR0 + 38, PT_FPR0 + 40, PT_FPR0 + 42, PT_FPR0 + 44, PT_FPR0 + 46,
 172 PT_FPR0 + 48, PT_FPR0 + 50, PT_FPR0 + 52, PT_FPR0 + 54, PT_FPR0 + 56, PT_FPR0 + 58, PT_FPR0 + 60, PT_FPR0 + 62,
 173 PT_NIP, PT_MSR, PT_CCR, PT_LNK, PT_CTR, PT_XER, PT_MQ */
 174 /* *INDENT_ON * */
 175
 176 static int
 177 ppc_register_u_addr (int regno)
 178 {
 179   int u_addr = -1;
 180   struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
 181   /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace
 182      interface, and not the wordsize of the program's ABI.  */
 183   int wordsize = sizeof (PTRACE_XFER_TYPE);
 184
 185   /* General purpose registers occupy 1 slot each in the buffer */
 186   if (regno >= tdep->ppc_gp0_regnum
 187       && regno < tdep->ppc_gp0_regnum + ppc_num_gprs)
 188     u_addr = ((regno - tdep->ppc_gp0_regnum + PT_R0) * wordsize);
 189
 190   /* Floating point regs: eight bytes each in both 32- and 64-bit
 191      ptrace interfaces.  Thus, two slots each in 32-bit interface, one
 192      slot each in 64-bit interface.  */
 193   if (tdep->ppc_fp0_regnum >= 0
 194       && regno >= tdep->ppc_fp0_regnum
 195       && regno < tdep->ppc_fp0_regnum + ppc_num_fprs)
 196     u_addr = (PT_FPR0 * wordsize) + ((regno - tdep->ppc_fp0_regnum) * 8);
 197
 198   /* UISA special purpose registers: 1 slot each */
 199   if (regno == PC_REGNUM)
 200     u_addr = PT_NIP * wordsize;
 201   if (regno == tdep->ppc_lr_regnum)
 202     u_addr = PT_LNK * wordsize;
 203   if (regno == tdep->ppc_cr_regnum)
 204     u_addr = PT_CCR * wordsize;
 205   if (regno == tdep->ppc_xer_regnum)
 206     u_addr = PT_XER * wordsize;
 207   if (regno == tdep->ppc_ctr_regnum)
 208     u_addr = PT_CTR * wordsize;
 209 #ifdef PT_MQ
 210   if (regno == tdep->ppc_mq_regnum)
 211     u_addr = PT_MQ * wordsize;
 212 #endif
 213   if (regno == tdep->ppc_ps_regnum)
 214     u_addr = PT_MSR * wordsize;
 215   if (tdep->ppc_fpscr_regnum >= 0
 216       && regno == tdep->ppc_fpscr_regnum)
 217     {
 218       /* NOTE: cagney/2005-02-08: On some 64-bit GNU/Linux systems the
 219          kernel headers incorrectly contained the 32-bit definition of
 220          PT_FPSCR.  For the 32-bit definition, floating-point
 221          registers occupy two 32-bit "slots", and the FPSCR lives in
 222          the secondhalf of such a slot-pair (hence +1).  For 64-bit,
 223          the FPSCR instead occupies the full 64-bit 2-word-slot and
 224          hence no adjustment is necessary.  Hack around this.  */
 225       if (wordsize == 8 && PT_FPSCR == (48 + 32 + 1))
 226         u_addr = (48 + 32) * wordsize;
 227       else
 228         u_addr = PT_FPSCR * wordsize;
 229     }
 230   return u_addr;
 231 }
 232
 233 /* The Linux kernel ptrace interface for AltiVec registers uses the
 234    registers set mechanism, as opposed to the interface for all the
 235    other registers, that stores/fetches each register individually.  */
 236 static void
 237 fetch_altivec_register (int tid, int regno)
 238 {
 239   int ret;
 240   int offset = 0;
 241   gdb_vrregset_t regs;
 242   struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
 243   int vrregsize = register_size (current_gdbarch, tdep->ppc_vr0_regnum);
 244
 245   ret = ptrace (PTRACE_GETVRREGS, tid, 0, &regs);
 246   if (ret < 0)
 247     {
 248       if (errno == EIO)
 249         {
 250           have_ptrace_getvrregs = 0;
 251           return;
 252         }
 253       perror_with_name (_("Unable to fetch AltiVec register"));
 254     }
 255
 256   /* VSCR is fetched as a 16 bytes quantity, but it is really 4 bytes
 257      long on the hardware.  We deal only with the lower 4 bytes of the
 258      vector.  VRSAVE is at the end of the array in a 4 bytes slot, so
 259      there is no need to define an offset for it.  */
 260   if (regno == (tdep->ppc_vrsave_regnum - 1))
 261     offset = vrregsize - register_size (current_gdbarch, tdep->ppc_vrsave_regnum);
 262
 263   regcache_raw_supply (current_regcache, regno,
 264                        regs + (regno - tdep->ppc_vr0_regnum) * vrregsize + offset);
 265 }
 266
 267 /* Fetch the top 32 bits of TID's general-purpose registers and the
 268    SPE-specific registers, and place the results in EVRREGSET.  If we
 269    don't support PTRACE_GETEVRREGS, then just fill EVRREGSET with
 270    zeros.
 271
 272    All the logic to deal with whether or not the PTRACE_GETEVRREGS and
 273    PTRACE_SETEVRREGS requests are supported is isolated here, and in
 274    set_spe_registers.  */
 275 static void
 276 get_spe_registers (int tid, struct gdb_evrregset_t *evrregset)
 277 {
 278   if (have_ptrace_getsetevrregs)
 279     {
 280       if (ptrace (PTRACE_GETEVRREGS, tid, 0, evrregset) >= 0)
 281         return;
 282       else
 283         {
 284           /* EIO means that the PTRACE_GETEVRREGS request isn't supported;
 285              we just return zeros.  */
 286           if (errno == EIO)
 287             have_ptrace_getsetevrregs = 0;
 288           else
 289             /* Anything else needs to be reported.  */
 290             perror_with_name (_("Unable to fetch SPE registers"));
 291         }
 292     }
 293
 294   memset (evrregset, 0, sizeof (*evrregset));
 295 }
 296
 297 /* Supply values from TID for SPE-specific raw registers: the upper
 298    halves of the GPRs, the accumulator, and the spefscr.  REGNO must
 299    be the number of an upper half register, acc, spefscr, or -1 to
 300    supply the values of all registers.  */
 301 static void
 302 fetch_spe_register (int tid, int regno)
 303 {
 304   struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
 305   struct gdb_evrregset_t evrregs;
 306
 307   gdb_assert (sizeof (evrregs.evr[0])
 308               == register_size (current_gdbarch, tdep->ppc_ev0_upper_regnum));
 309   gdb_assert (sizeof (evrregs.acc)
 310               == register_size (current_gdbarch, tdep->ppc_acc_regnum));
 311   gdb_assert (sizeof (evrregs.spefscr)
 312               == register_size (current_gdbarch, tdep->ppc_spefscr_regnum));
 313
 314   get_spe_registers (tid, &evrregs);
 315
 316   if (regno == -1)
 317     {
 318       int i;
 319
 320       for (i = 0; i < ppc_num_gprs; i++)
 321         regcache_raw_supply (current_regcache, tdep->ppc_ev0_upper_regnum + i,
 322                              &evrregs.evr[i]);
 323     }
 324   else if (tdep->ppc_ev0_upper_regnum <= regno
 325            && regno < tdep->ppc_ev0_upper_regnum + ppc_num_gprs)
 326     regcache_raw_supply (current_regcache, regno,
 327                          &evrregs.evr[regno - tdep->ppc_ev0_upper_regnum]);
 328
 329   if (regno == -1
 330       || regno == tdep->ppc_acc_regnum)
 331     regcache_raw_supply (current_regcache, tdep->ppc_acc_regnum, &evrregs.acc);
 332
 333   if (regno == -1
 334       || regno == tdep->ppc_spefscr_regnum)
 335     regcache_raw_supply (current_regcache, tdep->ppc_spefscr_regnum,
 336                          &evrregs.spefscr);
 337 }
 338
 339 static void
 340 fetch_register (int tid, int regno)
 341 {
 342   struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
 343   /* This isn't really an address.  But ptrace thinks of it as one.  */
 344   CORE_ADDR regaddr = ppc_register_u_addr (regno);
 345   int bytes_transferred;
 346   unsigned int offset;         /* Offset of registers within the u area. */
 347   char buf[MAX_REGISTER_SIZE];
 348
 349   if (altivec_register_p (regno))
 350     {
 351       /* If this is the first time through, or if it is not the first
 352          time through, and we have comfirmed that there is kernel
 353          support for such a ptrace request, then go and fetch the
 354          register.  */
 355       if (have_ptrace_getvrregs)
 356        {
 357          fetch_altivec_register (tid, regno);
 358          return;
 359        }
 360      /* If we have discovered that there is no ptrace support for
 361         AltiVec registers, fall through and return zeroes, because
 362         regaddr will be -1 in this case.  */
 363     }
 364   else if (spe_register_p (regno))
 365     {
 366       fetch_spe_register (tid, regno);
 367       return;
 368     }
 369
 370   if (regaddr == -1)
 371     {
 372       memset (buf, '\0', register_size (current_gdbarch, regno));   /* Supply zeroes */
 373       regcache_raw_supply (current_regcache, regno, buf);
 374       return;
 375     }
 376
 377   /* Read the raw register using PTRACE_XFER_TYPE sized chunks.  On a
 378      32-bit platform, 64-bit floating-point registers will require two
 379      transfers.  */
 380   for (bytes_transferred = 0;
 381        bytes_transferred < register_size (current_gdbarch, regno);
 382        bytes_transferred += sizeof (PTRACE_XFER_TYPE))
 383     {
 384       errno = 0;
 385       *(PTRACE_XFER_TYPE *) & buf[bytes_transferred]
 386         = ptrace (PT_READ_U, tid, (PTRACE_ARG3_TYPE) regaddr, 0);
 387       regaddr += sizeof (PTRACE_XFER_TYPE);
 388       if (errno != 0)
 389         {
 390           char message[128];
 391           sprintf (message, "reading register %s (#%d)",
 392                    REGISTER_NAME (regno), regno);
 393           perror_with_name (message);
 394         }
 395     }
 396
 397   /* Now supply the register.  Keep in mind that the regcache's idea
 398      of the register's size may not be a multiple of sizeof
 399      (PTRACE_XFER_TYPE).  */
 400   if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_LITTLE)
 401     {
 402       /* Little-endian values are always found at the left end of the
 403          bytes transferred.  */
 404       regcache_raw_supply (current_regcache, regno, buf);
 405     }
 406   else if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
 407     {
 408       /* Big-endian values are found at the right end of the bytes
 409          transferred.  */
 410       size_t padding = (bytes_transferred
 411                         - register_size (current_gdbarch, regno));
 412       regcache_raw_supply (current_regcache, regno, buf + padding);
 413     }
 414   else
 415     internal_error (__FILE__, __LINE__,
 416                     _("fetch_register: unexpected byte order: %d"),
 417                     gdbarch_byte_order (current_gdbarch));
 418 }
 419
 420 static void
 421 supply_vrregset (gdb_vrregset_t *vrregsetp)
 422 {
 423   int i;
 424   struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
 425   int num_of_vrregs = tdep->ppc_vrsave_regnum - tdep->ppc_vr0_regnum + 1;
 426   int vrregsize = register_size (current_gdbarch, tdep->ppc_vr0_regnum);
 427   int offset = vrregsize - register_size (current_gdbarch, tdep->ppc_vrsave_regnum);
 428
 429   for (i = 0; i < num_of_vrregs; i++)
 430     {
 431       /* The last 2 registers of this set are only 32 bit long, not
 432          128.  However an offset is necessary only for VSCR because it
 433          occupies a whole vector, while VRSAVE occupies a full 4 bytes
 434          slot.  */
 435       if (i == (num_of_vrregs - 2))
 436         regcache_raw_supply (current_regcache, tdep->ppc_vr0_regnum + i,
 437                              *vrregsetp + i * vrregsize + offset);
 438       else
 439         regcache_raw_supply (current_regcache, tdep->ppc_vr0_regnum + i,
 440                              *vrregsetp + i * vrregsize);
 441     }
 442 }
 443
 444 static void
 445 fetch_altivec_registers (int tid)
 446 {
 447   int ret;
 448   gdb_vrregset_t regs;
 449
 450   ret = ptrace (PTRACE_GETVRREGS, tid, 0, &regs);
 451   if (ret < 0)
 452     {
 453       if (errno == EIO)
 454         {
 455           have_ptrace_getvrregs = 0;
 456           return;
 457         }
 458       perror_with_name (_("Unable to fetch AltiVec registers"));
 459     }
 460   supply_vrregset (&regs);
 461 }
 462
 463 static void
 464 fetch_ppc_registers (int tid)
 465 {
 466   int i;
 467   struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
 468
 469   for (i = 0; i < ppc_num_gprs; i++)
 470     fetch_register (tid, tdep->ppc_gp0_regnum + i);
 471   if (tdep->ppc_fp0_regnum >= 0)
 472     for (i = 0; i < ppc_num_fprs; i++)
 473       fetch_register (tid, tdep->ppc_fp0_regnum + i);
 474   fetch_register (tid, PC_REGNUM);
 475   if (tdep->ppc_ps_regnum != -1)
 476     fetch_register (tid, tdep->ppc_ps_regnum);
 477   if (tdep->ppc_cr_regnum != -1)
 478     fetch_register (tid, tdep->ppc_cr_regnum);
 479   if (tdep->ppc_lr_regnum != -1)
 480     fetch_register (tid, tdep->ppc_lr_regnum);
 481   if (tdep->ppc_ctr_regnum != -1)
 482     fetch_register (tid, tdep->ppc_ctr_regnum);
 483   if (tdep->ppc_xer_regnum != -1)
 484     fetch_register (tid, tdep->ppc_xer_regnum);
 485   if (tdep->ppc_mq_regnum != -1)
 486     fetch_register (tid, tdep->ppc_mq_regnum);
 487   if (tdep->ppc_fpscr_regnum != -1)
 488     fetch_register (tid, tdep->ppc_fpscr_regnum);
 489   if (have_ptrace_getvrregs)
 490     if (tdep->ppc_vr0_regnum != -1 && tdep->ppc_vrsave_regnum != -1)
 491       fetch_altivec_registers (tid);
 492   if (tdep->ppc_ev0_upper_regnum >= 0)
 493     fetch_spe_register (tid, -1);
 494 }
 495
 496 /* Fetch registers from the child process.  Fetch all registers if
 497    regno == -1, otherwise fetch all general registers or all floating
 498    point registers depending upon the value of regno.  */
 499 static void
 500 ppc_linux_fetch_inferior_registers (int regno)
 501 {
 502   /* Overload thread id onto process id */
 503   int tid = TIDGET (inferior_ptid);
 504
 505   /* No thread id, just use process id */
 506   if (tid == 0)
 507     tid = PIDGET (inferior_ptid);
 508
 509   if (regno == -1)
 510     fetch_ppc_registers (tid);
 511   else
 512     fetch_register (tid, regno);
 513 }
 514
 515 /* Store one register. */
 516 static void
 517 store_altivec_register (int tid, int regno)
 518 {
 519   int ret;
 520   int offset = 0;
 521   gdb_vrregset_t regs;
 522   struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
 523   int vrregsize = register_size (current_gdbarch, tdep->ppc_vr0_regnum);
 524
 525   ret = ptrace (PTRACE_GETVRREGS, tid, 0, &regs);
 526   if (ret < 0)
 527     {
 528       if (errno == EIO)
 529         {
 530           have_ptrace_getvrregs = 0;
 531           return;
 532         }
 533       perror_with_name (_("Unable to fetch AltiVec register"));
 534     }
 535
 536   /* VSCR is fetched as a 16 bytes quantity, but it is really 4 bytes
 537      long on the hardware.  */
 538   if (regno == (tdep->ppc_vrsave_regnum - 1))
 539     offset = vrregsize - register_size (current_gdbarch, tdep->ppc_vrsave_regnum);
 540
 541   regcache_raw_collect (current_regcache, regno,
 542                         regs + (regno - tdep->ppc_vr0_regnum) * vrregsize + offset);
 543
 544   ret = ptrace (PTRACE_SETVRREGS, tid, 0, &regs);
 545   if (ret < 0)
 546     perror_with_name (_("Unable to store AltiVec register"));
 547 }
 548
 549 /* Assuming TID referrs to an SPE process, set the top halves of TID's
 550    general-purpose registers and its SPE-specific registers to the
 551    values in EVRREGSET.  If we don't support PTRACE_SETEVRREGS, do
 552    nothing.
 553
 554    All the logic to deal with whether or not the PTRACE_GETEVRREGS and
 555    PTRACE_SETEVRREGS requests are supported is isolated here, and in
 556    get_spe_registers.  */
 557 static void
 558 set_spe_registers (int tid, struct gdb_evrregset_t *evrregset)
 559 {
 560   if (have_ptrace_getsetevrregs)
 561     {
 562       if (ptrace (PTRACE_SETEVRREGS, tid, 0, evrregset) >= 0)
 563         return;
 564       else
 565         {
 566           /* EIO means that the PTRACE_SETEVRREGS request isn't
 567              supported; we fail silently, and don't try the call
 568              again.  */
 569           if (errno == EIO)
 570             have_ptrace_getsetevrregs = 0;
 571           else
 572             /* Anything else needs to be reported.  */
 573             perror_with_name (_("Unable to set SPE registers"));
 574         }
 575     }
 576 }
 577
 578 /* Write GDB's value for the SPE-specific raw register REGNO to TID.
 579    If REGNO is -1, write the values of all the SPE-specific
 580    registers.  */
 581 static void
 582 store_spe_register (int tid, int regno)
 583 {
 584   struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
 585   struct gdb_evrregset_t evrregs;
 586
 587   gdb_assert (sizeof (evrregs.evr[0])
 588               == register_size (current_gdbarch, tdep->ppc_ev0_upper_regnum));
 589   gdb_assert (sizeof (evrregs.acc)
 590               == register_size (current_gdbarch, tdep->ppc_acc_regnum));
 591   gdb_assert (sizeof (evrregs.spefscr)
 592               == register_size (current_gdbarch, tdep->ppc_spefscr_regnum));
 593
 594   if (regno == -1)
 595     /* Since we're going to write out every register, the code below
 596        should store to every field of evrregs; if that doesn't happen,
 597        make it obvious by initializing it with suspicious values.  */
 598     memset (&evrregs, 42, sizeof (evrregs));
 599   else
 600     /* We can only read and write the entire EVR register set at a
 601        time, so to write just a single register, we do a
 602        read-modify-write maneuver.  */
 603     get_spe_registers (tid, &evrregs);
 604
 605   if (regno == -1)
 606     {
 607       int i;
 608
 609       for (i = 0; i < ppc_num_gprs; i++)
 610         regcache_raw_collect (current_regcache,
 611                               tdep->ppc_ev0_upper_regnum + i,
 612                               &evrregs.evr[i]);
 613     }
 614   else if (tdep->ppc_ev0_upper_regnum <= regno
 615            && regno < tdep->ppc_ev0_upper_regnum + ppc_num_gprs)
 616     regcache_raw_collect (current_regcache, regno,
 617                           &evrregs.evr[regno - tdep->ppc_ev0_upper_regnum]);
 618
 619   if (regno == -1
 620       || regno == tdep->ppc_acc_regnum)
 621     regcache_raw_collect (current_regcache,
 622                           tdep->ppc_acc_regnum,
 623                           &evrregs.acc);
 624
 625   if (regno == -1
 626       || regno == tdep->ppc_spefscr_regnum)
 627     regcache_raw_collect (current_regcache,
 628                           tdep->ppc_spefscr_regnum,
 629                           &evrregs.spefscr);
 630
 631   /* Write back the modified register set.  */
 632   set_spe_registers (tid, &evrregs);
 633 }
 634
 635 static void
 636 store_register (int tid, int regno)
 637 {
 638   struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
 639   /* This isn't really an address.  But ptrace thinks of it as one.  */
 640   CORE_ADDR regaddr = ppc_register_u_addr (regno);
 641   int i;
 642   size_t bytes_to_transfer;
 643   char buf[MAX_REGISTER_SIZE];
 644
 645   if (altivec_register_p (regno))
 646     {
 647       store_altivec_register (tid, regno);
 648       return;
 649     }
 650   else if (spe_register_p (regno))
 651     {
 652       store_spe_register (tid, regno);
 653       return;
 654     }
 655
 656   if (regaddr == -1)
 657     return;
 658
 659   /* First collect the register.  Keep in mind that the regcache's
 660      idea of the register's size may not be a multiple of sizeof
 661      (PTRACE_XFER_TYPE).  */
 662   memset (buf, 0, sizeof buf);
 663   bytes_to_transfer = align_up (register_size (current_gdbarch, regno),
 664                                 sizeof (PTRACE_XFER_TYPE));
 665   if (TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE)
 666     {
 667       /* Little-endian values always sit at the left end of the buffer.  */
 668       regcache_raw_collect (current_regcache, regno, buf);
 669     }
 670   else if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
 671     {
 672       /* Big-endian values sit at the right end of the buffer.  */
 673       size_t padding = (bytes_to_transfer
 674                         - register_size (current_gdbarch, regno));
 675       regcache_raw_collect (current_regcache, regno, buf + padding);
 676     }
 677
 678   for (i = 0; i < bytes_to_transfer; i += sizeof (PTRACE_XFER_TYPE))
 679     {
 680       errno = 0;
 681       ptrace (PT_WRITE_U, tid, (PTRACE_ARG3_TYPE) regaddr,
 682               *(PTRACE_XFER_TYPE *) & buf[i]);
 683       regaddr += sizeof (PTRACE_XFER_TYPE);
 684
 685       if (errno == EIO
 686           && regno == tdep->ppc_fpscr_regnum)
 687         {
 688           /* Some older kernel versions don't allow fpscr to be written.  */
 689           continue;
 690         }
 691
 692       if (errno != 0)
 693         {
 694           char message[128];
 695           sprintf (message, "writing register %s (#%d)",
 696                    REGISTER_NAME (regno), regno);
 697           perror_with_name (message);
 698         }
 699     }
 700 }
 701
 702 static void
 703 fill_vrregset (gdb_vrregset_t *vrregsetp)
 704 {
 705   int i;
 706   struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
 707   int num_of_vrregs = tdep->ppc_vrsave_regnum - tdep->ppc_vr0_regnum + 1;
 708   int vrregsize = register_size (current_gdbarch, tdep->ppc_vr0_regnum);
 709   int offset = vrregsize - register_size (current_gdbarch, tdep->ppc_vrsave_regnum);
 710
 711   for (i = 0; i < num_of_vrregs; i++)
 712     {
 713       /* The last 2 registers of this set are only 32 bit long, not
 714          128, but only VSCR is fetched as a 16 bytes quantity.  */
 715       if (i == (num_of_vrregs - 2))
 716         regcache_raw_collect (current_regcache, tdep->ppc_vr0_regnum + i,
 717                               *vrregsetp + i * vrregsize + offset);
 718       else
 719         regcache_raw_collect (current_regcache, tdep->ppc_vr0_regnum + i,
 720                               *vrregsetp + i * vrregsize);
 721     }
 722 }
 723
 724 static void
 725 store_altivec_registers (int tid)
 726 {
 727   int ret;
 728   gdb_vrregset_t regs;
 729
 730   ret = ptrace (PTRACE_GETVRREGS, tid, 0, &regs);
 731   if (ret < 0)
 732     {
 733       if (errno == EIO)
 734         {
 735           have_ptrace_getvrregs = 0;
 736           return;
 737         }
 738       perror_with_name (_("Couldn't get AltiVec registers"));
 739     }
 740
 741   fill_vrregset (&regs);
 742
 743   if (ptrace (PTRACE_SETVRREGS, tid, 0, &regs) < 0)
 744     perror_with_name (_("Couldn't write AltiVec registers"));
 745 }
 746
 747 static void
 748 store_ppc_registers (int tid)
 749 {
 750   int i;
 751   struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
 752
 753   for (i = 0; i < ppc_num_gprs; i++)
 754     store_register (tid, tdep->ppc_gp0_regnum + i);
 755   if (tdep->ppc_fp0_regnum >= 0)
 756     for (i = 0; i < ppc_num_fprs; i++)
 757       store_register (tid, tdep->ppc_fp0_regnum + i);
 758   store_register (tid, PC_REGNUM);
 759   if (tdep->ppc_ps_regnum != -1)
 760     store_register (tid, tdep->ppc_ps_regnum);
 761   if (tdep->ppc_cr_regnum != -1)
 762     store_register (tid, tdep->ppc_cr_regnum);
 763   if (tdep->ppc_lr_regnum != -1)
 764     store_register (tid, tdep->ppc_lr_regnum);
 765   if (tdep->ppc_ctr_regnum != -1)
 766     store_register (tid, tdep->ppc_ctr_regnum);
 767   if (tdep->ppc_xer_regnum != -1)
 768     store_register (tid, tdep->ppc_xer_regnum);
 769   if (tdep->ppc_mq_regnum != -1)
 770     store_register (tid, tdep->ppc_mq_regnum);
 771   if (tdep->ppc_fpscr_regnum != -1)
 772     store_register (tid, tdep->ppc_fpscr_regnum);
 773   if (have_ptrace_getvrregs)
 774     if (tdep->ppc_vr0_regnum != -1 && tdep->ppc_vrsave_regnum != -1)
 775       store_altivec_registers (tid);
 776   if (tdep->ppc_ev0_upper_regnum >= 0)
 777     store_spe_register (tid, -1);
 778 }
 779
 780 static void
 781 ppc_linux_store_inferior_registers (int regno)
 782 {
 783   /* Overload thread id onto process id */
 784   int tid = TIDGET (inferior_ptid);
 785
 786   /* No thread id, just use process id */
 787   if (tid == 0)
 788     tid = PIDGET (inferior_ptid);
 789
 790   if (regno >= 0)
 791     store_register (tid, regno);
 792   else
 793     store_ppc_registers (tid);
 794 }
 795
 796 void
 797 supply_gregset (gdb_gregset_t *gregsetp)
 798 {
 799   /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace
 800      interface, and not the wordsize of the program's ABI.  */
 801   int wordsize = sizeof (PTRACE_XFER_TYPE);
 802   ppc_linux_supply_gregset (current_regcache, -1, gregsetp,
 803                             sizeof (gdb_gregset_t), wordsize);
 804 }
 805
 806 static void
 807 right_fill_reg (int regnum, void *reg)
 808 {
 809   /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace
 810      interface, and not the wordsize of the program's ABI.  */
 811   int wordsize = sizeof (PTRACE_XFER_TYPE);
 812   /* Right fill the register.  */
 813   regcache_raw_collect (current_regcache, regnum,
 814                         ((bfd_byte *) reg
 815                          + wordsize
 816                          - register_size (current_gdbarch, regnum)));
 817 }
 818
 819 void
 820 fill_gregset (gdb_gregset_t *gregsetp, int regno)
 821 {
 822   int regi;
 823   elf_greg_t *regp = (elf_greg_t *) gregsetp;
 824   struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
 825   const int elf_ngreg = 48;
 826
 827
 828   /* Start with zeros.  */
 829   memset (regp, 0, elf_ngreg * sizeof (*regp));
 830
 831   for (regi = 0; regi < ppc_num_gprs; regi++)
 832     {
 833       if ((regno == -1) || regno == tdep->ppc_gp0_regnum + regi)
 834         right_fill_reg (tdep->ppc_gp0_regnum + regi, (regp + PT_R0 + regi));
 835     }
 836
 837   if ((regno == -1) || regno == PC_REGNUM)
 838     right_fill_reg (PC_REGNUM, regp + PT_NIP);
 839   if ((regno == -1) || regno == tdep->ppc_lr_regnum)
 840     right_fill_reg (tdep->ppc_lr_regnum, regp + PT_LNK);
 841   if ((regno == -1) || regno == tdep->ppc_cr_regnum)
 842     regcache_raw_collect (current_regcache, tdep->ppc_cr_regnum,
 843                           regp + PT_CCR);
 844   if ((regno == -1) || regno == tdep->ppc_xer_regnum)
 845     regcache_raw_collect (current_regcache, tdep->ppc_xer_regnum,
 846                           regp + PT_XER);
 847   if ((regno == -1) || regno == tdep->ppc_ctr_regnum)
 848     right_fill_reg (tdep->ppc_ctr_regnum, regp + PT_CTR);
 849 #ifdef PT_MQ
 850   if (((regno == -1) || regno == tdep->ppc_mq_regnum)
 851       && (tdep->ppc_mq_regnum != -1))
 852     right_fill_reg (tdep->ppc_mq_regnum, regp + PT_MQ);
 853 #endif
 854   if ((regno == -1) || regno == tdep->ppc_ps_regnum)
 855     right_fill_reg (tdep->ppc_ps_regnum, regp + PT_MSR);
 856 }
 857
 858 void
 859 supply_fpregset (gdb_fpregset_t * fpregsetp)
 860 {
 861   ppc_linux_supply_fpregset (NULL, current_regcache, -1, fpregsetp,
 862                              sizeof (gdb_fpregset_t));
 863 }
 864
 865 /* Given a pointer to a floating point register set in /proc format
 866    (fpregset_t *), update the register specified by REGNO from gdb's
 867    idea of the current floating point register set.  If REGNO is -1,
 868    update them all.  */
 869 void
 870 fill_fpregset (gdb_fpregset_t *fpregsetp, int regno)
 871 {
 872   int regi;
 873   struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
 874   bfd_byte *fpp = (void *) fpregsetp;
 875
 876   if (ppc_floating_point_unit_p (current_gdbarch))
 877     {
 878       for (regi = 0; regi < ppc_num_fprs; regi++)
 879         {
 880           if ((regno == -1) || (regno == tdep->ppc_fp0_regnum + regi))
 881             regcache_raw_collect (current_regcache, tdep->ppc_fp0_regnum + regi,
 882                                   fpp + 8 * regi);
 883         }
 884       if (regno == -1 || regno == tdep->ppc_fpscr_regnum)
 885         right_fill_reg (tdep->ppc_fpscr_regnum, (fpp + 8 * 32));
 886     }
 887 }
 888
 889 void _initialize_ppc_linux_nat (void);
 890
 891 void
 892 _initialize_ppc_linux_nat (void)
 893 {
 894   struct target_ops *t;
 895
 896   /* Fill in the generic GNU/Linux methods.  */
 897   t = linux_target ();
 898
 899   /* Add our register access methods.  */
 900   t->to_fetch_registers = ppc_linux_fetch_inferior_registers;
 901   t->to_store_registers = ppc_linux_store_inferior_registers;
 902
 903   /* Register the target.  */
 904   add_target (t);
 905 }