1 /* PPC GNU/Linux native support.
3 Copyright (C) 1988-2018 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21 #include "observable.h"
24 #include "gdbthread.h"
29 #include "linux-nat.h"
30 #include <sys/types.h>
33 #include <sys/ioctl.h>
37 #include <sys/procfs.h>
38 #include "nat/gdb_ptrace.h"
39 #include "inf-ptrace.h"
41 /* Prototypes for supply_gregset etc. */
44 #include "ppc-linux-tdep.h"
46 /* Required when using the AUXV. */
47 #include "elf/common.h"
50 #include "arch/ppc-linux-common.h"
51 #include "arch/ppc-linux-tdesc.h"
52 #include "nat/ppc-linux.h"
54 /* Similarly for the hardware watchpoint support. These requests are used
55 when the PowerPC HWDEBUG ptrace interface is not available. */
56 #ifndef PTRACE_GET_DEBUGREG
57 #define PTRACE_GET_DEBUGREG 25
59 #ifndef PTRACE_SET_DEBUGREG
60 #define PTRACE_SET_DEBUGREG 26
62 #ifndef PTRACE_GETSIGINFO
63 #define PTRACE_GETSIGINFO 0x4202
66 /* These requests are used when the PowerPC HWDEBUG ptrace interface is
67 available. It exposes the debug facilities of PowerPC processors, as well
68 as additional features of BookE processors, such as ranged breakpoints and
69 watchpoints and hardware-accelerated condition evaluation. */
70 #ifndef PPC_PTRACE_GETHWDBGINFO
72 /* Not having PPC_PTRACE_GETHWDBGINFO defined means that the PowerPC HWDEBUG
73 ptrace interface is not present in ptrace.h, so we'll have to pretty much
74 include it all here so that the code at least compiles on older systems. */
75 #define PPC_PTRACE_GETHWDBGINFO 0x89
76 #define PPC_PTRACE_SETHWDEBUG 0x88
77 #define PPC_PTRACE_DELHWDEBUG 0x87
81 uint32_t version
; /* Only version 1 exists to date. */
82 uint32_t num_instruction_bps
;
83 uint32_t num_data_bps
;
84 uint32_t num_condition_regs
;
85 uint32_t data_bp_alignment
;
86 uint32_t sizeof_condition
; /* size of the DVC register. */
90 /* Features will have bits indicating whether there is support for: */
91 #define PPC_DEBUG_FEATURE_INSN_BP_RANGE 0x1
92 #define PPC_DEBUG_FEATURE_INSN_BP_MASK 0x2
93 #define PPC_DEBUG_FEATURE_DATA_BP_RANGE 0x4
94 #define PPC_DEBUG_FEATURE_DATA_BP_MASK 0x8
96 struct ppc_hw_breakpoint
98 uint32_t version
; /* currently, version must be 1 */
99 uint32_t trigger_type
; /* only some combinations allowed */
100 uint32_t addr_mode
; /* address match mode */
101 uint32_t condition_mode
; /* break/watchpoint condition flags */
102 uint64_t addr
; /* break/watchpoint address */
103 uint64_t addr2
; /* range end or mask */
104 uint64_t condition_value
; /* contents of the DVC register */
108 #define PPC_BREAKPOINT_TRIGGER_EXECUTE 0x1
109 #define PPC_BREAKPOINT_TRIGGER_READ 0x2
110 #define PPC_BREAKPOINT_TRIGGER_WRITE 0x4
111 #define PPC_BREAKPOINT_TRIGGER_RW 0x6
114 #define PPC_BREAKPOINT_MODE_EXACT 0x0
115 #define PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE 0x1
116 #define PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE 0x2
117 #define PPC_BREAKPOINT_MODE_MASK 0x3
119 /* Condition mode. */
120 #define PPC_BREAKPOINT_CONDITION_NONE 0x0
121 #define PPC_BREAKPOINT_CONDITION_AND 0x1
122 #define PPC_BREAKPOINT_CONDITION_EXACT 0x1
123 #define PPC_BREAKPOINT_CONDITION_OR 0x2
124 #define PPC_BREAKPOINT_CONDITION_AND_OR 0x3
125 #define PPC_BREAKPOINT_CONDITION_BE_ALL 0x00ff0000
126 #define PPC_BREAKPOINT_CONDITION_BE_SHIFT 16
127 #define PPC_BREAKPOINT_CONDITION_BE(n) \
128 (1<<((n)+PPC_BREAKPOINT_CONDITION_BE_SHIFT))
129 #endif /* PPC_PTRACE_GETHWDBGINFO */
131 /* Feature defined on Linux kernel v3.9: DAWR interface, that enables wider
132 watchpoint (up to 512 bytes). */
133 #ifndef PPC_DEBUG_FEATURE_DATA_BP_DAWR
134 #define PPC_DEBUG_FEATURE_DATA_BP_DAWR 0x10
135 #endif /* PPC_DEBUG_FEATURE_DATA_BP_DAWR */
137 /* Similarly for the general-purpose (gp0 -- gp31)
138 and floating-point registers (fp0 -- fp31). */
139 #ifndef PTRACE_GETREGS
140 #define PTRACE_GETREGS 12
142 #ifndef PTRACE_SETREGS
143 #define PTRACE_SETREGS 13
145 #ifndef PTRACE_GETFPREGS
146 #define PTRACE_GETFPREGS 14
148 #ifndef PTRACE_SETFPREGS
149 #define PTRACE_SETFPREGS 15
152 /* This oddity is because the Linux kernel defines elf_vrregset_t as
153 an array of 33 16 bytes long elements. I.e. it leaves out vrsave.
154 However the PTRACE_GETVRREGS and PTRACE_SETVRREGS requests return
155 the vrsave as an extra 4 bytes at the end. I opted for creating a
156 flat array of chars, so that it is easier to manipulate for gdb.
158 There are 32 vector registers 16 bytes longs, plus a VSCR register
159 which is only 4 bytes long, but is fetched as a 16 bytes
160 quantity. Up to here we have the elf_vrregset_t structure.
161 Appended to this there is space for the VRSAVE register: 4 bytes.
162 Even though this vrsave register is not included in the regset
163 typedef, it is handled by the ptrace requests.
165 The layout is like this (where x is the actual value of the vscr reg): */
170 |.|.|.|.|.....|.|.|.|.||.|.|.|x||.|
171 <-------> <-------><-------><->
174 |.|.|.|.|.....|.|.|.|.||X|.|.|.||.|
175 <-------> <-------><-------><->
180 typedef char gdb_vrregset_t
[PPC_LINUX_SIZEOF_VRREGSET
];
182 /* This is the layout of the POWER7 VSX registers and the way they overlap
183 with the existing FPR and VMX registers.
185 VSR doubleword 0 VSR doubleword 1
186 ----------------------------------------------------------------
188 ----------------------------------------------------------------
190 ----------------------------------------------------------------
193 ----------------------------------------------------------------
194 VSR[30] | FPR[30] | |
195 ----------------------------------------------------------------
196 VSR[31] | FPR[31] | |
197 ----------------------------------------------------------------
199 ----------------------------------------------------------------
201 ----------------------------------------------------------------
204 ----------------------------------------------------------------
206 ----------------------------------------------------------------
208 ----------------------------------------------------------------
210 VSX has 64 128bit registers. The first 32 registers overlap with
211 the FP registers (doubleword 0) and hence extend them with additional
212 64 bits (doubleword 1). The other 32 regs overlap with the VMX
214 typedef char gdb_vsxregset_t
[PPC_LINUX_SIZEOF_VSXREGSET
];
216 /* On PPC processors that support the Signal Processing Extension
217 (SPE) APU, the general-purpose registers are 64 bits long.
218 However, the ordinary Linux kernel PTRACE_PEEKUSER / PTRACE_POKEUSER
219 ptrace calls only access the lower half of each register, to allow
220 them to behave the same way they do on non-SPE systems. There's a
221 separate pair of calls, PTRACE_GETEVRREGS / PTRACE_SETEVRREGS, that
222 read and write the top halves of all the general-purpose registers
223 at once, along with some SPE-specific registers.
225 GDB itself continues to claim the general-purpose registers are 32
226 bits long. It has unnamed raw registers that hold the upper halves
227 of the gprs, and the full 64-bit SIMD views of the registers,
228 'ev0' -- 'ev31', are pseudo-registers that splice the top and
229 bottom halves together.
231 This is the structure filled in by PTRACE_GETEVRREGS and written to
232 the inferior's registers by PTRACE_SETEVRREGS. */
233 struct gdb_evrregset_t
235 unsigned long evr
[32];
236 unsigned long long acc
;
237 unsigned long spefscr
;
240 /* Non-zero if our kernel may support the PTRACE_GETVSXREGS and
241 PTRACE_SETVSXREGS requests, for reading and writing the VSX
242 POWER7 registers 0 through 31. Zero if we've tried one of them and
243 gotten an error. Note that VSX registers 32 through 63 overlap
244 with VR registers 0 through 31. */
245 int have_ptrace_getsetvsxregs
= 1;
247 /* Non-zero if our kernel may support the PTRACE_GETVRREGS and
248 PTRACE_SETVRREGS requests, for reading and writing the Altivec
249 registers. Zero if we've tried one of them and gotten an
251 int have_ptrace_getvrregs
= 1;
253 /* Non-zero if our kernel may support the PTRACE_GETEVRREGS and
254 PTRACE_SETEVRREGS requests, for reading and writing the SPE
255 registers. Zero if we've tried one of them and gotten an
257 int have_ptrace_getsetevrregs
= 1;
259 /* Non-zero if our kernel may support the PTRACE_GETREGS and
260 PTRACE_SETREGS requests, for reading and writing the
261 general-purpose registers. Zero if we've tried one of
262 them and gotten an error. */
263 int have_ptrace_getsetregs
= 1;
265 /* Non-zero if our kernel may support the PTRACE_GETFPREGS and
266 PTRACE_SETFPREGS requests, for reading and writing the
267 floating-pointers registers. Zero if we've tried one of
268 them and gotten an error. */
269 int have_ptrace_getsetfpregs
= 1;
271 struct ppc_linux_nat_target final
: public linux_nat_target
273 /* Add our register access methods. */
274 void fetch_registers (struct regcache
*, int) override
;
275 void store_registers (struct regcache
*, int) override
;
277 /* Add our breakpoint/watchpoint methods. */
278 int can_use_hw_breakpoint (enum bptype
, int, int) override
;
280 int insert_hw_breakpoint (struct gdbarch
*, struct bp_target_info
*)
283 int remove_hw_breakpoint (struct gdbarch
*, struct bp_target_info
*)
286 int region_ok_for_hw_watchpoint (CORE_ADDR
, int) override
;
288 int insert_watchpoint (CORE_ADDR
, int, enum target_hw_bp_type
,
289 struct expression
*) override
;
291 int remove_watchpoint (CORE_ADDR
, int, enum target_hw_bp_type
,
292 struct expression
*) override
;
294 int insert_mask_watchpoint (CORE_ADDR
, CORE_ADDR
, enum target_hw_bp_type
)
297 int remove_mask_watchpoint (CORE_ADDR
, CORE_ADDR
, enum target_hw_bp_type
)
300 bool stopped_by_watchpoint () override
;
302 bool stopped_data_address (CORE_ADDR
*) override
;
304 bool watchpoint_addr_within_range (CORE_ADDR
, CORE_ADDR
, int) override
;
306 bool can_accel_watchpoint_condition (CORE_ADDR
, int, int, struct expression
*)
309 int masked_watch_num_registers (CORE_ADDR
, CORE_ADDR
) override
;
311 int ranged_break_num_registers () override
;
313 const struct target_desc
*read_description () override
;
315 int auxv_parse (gdb_byte
**readptr
,
316 gdb_byte
*endptr
, CORE_ADDR
*typep
, CORE_ADDR
*valp
)
319 /* Override linux_nat_target low methods. */
320 void low_new_thread (struct lwp_info
*lp
) override
;
323 static ppc_linux_nat_target the_ppc_linux_nat_target
;
326 /* registers layout, as presented by the ptrace interface:
327 PT_R0, PT_R1, PT_R2, PT_R3, PT_R4, PT_R5, PT_R6, PT_R7,
328 PT_R8, PT_R9, PT_R10, PT_R11, PT_R12, PT_R13, PT_R14, PT_R15,
329 PT_R16, PT_R17, PT_R18, PT_R19, PT_R20, PT_R21, PT_R22, PT_R23,
330 PT_R24, PT_R25, PT_R26, PT_R27, PT_R28, PT_R29, PT_R30, PT_R31,
331 PT_FPR0, PT_FPR0 + 2, PT_FPR0 + 4, PT_FPR0 + 6,
332 PT_FPR0 + 8, PT_FPR0 + 10, PT_FPR0 + 12, PT_FPR0 + 14,
333 PT_FPR0 + 16, PT_FPR0 + 18, PT_FPR0 + 20, PT_FPR0 + 22,
334 PT_FPR0 + 24, PT_FPR0 + 26, PT_FPR0 + 28, PT_FPR0 + 30,
335 PT_FPR0 + 32, PT_FPR0 + 34, PT_FPR0 + 36, PT_FPR0 + 38,
336 PT_FPR0 + 40, PT_FPR0 + 42, PT_FPR0 + 44, PT_FPR0 + 46,
337 PT_FPR0 + 48, PT_FPR0 + 50, PT_FPR0 + 52, PT_FPR0 + 54,
338 PT_FPR0 + 56, PT_FPR0 + 58, PT_FPR0 + 60, PT_FPR0 + 62,
339 PT_NIP, PT_MSR, PT_CCR, PT_LNK, PT_CTR, PT_XER, PT_MQ */
343 ppc_register_u_addr (struct gdbarch
*gdbarch
, int regno
)
346 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
347 /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace
348 interface, and not the wordsize of the program's ABI. */
349 int wordsize
= sizeof (long);
351 /* General purpose registers occupy 1 slot each in the buffer. */
352 if (regno
>= tdep
->ppc_gp0_regnum
353 && regno
< tdep
->ppc_gp0_regnum
+ ppc_num_gprs
)
354 u_addr
= ((regno
- tdep
->ppc_gp0_regnum
+ PT_R0
) * wordsize
);
356 /* Floating point regs: eight bytes each in both 32- and 64-bit
357 ptrace interfaces. Thus, two slots each in 32-bit interface, one
358 slot each in 64-bit interface. */
359 if (tdep
->ppc_fp0_regnum
>= 0
360 && regno
>= tdep
->ppc_fp0_regnum
361 && regno
< tdep
->ppc_fp0_regnum
+ ppc_num_fprs
)
362 u_addr
= (PT_FPR0
* wordsize
) + ((regno
- tdep
->ppc_fp0_regnum
) * 8);
364 /* UISA special purpose registers: 1 slot each. */
365 if (regno
== gdbarch_pc_regnum (gdbarch
))
366 u_addr
= PT_NIP
* wordsize
;
367 if (regno
== tdep
->ppc_lr_regnum
)
368 u_addr
= PT_LNK
* wordsize
;
369 if (regno
== tdep
->ppc_cr_regnum
)
370 u_addr
= PT_CCR
* wordsize
;
371 if (regno
== tdep
->ppc_xer_regnum
)
372 u_addr
= PT_XER
* wordsize
;
373 if (regno
== tdep
->ppc_ctr_regnum
)
374 u_addr
= PT_CTR
* wordsize
;
376 if (regno
== tdep
->ppc_mq_regnum
)
377 u_addr
= PT_MQ
* wordsize
;
379 if (regno
== tdep
->ppc_ps_regnum
)
380 u_addr
= PT_MSR
* wordsize
;
381 if (regno
== PPC_ORIG_R3_REGNUM
)
382 u_addr
= PT_ORIG_R3
* wordsize
;
383 if (regno
== PPC_TRAP_REGNUM
)
384 u_addr
= PT_TRAP
* wordsize
;
385 if (tdep
->ppc_fpscr_regnum
>= 0
386 && regno
== tdep
->ppc_fpscr_regnum
)
388 /* NOTE: cagney/2005-02-08: On some 64-bit GNU/Linux systems the
389 kernel headers incorrectly contained the 32-bit definition of
390 PT_FPSCR. For the 32-bit definition, floating-point
391 registers occupy two 32-bit "slots", and the FPSCR lives in
392 the second half of such a slot-pair (hence +1). For 64-bit,
393 the FPSCR instead occupies the full 64-bit 2-word-slot and
394 hence no adjustment is necessary. Hack around this. */
395 if (wordsize
== 8 && PT_FPSCR
== (48 + 32 + 1))
396 u_addr
= (48 + 32) * wordsize
;
397 /* If the FPSCR is 64-bit wide, we need to fetch the whole 64-bit
398 slot and not just its second word. The PT_FPSCR supplied when
399 GDB is compiled as a 32-bit app doesn't reflect this. */
400 else if (wordsize
== 4 && register_size (gdbarch
, regno
) == 8
401 && PT_FPSCR
== (48 + 2*32 + 1))
402 u_addr
= (48 + 2*32) * wordsize
;
404 u_addr
= PT_FPSCR
* wordsize
;
409 /* The Linux kernel ptrace interface for POWER7 VSX registers uses the
410 registers set mechanism, as opposed to the interface for all the
411 other registers, that stores/fetches each register individually. */
413 fetch_vsx_registers (struct regcache
*regcache
, int tid
, int regno
)
416 gdb_vsxregset_t regs
;
417 const struct regset
*vsxregset
= ppc_linux_vsxregset ();
419 ret
= ptrace (PTRACE_GETVSXREGS
, tid
, 0, ®s
);
424 have_ptrace_getsetvsxregs
= 0;
427 perror_with_name (_("Unable to fetch VSX registers"));
430 vsxregset
->supply_regset (vsxregset
, regcache
, regno
, ®s
,
431 PPC_LINUX_SIZEOF_VSXREGSET
);
434 /* The Linux kernel ptrace interface for AltiVec registers uses the
435 registers set mechanism, as opposed to the interface for all the
436 other registers, that stores/fetches each register individually. */
438 fetch_altivec_registers (struct regcache
*regcache
, int tid
,
443 struct gdbarch
*gdbarch
= regcache
->arch ();
444 const struct regset
*vrregset
= ppc_linux_vrregset (gdbarch
);
446 ret
= ptrace (PTRACE_GETVRREGS
, tid
, 0, ®s
);
451 have_ptrace_getvrregs
= 0;
454 perror_with_name (_("Unable to fetch AltiVec registers"));
457 vrregset
->supply_regset (vrregset
, regcache
, regno
, ®s
,
458 PPC_LINUX_SIZEOF_VRREGSET
);
461 /* Fetch the top 32 bits of TID's general-purpose registers and the
462 SPE-specific registers, and place the results in EVRREGSET. If we
463 don't support PTRACE_GETEVRREGS, then just fill EVRREGSET with
466 All the logic to deal with whether or not the PTRACE_GETEVRREGS and
467 PTRACE_SETEVRREGS requests are supported is isolated here, and in
468 set_spe_registers. */
470 get_spe_registers (int tid
, struct gdb_evrregset_t
*evrregset
)
472 if (have_ptrace_getsetevrregs
)
474 if (ptrace (PTRACE_GETEVRREGS
, tid
, 0, evrregset
) >= 0)
478 /* EIO means that the PTRACE_GETEVRREGS request isn't supported;
479 we just return zeros. */
481 have_ptrace_getsetevrregs
= 0;
483 /* Anything else needs to be reported. */
484 perror_with_name (_("Unable to fetch SPE registers"));
488 memset (evrregset
, 0, sizeof (*evrregset
));
491 /* Supply values from TID for SPE-specific raw registers: the upper
492 halves of the GPRs, the accumulator, and the spefscr. REGNO must
493 be the number of an upper half register, acc, spefscr, or -1 to
494 supply the values of all registers. */
496 fetch_spe_register (struct regcache
*regcache
, int tid
, int regno
)
498 struct gdbarch
*gdbarch
= regcache
->arch ();
499 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
500 struct gdb_evrregset_t evrregs
;
502 gdb_assert (sizeof (evrregs
.evr
[0])
503 == register_size (gdbarch
, tdep
->ppc_ev0_upper_regnum
));
504 gdb_assert (sizeof (evrregs
.acc
)
505 == register_size (gdbarch
, tdep
->ppc_acc_regnum
));
506 gdb_assert (sizeof (evrregs
.spefscr
)
507 == register_size (gdbarch
, tdep
->ppc_spefscr_regnum
));
509 get_spe_registers (tid
, &evrregs
);
515 for (i
= 0; i
< ppc_num_gprs
; i
++)
516 regcache
->raw_supply (tdep
->ppc_ev0_upper_regnum
+ i
, &evrregs
.evr
[i
]);
518 else if (tdep
->ppc_ev0_upper_regnum
<= regno
519 && regno
< tdep
->ppc_ev0_upper_regnum
+ ppc_num_gprs
)
520 regcache
->raw_supply (regno
,
521 &evrregs
.evr
[regno
- tdep
->ppc_ev0_upper_regnum
]);
524 || regno
== tdep
->ppc_acc_regnum
)
525 regcache
->raw_supply (tdep
->ppc_acc_regnum
, &evrregs
.acc
);
528 || regno
== tdep
->ppc_spefscr_regnum
)
529 regcache
->raw_supply (tdep
->ppc_spefscr_regnum
, &evrregs
.spefscr
);
532 /* Use ptrace to fetch all registers from the register set with note
533 type REGSET_ID, size REGSIZE, and layout described by REGSET, from
534 process/thread TID and supply their values to REGCACHE. If ptrace
535 returns ENODATA to indicate the regset is unavailable, mark the
536 registers as unavailable in REGCACHE. */
539 fetch_regset (struct regcache
*regcache
, int tid
,
540 int regset_id
, int regsetsize
, const struct regset
*regset
)
542 void *buf
= alloca (regsetsize
);
546 iov
.iov_len
= regsetsize
;
548 if (ptrace (PTRACE_GETREGSET
, tid
, regset_id
, &iov
) < 0)
550 if (errno
== ENODATA
)
551 regset
->supply_regset (regset
, regcache
, -1, NULL
, regsetsize
);
553 perror_with_name (_("Couldn't get register set"));
556 regset
->supply_regset (regset
, regcache
, -1, buf
, regsetsize
);
559 /* Use ptrace to store register REGNUM of the regset with note type
560 REGSET_ID, size REGSETSIZE, and layout described by REGSET, from
561 REGCACHE back to process/thread TID. If REGNUM is -1 all registers
562 in the set are collected and stored. */
565 store_regset (const struct regcache
*regcache
, int tid
, int regnum
,
566 int regset_id
, int regsetsize
, const struct regset
*regset
)
568 void *buf
= alloca (regsetsize
);
572 iov
.iov_len
= regsetsize
;
574 /* Make sure that the buffer that will be stored has up to date values
575 for the registers that won't be collected. */
576 if (ptrace (PTRACE_GETREGSET
, tid
, regset_id
, &iov
) < 0)
577 perror_with_name (_("Couldn't get register set"));
579 regset
->collect_regset (regset
, regcache
, regnum
, buf
, regsetsize
);
581 if (ptrace (PTRACE_SETREGSET
, tid
, regset_id
, &iov
) < 0)
582 perror_with_name (_("Couldn't set register set"));
585 /* Check whether the kernel provides a register set with number
586 REGSET_ID of size REGSETSIZE for process/thread TID. */
589 check_regset (int tid
, int regset_id
, int regsetsize
)
591 void *buf
= alloca (regsetsize
);
595 iov
.iov_len
= regsetsize
;
597 if (ptrace (PTRACE_GETREGSET
, tid
, regset_id
, &iov
) >= 0
605 fetch_register (struct regcache
*regcache
, int tid
, int regno
)
607 struct gdbarch
*gdbarch
= regcache
->arch ();
608 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
609 /* This isn't really an address. But ptrace thinks of it as one. */
610 CORE_ADDR regaddr
= ppc_register_u_addr (gdbarch
, regno
);
611 int bytes_transferred
;
612 gdb_byte buf
[PPC_MAX_REGISTER_SIZE
];
614 if (altivec_register_p (gdbarch
, regno
))
616 /* If this is the first time through, or if it is not the first
617 time through, and we have comfirmed that there is kernel
618 support for such a ptrace request, then go and fetch the
620 if (have_ptrace_getvrregs
)
622 fetch_altivec_registers (regcache
, tid
, regno
);
625 /* If we have discovered that there is no ptrace support for
626 AltiVec registers, fall through and return zeroes, because
627 regaddr will be -1 in this case. */
629 else if (vsx_register_p (gdbarch
, regno
))
631 if (have_ptrace_getsetvsxregs
)
633 fetch_vsx_registers (regcache
, tid
, regno
);
637 else if (spe_register_p (gdbarch
, regno
))
639 fetch_spe_register (regcache
, tid
, regno
);
642 else if (regno
== PPC_DSCR_REGNUM
)
644 gdb_assert (tdep
->ppc_dscr_regnum
!= -1);
646 fetch_regset (regcache
, tid
, NT_PPC_DSCR
,
647 PPC_LINUX_SIZEOF_DSCRREGSET
,
648 &ppc32_linux_dscrregset
);
651 else if (regno
== PPC_PPR_REGNUM
)
653 gdb_assert (tdep
->ppc_ppr_regnum
!= -1);
655 fetch_regset (regcache
, tid
, NT_PPC_PPR
,
656 PPC_LINUX_SIZEOF_PPRREGSET
,
657 &ppc32_linux_pprregset
);
660 else if (regno
== PPC_TAR_REGNUM
)
662 gdb_assert (tdep
->ppc_tar_regnum
!= -1);
664 fetch_regset (regcache
, tid
, NT_PPC_TAR
,
665 PPC_LINUX_SIZEOF_TARREGSET
,
666 &ppc32_linux_tarregset
);
669 else if (PPC_IS_EBB_REGNUM (regno
))
671 gdb_assert (tdep
->have_ebb
);
673 fetch_regset (regcache
, tid
, NT_PPC_EBB
,
674 PPC_LINUX_SIZEOF_EBBREGSET
,
675 &ppc32_linux_ebbregset
);
678 else if (PPC_IS_PMU_REGNUM (regno
))
680 gdb_assert (tdep
->ppc_mmcr0_regnum
!= -1);
682 fetch_regset (regcache
, tid
, NT_PPC_PMU
,
683 PPC_LINUX_SIZEOF_PMUREGSET
,
684 &ppc32_linux_pmuregset
);
690 memset (buf
, '\0', register_size (gdbarch
, regno
)); /* Supply zeroes */
691 regcache
->raw_supply (regno
, buf
);
695 /* Read the raw register using sizeof(long) sized chunks. On a
696 32-bit platform, 64-bit floating-point registers will require two
698 for (bytes_transferred
= 0;
699 bytes_transferred
< register_size (gdbarch
, regno
);
700 bytes_transferred
+= sizeof (long))
705 l
= ptrace (PTRACE_PEEKUSER
, tid
, (PTRACE_TYPE_ARG3
) regaddr
, 0);
706 regaddr
+= sizeof (long);
710 xsnprintf (message
, sizeof (message
), "reading register %s (#%d)",
711 gdbarch_register_name (gdbarch
, regno
), regno
);
712 perror_with_name (message
);
714 memcpy (&buf
[bytes_transferred
], &l
, sizeof (l
));
717 /* Now supply the register. Keep in mind that the regcache's idea
718 of the register's size may not be a multiple of sizeof
720 if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_LITTLE
)
722 /* Little-endian values are always found at the left end of the
723 bytes transferred. */
724 regcache
->raw_supply (regno
, buf
);
726 else if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
)
728 /* Big-endian values are found at the right end of the bytes
730 size_t padding
= (bytes_transferred
- register_size (gdbarch
, regno
));
731 regcache
->raw_supply (regno
, buf
+ padding
);
734 internal_error (__FILE__
, __LINE__
,
735 _("fetch_register: unexpected byte order: %d"),
736 gdbarch_byte_order (gdbarch
));
739 /* This function actually issues the request to ptrace, telling
740 it to get all general-purpose registers and put them into the
743 If the ptrace request does not exist, this function returns 0
744 and properly sets the have_ptrace_* flag. If the request fails,
745 this function calls perror_with_name. Otherwise, if the request
746 succeeds, then the regcache gets filled and 1 is returned. */
748 fetch_all_gp_regs (struct regcache
*regcache
, int tid
)
750 gdb_gregset_t gregset
;
752 if (ptrace (PTRACE_GETREGS
, tid
, 0, (void *) &gregset
) < 0)
756 have_ptrace_getsetregs
= 0;
759 perror_with_name (_("Couldn't get general-purpose registers."));
762 supply_gregset (regcache
, (const gdb_gregset_t
*) &gregset
);
767 /* This is a wrapper for the fetch_all_gp_regs function. It is
768 responsible for verifying if this target has the ptrace request
769 that can be used to fetch all general-purpose registers at one
770 shot. If it doesn't, then we should fetch them using the
771 old-fashioned way, which is to iterate over the registers and
772 request them one by one. */
774 fetch_gp_regs (struct regcache
*regcache
, int tid
)
776 struct gdbarch
*gdbarch
= regcache
->arch ();
777 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
780 if (have_ptrace_getsetregs
)
781 if (fetch_all_gp_regs (regcache
, tid
))
784 /* If we've hit this point, it doesn't really matter which
785 architecture we are using. We just need to read the
786 registers in the "old-fashioned way". */
787 for (i
= 0; i
< ppc_num_gprs
; i
++)
788 fetch_register (regcache
, tid
, tdep
->ppc_gp0_regnum
+ i
);
791 /* This function actually issues the request to ptrace, telling
792 it to get all floating-point registers and put them into the
795 If the ptrace request does not exist, this function returns 0
796 and properly sets the have_ptrace_* flag. If the request fails,
797 this function calls perror_with_name. Otherwise, if the request
798 succeeds, then the regcache gets filled and 1 is returned. */
800 fetch_all_fp_regs (struct regcache
*regcache
, int tid
)
802 gdb_fpregset_t fpregs
;
804 if (ptrace (PTRACE_GETFPREGS
, tid
, 0, (void *) &fpregs
) < 0)
808 have_ptrace_getsetfpregs
= 0;
811 perror_with_name (_("Couldn't get floating-point registers."));
814 supply_fpregset (regcache
, (const gdb_fpregset_t
*) &fpregs
);
819 /* This is a wrapper for the fetch_all_fp_regs function. It is
820 responsible for verifying if this target has the ptrace request
821 that can be used to fetch all floating-point registers at one
822 shot. If it doesn't, then we should fetch them using the
823 old-fashioned way, which is to iterate over the registers and
824 request them one by one. */
826 fetch_fp_regs (struct regcache
*regcache
, int tid
)
828 struct gdbarch
*gdbarch
= regcache
->arch ();
829 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
832 if (have_ptrace_getsetfpregs
)
833 if (fetch_all_fp_regs (regcache
, tid
))
836 /* If we've hit this point, it doesn't really matter which
837 architecture we are using. We just need to read the
838 registers in the "old-fashioned way". */
839 for (i
= 0; i
< ppc_num_fprs
; i
++)
840 fetch_register (regcache
, tid
, tdep
->ppc_fp0_regnum
+ i
);
844 fetch_ppc_registers (struct regcache
*regcache
, int tid
)
846 struct gdbarch
*gdbarch
= regcache
->arch ();
847 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
849 fetch_gp_regs (regcache
, tid
);
850 if (tdep
->ppc_fp0_regnum
>= 0)
851 fetch_fp_regs (regcache
, tid
);
852 fetch_register (regcache
, tid
, gdbarch_pc_regnum (gdbarch
));
853 if (tdep
->ppc_ps_regnum
!= -1)
854 fetch_register (regcache
, tid
, tdep
->ppc_ps_regnum
);
855 if (tdep
->ppc_cr_regnum
!= -1)
856 fetch_register (regcache
, tid
, tdep
->ppc_cr_regnum
);
857 if (tdep
->ppc_lr_regnum
!= -1)
858 fetch_register (regcache
, tid
, tdep
->ppc_lr_regnum
);
859 if (tdep
->ppc_ctr_regnum
!= -1)
860 fetch_register (regcache
, tid
, tdep
->ppc_ctr_regnum
);
861 if (tdep
->ppc_xer_regnum
!= -1)
862 fetch_register (regcache
, tid
, tdep
->ppc_xer_regnum
);
863 if (tdep
->ppc_mq_regnum
!= -1)
864 fetch_register (regcache
, tid
, tdep
->ppc_mq_regnum
);
865 if (ppc_linux_trap_reg_p (gdbarch
))
867 fetch_register (regcache
, tid
, PPC_ORIG_R3_REGNUM
);
868 fetch_register (regcache
, tid
, PPC_TRAP_REGNUM
);
870 if (tdep
->ppc_fpscr_regnum
!= -1)
871 fetch_register (regcache
, tid
, tdep
->ppc_fpscr_regnum
);
872 if (have_ptrace_getvrregs
)
873 if (tdep
->ppc_vr0_regnum
!= -1 && tdep
->ppc_vrsave_regnum
!= -1)
874 fetch_altivec_registers (regcache
, tid
, -1);
875 if (have_ptrace_getsetvsxregs
)
876 if (tdep
->ppc_vsr0_upper_regnum
!= -1)
877 fetch_vsx_registers (regcache
, tid
, -1);
878 if (tdep
->ppc_ev0_upper_regnum
>= 0)
879 fetch_spe_register (regcache
, tid
, -1);
880 if (tdep
->ppc_ppr_regnum
!= -1)
881 fetch_regset (regcache
, tid
, NT_PPC_PPR
,
882 PPC_LINUX_SIZEOF_PPRREGSET
,
883 &ppc32_linux_pprregset
);
884 if (tdep
->ppc_dscr_regnum
!= -1)
885 fetch_regset (regcache
, tid
, NT_PPC_DSCR
,
886 PPC_LINUX_SIZEOF_DSCRREGSET
,
887 &ppc32_linux_dscrregset
);
888 if (tdep
->ppc_tar_regnum
!= -1)
889 fetch_regset (regcache
, tid
, NT_PPC_TAR
,
890 PPC_LINUX_SIZEOF_TARREGSET
,
891 &ppc32_linux_tarregset
);
893 fetch_regset (regcache
, tid
, NT_PPC_EBB
,
894 PPC_LINUX_SIZEOF_EBBREGSET
,
895 &ppc32_linux_ebbregset
);
896 if (tdep
->ppc_mmcr0_regnum
!= -1)
897 fetch_regset (regcache
, tid
, NT_PPC_PMU
,
898 PPC_LINUX_SIZEOF_PMUREGSET
,
899 &ppc32_linux_pmuregset
);
902 /* Fetch registers from the child process. Fetch all registers if
903 regno == -1, otherwise fetch all general registers or all floating
904 point registers depending upon the value of regno. */
906 ppc_linux_nat_target::fetch_registers (struct regcache
*regcache
, int regno
)
908 pid_t tid
= get_ptrace_pid (regcache
->ptid ());
911 fetch_ppc_registers (regcache
, tid
);
913 fetch_register (regcache
, tid
, regno
);
917 store_vsx_registers (const struct regcache
*regcache
, int tid
, int regno
)
920 gdb_vsxregset_t regs
;
921 const struct regset
*vsxregset
= ppc_linux_vsxregset ();
923 ret
= ptrace (PTRACE_GETVSXREGS
, tid
, 0, ®s
);
928 have_ptrace_getsetvsxregs
= 0;
931 perror_with_name (_("Unable to fetch VSX registers"));
934 vsxregset
->collect_regset (vsxregset
, regcache
, regno
, ®s
,
935 PPC_LINUX_SIZEOF_VSXREGSET
);
937 ret
= ptrace (PTRACE_SETVSXREGS
, tid
, 0, ®s
);
939 perror_with_name (_("Unable to store VSX registers"));
943 store_altivec_registers (const struct regcache
*regcache
, int tid
,
948 struct gdbarch
*gdbarch
= regcache
->arch ();
949 const struct regset
*vrregset
= ppc_linux_vrregset (gdbarch
);
951 ret
= ptrace (PTRACE_GETVRREGS
, tid
, 0, ®s
);
956 have_ptrace_getvrregs
= 0;
959 perror_with_name (_("Unable to fetch AltiVec registers"));
962 vrregset
->collect_regset (vrregset
, regcache
, regno
, ®s
,
963 PPC_LINUX_SIZEOF_VRREGSET
);
965 ret
= ptrace (PTRACE_SETVRREGS
, tid
, 0, ®s
);
967 perror_with_name (_("Unable to store AltiVec registers"));
970 /* Assuming TID referrs to an SPE process, set the top halves of TID's
971 general-purpose registers and its SPE-specific registers to the
972 values in EVRREGSET. If we don't support PTRACE_SETEVRREGS, do
975 All the logic to deal with whether or not the PTRACE_GETEVRREGS and
976 PTRACE_SETEVRREGS requests are supported is isolated here, and in
977 get_spe_registers. */
979 set_spe_registers (int tid
, struct gdb_evrregset_t
*evrregset
)
981 if (have_ptrace_getsetevrregs
)
983 if (ptrace (PTRACE_SETEVRREGS
, tid
, 0, evrregset
) >= 0)
987 /* EIO means that the PTRACE_SETEVRREGS request isn't
988 supported; we fail silently, and don't try the call
991 have_ptrace_getsetevrregs
= 0;
993 /* Anything else needs to be reported. */
994 perror_with_name (_("Unable to set SPE registers"));
999 /* Write GDB's value for the SPE-specific raw register REGNO to TID.
1000 If REGNO is -1, write the values of all the SPE-specific
1003 store_spe_register (const struct regcache
*regcache
, int tid
, int regno
)
1005 struct gdbarch
*gdbarch
= regcache
->arch ();
1006 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1007 struct gdb_evrregset_t evrregs
;
1009 gdb_assert (sizeof (evrregs
.evr
[0])
1010 == register_size (gdbarch
, tdep
->ppc_ev0_upper_regnum
));
1011 gdb_assert (sizeof (evrregs
.acc
)
1012 == register_size (gdbarch
, tdep
->ppc_acc_regnum
));
1013 gdb_assert (sizeof (evrregs
.spefscr
)
1014 == register_size (gdbarch
, tdep
->ppc_spefscr_regnum
));
1017 /* Since we're going to write out every register, the code below
1018 should store to every field of evrregs; if that doesn't happen,
1019 make it obvious by initializing it with suspicious values. */
1020 memset (&evrregs
, 42, sizeof (evrregs
));
1022 /* We can only read and write the entire EVR register set at a
1023 time, so to write just a single register, we do a
1024 read-modify-write maneuver. */
1025 get_spe_registers (tid
, &evrregs
);
1031 for (i
= 0; i
< ppc_num_gprs
; i
++)
1032 regcache
->raw_collect (tdep
->ppc_ev0_upper_regnum
+ i
,
1035 else if (tdep
->ppc_ev0_upper_regnum
<= regno
1036 && regno
< tdep
->ppc_ev0_upper_regnum
+ ppc_num_gprs
)
1037 regcache
->raw_collect (regno
,
1038 &evrregs
.evr
[regno
- tdep
->ppc_ev0_upper_regnum
]);
1041 || regno
== tdep
->ppc_acc_regnum
)
1042 regcache
->raw_collect (tdep
->ppc_acc_regnum
,
1046 || regno
== tdep
->ppc_spefscr_regnum
)
1047 regcache
->raw_collect (tdep
->ppc_spefscr_regnum
,
1050 /* Write back the modified register set. */
1051 set_spe_registers (tid
, &evrregs
);
1055 store_register (const struct regcache
*regcache
, int tid
, int regno
)
1057 struct gdbarch
*gdbarch
= regcache
->arch ();
1058 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1059 /* This isn't really an address. But ptrace thinks of it as one. */
1060 CORE_ADDR regaddr
= ppc_register_u_addr (gdbarch
, regno
);
1062 size_t bytes_to_transfer
;
1063 gdb_byte buf
[PPC_MAX_REGISTER_SIZE
];
1065 if (altivec_register_p (gdbarch
, regno
))
1067 store_altivec_registers (regcache
, tid
, regno
);
1070 else if (vsx_register_p (gdbarch
, regno
))
1072 store_vsx_registers (regcache
, tid
, regno
);
1075 else if (spe_register_p (gdbarch
, regno
))
1077 store_spe_register (regcache
, tid
, regno
);
1080 else if (regno
== PPC_DSCR_REGNUM
)
1082 gdb_assert (tdep
->ppc_dscr_regnum
!= -1);
1084 store_regset (regcache
, tid
, regno
, NT_PPC_DSCR
,
1085 PPC_LINUX_SIZEOF_DSCRREGSET
,
1086 &ppc32_linux_dscrregset
);
1089 else if (regno
== PPC_PPR_REGNUM
)
1091 gdb_assert (tdep
->ppc_ppr_regnum
!= -1);
1093 store_regset (regcache
, tid
, regno
, NT_PPC_PPR
,
1094 PPC_LINUX_SIZEOF_PPRREGSET
,
1095 &ppc32_linux_pprregset
);
1098 else if (regno
== PPC_TAR_REGNUM
)
1100 gdb_assert (tdep
->ppc_tar_regnum
!= -1);
1102 store_regset (regcache
, tid
, regno
, NT_PPC_TAR
,
1103 PPC_LINUX_SIZEOF_TARREGSET
,
1104 &ppc32_linux_tarregset
);
1107 else if (PPC_IS_EBB_REGNUM (regno
))
1109 gdb_assert (tdep
->have_ebb
);
1111 store_regset (regcache
, tid
, regno
, NT_PPC_EBB
,
1112 PPC_LINUX_SIZEOF_EBBREGSET
,
1113 &ppc32_linux_ebbregset
);
1116 else if (PPC_IS_PMU_REGNUM (regno
))
1118 gdb_assert (tdep
->ppc_mmcr0_regnum
!= -1);
1120 store_regset (regcache
, tid
, regno
, NT_PPC_PMU
,
1121 PPC_LINUX_SIZEOF_PMUREGSET
,
1122 &ppc32_linux_pmuregset
);
1129 /* First collect the register. Keep in mind that the regcache's
1130 idea of the register's size may not be a multiple of sizeof
1132 memset (buf
, 0, sizeof buf
);
1133 bytes_to_transfer
= align_up (register_size (gdbarch
, regno
), sizeof (long));
1134 if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_LITTLE
)
1136 /* Little-endian values always sit at the left end of the buffer. */
1137 regcache
->raw_collect (regno
, buf
);
1139 else if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
)
1141 /* Big-endian values sit at the right end of the buffer. */
1142 size_t padding
= (bytes_to_transfer
- register_size (gdbarch
, regno
));
1143 regcache
->raw_collect (regno
, buf
+ padding
);
1146 for (i
= 0; i
< bytes_to_transfer
; i
+= sizeof (long))
1150 memcpy (&l
, &buf
[i
], sizeof (l
));
1152 ptrace (PTRACE_POKEUSER
, tid
, (PTRACE_TYPE_ARG3
) regaddr
, l
);
1153 regaddr
+= sizeof (long);
1156 && (regno
== tdep
->ppc_fpscr_regnum
1157 || regno
== PPC_ORIG_R3_REGNUM
1158 || regno
== PPC_TRAP_REGNUM
))
1160 /* Some older kernel versions don't allow fpscr, orig_r3
1161 or trap to be written. */
1168 xsnprintf (message
, sizeof (message
), "writing register %s (#%d)",
1169 gdbarch_register_name (gdbarch
, regno
), regno
);
1170 perror_with_name (message
);
1175 /* This function actually issues the request to ptrace, telling
1176 it to store all general-purpose registers present in the specified
1179 If the ptrace request does not exist, this function returns 0
1180 and properly sets the have_ptrace_* flag. If the request fails,
1181 this function calls perror_with_name. Otherwise, if the request
1182 succeeds, then the regcache is stored and 1 is returned. */
1184 store_all_gp_regs (const struct regcache
*regcache
, int tid
, int regno
)
1186 gdb_gregset_t gregset
;
1188 if (ptrace (PTRACE_GETREGS
, tid
, 0, (void *) &gregset
) < 0)
1192 have_ptrace_getsetregs
= 0;
1195 perror_with_name (_("Couldn't get general-purpose registers."));
1198 fill_gregset (regcache
, &gregset
, regno
);
1200 if (ptrace (PTRACE_SETREGS
, tid
, 0, (void *) &gregset
) < 0)
1204 have_ptrace_getsetregs
= 0;
1207 perror_with_name (_("Couldn't set general-purpose registers."));
1213 /* This is a wrapper for the store_all_gp_regs function. It is
1214 responsible for verifying if this target has the ptrace request
1215 that can be used to store all general-purpose registers at one
1216 shot. If it doesn't, then we should store them using the
1217 old-fashioned way, which is to iterate over the registers and
1218 store them one by one. */
1220 store_gp_regs (const struct regcache
*regcache
, int tid
, int regno
)
1222 struct gdbarch
*gdbarch
= regcache
->arch ();
1223 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1226 if (have_ptrace_getsetregs
)
1227 if (store_all_gp_regs (regcache
, tid
, regno
))
1230 /* If we hit this point, it doesn't really matter which
1231 architecture we are using. We just need to store the
1232 registers in the "old-fashioned way". */
1233 for (i
= 0; i
< ppc_num_gprs
; i
++)
1234 store_register (regcache
, tid
, tdep
->ppc_gp0_regnum
+ i
);
1237 /* This function actually issues the request to ptrace, telling
1238 it to store all floating-point registers present in the specified
1241 If the ptrace request does not exist, this function returns 0
1242 and properly sets the have_ptrace_* flag. If the request fails,
1243 this function calls perror_with_name. Otherwise, if the request
1244 succeeds, then the regcache is stored and 1 is returned. */
1246 store_all_fp_regs (const struct regcache
*regcache
, int tid
, int regno
)
1248 gdb_fpregset_t fpregs
;
1250 if (ptrace (PTRACE_GETFPREGS
, tid
, 0, (void *) &fpregs
) < 0)
1254 have_ptrace_getsetfpregs
= 0;
1257 perror_with_name (_("Couldn't get floating-point registers."));
1260 fill_fpregset (regcache
, &fpregs
, regno
);
1262 if (ptrace (PTRACE_SETFPREGS
, tid
, 0, (void *) &fpregs
) < 0)
1266 have_ptrace_getsetfpregs
= 0;
1269 perror_with_name (_("Couldn't set floating-point registers."));
1275 /* This is a wrapper for the store_all_fp_regs function. It is
1276 responsible for verifying if this target has the ptrace request
1277 that can be used to store all floating-point registers at one
1278 shot. If it doesn't, then we should store them using the
1279 old-fashioned way, which is to iterate over the registers and
1280 store them one by one. */
1282 store_fp_regs (const struct regcache
*regcache
, int tid
, int regno
)
1284 struct gdbarch
*gdbarch
= regcache
->arch ();
1285 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1288 if (have_ptrace_getsetfpregs
)
1289 if (store_all_fp_regs (regcache
, tid
, regno
))
1292 /* If we hit this point, it doesn't really matter which
1293 architecture we are using. We just need to store the
1294 registers in the "old-fashioned way". */
1295 for (i
= 0; i
< ppc_num_fprs
; i
++)
1296 store_register (regcache
, tid
, tdep
->ppc_fp0_regnum
+ i
);
1300 store_ppc_registers (const struct regcache
*regcache
, int tid
)
1302 struct gdbarch
*gdbarch
= regcache
->arch ();
1303 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1305 store_gp_regs (regcache
, tid
, -1);
1306 if (tdep
->ppc_fp0_regnum
>= 0)
1307 store_fp_regs (regcache
, tid
, -1);
1308 store_register (regcache
, tid
, gdbarch_pc_regnum (gdbarch
));
1309 if (tdep
->ppc_ps_regnum
!= -1)
1310 store_register (regcache
, tid
, tdep
->ppc_ps_regnum
);
1311 if (tdep
->ppc_cr_regnum
!= -1)
1312 store_register (regcache
, tid
, tdep
->ppc_cr_regnum
);
1313 if (tdep
->ppc_lr_regnum
!= -1)
1314 store_register (regcache
, tid
, tdep
->ppc_lr_regnum
);
1315 if (tdep
->ppc_ctr_regnum
!= -1)
1316 store_register (regcache
, tid
, tdep
->ppc_ctr_regnum
);
1317 if (tdep
->ppc_xer_regnum
!= -1)
1318 store_register (regcache
, tid
, tdep
->ppc_xer_regnum
);
1319 if (tdep
->ppc_mq_regnum
!= -1)
1320 store_register (regcache
, tid
, tdep
->ppc_mq_regnum
);
1321 if (tdep
->ppc_fpscr_regnum
!= -1)
1322 store_register (regcache
, tid
, tdep
->ppc_fpscr_regnum
);
1323 if (ppc_linux_trap_reg_p (gdbarch
))
1325 store_register (regcache
, tid
, PPC_ORIG_R3_REGNUM
);
1326 store_register (regcache
, tid
, PPC_TRAP_REGNUM
);
1328 if (have_ptrace_getvrregs
)
1329 if (tdep
->ppc_vr0_regnum
!= -1 && tdep
->ppc_vrsave_regnum
!= -1)
1330 store_altivec_registers (regcache
, tid
, -1);
1331 if (have_ptrace_getsetvsxregs
)
1332 if (tdep
->ppc_vsr0_upper_regnum
!= -1)
1333 store_vsx_registers (regcache
, tid
, -1);
1334 if (tdep
->ppc_ev0_upper_regnum
>= 0)
1335 store_spe_register (regcache
, tid
, -1);
1336 if (tdep
->ppc_ppr_regnum
!= -1)
1337 store_regset (regcache
, tid
, -1, NT_PPC_PPR
,
1338 PPC_LINUX_SIZEOF_PPRREGSET
,
1339 &ppc32_linux_pprregset
);
1340 if (tdep
->ppc_dscr_regnum
!= -1)
1341 store_regset (regcache
, tid
, -1, NT_PPC_DSCR
,
1342 PPC_LINUX_SIZEOF_DSCRREGSET
,
1343 &ppc32_linux_dscrregset
);
1344 if (tdep
->ppc_tar_regnum
!= -1)
1345 store_regset (regcache
, tid
, -1, NT_PPC_TAR
,
1346 PPC_LINUX_SIZEOF_TARREGSET
,
1347 &ppc32_linux_tarregset
);
1349 if (tdep
->ppc_mmcr0_regnum
!= -1)
1350 store_regset (regcache
, tid
, -1, NT_PPC_PMU
,
1351 PPC_LINUX_SIZEOF_PMUREGSET
,
1352 &ppc32_linux_pmuregset
);
1354 /* Because the EBB registers can be unavailable, attempts to store
1355 them here would cause this function to fail most of the time, so
1359 /* Fetch the AT_HWCAP entry from the aux vector. */
1361 ppc_linux_get_hwcap (void)
1365 if (target_auxv_search (current_top_target (), AT_HWCAP
, &field
) != 1)
1371 /* Fetch the AT_HWCAP2 entry from the aux vector. */
1374 ppc_linux_get_hwcap2 (void)
1378 if (target_auxv_search (current_top_target (), AT_HWCAP2
, &field
) != 1)
1384 /* The cached DABR value, to install in new threads.
1385 This variable is used when the PowerPC HWDEBUG ptrace
1386 interface is not available. */
1387 static long saved_dabr_value
;
1389 /* Global structure that will store information about the available
1390 features provided by the PowerPC HWDEBUG ptrace interface. */
1391 static struct ppc_debug_info hwdebug_info
;
1393 /* Global variable that holds the maximum number of slots that the
1394 kernel will use. This is only used when PowerPC HWDEBUG ptrace interface
1396 static size_t max_slots_number
= 0;
1398 struct hw_break_tuple
1401 struct ppc_hw_breakpoint
*hw_break
;
1404 /* This is an internal VEC created to store information about *points inserted
1405 for each thread. This is used when PowerPC HWDEBUG ptrace interface is
1407 typedef struct thread_points
1409 /* The TID to which this *point relates. */
1411 /* Information about the *point, such as its address, type, etc.
1413 Each element inside this vector corresponds to a hardware
1414 breakpoint or watchpoint in the thread represented by TID. The maximum
1415 size of these vector is MAX_SLOTS_NUMBER. If the hw_break element of
1416 the tuple is NULL, then the position in the vector is free. */
1417 struct hw_break_tuple
*hw_breaks
;
1419 DEF_VEC_P (thread_points_p
);
1421 VEC(thread_points_p
) *ppc_threads
= NULL
;
1423 /* The version of the PowerPC HWDEBUG kernel interface that we will use, if
1425 #define PPC_DEBUG_CURRENT_VERSION 1
1427 /* Returns non-zero if we support the PowerPC HWDEBUG ptrace interface. */
1429 have_ptrace_hwdebug_interface (void)
1431 static int have_ptrace_hwdebug_interface
= -1;
1433 if (have_ptrace_hwdebug_interface
== -1)
1437 tid
= inferior_ptid
.lwp ();
1439 tid
= inferior_ptid
.pid ();
1441 /* Check for kernel support for PowerPC HWDEBUG ptrace interface. */
1442 if (ptrace (PPC_PTRACE_GETHWDBGINFO
, tid
, 0, &hwdebug_info
) >= 0)
1444 /* Check whether PowerPC HWDEBUG ptrace interface is functional and
1445 provides any supported feature. */
1446 if (hwdebug_info
.features
!= 0)
1448 have_ptrace_hwdebug_interface
= 1;
1449 max_slots_number
= hwdebug_info
.num_instruction_bps
1450 + hwdebug_info
.num_data_bps
1451 + hwdebug_info
.num_condition_regs
;
1452 return have_ptrace_hwdebug_interface
;
1455 /* Old school interface and no PowerPC HWDEBUG ptrace support. */
1456 have_ptrace_hwdebug_interface
= 0;
1457 memset (&hwdebug_info
, 0, sizeof (struct ppc_debug_info
));
1460 return have_ptrace_hwdebug_interface
;
1464 ppc_linux_nat_target::can_use_hw_breakpoint (enum bptype type
, int cnt
, int ot
)
1466 int total_hw_wp
, total_hw_bp
;
1468 if (have_ptrace_hwdebug_interface ())
1470 /* When PowerPC HWDEBUG ptrace interface is available, the number of
1471 available hardware watchpoints and breakpoints is stored at the
1472 hwdebug_info struct. */
1473 total_hw_bp
= hwdebug_info
.num_instruction_bps
;
1474 total_hw_wp
= hwdebug_info
.num_data_bps
;
1478 /* When we do not have PowerPC HWDEBUG ptrace interface, we should
1479 consider having 1 hardware watchpoint and no hardware breakpoints. */
1484 if (type
== bp_hardware_watchpoint
|| type
== bp_read_watchpoint
1485 || type
== bp_access_watchpoint
|| type
== bp_watchpoint
)
1487 if (cnt
+ ot
> total_hw_wp
)
1490 else if (type
== bp_hardware_breakpoint
)
1492 if (total_hw_bp
== 0)
1494 /* No hardware breakpoint support. */
1497 if (cnt
> total_hw_bp
)
1501 if (!have_ptrace_hwdebug_interface ())
1504 ptid_t ptid
= inferior_ptid
;
1506 /* We need to know whether ptrace supports PTRACE_SET_DEBUGREG
1507 and whether the target has DABR. If either answer is no, the
1508 ptrace call will return -1. Fail in that case. */
1513 if (ptrace (PTRACE_SET_DEBUGREG
, tid
, 0, 0) == -1)
1521 ppc_linux_nat_target::region_ok_for_hw_watchpoint (CORE_ADDR addr
, int len
)
1523 /* Handle sub-8-byte quantities. */
1527 /* The PowerPC HWDEBUG ptrace interface tells if there are alignment
1528 restrictions for watchpoints in the processors. In that case, we use that
1529 information to determine the hardcoded watchable region for
1531 if (have_ptrace_hwdebug_interface ())
1534 /* Embedded DAC-based processors, like the PowerPC 440 have ranged
1535 watchpoints and can watch any access within an arbitrary memory
1536 region. This is useful to watch arrays and structs, for instance. It
1537 takes two hardware watchpoints though. */
1539 && hwdebug_info
.features
& PPC_DEBUG_FEATURE_DATA_BP_RANGE
1540 && ppc_linux_get_hwcap () & PPC_FEATURE_BOOKE
)
1542 /* Check if the processor provides DAWR interface. */
1543 if (hwdebug_info
.features
& PPC_DEBUG_FEATURE_DATA_BP_DAWR
)
1544 /* DAWR interface allows to watch up to 512 byte wide ranges which
1545 can't cross a 512 byte boundary. */
1548 region_size
= hwdebug_info
.data_bp_alignment
;
1549 /* Server processors provide one hardware watchpoint and addr+len should
1550 fall in the watchable region provided by the ptrace interface. */
1552 && (addr
+ len
> (addr
& ~(region_size
- 1)) + region_size
))
1555 /* addr+len must fall in the 8 byte watchable region for DABR-based
1556 processors (i.e., server processors). Without the new PowerPC HWDEBUG
1557 ptrace interface, DAC-based processors (i.e., embedded processors) will
1558 use addresses aligned to 4-bytes due to the way the read/write flags are
1559 passed in the old ptrace interface. */
1560 else if (((ppc_linux_get_hwcap () & PPC_FEATURE_BOOKE
)
1561 && (addr
+ len
) > (addr
& ~3) + 4)
1562 || (addr
+ len
) > (addr
& ~7) + 8)
1568 /* This function compares two ppc_hw_breakpoint structs field-by-field. */
1570 hwdebug_point_cmp (struct ppc_hw_breakpoint
*a
, struct ppc_hw_breakpoint
*b
)
1572 return (a
->trigger_type
== b
->trigger_type
1573 && a
->addr_mode
== b
->addr_mode
1574 && a
->condition_mode
== b
->condition_mode
1575 && a
->addr
== b
->addr
1576 && a
->addr2
== b
->addr2
1577 && a
->condition_value
== b
->condition_value
);
1580 /* This function can be used to retrieve a thread_points by the TID of the
1581 related process/thread. If nothing has been found, and ALLOC_NEW is 0,
1582 it returns NULL. If ALLOC_NEW is non-zero, a new thread_points for the
1583 provided TID will be created and returned. */
1584 static struct thread_points
*
1585 hwdebug_find_thread_points_by_tid (int tid
, int alloc_new
)
1588 struct thread_points
*t
;
1590 for (i
= 0; VEC_iterate (thread_points_p
, ppc_threads
, i
, t
); i
++)
1596 /* Do we need to allocate a new point_item
1597 if the wanted one does not exist? */
1600 t
= XNEW (struct thread_points
);
1601 t
->hw_breaks
= XCNEWVEC (struct hw_break_tuple
, max_slots_number
);
1603 VEC_safe_push (thread_points_p
, ppc_threads
, t
);
1609 /* This function is a generic wrapper that is responsible for inserting a
1610 *point (i.e., calling `ptrace' in order to issue the request to the
1611 kernel) and registering it internally in GDB. */
1613 hwdebug_insert_point (struct ppc_hw_breakpoint
*b
, int tid
)
1617 gdb::unique_xmalloc_ptr
<ppc_hw_breakpoint
> p (XDUP (ppc_hw_breakpoint
, b
));
1618 struct hw_break_tuple
*hw_breaks
;
1619 struct thread_points
*t
;
1622 slot
= ptrace (PPC_PTRACE_SETHWDEBUG
, tid
, 0, p
.get ());
1624 perror_with_name (_("Unexpected error setting breakpoint or watchpoint"));
1626 /* Everything went fine, so we have to register this *point. */
1627 t
= hwdebug_find_thread_points_by_tid (tid
, 1);
1628 gdb_assert (t
!= NULL
);
1629 hw_breaks
= t
->hw_breaks
;
1631 /* Find a free element in the hw_breaks vector. */
1632 for (i
= 0; i
< max_slots_number
; i
++)
1633 if (hw_breaks
[i
].hw_break
== NULL
)
1635 hw_breaks
[i
].slot
= slot
;
1636 hw_breaks
[i
].hw_break
= p
.release ();
1640 gdb_assert (i
!= max_slots_number
);
1643 /* This function is a generic wrapper that is responsible for removing a
1644 *point (i.e., calling `ptrace' in order to issue the request to the
1645 kernel), and unregistering it internally at GDB. */
1647 hwdebug_remove_point (struct ppc_hw_breakpoint
*b
, int tid
)
1650 struct hw_break_tuple
*hw_breaks
;
1651 struct thread_points
*t
;
1653 t
= hwdebug_find_thread_points_by_tid (tid
, 0);
1654 gdb_assert (t
!= NULL
);
1655 hw_breaks
= t
->hw_breaks
;
1657 for (i
= 0; i
< max_slots_number
; i
++)
1658 if (hw_breaks
[i
].hw_break
&& hwdebug_point_cmp (hw_breaks
[i
].hw_break
, b
))
1661 gdb_assert (i
!= max_slots_number
);
1663 /* We have to ignore ENOENT errors because the kernel implements hardware
1664 breakpoints/watchpoints as "one-shot", that is, they are automatically
1665 deleted when hit. */
1667 if (ptrace (PPC_PTRACE_DELHWDEBUG
, tid
, 0, hw_breaks
[i
].slot
) < 0)
1668 if (errno
!= ENOENT
)
1669 perror_with_name (_("Unexpected error deleting "
1670 "breakpoint or watchpoint"));
1672 xfree (hw_breaks
[i
].hw_break
);
1673 hw_breaks
[i
].hw_break
= NULL
;
1676 /* Return the number of registers needed for a ranged breakpoint. */
1679 ppc_linux_nat_target::ranged_break_num_registers ()
1681 return ((have_ptrace_hwdebug_interface ()
1682 && hwdebug_info
.features
& PPC_DEBUG_FEATURE_INSN_BP_RANGE
)?
1686 /* Insert the hardware breakpoint described by BP_TGT. Returns 0 for
1687 success, 1 if hardware breakpoints are not supported or -1 for failure. */
1690 ppc_linux_nat_target::insert_hw_breakpoint (struct gdbarch
*gdbarch
,
1691 struct bp_target_info
*bp_tgt
)
1693 struct lwp_info
*lp
;
1694 struct ppc_hw_breakpoint p
;
1696 if (!have_ptrace_hwdebug_interface ())
1699 p
.version
= PPC_DEBUG_CURRENT_VERSION
;
1700 p
.trigger_type
= PPC_BREAKPOINT_TRIGGER_EXECUTE
;
1701 p
.condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
1702 p
.addr
= (uint64_t) (bp_tgt
->placed_address
= bp_tgt
->reqstd_address
);
1703 p
.condition_value
= 0;
1707 p
.addr_mode
= PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE
;
1709 /* The breakpoint will trigger if the address of the instruction is
1710 within the defined range, as follows: p.addr <= address < p.addr2. */
1711 p
.addr2
= (uint64_t) bp_tgt
->placed_address
+ bp_tgt
->length
;
1715 p
.addr_mode
= PPC_BREAKPOINT_MODE_EXACT
;
1720 hwdebug_insert_point (&p
, lp
->ptid
.lwp ());
1726 ppc_linux_nat_target::remove_hw_breakpoint (struct gdbarch
*gdbarch
,
1727 struct bp_target_info
*bp_tgt
)
1729 struct lwp_info
*lp
;
1730 struct ppc_hw_breakpoint p
;
1732 if (!have_ptrace_hwdebug_interface ())
1735 p
.version
= PPC_DEBUG_CURRENT_VERSION
;
1736 p
.trigger_type
= PPC_BREAKPOINT_TRIGGER_EXECUTE
;
1737 p
.condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
1738 p
.addr
= (uint64_t) bp_tgt
->placed_address
;
1739 p
.condition_value
= 0;
1743 p
.addr_mode
= PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE
;
1745 /* The breakpoint will trigger if the address of the instruction is within
1746 the defined range, as follows: p.addr <= address < p.addr2. */
1747 p
.addr2
= (uint64_t) bp_tgt
->placed_address
+ bp_tgt
->length
;
1751 p
.addr_mode
= PPC_BREAKPOINT_MODE_EXACT
;
1756 hwdebug_remove_point (&p
, lp
->ptid
.lwp ());
1762 get_trigger_type (enum target_hw_bp_type type
)
1766 if (type
== hw_read
)
1767 t
= PPC_BREAKPOINT_TRIGGER_READ
;
1768 else if (type
== hw_write
)
1769 t
= PPC_BREAKPOINT_TRIGGER_WRITE
;
1771 t
= PPC_BREAKPOINT_TRIGGER_READ
| PPC_BREAKPOINT_TRIGGER_WRITE
;
1776 /* Insert a new masked watchpoint at ADDR using the mask MASK.
1777 RW may be hw_read for a read watchpoint, hw_write for a write watchpoint
1778 or hw_access for an access watchpoint. Returns 0 on success and throws
1779 an error on failure. */
1782 ppc_linux_nat_target::insert_mask_watchpoint (CORE_ADDR addr
, CORE_ADDR mask
,
1783 target_hw_bp_type rw
)
1785 struct lwp_info
*lp
;
1786 struct ppc_hw_breakpoint p
;
1788 gdb_assert (have_ptrace_hwdebug_interface ());
1790 p
.version
= PPC_DEBUG_CURRENT_VERSION
;
1791 p
.trigger_type
= get_trigger_type (rw
);
1792 p
.addr_mode
= PPC_BREAKPOINT_MODE_MASK
;
1793 p
.condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
1796 p
.condition_value
= 0;
1799 hwdebug_insert_point (&p
, lp
->ptid
.lwp ());
1804 /* Remove a masked watchpoint at ADDR with the mask MASK.
1805 RW may be hw_read for a read watchpoint, hw_write for a write watchpoint
1806 or hw_access for an access watchpoint. Returns 0 on success and throws
1807 an error on failure. */
1810 ppc_linux_nat_target::remove_mask_watchpoint (CORE_ADDR addr
, CORE_ADDR mask
,
1811 target_hw_bp_type rw
)
1813 struct lwp_info
*lp
;
1814 struct ppc_hw_breakpoint p
;
1816 gdb_assert (have_ptrace_hwdebug_interface ());
1818 p
.version
= PPC_DEBUG_CURRENT_VERSION
;
1819 p
.trigger_type
= get_trigger_type (rw
);
1820 p
.addr_mode
= PPC_BREAKPOINT_MODE_MASK
;
1821 p
.condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
1824 p
.condition_value
= 0;
1827 hwdebug_remove_point (&p
, lp
->ptid
.lwp ());
1832 /* Check whether we have at least one free DVC register. */
1834 can_use_watchpoint_cond_accel (void)
1836 struct thread_points
*p
;
1837 int tid
= inferior_ptid
.lwp ();
1838 int cnt
= hwdebug_info
.num_condition_regs
, i
;
1840 if (!have_ptrace_hwdebug_interface () || cnt
== 0)
1843 p
= hwdebug_find_thread_points_by_tid (tid
, 0);
1847 for (i
= 0; i
< max_slots_number
; i
++)
1848 if (p
->hw_breaks
[i
].hw_break
!= NULL
1849 && (p
->hw_breaks
[i
].hw_break
->condition_mode
1850 != PPC_BREAKPOINT_CONDITION_NONE
))
1853 /* There are no available slots now. */
1861 /* Calculate the enable bits and the contents of the Data Value Compare
1862 debug register present in BookE processors.
1864 ADDR is the address to be watched, LEN is the length of watched data
1865 and DATA_VALUE is the value which will trigger the watchpoint.
1866 On exit, CONDITION_MODE will hold the enable bits for the DVC, and
1867 CONDITION_VALUE will hold the value which should be put in the
1870 calculate_dvc (CORE_ADDR addr
, int len
, CORE_ADDR data_value
,
1871 uint32_t *condition_mode
, uint64_t *condition_value
)
1873 int i
, num_byte_enable
, align_offset
, num_bytes_off_dvc
,
1874 rightmost_enabled_byte
;
1875 CORE_ADDR addr_end_data
, addr_end_dvc
;
1877 /* The DVC register compares bytes within fixed-length windows which
1878 are word-aligned, with length equal to that of the DVC register.
1879 We need to calculate where our watch region is relative to that
1880 window and enable comparison of the bytes which fall within it. */
1882 align_offset
= addr
% hwdebug_info
.sizeof_condition
;
1883 addr_end_data
= addr
+ len
;
1884 addr_end_dvc
= (addr
- align_offset
1885 + hwdebug_info
.sizeof_condition
);
1886 num_bytes_off_dvc
= (addr_end_data
> addr_end_dvc
)?
1887 addr_end_data
- addr_end_dvc
: 0;
1888 num_byte_enable
= len
- num_bytes_off_dvc
;
1889 /* Here, bytes are numbered from right to left. */
1890 rightmost_enabled_byte
= (addr_end_data
< addr_end_dvc
)?
1891 addr_end_dvc
- addr_end_data
: 0;
1893 *condition_mode
= PPC_BREAKPOINT_CONDITION_AND
;
1894 for (i
= 0; i
< num_byte_enable
; i
++)
1896 |= PPC_BREAKPOINT_CONDITION_BE (i
+ rightmost_enabled_byte
);
1898 /* Now we need to match the position within the DVC of the comparison
1899 value with where the watch region is relative to the window
1900 (i.e., the ALIGN_OFFSET). */
1902 *condition_value
= ((uint64_t) data_value
>> num_bytes_off_dvc
* 8
1903 << rightmost_enabled_byte
* 8);
1906 /* Return the number of memory locations that need to be accessed to
1907 evaluate the expression which generated the given value chain.
1908 Returns -1 if there's any register access involved, or if there are
1909 other kinds of values which are not acceptable in a condition
1910 expression (e.g., lval_computed or lval_internalvar). */
1912 num_memory_accesses (const std::vector
<value_ref_ptr
> &chain
)
1914 int found_memory_cnt
= 0;
1916 /* The idea here is that evaluating an expression generates a series
1917 of values, one holding the value of every subexpression. (The
1918 expression a*b+c has five subexpressions: a, b, a*b, c, and
1919 a*b+c.) GDB's values hold almost enough information to establish
1920 the criteria given above --- they identify memory lvalues,
1921 register lvalues, computed values, etcetera. So we can evaluate
1922 the expression, and then scan the chain of values that leaves
1923 behind to determine the memory locations involved in the evaluation
1926 However, I don't think that the values returned by inferior
1927 function calls are special in any way. So this function may not
1928 notice that an expression contains an inferior function call.
1931 for (const value_ref_ptr
&iter
: chain
)
1933 struct value
*v
= iter
.get ();
1935 /* Constants and values from the history are fine. */
1936 if (VALUE_LVAL (v
) == not_lval
|| deprecated_value_modifiable (v
) == 0)
1938 else if (VALUE_LVAL (v
) == lval_memory
)
1940 /* A lazy memory lvalue is one that GDB never needed to fetch;
1941 we either just used its address (e.g., `a' in `a.b') or
1942 we never needed it at all (e.g., `a' in `a,b'). */
1943 if (!value_lazy (v
))
1946 /* Other kinds of values are not fine. */
1951 return found_memory_cnt
;
1954 /* Verifies whether the expression COND can be implemented using the
1955 DVC (Data Value Compare) register in BookE processors. The expression
1956 must test the watch value for equality with a constant expression.
1957 If the function returns 1, DATA_VALUE will contain the constant against
1958 which the watch value should be compared and LEN will contain the size
1961 check_condition (CORE_ADDR watch_addr
, struct expression
*cond
,
1962 CORE_ADDR
*data_value
, int *len
)
1964 int pc
= 1, num_accesses_left
, num_accesses_right
;
1965 struct value
*left_val
, *right_val
;
1966 std::vector
<value_ref_ptr
> left_chain
, right_chain
;
1968 if (cond
->elts
[0].opcode
!= BINOP_EQUAL
)
1971 fetch_subexp_value (cond
, &pc
, &left_val
, NULL
, &left_chain
, 0);
1972 num_accesses_left
= num_memory_accesses (left_chain
);
1974 if (left_val
== NULL
|| num_accesses_left
< 0)
1977 fetch_subexp_value (cond
, &pc
, &right_val
, NULL
, &right_chain
, 0);
1978 num_accesses_right
= num_memory_accesses (right_chain
);
1980 if (right_val
== NULL
|| num_accesses_right
< 0)
1983 if (num_accesses_left
== 1 && num_accesses_right
== 0
1984 && VALUE_LVAL (left_val
) == lval_memory
1985 && value_address (left_val
) == watch_addr
)
1987 *data_value
= value_as_long (right_val
);
1989 /* DATA_VALUE is the constant in RIGHT_VAL, but actually has
1990 the same type as the memory region referenced by LEFT_VAL. */
1991 *len
= TYPE_LENGTH (check_typedef (value_type (left_val
)));
1993 else if (num_accesses_left
== 0 && num_accesses_right
== 1
1994 && VALUE_LVAL (right_val
) == lval_memory
1995 && value_address (right_val
) == watch_addr
)
1997 *data_value
= value_as_long (left_val
);
1999 /* DATA_VALUE is the constant in LEFT_VAL, but actually has
2000 the same type as the memory region referenced by RIGHT_VAL. */
2001 *len
= TYPE_LENGTH (check_typedef (value_type (right_val
)));
2009 /* Return non-zero if the target is capable of using hardware to evaluate
2010 the condition expression, thus only triggering the watchpoint when it is
2013 ppc_linux_nat_target::can_accel_watchpoint_condition (CORE_ADDR addr
, int len
,
2015 struct expression
*cond
)
2017 CORE_ADDR data_value
;
2019 return (have_ptrace_hwdebug_interface ()
2020 && hwdebug_info
.num_condition_regs
> 0
2021 && check_condition (addr
, cond
, &data_value
, &len
));
2024 /* Set up P with the parameters necessary to request a watchpoint covering
2025 LEN bytes starting at ADDR and if possible with condition expression COND
2026 evaluated by hardware. INSERT tells if we are creating a request for
2027 inserting or removing the watchpoint. */
2030 create_watchpoint_request (struct ppc_hw_breakpoint
*p
, CORE_ADDR addr
,
2031 int len
, enum target_hw_bp_type type
,
2032 struct expression
*cond
, int insert
)
2035 || !(hwdebug_info
.features
& PPC_DEBUG_FEATURE_DATA_BP_RANGE
))
2038 CORE_ADDR data_value
;
2040 use_condition
= (insert
? can_use_watchpoint_cond_accel ()
2041 : hwdebug_info
.num_condition_regs
> 0);
2042 if (cond
&& use_condition
&& check_condition (addr
, cond
,
2044 calculate_dvc (addr
, len
, data_value
, &p
->condition_mode
,
2045 &p
->condition_value
);
2048 p
->condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
2049 p
->condition_value
= 0;
2052 p
->addr_mode
= PPC_BREAKPOINT_MODE_EXACT
;
2057 p
->addr_mode
= PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE
;
2058 p
->condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
2059 p
->condition_value
= 0;
2061 /* The watchpoint will trigger if the address of the memory access is
2062 within the defined range, as follows: p->addr <= address < p->addr2.
2064 Note that the above sentence just documents how ptrace interprets
2065 its arguments; the watchpoint is set to watch the range defined by
2066 the user _inclusively_, as specified by the user interface. */
2067 p
->addr2
= (uint64_t) addr
+ len
;
2070 p
->version
= PPC_DEBUG_CURRENT_VERSION
;
2071 p
->trigger_type
= get_trigger_type (type
);
2072 p
->addr
= (uint64_t) addr
;
2076 ppc_linux_nat_target::insert_watchpoint (CORE_ADDR addr
, int len
,
2077 enum target_hw_bp_type type
,
2078 struct expression
*cond
)
2080 struct lwp_info
*lp
;
2083 if (have_ptrace_hwdebug_interface ())
2085 struct ppc_hw_breakpoint p
;
2087 create_watchpoint_request (&p
, addr
, len
, type
, cond
, 1);
2090 hwdebug_insert_point (&p
, lp
->ptid
.lwp ());
2097 long read_mode
, write_mode
;
2099 if (ppc_linux_get_hwcap () & PPC_FEATURE_BOOKE
)
2101 /* PowerPC 440 requires only the read/write flags to be passed
2108 /* PowerPC 970 and other DABR-based processors are required to pass
2109 the Breakpoint Translation bit together with the flags. */
2114 dabr_value
= addr
& ~(read_mode
| write_mode
);
2118 /* Set read and translate bits. */
2119 dabr_value
|= read_mode
;
2122 /* Set write and translate bits. */
2123 dabr_value
|= write_mode
;
2126 /* Set read, write and translate bits. */
2127 dabr_value
|= read_mode
| write_mode
;
2131 saved_dabr_value
= dabr_value
;
2134 if (ptrace (PTRACE_SET_DEBUGREG
, lp
->ptid
.lwp (), 0,
2135 saved_dabr_value
) < 0)
2145 ppc_linux_nat_target::remove_watchpoint (CORE_ADDR addr
, int len
,
2146 enum target_hw_bp_type type
,
2147 struct expression
*cond
)
2149 struct lwp_info
*lp
;
2152 if (have_ptrace_hwdebug_interface ())
2154 struct ppc_hw_breakpoint p
;
2156 create_watchpoint_request (&p
, addr
, len
, type
, cond
, 0);
2159 hwdebug_remove_point (&p
, lp
->ptid
.lwp ());
2165 saved_dabr_value
= 0;
2167 if (ptrace (PTRACE_SET_DEBUGREG
, lp
->ptid
.lwp (), 0,
2168 saved_dabr_value
) < 0)
2178 ppc_linux_nat_target::low_new_thread (struct lwp_info
*lp
)
2180 int tid
= lp
->ptid
.lwp ();
2182 if (have_ptrace_hwdebug_interface ())
2185 struct thread_points
*p
;
2186 struct hw_break_tuple
*hw_breaks
;
2188 if (VEC_empty (thread_points_p
, ppc_threads
))
2191 /* Get a list of breakpoints from any thread. */
2192 p
= VEC_last (thread_points_p
, ppc_threads
);
2193 hw_breaks
= p
->hw_breaks
;
2195 /* Copy that thread's breakpoints and watchpoints to the new thread. */
2196 for (i
= 0; i
< max_slots_number
; i
++)
2197 if (hw_breaks
[i
].hw_break
)
2199 /* Older kernels did not make new threads inherit their parent
2200 thread's debug state, so we always clear the slot and replicate
2201 the debug state ourselves, ensuring compatibility with all
2204 /* The ppc debug resource accounting is done through "slots".
2205 Ask the kernel the deallocate this specific *point's slot. */
2206 ptrace (PPC_PTRACE_DELHWDEBUG
, tid
, 0, hw_breaks
[i
].slot
);
2208 hwdebug_insert_point (hw_breaks
[i
].hw_break
, tid
);
2212 ptrace (PTRACE_SET_DEBUGREG
, tid
, 0, saved_dabr_value
);
2216 ppc_linux_thread_exit (struct thread_info
*tp
, int silent
)
2219 int tid
= tp
->ptid
.lwp ();
2220 struct hw_break_tuple
*hw_breaks
;
2221 struct thread_points
*t
= NULL
, *p
;
2223 if (!have_ptrace_hwdebug_interface ())
2226 for (i
= 0; VEC_iterate (thread_points_p
, ppc_threads
, i
, p
); i
++)
2236 VEC_unordered_remove (thread_points_p
, ppc_threads
, i
);
2238 hw_breaks
= t
->hw_breaks
;
2240 for (i
= 0; i
< max_slots_number
; i
++)
2241 if (hw_breaks
[i
].hw_break
)
2242 xfree (hw_breaks
[i
].hw_break
);
2244 xfree (t
->hw_breaks
);
2249 ppc_linux_nat_target::stopped_data_address (CORE_ADDR
*addr_p
)
2253 if (!linux_nat_get_siginfo (inferior_ptid
, &siginfo
))
2256 if (siginfo
.si_signo
!= SIGTRAP
2257 || (siginfo
.si_code
& 0xffff) != 0x0004 /* TRAP_HWBKPT */)
2260 if (have_ptrace_hwdebug_interface ())
2263 struct thread_points
*t
;
2264 struct hw_break_tuple
*hw_breaks
;
2265 /* The index (or slot) of the *point is passed in the si_errno field. */
2266 int slot
= siginfo
.si_errno
;
2268 t
= hwdebug_find_thread_points_by_tid (inferior_ptid
.lwp (), 0);
2270 /* Find out if this *point is a hardware breakpoint.
2271 If so, we should return 0. */
2274 hw_breaks
= t
->hw_breaks
;
2275 for (i
= 0; i
< max_slots_number
; i
++)
2276 if (hw_breaks
[i
].hw_break
&& hw_breaks
[i
].slot
== slot
2277 && hw_breaks
[i
].hw_break
->trigger_type
2278 == PPC_BREAKPOINT_TRIGGER_EXECUTE
)
2283 *addr_p
= (CORE_ADDR
) (uintptr_t) siginfo
.si_addr
;
2288 ppc_linux_nat_target::stopped_by_watchpoint ()
2291 return stopped_data_address (&addr
);
2295 ppc_linux_nat_target::watchpoint_addr_within_range (CORE_ADDR addr
,
2301 if (have_ptrace_hwdebug_interface ()
2302 && ppc_linux_get_hwcap () & PPC_FEATURE_BOOKE
)
2303 return start
<= addr
&& start
+ length
>= addr
;
2304 else if (ppc_linux_get_hwcap () & PPC_FEATURE_BOOKE
)
2311 /* Check whether [start, start+length-1] intersects [addr, addr+mask]. */
2312 return start
<= addr
+ mask
&& start
+ length
- 1 >= addr
;
2315 /* Return the number of registers needed for a masked hardware watchpoint. */
2318 ppc_linux_nat_target::masked_watch_num_registers (CORE_ADDR addr
, CORE_ADDR mask
)
2320 if (!have_ptrace_hwdebug_interface ()
2321 || (hwdebug_info
.features
& PPC_DEBUG_FEATURE_DATA_BP_MASK
) == 0)
2323 else if ((mask
& 0xC0000000) != 0xC0000000)
2325 warning (_("The given mask covers kernel address space "
2326 "and cannot be used.\n"));
2335 ppc_linux_nat_target::store_registers (struct regcache
*regcache
, int regno
)
2337 pid_t tid
= get_ptrace_pid (regcache
->ptid ());
2340 store_register (regcache
, tid
, regno
);
2342 store_ppc_registers (regcache
, tid
);
2345 /* Functions for transferring registers between a gregset_t or fpregset_t
2346 (see sys/ucontext.h) and gdb's regcache. The word size is that used
2347 by the ptrace interface, not the current program's ABI. Eg. if a
2348 powerpc64-linux gdb is being used to debug a powerpc32-linux app, we
2349 read or write 64-bit gregsets. This is to suit the host libthread_db. */
2352 supply_gregset (struct regcache
*regcache
, const gdb_gregset_t
*gregsetp
)
2354 const struct regset
*regset
= ppc_linux_gregset (sizeof (long));
2356 ppc_supply_gregset (regset
, regcache
, -1, gregsetp
, sizeof (*gregsetp
));
2360 fill_gregset (const struct regcache
*regcache
,
2361 gdb_gregset_t
*gregsetp
, int regno
)
2363 const struct regset
*regset
= ppc_linux_gregset (sizeof (long));
2366 memset (gregsetp
, 0, sizeof (*gregsetp
));
2367 ppc_collect_gregset (regset
, regcache
, regno
, gregsetp
, sizeof (*gregsetp
));
2371 supply_fpregset (struct regcache
*regcache
, const gdb_fpregset_t
* fpregsetp
)
2373 const struct regset
*regset
= ppc_linux_fpregset ();
2375 ppc_supply_fpregset (regset
, regcache
, -1,
2376 fpregsetp
, sizeof (*fpregsetp
));
2380 fill_fpregset (const struct regcache
*regcache
,
2381 gdb_fpregset_t
*fpregsetp
, int regno
)
2383 const struct regset
*regset
= ppc_linux_fpregset ();
2385 ppc_collect_fpregset (regset
, regcache
, regno
,
2386 fpregsetp
, sizeof (*fpregsetp
));
2390 ppc_linux_nat_target::auxv_parse (gdb_byte
**readptr
,
2391 gdb_byte
*endptr
, CORE_ADDR
*typep
,
2394 int tid
= inferior_ptid
.lwp ();
2396 tid
= inferior_ptid
.pid ();
2398 int sizeof_auxv_field
= ppc_linux_target_wordsize (tid
);
2400 enum bfd_endian byte_order
= gdbarch_byte_order (target_gdbarch ());
2401 gdb_byte
*ptr
= *readptr
;
2406 if (endptr
- ptr
< sizeof_auxv_field
* 2)
2409 *typep
= extract_unsigned_integer (ptr
, sizeof_auxv_field
, byte_order
);
2410 ptr
+= sizeof_auxv_field
;
2411 *valp
= extract_unsigned_integer (ptr
, sizeof_auxv_field
, byte_order
);
2412 ptr
+= sizeof_auxv_field
;
2418 const struct target_desc
*
2419 ppc_linux_nat_target::read_description ()
2421 int tid
= inferior_ptid
.lwp ();
2423 tid
= inferior_ptid
.pid ();
2425 if (have_ptrace_getsetevrregs
)
2427 struct gdb_evrregset_t evrregset
;
2429 if (ptrace (PTRACE_GETEVRREGS
, tid
, 0, &evrregset
) >= 0)
2430 return tdesc_powerpc_e500l
;
2432 /* EIO means that the PTRACE_GETEVRREGS request isn't supported.
2433 Anything else needs to be reported. */
2434 else if (errno
!= EIO
)
2435 perror_with_name (_("Unable to fetch SPE registers"));
2438 struct ppc_linux_features features
= ppc_linux_no_features
;
2440 features
.wordsize
= ppc_linux_target_wordsize (tid
);
2442 CORE_ADDR hwcap
= ppc_linux_get_hwcap ();
2443 CORE_ADDR hwcap2
= ppc_linux_get_hwcap2 ();
2445 if (have_ptrace_getsetvsxregs
2446 && (hwcap
& PPC_FEATURE_HAS_VSX
))
2448 gdb_vsxregset_t vsxregset
;
2450 if (ptrace (PTRACE_GETVSXREGS
, tid
, 0, &vsxregset
) >= 0)
2451 features
.vsx
= true;
2453 /* EIO means that the PTRACE_GETVSXREGS request isn't supported.
2454 Anything else needs to be reported. */
2455 else if (errno
!= EIO
)
2456 perror_with_name (_("Unable to fetch VSX registers"));
2459 if (have_ptrace_getvrregs
2460 && (hwcap
& PPC_FEATURE_HAS_ALTIVEC
))
2462 gdb_vrregset_t vrregset
;
2464 if (ptrace (PTRACE_GETVRREGS
, tid
, 0, &vrregset
) >= 0)
2465 features
.altivec
= true;
2467 /* EIO means that the PTRACE_GETVRREGS request isn't supported.
2468 Anything else needs to be reported. */
2469 else if (errno
!= EIO
)
2470 perror_with_name (_("Unable to fetch AltiVec registers"));
2473 if (hwcap
& PPC_FEATURE_CELL
)
2474 features
.cell
= true;
2476 features
.isa205
= ppc_linux_has_isa205 (hwcap
);
2478 if ((hwcap2
& PPC_FEATURE2_DSCR
)
2479 && check_regset (tid
, NT_PPC_PPR
, PPC_LINUX_SIZEOF_PPRREGSET
)
2480 && check_regset (tid
, NT_PPC_DSCR
, PPC_LINUX_SIZEOF_DSCRREGSET
))
2482 features
.ppr_dscr
= true;
2483 if ((hwcap2
& PPC_FEATURE2_ARCH_2_07
)
2484 && (hwcap2
& PPC_FEATURE2_TAR
)
2485 && (hwcap2
& PPC_FEATURE2_EBB
)
2486 && check_regset (tid
, NT_PPC_TAR
, PPC_LINUX_SIZEOF_TARREGSET
)
2487 && check_regset (tid
, NT_PPC_EBB
, PPC_LINUX_SIZEOF_EBBREGSET
)
2488 && check_regset (tid
, NT_PPC_PMU
, PPC_LINUX_SIZEOF_PMUREGSET
))
2489 features
.isa207
= true;
2492 return ppc_linux_match_description (features
);
2496 _initialize_ppc_linux_nat (void)
2498 linux_target
= &the_ppc_linux_nat_target
;
2500 gdb::observers::thread_exit
.attach (ppc_linux_thread_exit
);
2502 /* Register the target. */
2503 add_inf_child_target (linux_target
);