* score-tdep.c (score_print_insn): Get the current endianess from
[deliverable/binutils-gdb.git] / gdb / ppc-linux-tdep.c
1 /* Target-dependent code for GDB, the GNU debugger.
2
3 Copyright (C) 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
4 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
5 Free Software Foundation, Inc.
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21
22 #include "defs.h"
23 #include "frame.h"
24 #include "inferior.h"
25 #include "symtab.h"
26 #include "target.h"
27 #include "gdbcore.h"
28 #include "gdbcmd.h"
29 #include "symfile.h"
30 #include "objfiles.h"
31 #include "regcache.h"
32 #include "value.h"
33 #include "osabi.h"
34 #include "regset.h"
35 #include "solib-svr4.h"
36 #include "ppc-tdep.h"
37 #include "ppc-linux-tdep.h"
38 #include "trad-frame.h"
39 #include "frame-unwind.h"
40 #include "tramp-frame.h"
41
42 #include "features/rs6000/powerpc-32l.c"
43 #include "features/rs6000/powerpc-altivec32l.c"
44 #include "features/rs6000/powerpc-64l.c"
45 #include "features/rs6000/powerpc-altivec64l.c"
46 #include "features/rs6000/powerpc-e500l.c"
47
48
49 /* ppc_linux_memory_remove_breakpoints attempts to remove a breakpoint
50 in much the same fashion as memory_remove_breakpoint in mem-break.c,
51 but is careful not to write back the previous contents if the code
52 in question has changed in between inserting the breakpoint and
53 removing it.
54
55 Here is the problem that we're trying to solve...
56
57 Once upon a time, before introducing this function to remove
58 breakpoints from the inferior, setting a breakpoint on a shared
59 library function prior to running the program would not work
60 properly. In order to understand the problem, it is first
61 necessary to understand a little bit about dynamic linking on
62 this platform.
63
64 A call to a shared library function is accomplished via a bl
65 (branch-and-link) instruction whose branch target is an entry
66 in the procedure linkage table (PLT). The PLT in the object
67 file is uninitialized. To gdb, prior to running the program, the
68 entries in the PLT are all zeros.
69
70 Once the program starts running, the shared libraries are loaded
71 and the procedure linkage table is initialized, but the entries in
72 the table are not (necessarily) resolved. Once a function is
73 actually called, the code in the PLT is hit and the function is
74 resolved. In order to better illustrate this, an example is in
75 order; the following example is from the gdb testsuite.
76
77 We start the program shmain.
78
79 [kev@arroyo testsuite]$ ../gdb gdb.base/shmain
80 [...]
81
82 We place two breakpoints, one on shr1 and the other on main.
83
84 (gdb) b shr1
85 Breakpoint 1 at 0x100409d4
86 (gdb) b main
87 Breakpoint 2 at 0x100006a0: file gdb.base/shmain.c, line 44.
88
89 Examine the instruction (and the immediatly following instruction)
90 upon which the breakpoint was placed. Note that the PLT entry
91 for shr1 contains zeros.
92
93 (gdb) x/2i 0x100409d4
94 0x100409d4 <shr1>: .long 0x0
95 0x100409d8 <shr1+4>: .long 0x0
96
97 Now run 'til main.
98
99 (gdb) r
100 Starting program: gdb.base/shmain
101 Breakpoint 1 at 0xffaf790: file gdb.base/shr1.c, line 19.
102
103 Breakpoint 2, main ()
104 at gdb.base/shmain.c:44
105 44 g = 1;
106
107 Examine the PLT again. Note that the loading of the shared
108 library has initialized the PLT to code which loads a constant
109 (which I think is an index into the GOT) into r11 and then
110 branchs a short distance to the code which actually does the
111 resolving.
112
113 (gdb) x/2i 0x100409d4
114 0x100409d4 <shr1>: li r11,4
115 0x100409d8 <shr1+4>: b 0x10040984 <sg+4>
116 (gdb) c
117 Continuing.
118
119 Breakpoint 1, shr1 (x=1)
120 at gdb.base/shr1.c:19
121 19 l = 1;
122
123 Now we've hit the breakpoint at shr1. (The breakpoint was
124 reset from the PLT entry to the actual shr1 function after the
125 shared library was loaded.) Note that the PLT entry has been
126 resolved to contain a branch that takes us directly to shr1.
127 (The real one, not the PLT entry.)
128
129 (gdb) x/2i 0x100409d4
130 0x100409d4 <shr1>: b 0xffaf76c <shr1>
131 0x100409d8 <shr1+4>: b 0x10040984 <sg+4>
132
133 The thing to note here is that the PLT entry for shr1 has been
134 changed twice.
135
136 Now the problem should be obvious. GDB places a breakpoint (a
137 trap instruction) on the zero value of the PLT entry for shr1.
138 Later on, after the shared library had been loaded and the PLT
139 initialized, GDB gets a signal indicating this fact and attempts
140 (as it always does when it stops) to remove all the breakpoints.
141
142 The breakpoint removal was causing the former contents (a zero
143 word) to be written back to the now initialized PLT entry thus
144 destroying a portion of the initialization that had occurred only a
145 short time ago. When execution continued, the zero word would be
146 executed as an instruction an an illegal instruction trap was
147 generated instead. (0 is not a legal instruction.)
148
149 The fix for this problem was fairly straightforward. The function
150 memory_remove_breakpoint from mem-break.c was copied to this file,
151 modified slightly, and renamed to ppc_linux_memory_remove_breakpoint.
152 In tm-linux.h, MEMORY_REMOVE_BREAKPOINT is defined to call this new
153 function.
154
155 The differences between ppc_linux_memory_remove_breakpoint () and
156 memory_remove_breakpoint () are minor. All that the former does
157 that the latter does not is check to make sure that the breakpoint
158 location actually contains a breakpoint (trap instruction) prior
159 to attempting to write back the old contents. If it does contain
160 a trap instruction, we allow the old contents to be written back.
161 Otherwise, we silently do nothing.
162
163 The big question is whether memory_remove_breakpoint () should be
164 changed to have the same functionality. The downside is that more
165 traffic is generated for remote targets since we'll have an extra
166 fetch of a memory word each time a breakpoint is removed.
167
168 For the time being, we'll leave this self-modifying-code-friendly
169 version in ppc-linux-tdep.c, but it ought to be migrated somewhere
170 else in the event that some other platform has similar needs with
171 regard to removing breakpoints in some potentially self modifying
172 code. */
173 int
174 ppc_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
175 struct bp_target_info *bp_tgt)
176 {
177 CORE_ADDR addr = bp_tgt->placed_address;
178 const unsigned char *bp;
179 int val;
180 int bplen;
181 gdb_byte old_contents[BREAKPOINT_MAX];
182 struct cleanup *cleanup;
183
184 /* Determine appropriate breakpoint contents and size for this address. */
185 bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen);
186 if (bp == NULL)
187 error (_("Software breakpoints not implemented for this target."));
188
189 /* Make sure we see the memory breakpoints. */
190 cleanup = make_show_memory_breakpoints_cleanup (1);
191 val = target_read_memory (addr, old_contents, bplen);
192
193 /* If our breakpoint is no longer at the address, this means that the
194 program modified the code on us, so it is wrong to put back the
195 old value */
196 if (val == 0 && memcmp (bp, old_contents, bplen) == 0)
197 val = target_write_memory (addr, bp_tgt->shadow_contents, bplen);
198
199 do_cleanups (cleanup);
200 return val;
201 }
202
203 /* For historic reasons, PPC 32 GNU/Linux follows PowerOpen rather
204 than the 32 bit SYSV R4 ABI structure return convention - all
205 structures, no matter their size, are put in memory. Vectors,
206 which were added later, do get returned in a register though. */
207
208 static enum return_value_convention
209 ppc_linux_return_value (struct gdbarch *gdbarch, struct type *func_type,
210 struct type *valtype, struct regcache *regcache,
211 gdb_byte *readbuf, const gdb_byte *writebuf)
212 {
213 if ((TYPE_CODE (valtype) == TYPE_CODE_STRUCT
214 || TYPE_CODE (valtype) == TYPE_CODE_UNION)
215 && !((TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 8)
216 && TYPE_VECTOR (valtype)))
217 return RETURN_VALUE_STRUCT_CONVENTION;
218 else
219 return ppc_sysv_abi_return_value (gdbarch, func_type, valtype, regcache,
220 readbuf, writebuf);
221 }
222
223 /* Macros for matching instructions. Note that, since all the
224 operands are masked off before they're or-ed into the instruction,
225 you can use -1 to make masks. */
226
227 #define insn_d(opcd, rts, ra, d) \
228 ((((opcd) & 0x3f) << 26) \
229 | (((rts) & 0x1f) << 21) \
230 | (((ra) & 0x1f) << 16) \
231 | ((d) & 0xffff))
232
233 #define insn_ds(opcd, rts, ra, d, xo) \
234 ((((opcd) & 0x3f) << 26) \
235 | (((rts) & 0x1f) << 21) \
236 | (((ra) & 0x1f) << 16) \
237 | ((d) & 0xfffc) \
238 | ((xo) & 0x3))
239
240 #define insn_xfx(opcd, rts, spr, xo) \
241 ((((opcd) & 0x3f) << 26) \
242 | (((rts) & 0x1f) << 21) \
243 | (((spr) & 0x1f) << 16) \
244 | (((spr) & 0x3e0) << 6) \
245 | (((xo) & 0x3ff) << 1))
246
247 /* Read a PPC instruction from memory. PPC instructions are always
248 big-endian, no matter what endianness the program is running in, so
249 we can't use read_memory_integer or one of its friends here. */
250 static unsigned int
251 read_insn (CORE_ADDR pc)
252 {
253 unsigned char buf[4];
254
255 read_memory (pc, buf, 4);
256 return (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3];
257 }
258
259
260 /* An instruction to match. */
261 struct insn_pattern
262 {
263 unsigned int mask; /* mask the insn with this... */
264 unsigned int data; /* ...and see if it matches this. */
265 int optional; /* If non-zero, this insn may be absent. */
266 };
267
268 /* Return non-zero if the instructions at PC match the series
269 described in PATTERN, or zero otherwise. PATTERN is an array of
270 'struct insn_pattern' objects, terminated by an entry whose mask is
271 zero.
272
273 When the match is successful, fill INSN[i] with what PATTERN[i]
274 matched. If PATTERN[i] is optional, and the instruction wasn't
275 present, set INSN[i] to 0 (which is not a valid PPC instruction).
276 INSN should have as many elements as PATTERN. Note that, if
277 PATTERN contains optional instructions which aren't present in
278 memory, then INSN will have holes, so INSN[i] isn't necessarily the
279 i'th instruction in memory. */
280 static int
281 insns_match_pattern (CORE_ADDR pc,
282 struct insn_pattern *pattern,
283 unsigned int *insn)
284 {
285 int i;
286
287 for (i = 0; pattern[i].mask; i++)
288 {
289 insn[i] = read_insn (pc);
290 if ((insn[i] & pattern[i].mask) == pattern[i].data)
291 pc += 4;
292 else if (pattern[i].optional)
293 insn[i] = 0;
294 else
295 return 0;
296 }
297
298 return 1;
299 }
300
301
302 /* Return the 'd' field of the d-form instruction INSN, properly
303 sign-extended. */
304 static CORE_ADDR
305 insn_d_field (unsigned int insn)
306 {
307 return ((((CORE_ADDR) insn & 0xffff) ^ 0x8000) - 0x8000);
308 }
309
310
311 /* Return the 'ds' field of the ds-form instruction INSN, with the two
312 zero bits concatenated at the right, and properly
313 sign-extended. */
314 static CORE_ADDR
315 insn_ds_field (unsigned int insn)
316 {
317 return ((((CORE_ADDR) insn & 0xfffc) ^ 0x8000) - 0x8000);
318 }
319
320
321 /* If DESC is the address of a 64-bit PowerPC GNU/Linux function
322 descriptor, return the descriptor's entry point. */
323 static CORE_ADDR
324 ppc64_desc_entry_point (CORE_ADDR desc)
325 {
326 /* The first word of the descriptor is the entry point. */
327 return (CORE_ADDR) read_memory_unsigned_integer (desc, 8);
328 }
329
330
331 /* Pattern for the standard linkage function. These are built by
332 build_plt_stub in elf64-ppc.c, whose GLINK argument is always
333 zero. */
334 static struct insn_pattern ppc64_standard_linkage1[] =
335 {
336 /* addis r12, r2, <any> */
337 { insn_d (-1, -1, -1, 0), insn_d (15, 12, 2, 0), 0 },
338
339 /* std r2, 40(r1) */
340 { -1, insn_ds (62, 2, 1, 40, 0), 0 },
341
342 /* ld r11, <any>(r12) */
343 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 },
344
345 /* addis r12, r12, 1 <optional> */
346 { insn_d (-1, -1, -1, -1), insn_d (15, 12, 12, 1), 1 },
347
348 /* ld r2, <any>(r12) */
349 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 2, 12, 0, 0), 0 },
350
351 /* addis r12, r12, 1 <optional> */
352 { insn_d (-1, -1, -1, -1), insn_d (15, 12, 12, 1), 1 },
353
354 /* mtctr r11 */
355 { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 11, 9, 467), 0 },
356
357 /* ld r11, <any>(r12) */
358 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 },
359
360 /* bctr */
361 { -1, 0x4e800420, 0 },
362
363 { 0, 0, 0 }
364 };
365 #define PPC64_STANDARD_LINKAGE1_LEN \
366 (sizeof (ppc64_standard_linkage1) / sizeof (ppc64_standard_linkage1[0]))
367
368 static struct insn_pattern ppc64_standard_linkage2[] =
369 {
370 /* addis r12, r2, <any> */
371 { insn_d (-1, -1, -1, 0), insn_d (15, 12, 2, 0), 0 },
372
373 /* std r2, 40(r1) */
374 { -1, insn_ds (62, 2, 1, 40, 0), 0 },
375
376 /* ld r11, <any>(r12) */
377 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 },
378
379 /* addi r12, r12, <any> <optional> */
380 { insn_d (-1, -1, -1, 0), insn_d (14, 12, 12, 0), 1 },
381
382 /* mtctr r11 */
383 { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 11, 9, 467), 0 },
384
385 /* ld r2, <any>(r12) */
386 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 2, 12, 0, 0), 0 },
387
388 /* ld r11, <any>(r12) */
389 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 },
390
391 /* bctr */
392 { -1, 0x4e800420, 0 },
393
394 { 0, 0, 0 }
395 };
396 #define PPC64_STANDARD_LINKAGE2_LEN \
397 (sizeof (ppc64_standard_linkage2) / sizeof (ppc64_standard_linkage2[0]))
398
399 static struct insn_pattern ppc64_standard_linkage3[] =
400 {
401 /* std r2, 40(r1) */
402 { -1, insn_ds (62, 2, 1, 40, 0), 0 },
403
404 /* ld r11, <any>(r2) */
405 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 2, 0, 0), 0 },
406
407 /* addi r2, r2, <any> <optional> */
408 { insn_d (-1, -1, -1, 0), insn_d (14, 2, 2, 0), 1 },
409
410 /* mtctr r11 */
411 { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 11, 9, 467), 0 },
412
413 /* ld r11, <any>(r2) */
414 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 2, 0, 0), 0 },
415
416 /* ld r2, <any>(r2) */
417 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 2, 2, 0, 0), 0 },
418
419 /* bctr */
420 { -1, 0x4e800420, 0 },
421
422 { 0, 0, 0 }
423 };
424 #define PPC64_STANDARD_LINKAGE3_LEN \
425 (sizeof (ppc64_standard_linkage3) / sizeof (ppc64_standard_linkage3[0]))
426
427
428 /* When the dynamic linker is doing lazy symbol resolution, the first
429 call to a function in another object will go like this:
430
431 - The user's function calls the linkage function:
432
433 100007c4: 4b ff fc d5 bl 10000498
434 100007c8: e8 41 00 28 ld r2,40(r1)
435
436 - The linkage function loads the entry point (and other stuff) from
437 the function descriptor in the PLT, and jumps to it:
438
439 10000498: 3d 82 00 00 addis r12,r2,0
440 1000049c: f8 41 00 28 std r2,40(r1)
441 100004a0: e9 6c 80 98 ld r11,-32616(r12)
442 100004a4: e8 4c 80 a0 ld r2,-32608(r12)
443 100004a8: 7d 69 03 a6 mtctr r11
444 100004ac: e9 6c 80 a8 ld r11,-32600(r12)
445 100004b0: 4e 80 04 20 bctr
446
447 - But since this is the first time that PLT entry has been used, it
448 sends control to its glink entry. That loads the number of the
449 PLT entry and jumps to the common glink0 code:
450
451 10000c98: 38 00 00 00 li r0,0
452 10000c9c: 4b ff ff dc b 10000c78
453
454 - The common glink0 code then transfers control to the dynamic
455 linker's fixup code:
456
457 10000c78: e8 41 00 28 ld r2,40(r1)
458 10000c7c: 3d 82 00 00 addis r12,r2,0
459 10000c80: e9 6c 80 80 ld r11,-32640(r12)
460 10000c84: e8 4c 80 88 ld r2,-32632(r12)
461 10000c88: 7d 69 03 a6 mtctr r11
462 10000c8c: e9 6c 80 90 ld r11,-32624(r12)
463 10000c90: 4e 80 04 20 bctr
464
465 Eventually, this code will figure out how to skip all of this,
466 including the dynamic linker. At the moment, we just get through
467 the linkage function. */
468
469 /* If the current thread is about to execute a series of instructions
470 at PC matching the ppc64_standard_linkage pattern, and INSN is the result
471 from that pattern match, return the code address to which the
472 standard linkage function will send them. (This doesn't deal with
473 dynamic linker lazy symbol resolution stubs.) */
474 static CORE_ADDR
475 ppc64_standard_linkage1_target (struct frame_info *frame,
476 CORE_ADDR pc, unsigned int *insn)
477 {
478 struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (frame));
479
480 /* The address of the function descriptor this linkage function
481 references. */
482 CORE_ADDR desc
483 = ((CORE_ADDR) get_frame_register_unsigned (frame,
484 tdep->ppc_gp0_regnum + 2)
485 + (insn_d_field (insn[0]) << 16)
486 + insn_ds_field (insn[2]));
487
488 /* The first word of the descriptor is the entry point. Return that. */
489 return ppc64_desc_entry_point (desc);
490 }
491
492 static CORE_ADDR
493 ppc64_standard_linkage2_target (struct frame_info *frame,
494 CORE_ADDR pc, unsigned int *insn)
495 {
496 struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (frame));
497
498 /* The address of the function descriptor this linkage function
499 references. */
500 CORE_ADDR desc
501 = ((CORE_ADDR) get_frame_register_unsigned (frame,
502 tdep->ppc_gp0_regnum + 2)
503 + (insn_d_field (insn[0]) << 16)
504 + insn_ds_field (insn[2]));
505
506 /* The first word of the descriptor is the entry point. Return that. */
507 return ppc64_desc_entry_point (desc);
508 }
509
510 static CORE_ADDR
511 ppc64_standard_linkage3_target (struct frame_info *frame,
512 CORE_ADDR pc, unsigned int *insn)
513 {
514 struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (frame));
515
516 /* The address of the function descriptor this linkage function
517 references. */
518 CORE_ADDR desc
519 = ((CORE_ADDR) get_frame_register_unsigned (frame,
520 tdep->ppc_gp0_regnum + 2)
521 + insn_ds_field (insn[1]));
522
523 /* The first word of the descriptor is the entry point. Return that. */
524 return ppc64_desc_entry_point (desc);
525 }
526
527
528 /* Given that we've begun executing a call trampoline at PC, return
529 the entry point of the function the trampoline will go to. */
530 static CORE_ADDR
531 ppc64_skip_trampoline_code (struct frame_info *frame, CORE_ADDR pc)
532 {
533 unsigned int ppc64_standard_linkage1_insn[PPC64_STANDARD_LINKAGE1_LEN];
534 unsigned int ppc64_standard_linkage2_insn[PPC64_STANDARD_LINKAGE2_LEN];
535 unsigned int ppc64_standard_linkage3_insn[PPC64_STANDARD_LINKAGE3_LEN];
536 CORE_ADDR target;
537
538 if (insns_match_pattern (pc, ppc64_standard_linkage1,
539 ppc64_standard_linkage1_insn))
540 pc = ppc64_standard_linkage1_target (frame, pc,
541 ppc64_standard_linkage1_insn);
542 else if (insns_match_pattern (pc, ppc64_standard_linkage2,
543 ppc64_standard_linkage2_insn))
544 pc = ppc64_standard_linkage2_target (frame, pc,
545 ppc64_standard_linkage2_insn);
546 else if (insns_match_pattern (pc, ppc64_standard_linkage3,
547 ppc64_standard_linkage3_insn))
548 pc = ppc64_standard_linkage3_target (frame, pc,
549 ppc64_standard_linkage3_insn);
550 else
551 return 0;
552
553 /* The PLT descriptor will either point to the already resolved target
554 address, or else to a glink stub. As the latter carry synthetic @plt
555 symbols, find_solib_trampoline_target should be able to resolve them. */
556 target = find_solib_trampoline_target (frame, pc);
557 return target? target : pc;
558 }
559
560
561 /* Support for convert_from_func_ptr_addr (ARCH, ADDR, TARG) on PPC64
562 GNU/Linux.
563
564 Usually a function pointer's representation is simply the address
565 of the function. On GNU/Linux on the PowerPC however, a function
566 pointer may be a pointer to a function descriptor.
567
568 For PPC64, a function descriptor is a TOC entry, in a data section,
569 which contains three words: the first word is the address of the
570 function, the second word is the TOC pointer (r2), and the third word
571 is the static chain value.
572
573 Throughout GDB it is currently assumed that a function pointer contains
574 the address of the function, which is not easy to fix. In addition, the
575 conversion of a function address to a function pointer would
576 require allocation of a TOC entry in the inferior's memory space,
577 with all its drawbacks. To be able to call C++ virtual methods in
578 the inferior (which are called via function pointers),
579 find_function_addr uses this function to get the function address
580 from a function pointer.
581
582 If ADDR points at what is clearly a function descriptor, transform
583 it into the address of the corresponding function, if needed. Be
584 conservative, otherwise GDB will do the transformation on any
585 random addresses such as occur when there is no symbol table. */
586
587 static CORE_ADDR
588 ppc64_linux_convert_from_func_ptr_addr (struct gdbarch *gdbarch,
589 CORE_ADDR addr,
590 struct target_ops *targ)
591 {
592 struct section_table *s = target_section_by_addr (targ, addr);
593
594 /* Check if ADDR points to a function descriptor. */
595 if (s && strcmp (s->the_bfd_section->name, ".opd") == 0)
596 return get_target_memory_unsigned (targ, addr, 8);
597
598 return addr;
599 }
600
601 /* Wrappers to handle Linux-only registers. */
602
603 static void
604 ppc_linux_supply_gregset (const struct regset *regset,
605 struct regcache *regcache,
606 int regnum, const void *gregs, size_t len)
607 {
608 const struct ppc_reg_offsets *offsets = regset->descr;
609
610 ppc_supply_gregset (regset, regcache, regnum, gregs, len);
611
612 if (ppc_linux_trap_reg_p (get_regcache_arch (regcache)))
613 {
614 /* "orig_r3" is stored 2 slots after "pc". */
615 if (regnum == -1 || regnum == PPC_ORIG_R3_REGNUM)
616 ppc_supply_reg (regcache, PPC_ORIG_R3_REGNUM, gregs,
617 offsets->pc_offset + 2 * offsets->gpr_size,
618 offsets->gpr_size);
619
620 /* "trap" is stored 8 slots after "pc". */
621 if (regnum == -1 || regnum == PPC_TRAP_REGNUM)
622 ppc_supply_reg (regcache, PPC_TRAP_REGNUM, gregs,
623 offsets->pc_offset + 8 * offsets->gpr_size,
624 offsets->gpr_size);
625 }
626 }
627
628 static void
629 ppc_linux_collect_gregset (const struct regset *regset,
630 const struct regcache *regcache,
631 int regnum, void *gregs, size_t len)
632 {
633 const struct ppc_reg_offsets *offsets = regset->descr;
634
635 /* Clear areas in the linux gregset not written elsewhere. */
636 if (regnum == -1)
637 memset (gregs, 0, len);
638
639 ppc_collect_gregset (regset, regcache, regnum, gregs, len);
640
641 if (ppc_linux_trap_reg_p (get_regcache_arch (regcache)))
642 {
643 /* "orig_r3" is stored 2 slots after "pc". */
644 if (regnum == -1 || regnum == PPC_ORIG_R3_REGNUM)
645 ppc_collect_reg (regcache, PPC_ORIG_R3_REGNUM, gregs,
646 offsets->pc_offset + 2 * offsets->gpr_size,
647 offsets->gpr_size);
648
649 /* "trap" is stored 8 slots after "pc". */
650 if (regnum == -1 || regnum == PPC_TRAP_REGNUM)
651 ppc_collect_reg (regcache, PPC_TRAP_REGNUM, gregs,
652 offsets->pc_offset + 8 * offsets->gpr_size,
653 offsets->gpr_size);
654 }
655 }
656
657 /* Regset descriptions. */
658 static const struct ppc_reg_offsets ppc32_linux_reg_offsets =
659 {
660 /* General-purpose registers. */
661 /* .r0_offset = */ 0,
662 /* .gpr_size = */ 4,
663 /* .xr_size = */ 4,
664 /* .pc_offset = */ 128,
665 /* .ps_offset = */ 132,
666 /* .cr_offset = */ 152,
667 /* .lr_offset = */ 144,
668 /* .ctr_offset = */ 140,
669 /* .xer_offset = */ 148,
670 /* .mq_offset = */ 156,
671
672 /* Floating-point registers. */
673 /* .f0_offset = */ 0,
674 /* .fpscr_offset = */ 256,
675 /* .fpscr_size = */ 8,
676
677 /* AltiVec registers. */
678 /* .vr0_offset = */ 0,
679 /* .vscr_offset = */ 512 + 12,
680 /* .vrsave_offset = */ 528
681 };
682
683 static const struct ppc_reg_offsets ppc64_linux_reg_offsets =
684 {
685 /* General-purpose registers. */
686 /* .r0_offset = */ 0,
687 /* .gpr_size = */ 8,
688 /* .xr_size = */ 8,
689 /* .pc_offset = */ 256,
690 /* .ps_offset = */ 264,
691 /* .cr_offset = */ 304,
692 /* .lr_offset = */ 288,
693 /* .ctr_offset = */ 280,
694 /* .xer_offset = */ 296,
695 /* .mq_offset = */ 312,
696
697 /* Floating-point registers. */
698 /* .f0_offset = */ 0,
699 /* .fpscr_offset = */ 256,
700 /* .fpscr_size = */ 8,
701
702 /* AltiVec registers. */
703 /* .vr0_offset = */ 0,
704 /* .vscr_offset = */ 512 + 12,
705 /* .vrsave_offset = */ 528
706 };
707
708 static const struct regset ppc32_linux_gregset = {
709 &ppc32_linux_reg_offsets,
710 ppc_linux_supply_gregset,
711 ppc_linux_collect_gregset,
712 NULL
713 };
714
715 static const struct regset ppc64_linux_gregset = {
716 &ppc64_linux_reg_offsets,
717 ppc_linux_supply_gregset,
718 ppc_linux_collect_gregset,
719 NULL
720 };
721
722 static const struct regset ppc32_linux_fpregset = {
723 &ppc32_linux_reg_offsets,
724 ppc_supply_fpregset,
725 ppc_collect_fpregset,
726 NULL
727 };
728
729 static const struct regset ppc32_linux_vrregset = {
730 &ppc32_linux_reg_offsets,
731 ppc_supply_vrregset,
732 ppc_collect_vrregset,
733 NULL
734 };
735
736 const struct regset *
737 ppc_linux_gregset (int wordsize)
738 {
739 return wordsize == 8 ? &ppc64_linux_gregset : &ppc32_linux_gregset;
740 }
741
742 const struct regset *
743 ppc_linux_fpregset (void)
744 {
745 return &ppc32_linux_fpregset;
746 }
747
748 static const struct regset *
749 ppc_linux_regset_from_core_section (struct gdbarch *core_arch,
750 const char *sect_name, size_t sect_size)
751 {
752 struct gdbarch_tdep *tdep = gdbarch_tdep (core_arch);
753 if (strcmp (sect_name, ".reg") == 0)
754 {
755 if (tdep->wordsize == 4)
756 return &ppc32_linux_gregset;
757 else
758 return &ppc64_linux_gregset;
759 }
760 if (strcmp (sect_name, ".reg2") == 0)
761 return &ppc32_linux_fpregset;
762 if (strcmp (sect_name, ".reg-ppc-vmx") == 0)
763 return &ppc32_linux_vrregset;
764 return NULL;
765 }
766
767 static void
768 ppc_linux_sigtramp_cache (struct frame_info *this_frame,
769 struct trad_frame_cache *this_cache,
770 CORE_ADDR func, LONGEST offset,
771 int bias)
772 {
773 CORE_ADDR base;
774 CORE_ADDR regs;
775 CORE_ADDR gpregs;
776 CORE_ADDR fpregs;
777 int i;
778 struct gdbarch *gdbarch = get_frame_arch (this_frame);
779 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
780
781 base = get_frame_register_unsigned (this_frame,
782 gdbarch_sp_regnum (gdbarch));
783 if (bias > 0 && get_frame_pc (this_frame) != func)
784 /* See below, some signal trampolines increment the stack as their
785 first instruction, need to compensate for that. */
786 base -= bias;
787
788 /* Find the address of the register buffer pointer. */
789 regs = base + offset;
790 /* Use that to find the address of the corresponding register
791 buffers. */
792 gpregs = read_memory_unsigned_integer (regs, tdep->wordsize);
793 fpregs = gpregs + 48 * tdep->wordsize;
794
795 /* General purpose. */
796 for (i = 0; i < 32; i++)
797 {
798 int regnum = i + tdep->ppc_gp0_regnum;
799 trad_frame_set_reg_addr (this_cache, regnum, gpregs + i * tdep->wordsize);
800 }
801 trad_frame_set_reg_addr (this_cache,
802 gdbarch_pc_regnum (gdbarch),
803 gpregs + 32 * tdep->wordsize);
804 trad_frame_set_reg_addr (this_cache, tdep->ppc_ctr_regnum,
805 gpregs + 35 * tdep->wordsize);
806 trad_frame_set_reg_addr (this_cache, tdep->ppc_lr_regnum,
807 gpregs + 36 * tdep->wordsize);
808 trad_frame_set_reg_addr (this_cache, tdep->ppc_xer_regnum,
809 gpregs + 37 * tdep->wordsize);
810 trad_frame_set_reg_addr (this_cache, tdep->ppc_cr_regnum,
811 gpregs + 38 * tdep->wordsize);
812
813 if (ppc_linux_trap_reg_p (gdbarch))
814 {
815 trad_frame_set_reg_addr (this_cache, PPC_ORIG_R3_REGNUM,
816 gpregs + 34 * tdep->wordsize);
817 trad_frame_set_reg_addr (this_cache, PPC_TRAP_REGNUM,
818 gpregs + 40 * tdep->wordsize);
819 }
820
821 if (ppc_floating_point_unit_p (gdbarch))
822 {
823 /* Floating point registers. */
824 for (i = 0; i < 32; i++)
825 {
826 int regnum = i + gdbarch_fp0_regnum (gdbarch);
827 trad_frame_set_reg_addr (this_cache, regnum,
828 fpregs + i * tdep->wordsize);
829 }
830 trad_frame_set_reg_addr (this_cache, tdep->ppc_fpscr_regnum,
831 fpregs + 32 * tdep->wordsize);
832 }
833 trad_frame_set_id (this_cache, frame_id_build (base, func));
834 }
835
836 static void
837 ppc32_linux_sigaction_cache_init (const struct tramp_frame *self,
838 struct frame_info *this_frame,
839 struct trad_frame_cache *this_cache,
840 CORE_ADDR func)
841 {
842 ppc_linux_sigtramp_cache (this_frame, this_cache, func,
843 0xd0 /* Offset to ucontext_t. */
844 + 0x30 /* Offset to .reg. */,
845 0);
846 }
847
848 static void
849 ppc64_linux_sigaction_cache_init (const struct tramp_frame *self,
850 struct frame_info *this_frame,
851 struct trad_frame_cache *this_cache,
852 CORE_ADDR func)
853 {
854 ppc_linux_sigtramp_cache (this_frame, this_cache, func,
855 0x80 /* Offset to ucontext_t. */
856 + 0xe0 /* Offset to .reg. */,
857 128);
858 }
859
860 static void
861 ppc32_linux_sighandler_cache_init (const struct tramp_frame *self,
862 struct frame_info *this_frame,
863 struct trad_frame_cache *this_cache,
864 CORE_ADDR func)
865 {
866 ppc_linux_sigtramp_cache (this_frame, this_cache, func,
867 0x40 /* Offset to ucontext_t. */
868 + 0x1c /* Offset to .reg. */,
869 0);
870 }
871
872 static void
873 ppc64_linux_sighandler_cache_init (const struct tramp_frame *self,
874 struct frame_info *this_frame,
875 struct trad_frame_cache *this_cache,
876 CORE_ADDR func)
877 {
878 ppc_linux_sigtramp_cache (this_frame, this_cache, func,
879 0x80 /* Offset to struct sigcontext. */
880 + 0x38 /* Offset to .reg. */,
881 128);
882 }
883
884 static struct tramp_frame ppc32_linux_sigaction_tramp_frame = {
885 SIGTRAMP_FRAME,
886 4,
887 {
888 { 0x380000ac, -1 }, /* li r0, 172 */
889 { 0x44000002, -1 }, /* sc */
890 { TRAMP_SENTINEL_INSN },
891 },
892 ppc32_linux_sigaction_cache_init
893 };
894 static struct tramp_frame ppc64_linux_sigaction_tramp_frame = {
895 SIGTRAMP_FRAME,
896 4,
897 {
898 { 0x38210080, -1 }, /* addi r1,r1,128 */
899 { 0x380000ac, -1 }, /* li r0, 172 */
900 { 0x44000002, -1 }, /* sc */
901 { TRAMP_SENTINEL_INSN },
902 },
903 ppc64_linux_sigaction_cache_init
904 };
905 static struct tramp_frame ppc32_linux_sighandler_tramp_frame = {
906 SIGTRAMP_FRAME,
907 4,
908 {
909 { 0x38000077, -1 }, /* li r0,119 */
910 { 0x44000002, -1 }, /* sc */
911 { TRAMP_SENTINEL_INSN },
912 },
913 ppc32_linux_sighandler_cache_init
914 };
915 static struct tramp_frame ppc64_linux_sighandler_tramp_frame = {
916 SIGTRAMP_FRAME,
917 4,
918 {
919 { 0x38210080, -1 }, /* addi r1,r1,128 */
920 { 0x38000077, -1 }, /* li r0,119 */
921 { 0x44000002, -1 }, /* sc */
922 { TRAMP_SENTINEL_INSN },
923 },
924 ppc64_linux_sighandler_cache_init
925 };
926
927
928 /* Return 1 if PPC_ORIG_R3_REGNUM and PPC_TRAP_REGNUM are usable. */
929 int
930 ppc_linux_trap_reg_p (struct gdbarch *gdbarch)
931 {
932 /* If we do not have a target description with registers, then
933 the special registers will not be included in the register set. */
934 if (!tdesc_has_registers (gdbarch_target_desc (gdbarch)))
935 return 0;
936
937 /* If we do, then it is safe to check the size. */
938 return register_size (gdbarch, PPC_ORIG_R3_REGNUM) > 0
939 && register_size (gdbarch, PPC_TRAP_REGNUM) > 0;
940 }
941
942 static void
943 ppc_linux_write_pc (struct regcache *regcache, CORE_ADDR pc)
944 {
945 struct gdbarch *gdbarch = get_regcache_arch (regcache);
946
947 regcache_cooked_write_unsigned (regcache, gdbarch_pc_regnum (gdbarch), pc);
948
949 /* Set special TRAP register to -1 to prevent the kernel from
950 messing with the PC we just installed, if we happen to be
951 within an interrupted system call that the kernel wants to
952 restart.
953
954 Note that after we return from the dummy call, the TRAP and
955 ORIG_R3 registers will be automatically restored, and the
956 kernel continues to restart the system call at this point. */
957 if (ppc_linux_trap_reg_p (gdbarch))
958 regcache_cooked_write_unsigned (regcache, PPC_TRAP_REGNUM, -1);
959 }
960
961 static const struct target_desc *
962 ppc_linux_core_read_description (struct gdbarch *gdbarch,
963 struct target_ops *target,
964 bfd *abfd)
965 {
966 asection *altivec = bfd_get_section_by_name (abfd, ".reg-ppc-vmx");
967 asection *section = bfd_get_section_by_name (abfd, ".reg");
968 if (! section)
969 return NULL;
970
971 switch (bfd_section_size (abfd, section))
972 {
973 case 48 * 4:
974 return altivec? tdesc_powerpc_altivec32l : tdesc_powerpc_32l;
975
976 case 48 * 8:
977 return altivec? tdesc_powerpc_altivec64l : tdesc_powerpc_64l;
978
979 default:
980 return NULL;
981 }
982 }
983
984 static void
985 ppc_linux_init_abi (struct gdbarch_info info,
986 struct gdbarch *gdbarch)
987 {
988 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
989 struct tdesc_arch_data *tdesc_data = (void *) info.tdep_info;
990
991 /* PPC GNU/Linux uses either 64-bit or 128-bit long doubles; where
992 128-bit, they are IBM long double, not IEEE quad long double as
993 in the System V ABI PowerPC Processor Supplement. We can safely
994 let them default to 128-bit, since the debug info will give the
995 size of type actually used in each case. */
996 set_gdbarch_long_double_bit (gdbarch, 16 * TARGET_CHAR_BIT);
997 set_gdbarch_long_double_format (gdbarch, floatformats_ibm_long_double);
998
999 /* Handle inferior calls during interrupted system calls. */
1000 set_gdbarch_write_pc (gdbarch, ppc_linux_write_pc);
1001
1002 if (tdep->wordsize == 4)
1003 {
1004 /* Until November 2001, gcc did not comply with the 32 bit SysV
1005 R4 ABI requirement that structures less than or equal to 8
1006 bytes should be returned in registers. Instead GCC was using
1007 the the AIX/PowerOpen ABI - everything returned in memory
1008 (well ignoring vectors that is). When this was corrected, it
1009 wasn't fixed for GNU/Linux native platform. Use the
1010 PowerOpen struct convention. */
1011 set_gdbarch_return_value (gdbarch, ppc_linux_return_value);
1012
1013 set_gdbarch_memory_remove_breakpoint (gdbarch,
1014 ppc_linux_memory_remove_breakpoint);
1015
1016 /* Shared library handling. */
1017 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
1018 set_solib_svr4_fetch_link_map_offsets
1019 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
1020
1021 /* Trampolines. */
1022 tramp_frame_prepend_unwinder (gdbarch, &ppc32_linux_sigaction_tramp_frame);
1023 tramp_frame_prepend_unwinder (gdbarch, &ppc32_linux_sighandler_tramp_frame);
1024 }
1025
1026 if (tdep->wordsize == 8)
1027 {
1028 /* Handle PPC GNU/Linux 64-bit function pointers (which are really
1029 function descriptors). */
1030 set_gdbarch_convert_from_func_ptr_addr
1031 (gdbarch, ppc64_linux_convert_from_func_ptr_addr);
1032
1033 /* Shared library handling. */
1034 set_gdbarch_skip_trampoline_code (gdbarch, ppc64_skip_trampoline_code);
1035 set_solib_svr4_fetch_link_map_offsets
1036 (gdbarch, svr4_lp64_fetch_link_map_offsets);
1037
1038 /* Trampolines. */
1039 tramp_frame_prepend_unwinder (gdbarch, &ppc64_linux_sigaction_tramp_frame);
1040 tramp_frame_prepend_unwinder (gdbarch, &ppc64_linux_sighandler_tramp_frame);
1041 }
1042 set_gdbarch_regset_from_core_section (gdbarch, ppc_linux_regset_from_core_section);
1043 set_gdbarch_core_read_description (gdbarch, ppc_linux_core_read_description);
1044
1045 /* Enable TLS support. */
1046 set_gdbarch_fetch_tls_load_module_address (gdbarch,
1047 svr4_fetch_objfile_link_map);
1048
1049 if (tdesc_data)
1050 {
1051 const struct tdesc_feature *feature;
1052
1053 /* If we have target-described registers, then we can safely
1054 reserve a number for PPC_ORIG_R3_REGNUM and PPC_TRAP_REGNUM
1055 (whether they are described or not). */
1056 gdb_assert (gdbarch_num_regs (gdbarch) <= PPC_ORIG_R3_REGNUM);
1057 set_gdbarch_num_regs (gdbarch, PPC_TRAP_REGNUM + 1);
1058
1059 /* If they are present, then assign them to the reserved number. */
1060 feature = tdesc_find_feature (info.target_desc,
1061 "org.gnu.gdb.power.linux");
1062 if (feature != NULL)
1063 {
1064 tdesc_numbered_register (feature, tdesc_data,
1065 PPC_ORIG_R3_REGNUM, "orig_r3");
1066 tdesc_numbered_register (feature, tdesc_data,
1067 PPC_TRAP_REGNUM, "trap");
1068 }
1069 }
1070 }
1071
1072 void
1073 _initialize_ppc_linux_tdep (void)
1074 {
1075 /* Register for all sub-familes of the POWER/PowerPC: 32-bit and
1076 64-bit PowerPC, and the older rs6k. */
1077 gdbarch_register_osabi (bfd_arch_powerpc, bfd_mach_ppc, GDB_OSABI_LINUX,
1078 ppc_linux_init_abi);
1079 gdbarch_register_osabi (bfd_arch_powerpc, bfd_mach_ppc64, GDB_OSABI_LINUX,
1080 ppc_linux_init_abi);
1081 gdbarch_register_osabi (bfd_arch_rs6000, bfd_mach_rs6k, GDB_OSABI_LINUX,
1082 ppc_linux_init_abi);
1083
1084 /* Initialize the Linux target descriptions. */
1085 initialize_tdesc_powerpc_32l ();
1086 initialize_tdesc_powerpc_altivec32l ();
1087 initialize_tdesc_powerpc_64l ();
1088 initialize_tdesc_powerpc_altivec64l ();
1089 initialize_tdesc_powerpc_e500l ();
1090 }
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