gdb
[deliverable/binutils-gdb.git] / gdb / ppc-sysv-tdep.c
1 /* Target-dependent code for PowerPC systems using the SVR4 ABI
2 for GDB, the GNU debugger.
3
4 Copyright (C) 2000, 2001, 2002, 2003, 2005, 2007, 2008, 2009
5 Free Software Foundation, Inc.
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21
22 #include "defs.h"
23 #include "gdbcore.h"
24 #include "inferior.h"
25 #include "regcache.h"
26 #include "value.h"
27 #include "gdb_string.h"
28 #include "gdb_assert.h"
29 #include "ppc-tdep.h"
30 #include "target.h"
31 #include "objfiles.h"
32 #include "infcall.h"
33
34 /* Pass the arguments in either registers, or in the stack. Using the
35 ppc sysv ABI, the first eight words of the argument list (that might
36 be less than eight parameters if some parameters occupy more than one
37 word) are passed in r3..r10 registers. float and double parameters are
38 passed in fpr's, in addition to that. Rest of the parameters if any
39 are passed in user stack.
40
41 If the function is returning a structure, then the return address is passed
42 in r3, then the first 7 words of the parametes can be passed in registers,
43 starting from r4. */
44
45 CORE_ADDR
46 ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
47 struct regcache *regcache, CORE_ADDR bp_addr,
48 int nargs, struct value **args, CORE_ADDR sp,
49 int struct_return, CORE_ADDR struct_addr)
50 {
51 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
52 ULONGEST saved_sp;
53 int argspace = 0; /* 0 is an initial wrong guess. */
54 int write_pass;
55
56 gdb_assert (tdep->wordsize == 4);
57
58 regcache_cooked_read_unsigned (regcache, gdbarch_sp_regnum (gdbarch),
59 &saved_sp);
60
61 /* Go through the argument list twice.
62
63 Pass 1: Figure out how much new stack space is required for
64 arguments and pushed values. Unlike the PowerOpen ABI, the SysV
65 ABI doesn't reserve any extra space for parameters which are put
66 in registers, but does always push structures and then pass their
67 address.
68
69 Pass 2: Replay the same computation but this time also write the
70 values out to the target. */
71
72 for (write_pass = 0; write_pass < 2; write_pass++)
73 {
74 int argno;
75 /* Next available floating point register for float and double
76 arguments. */
77 int freg = 1;
78 /* Next available general register for non-float, non-vector
79 arguments. */
80 int greg = 3;
81 /* Next available vector register for vector arguments. */
82 int vreg = 2;
83 /* Arguments start above the "LR save word" and "Back chain". */
84 int argoffset = 2 * tdep->wordsize;
85 /* Structures start after the arguments. */
86 int structoffset = argoffset + argspace;
87
88 /* If the function is returning a `struct', then the first word
89 (which will be passed in r3) is used for struct return
90 address. In that case we should advance one word and start
91 from r4 register to copy parameters. */
92 if (struct_return)
93 {
94 if (write_pass)
95 regcache_cooked_write_signed (regcache,
96 tdep->ppc_gp0_regnum + greg,
97 struct_addr);
98 greg++;
99 }
100
101 for (argno = 0; argno < nargs; argno++)
102 {
103 struct value *arg = args[argno];
104 struct type *type = check_typedef (value_type (arg));
105 int len = TYPE_LENGTH (type);
106 const bfd_byte *val = value_contents (arg);
107
108 if (TYPE_CODE (type) == TYPE_CODE_FLT && len <= 8
109 && !tdep->soft_float)
110 {
111 /* Floating point value converted to "double" then
112 passed in an FP register, when the registers run out,
113 8 byte aligned stack is used. */
114 if (freg <= 8)
115 {
116 if (write_pass)
117 {
118 /* Always store the floating point value using
119 the register's floating-point format. */
120 gdb_byte regval[MAX_REGISTER_SIZE];
121 struct type *regtype
122 = register_type (gdbarch, tdep->ppc_fp0_regnum + freg);
123 convert_typed_floating (val, type, regval, regtype);
124 regcache_cooked_write (regcache,
125 tdep->ppc_fp0_regnum + freg,
126 regval);
127 }
128 freg++;
129 }
130 else
131 {
132 /* The SysV ABI tells us to convert floats to
133 doubles before writing them to an 8 byte aligned
134 stack location. Unfortunately GCC does not do
135 that, and stores floats into 4 byte aligned
136 locations without converting them to doubles.
137 Since there is no know compiler that actually
138 follows the ABI here, we implement the GCC
139 convention. */
140
141 /* Align to 4 bytes or 8 bytes depending on the type of
142 the argument (float or double). */
143 argoffset = align_up (argoffset, len);
144 if (write_pass)
145 write_memory (sp + argoffset, val, len);
146 argoffset += len;
147 }
148 }
149 else if (TYPE_CODE (type) == TYPE_CODE_FLT
150 && len == 16
151 && !tdep->soft_float
152 && (gdbarch_long_double_format (gdbarch)
153 == floatformats_ibm_long_double))
154 {
155 /* IBM long double passed in two FP registers if
156 available, otherwise 8-byte aligned stack. */
157 if (freg <= 7)
158 {
159 if (write_pass)
160 {
161 regcache_cooked_write (regcache,
162 tdep->ppc_fp0_regnum + freg,
163 val);
164 regcache_cooked_write (regcache,
165 tdep->ppc_fp0_regnum + freg + 1,
166 val + 8);
167 }
168 freg += 2;
169 }
170 else
171 {
172 argoffset = align_up (argoffset, 8);
173 if (write_pass)
174 write_memory (sp + argoffset, val, len);
175 argoffset += 16;
176 }
177 }
178 else if (len == 8
179 && (TYPE_CODE (type) == TYPE_CODE_INT /* long long */
180 || TYPE_CODE (type) == TYPE_CODE_FLT /* double */
181 || (TYPE_CODE (type) == TYPE_CODE_DECFLOAT
182 && tdep->soft_float)))
183 {
184 /* "long long" or soft-float "double" or "_Decimal64"
185 passed in an odd/even register pair with the low
186 addressed word in the odd register and the high
187 addressed word in the even register, or when the
188 registers run out an 8 byte aligned stack
189 location. */
190 if (greg > 9)
191 {
192 /* Just in case GREG was 10. */
193 greg = 11;
194 argoffset = align_up (argoffset, 8);
195 if (write_pass)
196 write_memory (sp + argoffset, val, len);
197 argoffset += 8;
198 }
199 else
200 {
201 /* Must start on an odd register - r3/r4 etc. */
202 if ((greg & 1) == 0)
203 greg++;
204 if (write_pass)
205 {
206 regcache_cooked_write (regcache,
207 tdep->ppc_gp0_regnum + greg + 0,
208 val + 0);
209 regcache_cooked_write (regcache,
210 tdep->ppc_gp0_regnum + greg + 1,
211 val + 4);
212 }
213 greg += 2;
214 }
215 }
216 else if (len == 16
217 && ((TYPE_CODE (type) == TYPE_CODE_FLT
218 && (gdbarch_long_double_format (gdbarch)
219 == floatformats_ibm_long_double))
220 || (TYPE_CODE (type) == TYPE_CODE_DECFLOAT
221 && tdep->soft_float)))
222 {
223 /* Soft-float IBM long double or _Decimal128 passed in
224 four consecutive registers, or on the stack. The
225 registers are not necessarily odd/even pairs. */
226 if (greg > 7)
227 {
228 greg = 11;
229 argoffset = align_up (argoffset, 8);
230 if (write_pass)
231 write_memory (sp + argoffset, val, len);
232 argoffset += 16;
233 }
234 else
235 {
236 if (write_pass)
237 {
238 regcache_cooked_write (regcache,
239 tdep->ppc_gp0_regnum + greg + 0,
240 val + 0);
241 regcache_cooked_write (regcache,
242 tdep->ppc_gp0_regnum + greg + 1,
243 val + 4);
244 regcache_cooked_write (regcache,
245 tdep->ppc_gp0_regnum + greg + 2,
246 val + 8);
247 regcache_cooked_write (regcache,
248 tdep->ppc_gp0_regnum + greg + 3,
249 val + 12);
250 }
251 greg += 4;
252 }
253 }
254 else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && len <= 8
255 && !tdep->soft_float)
256 {
257 /* 32-bit and 64-bit decimal floats go in f1 .. f8. They can
258 end up in memory. */
259
260 if (freg <= 8)
261 {
262 if (write_pass)
263 {
264 gdb_byte regval[MAX_REGISTER_SIZE];
265 const gdb_byte *p;
266
267 /* 32-bit decimal floats are right aligned in the
268 doubleword. */
269 if (TYPE_LENGTH (type) == 4)
270 {
271 memcpy (regval + 4, val, 4);
272 p = regval;
273 }
274 else
275 p = val;
276
277 regcache_cooked_write (regcache,
278 tdep->ppc_fp0_regnum + freg, p);
279 }
280
281 freg++;
282 }
283 else
284 {
285 argoffset = align_up (argoffset, len);
286
287 if (write_pass)
288 /* Write value in the stack's parameter save area. */
289 write_memory (sp + argoffset, val, len);
290
291 argoffset += len;
292 }
293 }
294 else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && len == 16
295 && !tdep->soft_float)
296 {
297 /* 128-bit decimal floats go in f2 .. f7, always in even/odd
298 pairs. They can end up in memory, using two doublewords. */
299
300 if (freg <= 6)
301 {
302 /* Make sure freg is even. */
303 freg += freg & 1;
304
305 if (write_pass)
306 {
307 regcache_cooked_write (regcache,
308 tdep->ppc_fp0_regnum + freg, val);
309 regcache_cooked_write (regcache,
310 tdep->ppc_fp0_regnum + freg + 1, val + 8);
311 }
312 }
313 else
314 {
315 argoffset = align_up (argoffset, 8);
316
317 if (write_pass)
318 write_memory (sp + argoffset, val, 16);
319
320 argoffset += 16;
321 }
322
323 /* If a 128-bit decimal float goes to the stack because only f7
324 and f8 are free (thus there's no even/odd register pair
325 available), these registers should be marked as occupied.
326 Hence we increase freg even when writing to memory. */
327 freg += 2;
328 }
329 else if (len == 16
330 && TYPE_CODE (type) == TYPE_CODE_ARRAY
331 && TYPE_VECTOR (type)
332 && tdep->vector_abi == POWERPC_VEC_ALTIVEC)
333 {
334 /* Vector parameter passed in an Altivec register, or
335 when that runs out, 16 byte aligned stack location. */
336 if (vreg <= 13)
337 {
338 if (write_pass)
339 regcache_cooked_write (regcache,
340 tdep->ppc_vr0_regnum + vreg, val);
341 vreg++;
342 }
343 else
344 {
345 argoffset = align_up (argoffset, 16);
346 if (write_pass)
347 write_memory (sp + argoffset, val, 16);
348 argoffset += 16;
349 }
350 }
351 else if (len == 8
352 && TYPE_CODE (type) == TYPE_CODE_ARRAY
353 && TYPE_VECTOR (type)
354 && tdep->vector_abi == POWERPC_VEC_SPE)
355 {
356 /* Vector parameter passed in an e500 register, or when
357 that runs out, 8 byte aligned stack location. Note
358 that since e500 vector and general purpose registers
359 both map onto the same underlying register set, a
360 "greg" and not a "vreg" is consumed here. A cooked
361 write stores the value in the correct locations
362 within the raw register cache. */
363 if (greg <= 10)
364 {
365 if (write_pass)
366 regcache_cooked_write (regcache,
367 tdep->ppc_ev0_regnum + greg, val);
368 greg++;
369 }
370 else
371 {
372 argoffset = align_up (argoffset, 8);
373 if (write_pass)
374 write_memory (sp + argoffset, val, 8);
375 argoffset += 8;
376 }
377 }
378 else
379 {
380 /* Reduce the parameter down to something that fits in a
381 "word". */
382 gdb_byte word[MAX_REGISTER_SIZE];
383 memset (word, 0, MAX_REGISTER_SIZE);
384 if (len > tdep->wordsize
385 || TYPE_CODE (type) == TYPE_CODE_STRUCT
386 || TYPE_CODE (type) == TYPE_CODE_UNION)
387 {
388 /* Structs and large values are put in an
389 aligned stack slot ... */
390 if (TYPE_CODE (type) == TYPE_CODE_ARRAY
391 && TYPE_VECTOR (type)
392 && len >= 16)
393 structoffset = align_up (structoffset, 16);
394 else
395 structoffset = align_up (structoffset, 8);
396
397 if (write_pass)
398 write_memory (sp + structoffset, val, len);
399 /* ... and then a "word" pointing to that address is
400 passed as the parameter. */
401 store_unsigned_integer (word, tdep->wordsize,
402 sp + structoffset);
403 structoffset += len;
404 }
405 else if (TYPE_CODE (type) == TYPE_CODE_INT)
406 /* Sign or zero extend the "int" into a "word". */
407 store_unsigned_integer (word, tdep->wordsize,
408 unpack_long (type, val));
409 else
410 /* Always goes in the low address. */
411 memcpy (word, val, len);
412 /* Store that "word" in a register, or on the stack.
413 The words have "4" byte alignment. */
414 if (greg <= 10)
415 {
416 if (write_pass)
417 regcache_cooked_write (regcache,
418 tdep->ppc_gp0_regnum + greg, word);
419 greg++;
420 }
421 else
422 {
423 argoffset = align_up (argoffset, tdep->wordsize);
424 if (write_pass)
425 write_memory (sp + argoffset, word, tdep->wordsize);
426 argoffset += tdep->wordsize;
427 }
428 }
429 }
430
431 /* Compute the actual stack space requirements. */
432 if (!write_pass)
433 {
434 /* Remember the amount of space needed by the arguments. */
435 argspace = argoffset;
436 /* Allocate space for both the arguments and the structures. */
437 sp -= (argoffset + structoffset);
438 /* Ensure that the stack is still 16 byte aligned. */
439 sp = align_down (sp, 16);
440 }
441
442 /* The psABI says that "A caller of a function that takes a
443 variable argument list shall set condition register bit 6 to
444 1 if it passes one or more arguments in the floating-point
445 registers. It is strongly recommended that the caller set the
446 bit to 0 otherwise..." Doing this for normal functions too
447 shouldn't hurt. */
448 if (write_pass)
449 {
450 ULONGEST cr;
451
452 regcache_cooked_read_unsigned (regcache, tdep->ppc_cr_regnum, &cr);
453 if (freg > 1)
454 cr |= 0x02000000;
455 else
456 cr &= ~0x02000000;
457 regcache_cooked_write_unsigned (regcache, tdep->ppc_cr_regnum, cr);
458 }
459 }
460
461 /* Update %sp. */
462 regcache_cooked_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp);
463
464 /* Write the backchain (it occupies WORDSIZED bytes). */
465 write_memory_signed_integer (sp, tdep->wordsize, saved_sp);
466
467 /* Point the inferior function call's return address at the dummy's
468 breakpoint. */
469 regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
470
471 return sp;
472 }
473
474 /* Handle the return-value conventions for Decimal Floating Point values
475 in both ppc32 and ppc64, which are the same. */
476 static int
477 get_decimal_float_return_value (struct gdbarch *gdbarch, struct type *valtype,
478 struct regcache *regcache, gdb_byte *readbuf,
479 const gdb_byte *writebuf)
480 {
481 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
482
483 gdb_assert (TYPE_CODE (valtype) == TYPE_CODE_DECFLOAT);
484
485 /* 32-bit and 64-bit decimal floats in f1. */
486 if (TYPE_LENGTH (valtype) <= 8)
487 {
488 if (writebuf != NULL)
489 {
490 gdb_byte regval[MAX_REGISTER_SIZE];
491 const gdb_byte *p;
492
493 /* 32-bit decimal float is right aligned in the doubleword. */
494 if (TYPE_LENGTH (valtype) == 4)
495 {
496 memcpy (regval + 4, writebuf, 4);
497 p = regval;
498 }
499 else
500 p = writebuf;
501
502 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, p);
503 }
504 if (readbuf != NULL)
505 {
506 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, readbuf);
507
508 /* Left align 32-bit decimal float. */
509 if (TYPE_LENGTH (valtype) == 4)
510 memcpy (readbuf, readbuf + 4, 4);
511 }
512 }
513 /* 128-bit decimal floats in f2,f3. */
514 else if (TYPE_LENGTH (valtype) == 16)
515 {
516 if (writebuf != NULL || readbuf != NULL)
517 {
518 int i;
519
520 for (i = 0; i < 2; i++)
521 {
522 if (writebuf != NULL)
523 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 2 + i,
524 writebuf + i * 8);
525 if (readbuf != NULL)
526 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 2 + i,
527 readbuf + i * 8);
528 }
529 }
530 }
531 else
532 /* Can't happen. */
533 internal_error (__FILE__, __LINE__, "Unknown decimal float size.");
534
535 return RETURN_VALUE_REGISTER_CONVENTION;
536 }
537
538 /* Handle the return-value conventions specified by the SysV 32-bit
539 PowerPC ABI (including all the supplements):
540
541 no floating-point: floating-point values returned using 32-bit
542 general-purpose registers.
543
544 Altivec: 128-bit vectors returned using vector registers.
545
546 e500: 64-bit vectors returned using the full full 64 bit EV
547 register, floating-point values returned using 32-bit
548 general-purpose registers.
549
550 GCC (broken): Small struct values right (instead of left) aligned
551 when returned in general-purpose registers. */
552
553 static enum return_value_convention
554 do_ppc_sysv_return_value (struct gdbarch *gdbarch, struct type *type,
555 struct regcache *regcache, gdb_byte *readbuf,
556 const gdb_byte *writebuf, int broken_gcc)
557 {
558 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
559 gdb_assert (tdep->wordsize == 4);
560 if (TYPE_CODE (type) == TYPE_CODE_FLT
561 && TYPE_LENGTH (type) <= 8
562 && !tdep->soft_float)
563 {
564 if (readbuf)
565 {
566 /* Floats and doubles stored in "f1". Convert the value to
567 the required type. */
568 gdb_byte regval[MAX_REGISTER_SIZE];
569 struct type *regtype = register_type (gdbarch,
570 tdep->ppc_fp0_regnum + 1);
571 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, regval);
572 convert_typed_floating (regval, regtype, readbuf, type);
573 }
574 if (writebuf)
575 {
576 /* Floats and doubles stored in "f1". Convert the value to
577 the register's "double" type. */
578 gdb_byte regval[MAX_REGISTER_SIZE];
579 struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum);
580 convert_typed_floating (writebuf, type, regval, regtype);
581 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval);
582 }
583 return RETURN_VALUE_REGISTER_CONVENTION;
584 }
585 if (TYPE_CODE (type) == TYPE_CODE_FLT
586 && TYPE_LENGTH (type) == 16
587 && !tdep->soft_float
588 && (gdbarch_long_double_format (gdbarch) == floatformats_ibm_long_double))
589 {
590 /* IBM long double stored in f1 and f2. */
591 if (readbuf)
592 {
593 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, readbuf);
594 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 2,
595 readbuf + 8);
596 }
597 if (writebuf)
598 {
599 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, writebuf);
600 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 2,
601 writebuf + 8);
602 }
603 return RETURN_VALUE_REGISTER_CONVENTION;
604 }
605 if (TYPE_LENGTH (type) == 16
606 && ((TYPE_CODE (type) == TYPE_CODE_FLT
607 && (gdbarch_long_double_format (gdbarch) == floatformats_ibm_long_double))
608 || (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && tdep->soft_float)))
609 {
610 /* Soft-float IBM long double or _Decimal128 stored in r3, r4,
611 r5, r6. */
612 if (readbuf)
613 {
614 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, readbuf);
615 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
616 readbuf + 4);
617 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 5,
618 readbuf + 8);
619 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 6,
620 readbuf + 12);
621 }
622 if (writebuf)
623 {
624 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, writebuf);
625 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
626 writebuf + 4);
627 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 5,
628 writebuf + 8);
629 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 6,
630 writebuf + 12);
631 }
632 return RETURN_VALUE_REGISTER_CONVENTION;
633 }
634 if ((TYPE_CODE (type) == TYPE_CODE_INT && TYPE_LENGTH (type) == 8)
635 || (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) == 8)
636 || (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && TYPE_LENGTH (type) == 8
637 && tdep->soft_float))
638 {
639 if (readbuf)
640 {
641 /* A long long, double or _Decimal64 stored in the 32 bit
642 r3/r4. */
643 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
644 readbuf + 0);
645 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
646 readbuf + 4);
647 }
648 if (writebuf)
649 {
650 /* A long long, double or _Decimal64 stored in the 32 bit
651 r3/r4. */
652 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
653 writebuf + 0);
654 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
655 writebuf + 4);
656 }
657 return RETURN_VALUE_REGISTER_CONVENTION;
658 }
659 if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && !tdep->soft_float)
660 return get_decimal_float_return_value (gdbarch, type, regcache, readbuf,
661 writebuf);
662 else if ((TYPE_CODE (type) == TYPE_CODE_INT
663 || TYPE_CODE (type) == TYPE_CODE_CHAR
664 || TYPE_CODE (type) == TYPE_CODE_BOOL
665 || TYPE_CODE (type) == TYPE_CODE_PTR
666 || TYPE_CODE (type) == TYPE_CODE_REF
667 || TYPE_CODE (type) == TYPE_CODE_ENUM)
668 && TYPE_LENGTH (type) <= tdep->wordsize)
669 {
670 if (readbuf)
671 {
672 /* Some sort of integer stored in r3. Since TYPE isn't
673 bigger than the register, sign extension isn't a problem
674 - just do everything unsigned. */
675 ULONGEST regval;
676 regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
677 &regval);
678 store_unsigned_integer (readbuf, TYPE_LENGTH (type), regval);
679 }
680 if (writebuf)
681 {
682 /* Some sort of integer stored in r3. Use unpack_long since
683 that should handle any required sign extension. */
684 regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
685 unpack_long (type, writebuf));
686 }
687 return RETURN_VALUE_REGISTER_CONVENTION;
688 }
689 if (TYPE_LENGTH (type) == 16
690 && TYPE_CODE (type) == TYPE_CODE_ARRAY
691 && TYPE_VECTOR (type)
692 && tdep->vector_abi == POWERPC_VEC_ALTIVEC)
693 {
694 if (readbuf)
695 {
696 /* Altivec places the return value in "v2". */
697 regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, readbuf);
698 }
699 if (writebuf)
700 {
701 /* Altivec places the return value in "v2". */
702 regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2, writebuf);
703 }
704 return RETURN_VALUE_REGISTER_CONVENTION;
705 }
706 if (TYPE_LENGTH (type) == 16
707 && TYPE_CODE (type) == TYPE_CODE_ARRAY
708 && TYPE_VECTOR (type)
709 && tdep->vector_abi == POWERPC_VEC_GENERIC)
710 {
711 /* GCC -maltivec -mabi=no-altivec returns vectors in r3/r4/r5/r6.
712 GCC without AltiVec returns them in memory, but it warns about
713 ABI risks in that case; we don't try to support it. */
714 if (readbuf)
715 {
716 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
717 readbuf + 0);
718 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
719 readbuf + 4);
720 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 5,
721 readbuf + 8);
722 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 6,
723 readbuf + 12);
724 }
725 if (writebuf)
726 {
727 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
728 writebuf + 0);
729 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
730 writebuf + 4);
731 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 5,
732 writebuf + 8);
733 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 6,
734 writebuf + 12);
735 }
736 return RETURN_VALUE_REGISTER_CONVENTION;
737 }
738 if (TYPE_LENGTH (type) == 8
739 && TYPE_CODE (type) == TYPE_CODE_ARRAY
740 && TYPE_VECTOR (type)
741 && tdep->vector_abi == POWERPC_VEC_SPE)
742 {
743 /* The e500 ABI places return values for the 64-bit DSP types
744 (__ev64_opaque__) in r3. However, in GDB-speak, ev3
745 corresponds to the entire r3 value for e500, whereas GDB's r3
746 only corresponds to the least significant 32-bits. So place
747 the 64-bit DSP type's value in ev3. */
748 if (readbuf)
749 regcache_cooked_read (regcache, tdep->ppc_ev0_regnum + 3, readbuf);
750 if (writebuf)
751 regcache_cooked_write (regcache, tdep->ppc_ev0_regnum + 3, writebuf);
752 return RETURN_VALUE_REGISTER_CONVENTION;
753 }
754 if (broken_gcc && TYPE_LENGTH (type) <= 8)
755 {
756 /* GCC screwed up for structures or unions whose size is less
757 than or equal to 8 bytes.. Instead of left-aligning, it
758 right-aligns the data into the buffer formed by r3, r4. */
759 gdb_byte regvals[MAX_REGISTER_SIZE * 2];
760 int len = TYPE_LENGTH (type);
761 int offset = (2 * tdep->wordsize - len) % tdep->wordsize;
762
763 if (readbuf)
764 {
765 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
766 regvals + 0 * tdep->wordsize);
767 if (len > tdep->wordsize)
768 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
769 regvals + 1 * tdep->wordsize);
770 memcpy (readbuf, regvals + offset, len);
771 }
772 if (writebuf)
773 {
774 memset (regvals, 0, sizeof regvals);
775 memcpy (regvals + offset, writebuf, len);
776 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
777 regvals + 0 * tdep->wordsize);
778 if (len > tdep->wordsize)
779 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
780 regvals + 1 * tdep->wordsize);
781 }
782
783 return RETURN_VALUE_REGISTER_CONVENTION;
784 }
785 if (TYPE_LENGTH (type) <= 8)
786 {
787 if (readbuf)
788 {
789 /* This matches SVr4 PPC, it does not match GCC. */
790 /* The value is right-padded to 8 bytes and then loaded, as
791 two "words", into r3/r4. */
792 gdb_byte regvals[MAX_REGISTER_SIZE * 2];
793 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
794 regvals + 0 * tdep->wordsize);
795 if (TYPE_LENGTH (type) > tdep->wordsize)
796 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
797 regvals + 1 * tdep->wordsize);
798 memcpy (readbuf, regvals, TYPE_LENGTH (type));
799 }
800 if (writebuf)
801 {
802 /* This matches SVr4 PPC, it does not match GCC. */
803 /* The value is padded out to 8 bytes and then loaded, as
804 two "words" into r3/r4. */
805 gdb_byte regvals[MAX_REGISTER_SIZE * 2];
806 memset (regvals, 0, sizeof regvals);
807 memcpy (regvals, writebuf, TYPE_LENGTH (type));
808 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
809 regvals + 0 * tdep->wordsize);
810 if (TYPE_LENGTH (type) > tdep->wordsize)
811 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
812 regvals + 1 * tdep->wordsize);
813 }
814 return RETURN_VALUE_REGISTER_CONVENTION;
815 }
816 return RETURN_VALUE_STRUCT_CONVENTION;
817 }
818
819 enum return_value_convention
820 ppc_sysv_abi_return_value (struct gdbarch *gdbarch, struct type *func_type,
821 struct type *valtype, struct regcache *regcache,
822 gdb_byte *readbuf, const gdb_byte *writebuf)
823 {
824 return do_ppc_sysv_return_value (gdbarch, valtype, regcache, readbuf,
825 writebuf, 0);
826 }
827
828 enum return_value_convention
829 ppc_sysv_abi_broken_return_value (struct gdbarch *gdbarch,
830 struct type *func_type,
831 struct type *valtype,
832 struct regcache *regcache,
833 gdb_byte *readbuf, const gdb_byte *writebuf)
834 {
835 return do_ppc_sysv_return_value (gdbarch, valtype, regcache, readbuf,
836 writebuf, 1);
837 }
838
839 /* The helper function for 64-bit SYSV push_dummy_call. Converts the
840 function's code address back into the function's descriptor
841 address.
842
843 Find a value for the TOC register. Every symbol should have both
844 ".FN" and "FN" in the minimal symbol table. "FN" points at the
845 FN's descriptor, while ".FN" points at the entry point (which
846 matches FUNC_ADDR). Need to reverse from FUNC_ADDR back to the
847 FN's descriptor address (while at the same time being careful to
848 find "FN" in the same object file as ".FN"). */
849
850 static int
851 convert_code_addr_to_desc_addr (CORE_ADDR code_addr, CORE_ADDR *desc_addr)
852 {
853 struct obj_section *dot_fn_section;
854 struct minimal_symbol *dot_fn;
855 struct minimal_symbol *fn;
856 CORE_ADDR toc;
857 /* Find the minimal symbol that corresponds to CODE_ADDR (should
858 have a name of the form ".FN"). */
859 dot_fn = lookup_minimal_symbol_by_pc (code_addr);
860 if (dot_fn == NULL || SYMBOL_LINKAGE_NAME (dot_fn)[0] != '.')
861 return 0;
862 /* Get the section that contains CODE_ADDR. Need this for the
863 "objfile" that it contains. */
864 dot_fn_section = find_pc_section (code_addr);
865 if (dot_fn_section == NULL || dot_fn_section->objfile == NULL)
866 return 0;
867 /* Now find the corresponding "FN" (dropping ".") minimal symbol's
868 address. Only look for the minimal symbol in ".FN"'s object file
869 - avoids problems when two object files (i.e., shared libraries)
870 contain a minimal symbol with the same name. */
871 fn = lookup_minimal_symbol (SYMBOL_LINKAGE_NAME (dot_fn) + 1, NULL,
872 dot_fn_section->objfile);
873 if (fn == NULL)
874 return 0;
875 /* Found a descriptor. */
876 (*desc_addr) = SYMBOL_VALUE_ADDRESS (fn);
877 return 1;
878 }
879
880 /* Pass the arguments in either registers, or in the stack. Using the
881 ppc 64 bit SysV ABI.
882
883 This implements a dumbed down version of the ABI. It always writes
884 values to memory, GPR and FPR, even when not necessary. Doing this
885 greatly simplifies the logic. */
886
887 CORE_ADDR
888 ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
889 struct regcache *regcache, CORE_ADDR bp_addr,
890 int nargs, struct value **args, CORE_ADDR sp,
891 int struct_return, CORE_ADDR struct_addr)
892 {
893 CORE_ADDR func_addr = find_function_addr (function, NULL);
894 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
895 ULONGEST back_chain;
896 /* See for-loop comment below. */
897 int write_pass;
898 /* Size of the Altivec's vector parameter region, the final value is
899 computed in the for-loop below. */
900 LONGEST vparam_size = 0;
901 /* Size of the general parameter region, the final value is computed
902 in the for-loop below. */
903 LONGEST gparam_size = 0;
904 /* Kevin writes ... I don't mind seeing tdep->wordsize used in the
905 calls to align_up(), align_down(), etc. because this makes it
906 easier to reuse this code (in a copy/paste sense) in the future,
907 but it is a 64-bit ABI and asserting that the wordsize is 8 bytes
908 at some point makes it easier to verify that this function is
909 correct without having to do a non-local analysis to figure out
910 the possible values of tdep->wordsize. */
911 gdb_assert (tdep->wordsize == 8);
912
913 /* This function exists to support a calling convention that
914 requires floating-point registers. It shouldn't be used on
915 processors that lack them. */
916 gdb_assert (ppc_floating_point_unit_p (gdbarch));
917
918 /* By this stage in the proceedings, SP has been decremented by "red
919 zone size" + "struct return size". Fetch the stack-pointer from
920 before this and use that as the BACK_CHAIN. */
921 regcache_cooked_read_unsigned (regcache, gdbarch_sp_regnum (gdbarch),
922 &back_chain);
923
924 /* Go through the argument list twice.
925
926 Pass 1: Compute the function call's stack space and register
927 requirements.
928
929 Pass 2: Replay the same computation but this time also write the
930 values out to the target. */
931
932 for (write_pass = 0; write_pass < 2; write_pass++)
933 {
934 int argno;
935 /* Next available floating point register for float and double
936 arguments. */
937 int freg = 1;
938 /* Next available general register for non-vector (but possibly
939 float) arguments. */
940 int greg = 3;
941 /* Next available vector register for vector arguments. */
942 int vreg = 2;
943 /* The address, at which the next general purpose parameter
944 (integer, struct, float, ...) should be saved. */
945 CORE_ADDR gparam;
946 /* Address, at which the next Altivec vector parameter should be
947 saved. */
948 CORE_ADDR vparam;
949
950 if (!write_pass)
951 {
952 /* During the first pass, GPARAM and VPARAM are more like
953 offsets (start address zero) than addresses. That way
954 they accumulate the total stack space each region
955 requires. */
956 gparam = 0;
957 vparam = 0;
958 }
959 else
960 {
961 /* Decrement the stack pointer making space for the Altivec
962 and general on-stack parameters. Set vparam and gparam
963 to their corresponding regions. */
964 vparam = align_down (sp - vparam_size, 16);
965 gparam = align_down (vparam - gparam_size, 16);
966 /* Add in space for the TOC, link editor double word,
967 compiler double word, LR save area, CR save area. */
968 sp = align_down (gparam - 48, 16);
969 }
970
971 /* If the function is returning a `struct', then there is an
972 extra hidden parameter (which will be passed in r3)
973 containing the address of that struct.. In that case we
974 should advance one word and start from r4 register to copy
975 parameters. This also consumes one on-stack parameter slot. */
976 if (struct_return)
977 {
978 if (write_pass)
979 regcache_cooked_write_signed (regcache,
980 tdep->ppc_gp0_regnum + greg,
981 struct_addr);
982 greg++;
983 gparam = align_up (gparam + tdep->wordsize, tdep->wordsize);
984 }
985
986 for (argno = 0; argno < nargs; argno++)
987 {
988 struct value *arg = args[argno];
989 struct type *type = check_typedef (value_type (arg));
990 const bfd_byte *val = value_contents (arg);
991
992 if (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) <= 8)
993 {
994 /* Floats and Doubles go in f1 .. f13. They also
995 consume a left aligned GREG,, and can end up in
996 memory. */
997 if (write_pass)
998 {
999 gdb_byte regval[MAX_REGISTER_SIZE];
1000 const gdb_byte *p;
1001
1002 /* Version 1.7 of the 64-bit PowerPC ELF ABI says:
1003
1004 "Single precision floating point values are mapped to
1005 the first word in a single doubleword."
1006
1007 And version 1.9 says:
1008
1009 "Single precision floating point values are mapped to
1010 the second word in a single doubleword."
1011
1012 GDB then writes single precision floating point values
1013 at both words in a doubleword, to support both ABIs. */
1014 if (TYPE_LENGTH (type) == 4)
1015 {
1016 memcpy (regval, val, 4);
1017 memcpy (regval + 4, val, 4);
1018 p = regval;
1019 }
1020 else
1021 p = val;
1022
1023 /* Write value in the stack's parameter save area. */
1024 write_memory (gparam, p, 8);
1025
1026 if (freg <= 13)
1027 {
1028 struct type *regtype
1029 = register_type (gdbarch, tdep->ppc_fp0_regnum);
1030
1031 convert_typed_floating (val, type, regval, regtype);
1032 regcache_cooked_write (regcache,
1033 tdep->ppc_fp0_regnum + freg,
1034 regval);
1035 }
1036 if (greg <= 10)
1037 regcache_cooked_write (regcache,
1038 tdep->ppc_gp0_regnum + greg,
1039 regval);
1040 }
1041
1042 freg++;
1043 greg++;
1044 /* Always consume parameter stack space. */
1045 gparam = align_up (gparam + 8, tdep->wordsize);
1046 }
1047 else if (TYPE_CODE (type) == TYPE_CODE_FLT
1048 && TYPE_LENGTH (type) == 16
1049 && (gdbarch_long_double_format (gdbarch)
1050 == floatformats_ibm_long_double))
1051 {
1052 /* IBM long double stored in two doublewords of the
1053 parameter save area and corresponding registers. */
1054 if (write_pass)
1055 {
1056 if (!tdep->soft_float && freg <= 13)
1057 {
1058 regcache_cooked_write (regcache,
1059 tdep->ppc_fp0_regnum + freg,
1060 val);
1061 if (freg <= 12)
1062 regcache_cooked_write (regcache,
1063 tdep->ppc_fp0_regnum + freg + 1,
1064 val + 8);
1065 }
1066 if (greg <= 10)
1067 {
1068 regcache_cooked_write (regcache,
1069 tdep->ppc_gp0_regnum + greg,
1070 val);
1071 if (greg <= 9)
1072 regcache_cooked_write (regcache,
1073 tdep->ppc_gp0_regnum + greg + 1,
1074 val + 8);
1075 }
1076 write_memory (gparam, val, TYPE_LENGTH (type));
1077 }
1078 freg += 2;
1079 greg += 2;
1080 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
1081 }
1082 else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT
1083 && TYPE_LENGTH (type) <= 8)
1084 {
1085 /* 32-bit and 64-bit decimal floats go in f1 .. f13. They can
1086 end up in memory. */
1087 if (write_pass)
1088 {
1089 gdb_byte regval[MAX_REGISTER_SIZE];
1090 const gdb_byte *p;
1091
1092 /* 32-bit decimal floats are right aligned in the
1093 doubleword. */
1094 if (TYPE_LENGTH (type) == 4)
1095 {
1096 memcpy (regval + 4, val, 4);
1097 p = regval;
1098 }
1099 else
1100 p = val;
1101
1102 /* Write value in the stack's parameter save area. */
1103 write_memory (gparam, p, 8);
1104
1105 if (freg <= 13)
1106 regcache_cooked_write (regcache,
1107 tdep->ppc_fp0_regnum + freg, p);
1108 }
1109
1110 freg++;
1111 greg++;
1112 /* Always consume parameter stack space. */
1113 gparam = align_up (gparam + 8, tdep->wordsize);
1114 }
1115 else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT &&
1116 TYPE_LENGTH (type) == 16)
1117 {
1118 /* 128-bit decimal floats go in f2 .. f12, always in even/odd
1119 pairs. They can end up in memory, using two doublewords. */
1120 if (write_pass)
1121 {
1122 if (freg <= 12)
1123 {
1124 /* Make sure freg is even. */
1125 freg += freg & 1;
1126 regcache_cooked_write (regcache,
1127 tdep->ppc_fp0_regnum + freg, val);
1128 regcache_cooked_write (regcache,
1129 tdep->ppc_fp0_regnum + freg + 1, val + 8);
1130 }
1131
1132 write_memory (gparam, val, TYPE_LENGTH (type));
1133 }
1134
1135 freg += 2;
1136 greg += 2;
1137 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
1138 }
1139 else if (TYPE_LENGTH (type) == 16 && TYPE_VECTOR (type)
1140 && TYPE_CODE (type) == TYPE_CODE_ARRAY
1141 && tdep->ppc_vr0_regnum >= 0)
1142 {
1143 /* In the Altivec ABI, vectors go in the vector
1144 registers v2 .. v13, or when that runs out, a vector
1145 annex which goes above all the normal parameters.
1146 NOTE: cagney/2003-09-21: This is a guess based on the
1147 PowerOpen Altivec ABI. */
1148 if (vreg <= 13)
1149 {
1150 if (write_pass)
1151 regcache_cooked_write (regcache,
1152 tdep->ppc_vr0_regnum + vreg, val);
1153 vreg++;
1154 }
1155 else
1156 {
1157 if (write_pass)
1158 write_memory (vparam, val, TYPE_LENGTH (type));
1159 vparam = align_up (vparam + TYPE_LENGTH (type), 16);
1160 }
1161 }
1162 else if ((TYPE_CODE (type) == TYPE_CODE_INT
1163 || TYPE_CODE (type) == TYPE_CODE_ENUM
1164 || TYPE_CODE (type) == TYPE_CODE_BOOL
1165 || TYPE_CODE (type) == TYPE_CODE_CHAR
1166 || TYPE_CODE (type) == TYPE_CODE_PTR
1167 || TYPE_CODE (type) == TYPE_CODE_REF)
1168 && TYPE_LENGTH (type) <= 8)
1169 {
1170 /* Scalars and Pointers get sign[un]extended and go in
1171 gpr3 .. gpr10. They can also end up in memory. */
1172 if (write_pass)
1173 {
1174 /* Sign extend the value, then store it unsigned. */
1175 ULONGEST word = unpack_long (type, val);
1176 /* Convert any function code addresses into
1177 descriptors. */
1178 if (TYPE_CODE (type) == TYPE_CODE_PTR
1179 || TYPE_CODE (type) == TYPE_CODE_REF)
1180 {
1181 struct type *target_type;
1182 target_type = check_typedef (TYPE_TARGET_TYPE (type));
1183
1184 if (TYPE_CODE (target_type) == TYPE_CODE_FUNC
1185 || TYPE_CODE (target_type) == TYPE_CODE_METHOD)
1186 {
1187 CORE_ADDR desc = word;
1188 convert_code_addr_to_desc_addr (word, &desc);
1189 word = desc;
1190 }
1191 }
1192 if (greg <= 10)
1193 regcache_cooked_write_unsigned (regcache,
1194 tdep->ppc_gp0_regnum +
1195 greg, word);
1196 write_memory_unsigned_integer (gparam, tdep->wordsize,
1197 word);
1198 }
1199 greg++;
1200 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
1201 }
1202 else
1203 {
1204 int byte;
1205 for (byte = 0; byte < TYPE_LENGTH (type);
1206 byte += tdep->wordsize)
1207 {
1208 if (write_pass && greg <= 10)
1209 {
1210 gdb_byte regval[MAX_REGISTER_SIZE];
1211 int len = TYPE_LENGTH (type) - byte;
1212 if (len > tdep->wordsize)
1213 len = tdep->wordsize;
1214 memset (regval, 0, sizeof regval);
1215 /* The ABI (version 1.9) specifies that values
1216 smaller than one doubleword are right-aligned
1217 and those larger are left-aligned. GCC
1218 versions before 3.4 implemented this
1219 incorrectly; see
1220 <http://gcc.gnu.org/gcc-3.4/powerpc-abi.html>. */
1221 if (byte == 0)
1222 memcpy (regval + tdep->wordsize - len,
1223 val + byte, len);
1224 else
1225 memcpy (regval, val + byte, len);
1226 regcache_cooked_write (regcache, greg, regval);
1227 }
1228 greg++;
1229 }
1230 if (write_pass)
1231 {
1232 /* WARNING: cagney/2003-09-21: Strictly speaking, this
1233 isn't necessary, unfortunately, GCC appears to get
1234 "struct convention" parameter passing wrong putting
1235 odd sized structures in memory instead of in a
1236 register. Work around this by always writing the
1237 value to memory. Fortunately, doing this
1238 simplifies the code. */
1239 int len = TYPE_LENGTH (type);
1240 if (len < tdep->wordsize)
1241 write_memory (gparam + tdep->wordsize - len, val, len);
1242 else
1243 write_memory (gparam, val, len);
1244 }
1245 if (freg <= 13
1246 && TYPE_CODE (type) == TYPE_CODE_STRUCT
1247 && TYPE_NFIELDS (type) == 1
1248 && TYPE_LENGTH (type) <= 16)
1249 {
1250 /* The ABI (version 1.9) specifies that structs
1251 containing a single floating-point value, at any
1252 level of nesting of single-member structs, are
1253 passed in floating-point registers. */
1254 while (TYPE_CODE (type) == TYPE_CODE_STRUCT
1255 && TYPE_NFIELDS (type) == 1)
1256 type = check_typedef (TYPE_FIELD_TYPE (type, 0));
1257 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1258 {
1259 if (TYPE_LENGTH (type) <= 8)
1260 {
1261 if (write_pass)
1262 {
1263 gdb_byte regval[MAX_REGISTER_SIZE];
1264 struct type *regtype
1265 = register_type (gdbarch,
1266 tdep->ppc_fp0_regnum);
1267 convert_typed_floating (val, type, regval,
1268 regtype);
1269 regcache_cooked_write (regcache,
1270 (tdep->ppc_fp0_regnum
1271 + freg),
1272 regval);
1273 }
1274 freg++;
1275 }
1276 else if (TYPE_LENGTH (type) == 16
1277 && (gdbarch_long_double_format (gdbarch)
1278 == floatformats_ibm_long_double))
1279 {
1280 if (write_pass)
1281 {
1282 regcache_cooked_write (regcache,
1283 (tdep->ppc_fp0_regnum
1284 + freg),
1285 val);
1286 if (freg <= 12)
1287 regcache_cooked_write (regcache,
1288 (tdep->ppc_fp0_regnum
1289 + freg + 1),
1290 val + 8);
1291 }
1292 freg += 2;
1293 }
1294 }
1295 }
1296 /* Always consume parameter stack space. */
1297 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
1298 }
1299 }
1300
1301 if (!write_pass)
1302 {
1303 /* Save the true region sizes ready for the second pass. */
1304 vparam_size = vparam;
1305 /* Make certain that the general parameter save area is at
1306 least the minimum 8 registers (or doublewords) in size. */
1307 if (greg < 8)
1308 gparam_size = 8 * tdep->wordsize;
1309 else
1310 gparam_size = gparam;
1311 }
1312 }
1313
1314 /* Update %sp. */
1315 regcache_cooked_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp);
1316
1317 /* Write the backchain (it occupies WORDSIZED bytes). */
1318 write_memory_signed_integer (sp, tdep->wordsize, back_chain);
1319
1320 /* Point the inferior function call's return address at the dummy's
1321 breakpoint. */
1322 regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
1323
1324 /* Use the func_addr to find the descriptor, and use that to find
1325 the TOC. */
1326 {
1327 CORE_ADDR desc_addr;
1328 if (convert_code_addr_to_desc_addr (func_addr, &desc_addr))
1329 {
1330 /* The TOC is the second double word in the descriptor. */
1331 CORE_ADDR toc =
1332 read_memory_unsigned_integer (desc_addr + tdep->wordsize,
1333 tdep->wordsize);
1334 regcache_cooked_write_unsigned (regcache,
1335 tdep->ppc_gp0_regnum + 2, toc);
1336 }
1337 }
1338
1339 return sp;
1340 }
1341
1342
1343 /* The 64 bit ABI return value convention.
1344
1345 Return non-zero if the return-value is stored in a register, return
1346 0 if the return-value is instead stored on the stack (a.k.a.,
1347 struct return convention).
1348
1349 For a return-value stored in a register: when WRITEBUF is non-NULL,
1350 copy the buffer to the corresponding register return-value location
1351 location; when READBUF is non-NULL, fill the buffer from the
1352 corresponding register return-value location. */
1353 enum return_value_convention
1354 ppc64_sysv_abi_return_value (struct gdbarch *gdbarch, struct type *func_type,
1355 struct type *valtype, struct regcache *regcache,
1356 gdb_byte *readbuf, const gdb_byte *writebuf)
1357 {
1358 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1359
1360 /* This function exists to support a calling convention that
1361 requires floating-point registers. It shouldn't be used on
1362 processors that lack them. */
1363 gdb_assert (ppc_floating_point_unit_p (gdbarch));
1364
1365 /* Floats and doubles in F1. */
1366 if (TYPE_CODE (valtype) == TYPE_CODE_FLT && TYPE_LENGTH (valtype) <= 8)
1367 {
1368 gdb_byte regval[MAX_REGISTER_SIZE];
1369 struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum);
1370 if (writebuf != NULL)
1371 {
1372 convert_typed_floating (writebuf, valtype, regval, regtype);
1373 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval);
1374 }
1375 if (readbuf != NULL)
1376 {
1377 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, regval);
1378 convert_typed_floating (regval, regtype, readbuf, valtype);
1379 }
1380 return RETURN_VALUE_REGISTER_CONVENTION;
1381 }
1382 if (TYPE_CODE (valtype) == TYPE_CODE_DECFLOAT)
1383 return get_decimal_float_return_value (gdbarch, valtype, regcache, readbuf,
1384 writebuf);
1385 /* Integers in r3. */
1386 if ((TYPE_CODE (valtype) == TYPE_CODE_INT
1387 || TYPE_CODE (valtype) == TYPE_CODE_ENUM
1388 || TYPE_CODE (valtype) == TYPE_CODE_CHAR
1389 || TYPE_CODE (valtype) == TYPE_CODE_BOOL)
1390 && TYPE_LENGTH (valtype) <= 8)
1391 {
1392 if (writebuf != NULL)
1393 {
1394 /* Be careful to sign extend the value. */
1395 regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
1396 unpack_long (valtype, writebuf));
1397 }
1398 if (readbuf != NULL)
1399 {
1400 /* Extract the integer from r3. Since this is truncating the
1401 value, there isn't a sign extension problem. */
1402 ULONGEST regval;
1403 regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
1404 &regval);
1405 store_unsigned_integer (readbuf, TYPE_LENGTH (valtype), regval);
1406 }
1407 return RETURN_VALUE_REGISTER_CONVENTION;
1408 }
1409 /* All pointers live in r3. */
1410 if (TYPE_CODE (valtype) == TYPE_CODE_PTR
1411 || TYPE_CODE (valtype) == TYPE_CODE_REF)
1412 {
1413 /* All pointers live in r3. */
1414 if (writebuf != NULL)
1415 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, writebuf);
1416 if (readbuf != NULL)
1417 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, readbuf);
1418 return RETURN_VALUE_REGISTER_CONVENTION;
1419 }
1420 /* Array type has more than one use. */
1421 if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY)
1422 {
1423 /* Small character arrays are returned, right justified, in r3. */
1424 if (TYPE_LENGTH (valtype) <= 8
1425 && TYPE_CODE (TYPE_TARGET_TYPE (valtype)) == TYPE_CODE_INT
1426 && TYPE_LENGTH (TYPE_TARGET_TYPE (valtype)) == 1)
1427 {
1428 int offset = (register_size (gdbarch, tdep->ppc_gp0_regnum + 3)
1429 - TYPE_LENGTH (valtype));
1430 if (writebuf != NULL)
1431 regcache_cooked_write_part (regcache, tdep->ppc_gp0_regnum + 3,
1432 offset, TYPE_LENGTH (valtype), writebuf);
1433 if (readbuf != NULL)
1434 regcache_cooked_read_part (regcache, tdep->ppc_gp0_regnum + 3,
1435 offset, TYPE_LENGTH (valtype), readbuf);
1436 return RETURN_VALUE_REGISTER_CONVENTION;
1437 }
1438 /* A VMX vector is returned in v2. */
1439 if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY
1440 && TYPE_VECTOR (valtype) && tdep->ppc_vr0_regnum >= 0)
1441 {
1442 if (readbuf)
1443 regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, readbuf);
1444 if (writebuf)
1445 regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2, writebuf);
1446 return RETURN_VALUE_REGISTER_CONVENTION;
1447 }
1448 }
1449 /* Big floating point values get stored in adjacent floating
1450 point registers, starting with F1. */
1451 if (TYPE_CODE (valtype) == TYPE_CODE_FLT
1452 && (TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 32))
1453 {
1454 if (writebuf || readbuf != NULL)
1455 {
1456 int i;
1457 for (i = 0; i < TYPE_LENGTH (valtype) / 8; i++)
1458 {
1459 if (writebuf != NULL)
1460 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1 + i,
1461 (const bfd_byte *) writebuf + i * 8);
1462 if (readbuf != NULL)
1463 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1 + i,
1464 (bfd_byte *) readbuf + i * 8);
1465 }
1466 }
1467 return RETURN_VALUE_REGISTER_CONVENTION;
1468 }
1469 /* Complex values get returned in f1:f2, need to convert. */
1470 if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX
1471 && (TYPE_LENGTH (valtype) == 8 || TYPE_LENGTH (valtype) == 16))
1472 {
1473 if (regcache != NULL)
1474 {
1475 int i;
1476 for (i = 0; i < 2; i++)
1477 {
1478 gdb_byte regval[MAX_REGISTER_SIZE];
1479 struct type *regtype =
1480 register_type (gdbarch, tdep->ppc_fp0_regnum);
1481 if (writebuf != NULL)
1482 {
1483 convert_typed_floating ((const bfd_byte *) writebuf +
1484 i * (TYPE_LENGTH (valtype) / 2),
1485 valtype, regval, regtype);
1486 regcache_cooked_write (regcache,
1487 tdep->ppc_fp0_regnum + 1 + i,
1488 regval);
1489 }
1490 if (readbuf != NULL)
1491 {
1492 regcache_cooked_read (regcache,
1493 tdep->ppc_fp0_regnum + 1 + i,
1494 regval);
1495 convert_typed_floating (regval, regtype,
1496 (bfd_byte *) readbuf +
1497 i * (TYPE_LENGTH (valtype) / 2),
1498 valtype);
1499 }
1500 }
1501 }
1502 return RETURN_VALUE_REGISTER_CONVENTION;
1503 }
1504 /* Big complex values get stored in f1:f4. */
1505 if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX && TYPE_LENGTH (valtype) == 32)
1506 {
1507 if (regcache != NULL)
1508 {
1509 int i;
1510 for (i = 0; i < 4; i++)
1511 {
1512 if (writebuf != NULL)
1513 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1 + i,
1514 (const bfd_byte *) writebuf + i * 8);
1515 if (readbuf != NULL)
1516 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1 + i,
1517 (bfd_byte *) readbuf + i * 8);
1518 }
1519 }
1520 return RETURN_VALUE_REGISTER_CONVENTION;
1521 }
1522 return RETURN_VALUE_STRUCT_CONVENTION;
1523 }
1524
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