2004-11-12 Andrew Cagney <cagney@gnu.org>
[deliverable/binutils-gdb.git] / gdb / ppc-sysv-tdep.c
1 /* Target-dependent code for PowerPC systems using the SVR4 ABI
2 for GDB, the GNU debugger.
3
4 Copyright 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
22
23 #include "defs.h"
24 #include "gdbcore.h"
25 #include "inferior.h"
26 #include "regcache.h"
27 #include "value.h"
28 #include "gdb_string.h"
29 #include "gdb_assert.h"
30 #include "ppc-tdep.h"
31 #include "target.h"
32 #include "objfiles.h"
33 #include "infcall.h"
34
35 /* Pass the arguments in either registers, or in the stack. Using the
36 ppc sysv ABI, the first eight words of the argument list (that might
37 be less than eight parameters if some parameters occupy more than one
38 word) are passed in r3..r10 registers. float and double parameters are
39 passed in fpr's, in addition to that. Rest of the parameters if any
40 are passed in user stack.
41
42 If the function is returning a structure, then the return address is passed
43 in r3, then the first 7 words of the parametes can be passed in registers,
44 starting from r4. */
45
46 CORE_ADDR
47 ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
48 struct regcache *regcache, CORE_ADDR bp_addr,
49 int nargs, struct value **args, CORE_ADDR sp,
50 int struct_return, CORE_ADDR struct_addr)
51 {
52 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
53 const CORE_ADDR saved_sp = read_sp ();
54 int argspace = 0; /* 0 is an initial wrong guess. */
55 int write_pass;
56
57 /* Go through the argument list twice.
58
59 Pass 1: Figure out how much new stack space is required for
60 arguments and pushed values. Unlike the PowerOpen ABI, the SysV
61 ABI doesn't reserve any extra space for parameters which are put
62 in registers, but does always push structures and then pass their
63 address.
64
65 Pass 2: Replay the same computation but this time also write the
66 values out to the target. */
67
68 for (write_pass = 0; write_pass < 2; write_pass++)
69 {
70 int argno;
71 /* Next available floating point register for float and double
72 arguments. */
73 int freg = 1;
74 /* Next available general register for non-float, non-vector
75 arguments. */
76 int greg = 3;
77 /* Next available vector register for vector arguments. */
78 int vreg = 2;
79 /* Arguments start above the "LR save word" and "Back chain". */
80 int argoffset = 2 * tdep->wordsize;
81 /* Structures start after the arguments. */
82 int structoffset = argoffset + argspace;
83
84 /* If the function is returning a `struct', then the first word
85 (which will be passed in r3) is used for struct return
86 address. In that case we should advance one word and start
87 from r4 register to copy parameters. */
88 if (struct_return)
89 {
90 if (write_pass)
91 regcache_cooked_write_signed (regcache,
92 tdep->ppc_gp0_regnum + greg,
93 struct_addr);
94 greg++;
95 }
96
97 for (argno = 0; argno < nargs; argno++)
98 {
99 struct value *arg = args[argno];
100 struct type *type = check_typedef (value_type (arg));
101 int len = TYPE_LENGTH (type);
102 char *val = VALUE_CONTENTS (arg);
103
104 if (TYPE_CODE (type) == TYPE_CODE_FLT
105 && ppc_floating_point_unit_p (current_gdbarch) && len <= 8)
106 {
107 /* Floating point value converted to "double" then
108 passed in an FP register, when the registers run out,
109 8 byte aligned stack is used. */
110 if (freg <= 8)
111 {
112 if (write_pass)
113 {
114 /* Always store the floating point value using
115 the register's floating-point format. */
116 char regval[MAX_REGISTER_SIZE];
117 struct type *regtype
118 = register_type (gdbarch, tdep->ppc_fp0_regnum + freg);
119 convert_typed_floating (val, type, regval, regtype);
120 regcache_cooked_write (regcache,
121 tdep->ppc_fp0_regnum + freg,
122 regval);
123 }
124 freg++;
125 }
126 else
127 {
128 /* SysV ABI converts floats to doubles before
129 writing them to an 8 byte aligned stack location. */
130 argoffset = align_up (argoffset, 8);
131 if (write_pass)
132 {
133 char memval[8];
134 struct type *memtype;
135 switch (TARGET_BYTE_ORDER)
136 {
137 case BFD_ENDIAN_BIG:
138 memtype = builtin_type_ieee_double_big;
139 break;
140 case BFD_ENDIAN_LITTLE:
141 memtype = builtin_type_ieee_double_little;
142 break;
143 default:
144 internal_error (__FILE__, __LINE__, "bad switch");
145 }
146 convert_typed_floating (val, type, memval, memtype);
147 write_memory (sp + argoffset, val, len);
148 }
149 argoffset += 8;
150 }
151 }
152 else if (len == 8 && (TYPE_CODE (type) == TYPE_CODE_INT /* long long */
153 || (!ppc_floating_point_unit_p (current_gdbarch) && TYPE_CODE (type) == TYPE_CODE_FLT))) /* double */
154 {
155 /* "long long" or "double" passed in an odd/even
156 register pair with the low addressed word in the odd
157 register and the high addressed word in the even
158 register, or when the registers run out an 8 byte
159 aligned stack location. */
160 if (greg > 9)
161 {
162 /* Just in case GREG was 10. */
163 greg = 11;
164 argoffset = align_up (argoffset, 8);
165 if (write_pass)
166 write_memory (sp + argoffset, val, len);
167 argoffset += 8;
168 }
169 else if (tdep->wordsize == 8)
170 {
171 if (write_pass)
172 regcache_cooked_write (regcache,
173 tdep->ppc_gp0_regnum + greg, val);
174 greg += 1;
175 }
176 else
177 {
178 /* Must start on an odd register - r3/r4 etc. */
179 if ((greg & 1) == 0)
180 greg++;
181 if (write_pass)
182 {
183 regcache_cooked_write (regcache,
184 tdep->ppc_gp0_regnum + greg + 0,
185 val + 0);
186 regcache_cooked_write (regcache,
187 tdep->ppc_gp0_regnum + greg + 1,
188 val + 4);
189 }
190 greg += 2;
191 }
192 }
193 else if (len == 16
194 && TYPE_CODE (type) == TYPE_CODE_ARRAY
195 && TYPE_VECTOR (type) && tdep->ppc_vr0_regnum >= 0)
196 {
197 /* Vector parameter passed in an Altivec register, or
198 when that runs out, 16 byte aligned stack location. */
199 if (vreg <= 13)
200 {
201 if (write_pass)
202 regcache_cooked_write (current_regcache,
203 tdep->ppc_vr0_regnum + vreg, val);
204 vreg++;
205 }
206 else
207 {
208 argoffset = align_up (argoffset, 16);
209 if (write_pass)
210 write_memory (sp + argoffset, val, 16);
211 argoffset += 16;
212 }
213 }
214 else if (len == 8
215 && TYPE_CODE (type) == TYPE_CODE_ARRAY
216 && TYPE_VECTOR (type) && tdep->ppc_ev0_regnum >= 0)
217 {
218 /* Vector parameter passed in an e500 register, or when
219 that runs out, 8 byte aligned stack location. Note
220 that since e500 vector and general purpose registers
221 both map onto the same underlying register set, a
222 "greg" and not a "vreg" is consumed here. A cooked
223 write stores the value in the correct locations
224 within the raw register cache. */
225 if (greg <= 10)
226 {
227 if (write_pass)
228 regcache_cooked_write (current_regcache,
229 tdep->ppc_ev0_regnum + greg, val);
230 greg++;
231 }
232 else
233 {
234 argoffset = align_up (argoffset, 8);
235 if (write_pass)
236 write_memory (sp + argoffset, val, 8);
237 argoffset += 8;
238 }
239 }
240 else
241 {
242 /* Reduce the parameter down to something that fits in a
243 "word". */
244 char word[MAX_REGISTER_SIZE];
245 memset (word, 0, MAX_REGISTER_SIZE);
246 if (len > tdep->wordsize
247 || TYPE_CODE (type) == TYPE_CODE_STRUCT
248 || TYPE_CODE (type) == TYPE_CODE_UNION)
249 {
250 /* Structs and large values are put on an 8 byte
251 aligned stack ... */
252 structoffset = align_up (structoffset, 8);
253 if (write_pass)
254 write_memory (sp + structoffset, val, len);
255 /* ... and then a "word" pointing to that address is
256 passed as the parameter. */
257 store_unsigned_integer (word, tdep->wordsize,
258 sp + structoffset);
259 structoffset += len;
260 }
261 else if (TYPE_CODE (type) == TYPE_CODE_INT)
262 /* Sign or zero extend the "int" into a "word". */
263 store_unsigned_integer (word, tdep->wordsize,
264 unpack_long (type, val));
265 else
266 /* Always goes in the low address. */
267 memcpy (word, val, len);
268 /* Store that "word" in a register, or on the stack.
269 The words have "4" byte alignment. */
270 if (greg <= 10)
271 {
272 if (write_pass)
273 regcache_cooked_write (regcache,
274 tdep->ppc_gp0_regnum + greg, word);
275 greg++;
276 }
277 else
278 {
279 argoffset = align_up (argoffset, tdep->wordsize);
280 if (write_pass)
281 write_memory (sp + argoffset, word, tdep->wordsize);
282 argoffset += tdep->wordsize;
283 }
284 }
285 }
286
287 /* Compute the actual stack space requirements. */
288 if (!write_pass)
289 {
290 /* Remember the amount of space needed by the arguments. */
291 argspace = argoffset;
292 /* Allocate space for both the arguments and the structures. */
293 sp -= (argoffset + structoffset);
294 /* Ensure that the stack is still 16 byte aligned. */
295 sp = align_down (sp, 16);
296 }
297 }
298
299 /* Update %sp. */
300 regcache_cooked_write_signed (regcache, SP_REGNUM, sp);
301
302 /* Write the backchain (it occupies WORDSIZED bytes). */
303 write_memory_signed_integer (sp, tdep->wordsize, saved_sp);
304
305 /* Point the inferior function call's return address at the dummy's
306 breakpoint. */
307 regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
308
309 return sp;
310 }
311
312 /* Handle the return-value conventions specified by the SysV 32-bit
313 PowerPC ABI (including all the supplements):
314
315 no floating-point: floating-point values returned using 32-bit
316 general-purpose registers.
317
318 Altivec: 128-bit vectors returned using vector registers.
319
320 e500: 64-bit vectors returned using the full full 64 bit EV
321 register, floating-point values returned using 32-bit
322 general-purpose registers.
323
324 GCC (broken): Small struct values right (instead of left) aligned
325 when returned in general-purpose registers. */
326
327 static enum return_value_convention
328 do_ppc_sysv_return_value (struct gdbarch *gdbarch, struct type *type,
329 struct regcache *regcache, void *readbuf,
330 const void *writebuf, int broken_gcc)
331 {
332 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
333 gdb_assert (tdep->wordsize == 4);
334 if (TYPE_CODE (type) == TYPE_CODE_FLT
335 && TYPE_LENGTH (type) <= 8
336 && ppc_floating_point_unit_p (gdbarch))
337 {
338 if (readbuf)
339 {
340 /* Floats and doubles stored in "f1". Convert the value to
341 the required type. */
342 char regval[MAX_REGISTER_SIZE];
343 struct type *regtype = register_type (gdbarch,
344 tdep->ppc_fp0_regnum + 1);
345 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, regval);
346 convert_typed_floating (regval, regtype, readbuf, type);
347 }
348 if (writebuf)
349 {
350 /* Floats and doubles stored in "f1". Convert the value to
351 the register's "double" type. */
352 char regval[MAX_REGISTER_SIZE];
353 struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum);
354 convert_typed_floating (writebuf, type, regval, regtype);
355 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval);
356 }
357 return RETURN_VALUE_REGISTER_CONVENTION;
358 }
359 if ((TYPE_CODE (type) == TYPE_CODE_INT && TYPE_LENGTH (type) == 8)
360 || (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) == 8))
361 {
362 if (readbuf)
363 {
364 /* A long long, or a double stored in the 32 bit r3/r4. */
365 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
366 (bfd_byte *) readbuf + 0);
367 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
368 (bfd_byte *) readbuf + 4);
369 }
370 if (writebuf)
371 {
372 /* A long long, or a double stored in the 32 bit r3/r4. */
373 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
374 (const bfd_byte *) writebuf + 0);
375 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
376 (const bfd_byte *) writebuf + 4);
377 }
378 return RETURN_VALUE_REGISTER_CONVENTION;
379 }
380 if (TYPE_CODE (type) == TYPE_CODE_INT
381 && TYPE_LENGTH (type) <= tdep->wordsize)
382 {
383 if (readbuf)
384 {
385 /* Some sort of integer stored in r3. Since TYPE isn't
386 bigger than the register, sign extension isn't a problem
387 - just do everything unsigned. */
388 ULONGEST regval;
389 regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
390 &regval);
391 store_unsigned_integer (readbuf, TYPE_LENGTH (type), regval);
392 }
393 if (writebuf)
394 {
395 /* Some sort of integer stored in r3. Use unpack_long since
396 that should handle any required sign extension. */
397 regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
398 unpack_long (type, writebuf));
399 }
400 return RETURN_VALUE_REGISTER_CONVENTION;
401 }
402 if (TYPE_LENGTH (type) == 16
403 && TYPE_CODE (type) == TYPE_CODE_ARRAY
404 && TYPE_VECTOR (type) && tdep->ppc_vr0_regnum >= 0)
405 {
406 if (readbuf)
407 {
408 /* Altivec places the return value in "v2". */
409 regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, readbuf);
410 }
411 if (writebuf)
412 {
413 /* Altivec places the return value in "v2". */
414 regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2, writebuf);
415 }
416 return RETURN_VALUE_REGISTER_CONVENTION;
417 }
418 if (TYPE_LENGTH (type) == 8
419 && TYPE_CODE (type) == TYPE_CODE_ARRAY
420 && TYPE_VECTOR (type) && tdep->ppc_ev0_regnum >= 0)
421 {
422 /* The e500 ABI places return values for the 64-bit DSP types
423 (__ev64_opaque__) in r3. However, in GDB-speak, ev3
424 corresponds to the entire r3 value for e500, whereas GDB's r3
425 only corresponds to the least significant 32-bits. So place
426 the 64-bit DSP type's value in ev3. */
427 if (readbuf)
428 regcache_cooked_read (regcache, tdep->ppc_ev0_regnum + 3, readbuf);
429 if (writebuf)
430 regcache_cooked_write (regcache, tdep->ppc_ev0_regnum + 3, writebuf);
431 return RETURN_VALUE_REGISTER_CONVENTION;
432 }
433 if (broken_gcc && TYPE_LENGTH (type) <= 8)
434 {
435 if (readbuf)
436 {
437 /* GCC screwed up. The last register isn't "left" aligned.
438 Need to extract the least significant part of each
439 register and then store that. */
440 /* Transfer any full words. */
441 int word = 0;
442 while (1)
443 {
444 ULONGEST reg;
445 int len = TYPE_LENGTH (type) - word * tdep->wordsize;
446 if (len <= 0)
447 break;
448 if (len > tdep->wordsize)
449 len = tdep->wordsize;
450 regcache_cooked_read_unsigned (regcache,
451 tdep->ppc_gp0_regnum + 3 + word,
452 &reg);
453 store_unsigned_integer (((bfd_byte *) readbuf
454 + word * tdep->wordsize), len, reg);
455 word++;
456 }
457 }
458 if (writebuf)
459 {
460 /* GCC screwed up. The last register isn't "left" aligned.
461 Need to extract the least significant part of each
462 register and then store that. */
463 /* Transfer any full words. */
464 int word = 0;
465 while (1)
466 {
467 ULONGEST reg;
468 int len = TYPE_LENGTH (type) - word * tdep->wordsize;
469 if (len <= 0)
470 break;
471 if (len > tdep->wordsize)
472 len = tdep->wordsize;
473 reg = extract_unsigned_integer (((const bfd_byte *) writebuf
474 + word * tdep->wordsize), len);
475 regcache_cooked_write_unsigned (regcache,
476 tdep->ppc_gp0_regnum + 3 + word,
477 reg);
478 word++;
479 }
480 }
481 return RETURN_VALUE_REGISTER_CONVENTION;
482 }
483 if (TYPE_LENGTH (type) <= 8)
484 {
485 if (readbuf)
486 {
487 /* This matches SVr4 PPC, it does not match GCC. */
488 /* The value is right-padded to 8 bytes and then loaded, as
489 two "words", into r3/r4. */
490 char regvals[MAX_REGISTER_SIZE * 2];
491 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
492 regvals + 0 * tdep->wordsize);
493 if (TYPE_LENGTH (type) > tdep->wordsize)
494 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
495 regvals + 1 * tdep->wordsize);
496 memcpy (readbuf, regvals, TYPE_LENGTH (type));
497 }
498 if (writebuf)
499 {
500 /* This matches SVr4 PPC, it does not match GCC. */
501 /* The value is padded out to 8 bytes and then loaded, as
502 two "words" into r3/r4. */
503 char regvals[MAX_REGISTER_SIZE * 2];
504 memset (regvals, 0, sizeof regvals);
505 memcpy (regvals, writebuf, TYPE_LENGTH (type));
506 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
507 regvals + 0 * tdep->wordsize);
508 if (TYPE_LENGTH (type) > tdep->wordsize)
509 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
510 regvals + 1 * tdep->wordsize);
511 }
512 return RETURN_VALUE_REGISTER_CONVENTION;
513 }
514 return RETURN_VALUE_STRUCT_CONVENTION;
515 }
516
517 enum return_value_convention
518 ppc_sysv_abi_return_value (struct gdbarch *gdbarch, struct type *valtype,
519 struct regcache *regcache, void *readbuf,
520 const void *writebuf)
521 {
522 return do_ppc_sysv_return_value (gdbarch, valtype, regcache, readbuf,
523 writebuf, 0);
524 }
525
526 enum return_value_convention
527 ppc_sysv_abi_broken_return_value (struct gdbarch *gdbarch,
528 struct type *valtype,
529 struct regcache *regcache,
530 void *readbuf, const void *writebuf)
531 {
532 return do_ppc_sysv_return_value (gdbarch, valtype, regcache, readbuf,
533 writebuf, 1);
534 }
535
536 /* Pass the arguments in either registers, or in the stack. Using the
537 ppc 64 bit SysV ABI.
538
539 This implements a dumbed down version of the ABI. It always writes
540 values to memory, GPR and FPR, even when not necessary. Doing this
541 greatly simplifies the logic. */
542
543 CORE_ADDR
544 ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
545 struct regcache *regcache, CORE_ADDR bp_addr,
546 int nargs, struct value **args, CORE_ADDR sp,
547 int struct_return, CORE_ADDR struct_addr)
548 {
549 CORE_ADDR func_addr = find_function_addr (function, NULL);
550 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
551 /* By this stage in the proceedings, SP has been decremented by "red
552 zone size" + "struct return size". Fetch the stack-pointer from
553 before this and use that as the BACK_CHAIN. */
554 const CORE_ADDR back_chain = read_sp ();
555 /* See for-loop comment below. */
556 int write_pass;
557 /* Size of the Altivec's vector parameter region, the final value is
558 computed in the for-loop below. */
559 LONGEST vparam_size = 0;
560 /* Size of the general parameter region, the final value is computed
561 in the for-loop below. */
562 LONGEST gparam_size = 0;
563 /* Kevin writes ... I don't mind seeing tdep->wordsize used in the
564 calls to align_up(), align_down(), etc. because this makes it
565 easier to reuse this code (in a copy/paste sense) in the future,
566 but it is a 64-bit ABI and asserting that the wordsize is 8 bytes
567 at some point makes it easier to verify that this function is
568 correct without having to do a non-local analysis to figure out
569 the possible values of tdep->wordsize. */
570 gdb_assert (tdep->wordsize == 8);
571
572 /* Go through the argument list twice.
573
574 Pass 1: Compute the function call's stack space and register
575 requirements.
576
577 Pass 2: Replay the same computation but this time also write the
578 values out to the target. */
579
580 for (write_pass = 0; write_pass < 2; write_pass++)
581 {
582 int argno;
583 /* Next available floating point register for float and double
584 arguments. */
585 int freg = 1;
586 /* Next available general register for non-vector (but possibly
587 float) arguments. */
588 int greg = 3;
589 /* Next available vector register for vector arguments. */
590 int vreg = 2;
591 /* The address, at which the next general purpose parameter
592 (integer, struct, float, ...) should be saved. */
593 CORE_ADDR gparam;
594 /* Address, at which the next Altivec vector parameter should be
595 saved. */
596 CORE_ADDR vparam;
597
598 if (!write_pass)
599 {
600 /* During the first pass, GPARAM and VPARAM are more like
601 offsets (start address zero) than addresses. That way
602 the accumulate the total stack space each region
603 requires. */
604 gparam = 0;
605 vparam = 0;
606 }
607 else
608 {
609 /* Decrement the stack pointer making space for the Altivec
610 and general on-stack parameters. Set vparam and gparam
611 to their corresponding regions. */
612 vparam = align_down (sp - vparam_size, 16);
613 gparam = align_down (vparam - gparam_size, 16);
614 /* Add in space for the TOC, link editor double word,
615 compiler double word, LR save area, CR save area. */
616 sp = align_down (gparam - 48, 16);
617 }
618
619 /* If the function is returning a `struct', then there is an
620 extra hidden parameter (which will be passed in r3)
621 containing the address of that struct.. In that case we
622 should advance one word and start from r4 register to copy
623 parameters. This also consumes one on-stack parameter slot. */
624 if (struct_return)
625 {
626 if (write_pass)
627 regcache_cooked_write_signed (regcache,
628 tdep->ppc_gp0_regnum + greg,
629 struct_addr);
630 greg++;
631 gparam = align_up (gparam + tdep->wordsize, tdep->wordsize);
632 }
633
634 for (argno = 0; argno < nargs; argno++)
635 {
636 struct value *arg = args[argno];
637 struct type *type = check_typedef (value_type (arg));
638 char *val = VALUE_CONTENTS (arg);
639 if (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) <= 8)
640 {
641 /* Floats and Doubles go in f1 .. f13. They also
642 consume a left aligned GREG,, and can end up in
643 memory. */
644 if (write_pass)
645 {
646 if (ppc_floating_point_unit_p (current_gdbarch)
647 && freg <= 13)
648 {
649 char regval[MAX_REGISTER_SIZE];
650 struct type *regtype
651 = register_type (gdbarch, tdep->ppc_fp0_regnum);
652 convert_typed_floating (val, type, regval, regtype);
653 regcache_cooked_write (regcache,
654 tdep->ppc_fp0_regnum + freg,
655 regval);
656 }
657 if (greg <= 10)
658 {
659 /* The ABI states "Single precision floating
660 point values are mapped to the first word in
661 a single doubleword" and "... floating point
662 values mapped to the first eight doublewords
663 of the parameter save area are also passed in
664 general registers").
665
666 This code interprets that to mean: store it,
667 left aligned, in the general register. */
668 char regval[MAX_REGISTER_SIZE];
669 memset (regval, 0, sizeof regval);
670 memcpy (regval, val, TYPE_LENGTH (type));
671 regcache_cooked_write (regcache,
672 tdep->ppc_gp0_regnum + greg,
673 regval);
674 }
675 write_memory (gparam, val, TYPE_LENGTH (type));
676 }
677 /* Always consume parameter stack space. */
678 freg++;
679 greg++;
680 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
681 }
682 else if (TYPE_LENGTH (type) == 16 && TYPE_VECTOR (type)
683 && TYPE_CODE (type) == TYPE_CODE_ARRAY
684 && tdep->ppc_vr0_regnum >= 0)
685 {
686 /* In the Altivec ABI, vectors go in the vector
687 registers v2 .. v13, or when that runs out, a vector
688 annex which goes above all the normal parameters.
689 NOTE: cagney/2003-09-21: This is a guess based on the
690 PowerOpen Altivec ABI. */
691 if (vreg <= 13)
692 {
693 if (write_pass)
694 regcache_cooked_write (regcache,
695 tdep->ppc_vr0_regnum + vreg, val);
696 vreg++;
697 }
698 else
699 {
700 if (write_pass)
701 write_memory (vparam, val, TYPE_LENGTH (type));
702 vparam = align_up (vparam + TYPE_LENGTH (type), 16);
703 }
704 }
705 else if ((TYPE_CODE (type) == TYPE_CODE_INT
706 || TYPE_CODE (type) == TYPE_CODE_ENUM)
707 && TYPE_LENGTH (type) <= 8)
708 {
709 /* Scalars get sign[un]extended and go in gpr3 .. gpr10.
710 They can also end up in memory. */
711 if (write_pass)
712 {
713 /* Sign extend the value, then store it unsigned. */
714 ULONGEST word = unpack_long (type, val);
715 if (greg <= 10)
716 regcache_cooked_write_unsigned (regcache,
717 tdep->ppc_gp0_regnum +
718 greg, word);
719 write_memory_unsigned_integer (gparam, tdep->wordsize,
720 word);
721 }
722 greg++;
723 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
724 }
725 else
726 {
727 int byte;
728 for (byte = 0; byte < TYPE_LENGTH (type);
729 byte += tdep->wordsize)
730 {
731 if (write_pass && greg <= 10)
732 {
733 char regval[MAX_REGISTER_SIZE];
734 int len = TYPE_LENGTH (type) - byte;
735 if (len > tdep->wordsize)
736 len = tdep->wordsize;
737 memset (regval, 0, sizeof regval);
738 /* WARNING: cagney/2003-09-21: As best I can
739 tell, the ABI specifies that the value should
740 be left aligned. Unfortunately, GCC doesn't
741 do this - it instead right aligns even sized
742 values and puts odd sized values on the
743 stack. Work around that by putting both a
744 left and right aligned value into the
745 register (hopefully no one notices :-^).
746 Arrrgh! */
747 /* Left aligned (8 byte values such as pointers
748 fill the buffer). */
749 memcpy (regval, val + byte, len);
750 /* Right aligned (but only if even). */
751 if (len == 1 || len == 2 || len == 4)
752 memcpy (regval + tdep->wordsize - len,
753 val + byte, len);
754 regcache_cooked_write (regcache, greg, regval);
755 }
756 greg++;
757 }
758 if (write_pass)
759 /* WARNING: cagney/2003-09-21: Strictly speaking, this
760 isn't necessary, unfortunately, GCC appears to get
761 "struct convention" parameter passing wrong putting
762 odd sized structures in memory instead of in a
763 register. Work around this by always writing the
764 value to memory. Fortunately, doing this
765 simplifies the code. */
766 write_memory (gparam, val, TYPE_LENGTH (type));
767 /* Always consume parameter stack space. */
768 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
769 }
770 }
771
772 if (!write_pass)
773 {
774 /* Save the true region sizes ready for the second pass. */
775 vparam_size = vparam;
776 /* Make certain that the general parameter save area is at
777 least the minimum 8 registers (or doublewords) in size. */
778 if (greg < 8)
779 gparam_size = 8 * tdep->wordsize;
780 else
781 gparam_size = gparam;
782 }
783 }
784
785 /* Update %sp. */
786 regcache_cooked_write_signed (regcache, SP_REGNUM, sp);
787
788 /* Write the backchain (it occupies WORDSIZED bytes). */
789 write_memory_signed_integer (sp, tdep->wordsize, back_chain);
790
791 /* Point the inferior function call's return address at the dummy's
792 breakpoint. */
793 regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
794
795 /* Find a value for the TOC register. Every symbol should have both
796 ".FN" and "FN" in the minimal symbol table. "FN" points at the
797 FN's descriptor, while ".FN" points at the entry point (which
798 matches FUNC_ADDR). Need to reverse from FUNC_ADDR back to the
799 FN's descriptor address (while at the same time being careful to
800 find "FN" in the same object file as ".FN"). */
801 {
802 /* Find the minimal symbol that corresponds to FUNC_ADDR (should
803 have the name ".FN"). */
804 struct minimal_symbol *dot_fn = lookup_minimal_symbol_by_pc (func_addr);
805 if (dot_fn != NULL && SYMBOL_LINKAGE_NAME (dot_fn)[0] == '.')
806 {
807 /* Get the section that contains FUNC_ADR. Need this for the
808 "objfile" that it contains. */
809 struct obj_section *dot_fn_section = find_pc_section (func_addr);
810 if (dot_fn_section != NULL && dot_fn_section->objfile != NULL)
811 {
812 /* Now find the corresponding "FN" (dropping ".") minimal
813 symbol's address. Only look for the minimal symbol in
814 ".FN"'s object file - avoids problems when two object
815 files (i.e., shared libraries) contain a minimal symbol
816 with the same name. */
817 struct minimal_symbol *fn =
818 lookup_minimal_symbol (SYMBOL_LINKAGE_NAME (dot_fn) + 1, NULL,
819 dot_fn_section->objfile);
820 if (fn != NULL)
821 {
822 /* Got the address of that descriptor. The TOC is the
823 second double word. */
824 CORE_ADDR toc =
825 read_memory_unsigned_integer (SYMBOL_VALUE_ADDRESS (fn)
826 + tdep->wordsize,
827 tdep->wordsize);
828 regcache_cooked_write_unsigned (regcache,
829 tdep->ppc_gp0_regnum + 2, toc);
830 }
831 }
832 }
833 }
834
835 return sp;
836 }
837
838
839 /* The 64 bit ABI retun value convention.
840
841 Return non-zero if the return-value is stored in a register, return
842 0 if the return-value is instead stored on the stack (a.k.a.,
843 struct return convention).
844
845 For a return-value stored in a register: when WRITEBUF is non-NULL,
846 copy the buffer to the corresponding register return-value location
847 location; when READBUF is non-NULL, fill the buffer from the
848 corresponding register return-value location. */
849 enum return_value_convention
850 ppc64_sysv_abi_return_value (struct gdbarch *gdbarch, struct type *valtype,
851 struct regcache *regcache, void *readbuf,
852 const void *writebuf)
853 {
854 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
855
856 /* This function exists to support a calling convention that
857 requires floating-point registers. It shouldn't be used on
858 processors that lack them. */
859 gdb_assert (ppc_floating_point_unit_p (gdbarch));
860
861 /* Floats and doubles in F1. */
862 if (TYPE_CODE (valtype) == TYPE_CODE_FLT && TYPE_LENGTH (valtype) <= 8)
863 {
864 char regval[MAX_REGISTER_SIZE];
865 struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum);
866 if (writebuf != NULL)
867 {
868 convert_typed_floating (writebuf, valtype, regval, regtype);
869 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval);
870 }
871 if (readbuf != NULL)
872 {
873 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, regval);
874 convert_typed_floating (regval, regtype, readbuf, valtype);
875 }
876 return RETURN_VALUE_REGISTER_CONVENTION;
877 }
878 if (TYPE_CODE (valtype) == TYPE_CODE_INT && TYPE_LENGTH (valtype) <= 8)
879 {
880 /* Integers in r3. */
881 if (writebuf != NULL)
882 {
883 /* Be careful to sign extend the value. */
884 regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
885 unpack_long (valtype, writebuf));
886 }
887 if (readbuf != NULL)
888 {
889 /* Extract the integer from r3. Since this is truncating the
890 value, there isn't a sign extension problem. */
891 ULONGEST regval;
892 regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
893 &regval);
894 store_unsigned_integer (readbuf, TYPE_LENGTH (valtype), regval);
895 }
896 return RETURN_VALUE_REGISTER_CONVENTION;
897 }
898 /* All pointers live in r3. */
899 if (TYPE_CODE (valtype) == TYPE_CODE_PTR)
900 {
901 /* All pointers live in r3. */
902 if (writebuf != NULL)
903 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, writebuf);
904 if (readbuf != NULL)
905 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, readbuf);
906 return RETURN_VALUE_REGISTER_CONVENTION;
907 }
908 if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY
909 && TYPE_LENGTH (valtype) <= 8
910 && TYPE_CODE (TYPE_TARGET_TYPE (valtype)) == TYPE_CODE_INT
911 && TYPE_LENGTH (TYPE_TARGET_TYPE (valtype)) == 1)
912 {
913 /* Small character arrays are returned, right justified, in r3. */
914 int offset = (register_size (gdbarch, tdep->ppc_gp0_regnum + 3)
915 - TYPE_LENGTH (valtype));
916 if (writebuf != NULL)
917 regcache_cooked_write_part (regcache, tdep->ppc_gp0_regnum + 3,
918 offset, TYPE_LENGTH (valtype), writebuf);
919 if (readbuf != NULL)
920 regcache_cooked_read_part (regcache, tdep->ppc_gp0_regnum + 3,
921 offset, TYPE_LENGTH (valtype), readbuf);
922 return RETURN_VALUE_REGISTER_CONVENTION;
923 }
924 /* Big floating point values get stored in adjacent floating
925 point registers. */
926 if (TYPE_CODE (valtype) == TYPE_CODE_FLT
927 && (TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 32))
928 {
929 if (writebuf || readbuf != NULL)
930 {
931 int i;
932 for (i = 0; i < TYPE_LENGTH (valtype) / 8; i++)
933 {
934 if (writebuf != NULL)
935 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1 + i,
936 (const bfd_byte *) writebuf + i * 8);
937 if (readbuf != NULL)
938 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1 + i,
939 (bfd_byte *) readbuf + i * 8);
940 }
941 }
942 return RETURN_VALUE_REGISTER_CONVENTION;
943 }
944 /* Complex values get returned in f1:f2, need to convert. */
945 if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX
946 && (TYPE_LENGTH (valtype) == 8 || TYPE_LENGTH (valtype) == 16))
947 {
948 if (regcache != NULL)
949 {
950 int i;
951 for (i = 0; i < 2; i++)
952 {
953 char regval[MAX_REGISTER_SIZE];
954 struct type *regtype =
955 register_type (current_gdbarch, tdep->ppc_fp0_regnum);
956 if (writebuf != NULL)
957 {
958 convert_typed_floating ((const bfd_byte *) writebuf +
959 i * (TYPE_LENGTH (valtype) / 2),
960 valtype, regval, regtype);
961 regcache_cooked_write (regcache,
962 tdep->ppc_fp0_regnum + 1 + i,
963 regval);
964 }
965 if (readbuf != NULL)
966 {
967 regcache_cooked_read (regcache,
968 tdep->ppc_fp0_regnum + 1 + i,
969 regval);
970 convert_typed_floating (regval, regtype,
971 (bfd_byte *) readbuf +
972 i * (TYPE_LENGTH (valtype) / 2),
973 valtype);
974 }
975 }
976 }
977 return RETURN_VALUE_REGISTER_CONVENTION;
978 }
979 /* Big complex values get stored in f1:f4. */
980 if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX && TYPE_LENGTH (valtype) == 32)
981 {
982 if (regcache != NULL)
983 {
984 int i;
985 for (i = 0; i < 4; i++)
986 {
987 if (writebuf != NULL)
988 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1 + i,
989 (const bfd_byte *) writebuf + i * 8);
990 if (readbuf != NULL)
991 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1 + i,
992 (bfd_byte *) readbuf + i * 8);
993 }
994 }
995 return RETURN_VALUE_REGISTER_CONVENTION;
996 }
997 return RETURN_VALUE_STRUCT_CONVENTION;
998 }
999
1000 CORE_ADDR
1001 ppc64_sysv_abi_adjust_breakpoint_address (struct gdbarch *gdbarch,
1002 CORE_ADDR bpaddr)
1003 {
1004 /* PPC64 SYSV specifies that the minimal-symbol "FN" should point at
1005 a function-descriptor while the corresponding minimal-symbol
1006 ".FN" should point at the entry point. Consequently, a command
1007 like "break FN" applied to an object file with only minimal
1008 symbols, will insert the breakpoint into the descriptor at "FN"
1009 and not the function at ".FN". Avoid this confusion by adjusting
1010 any attempt to set a descriptor breakpoint into a corresponding
1011 function breakpoint. Note that GDB warns the user when this
1012 adjustment is applied - that's ok as otherwise the user will have
1013 no way of knowing why their breakpoint at "FN" resulted in the
1014 program stopping at ".FN". */
1015 return gdbarch_convert_from_func_ptr_addr (gdbarch, bpaddr, &current_target);
1016 }
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