projects / deliverable / binutils-gdb.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
daily update
[deliverable/binutils-gdb.git] / gdb / ppc-sysv-tdep.c
1 /* Target-dependent code for PowerPC systems using the SVR4 ABI
2 for GDB, the GNU debugger.
3
4 Copyright (C) 2000-2003, 2005, 2007-2012 Free Software Foundation,
5 Inc.
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21
22 #include "defs.h"
23 #include "gdbcore.h"
24 #include "inferior.h"
25 #include "regcache.h"
26 #include "value.h"
27 #include "gdb_string.h"
28 #include "gdb_assert.h"
29 #include "ppc-tdep.h"
30 #include "target.h"
31 #include "objfiles.h"
32 #include "infcall.h"
33 #include "dwarf2.h"
34
35
36 /* Check whether FTPYE is a (pointer to) function type that should use
37 the OpenCL vector ABI. */
38
39 static int
40 ppc_sysv_use_opencl_abi (struct type *ftype)
41 {
42 ftype = check_typedef (ftype);
43
44 if (TYPE_CODE (ftype) == TYPE_CODE_PTR)
45 ftype = check_typedef (TYPE_TARGET_TYPE (ftype));
46
47 return (TYPE_CODE (ftype) == TYPE_CODE_FUNC
48 && TYPE_CALLING_CONVENTION (ftype) == DW_CC_GDB_IBM_OpenCL);
49 }
50
51 /* Pass the arguments in either registers, or in the stack. Using the
52 ppc sysv ABI, the first eight words of the argument list (that might
53 be less than eight parameters if some parameters occupy more than one
54 word) are passed in r3..r10 registers. float and double parameters are
55 passed in fpr's, in addition to that. Rest of the parameters if any
56 are passed in user stack.
57
58 If the function is returning a structure, then the return address is passed
59 in r3, then the first 7 words of the parametes can be passed in registers,
60 starting from r4. */
61
62 CORE_ADDR
63 ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
64 struct regcache *regcache, CORE_ADDR bp_addr,
65 int nargs, struct value **args, CORE_ADDR sp,
66 int struct_return, CORE_ADDR struct_addr)
67 {
68 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
69 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
70 int opencl_abi = ppc_sysv_use_opencl_abi (value_type (function));
71 ULONGEST saved_sp;
72 int argspace = 0; /* 0 is an initial wrong guess. */
73 int write_pass;
74
75 gdb_assert (tdep->wordsize == 4);
76
77 regcache_cooked_read_unsigned (regcache, gdbarch_sp_regnum (gdbarch),
78 &saved_sp);
79
80 /* Go through the argument list twice.
81
82 Pass 1: Figure out how much new stack space is required for
83 arguments and pushed values. Unlike the PowerOpen ABI, the SysV
84 ABI doesn't reserve any extra space for parameters which are put
85 in registers, but does always push structures and then pass their
86 address.
87
88 Pass 2: Replay the same computation but this time also write the
89 values out to the target. */
90
91 for (write_pass = 0; write_pass < 2; write_pass++)
92 {
93 int argno;
94 /* Next available floating point register for float and double
95 arguments. */
96 int freg = 1;
97 /* Next available general register for non-float, non-vector
98 arguments. */
99 int greg = 3;
100 /* Next available vector register for vector arguments. */
101 int vreg = 2;
102 /* Arguments start above the "LR save word" and "Back chain". */
103 int argoffset = 2 * tdep->wordsize;
104 /* Structures start after the arguments. */
105 int structoffset = argoffset + argspace;
106
107 /* If the function is returning a `struct', then the first word
108 (which will be passed in r3) is used for struct return
109 address. In that case we should advance one word and start
110 from r4 register to copy parameters. */
111 if (struct_return)
112 {
113 if (write_pass)
114 regcache_cooked_write_signed (regcache,
115 tdep->ppc_gp0_regnum + greg,
116 struct_addr);
117 greg++;
118 }
119
120 for (argno = 0; argno < nargs; argno++)
121 {
122 struct value *arg = args[argno];
123 struct type *type = check_typedef (value_type (arg));
124 int len = TYPE_LENGTH (type);
125 const bfd_byte *val = value_contents (arg);
126
127 if (TYPE_CODE (type) == TYPE_CODE_FLT && len <= 8
128 && !tdep->soft_float)
129 {
130 /* Floating point value converted to "double" then
131 passed in an FP register, when the registers run out,
132 8 byte aligned stack is used. */
133 if (freg <= 8)
134 {
135 if (write_pass)
136 {
137 /* Always store the floating point value using
138 the register's floating-point format. */
139 gdb_byte regval[MAX_REGISTER_SIZE];
140 struct type *regtype
141 = register_type (gdbarch, tdep->ppc_fp0_regnum + freg);
142 convert_typed_floating (val, type, regval, regtype);
143 regcache_cooked_write (regcache,
144 tdep->ppc_fp0_regnum + freg,
145 regval);
146 }
147 freg++;
148 }
149 else
150 {
151 /* The SysV ABI tells us to convert floats to
152 doubles before writing them to an 8 byte aligned
153 stack location. Unfortunately GCC does not do
154 that, and stores floats into 4 byte aligned
155 locations without converting them to doubles.
156 Since there is no know compiler that actually
157 follows the ABI here, we implement the GCC
158 convention. */
159
160 /* Align to 4 bytes or 8 bytes depending on the type of
161 the argument (float or double). */
162 argoffset = align_up (argoffset, len);
163 if (write_pass)
164 write_memory (sp + argoffset, val, len);
165 argoffset += len;
166 }
167 }
168 else if (TYPE_CODE (type) == TYPE_CODE_FLT
169 && len == 16
170 && !tdep->soft_float
171 && (gdbarch_long_double_format (gdbarch)
172 == floatformats_ibm_long_double))
173 {
174 /* IBM long double passed in two FP registers if
175 available, otherwise 8-byte aligned stack. */
176 if (freg <= 7)
177 {
178 if (write_pass)
179 {
180 regcache_cooked_write (regcache,
181 tdep->ppc_fp0_regnum + freg,
182 val);
183 regcache_cooked_write (regcache,
184 tdep->ppc_fp0_regnum + freg + 1,
185 val + 8);
186 }
187 freg += 2;
188 }
189 else
190 {
191 argoffset = align_up (argoffset, 8);
192 if (write_pass)
193 write_memory (sp + argoffset, val, len);
194 argoffset += 16;
195 }
196 }
197 else if (len == 8
198 && (TYPE_CODE (type) == TYPE_CODE_INT /* long long */
199 || TYPE_CODE (type) == TYPE_CODE_FLT /* double */
200 || (TYPE_CODE (type) == TYPE_CODE_DECFLOAT
201 && tdep->soft_float)))
202 {
203 /* "long long" or soft-float "double" or "_Decimal64"
204 passed in an odd/even register pair with the low
205 addressed word in the odd register and the high
206 addressed word in the even register, or when the
207 registers run out an 8 byte aligned stack
208 location. */
209 if (greg > 9)
210 {
211 /* Just in case GREG was 10. */
212 greg = 11;
213 argoffset = align_up (argoffset, 8);
214 if (write_pass)
215 write_memory (sp + argoffset, val, len);
216 argoffset += 8;
217 }
218 else
219 {
220 /* Must start on an odd register - r3/r4 etc. */
221 if ((greg & 1) == 0)
222 greg++;
223 if (write_pass)
224 {
225 regcache_cooked_write (regcache,
226 tdep->ppc_gp0_regnum + greg + 0,
227 val + 0);
228 regcache_cooked_write (regcache,
229 tdep->ppc_gp0_regnum + greg + 1,
230 val + 4);
231 }
232 greg += 2;
233 }
234 }
235 else if (len == 16
236 && ((TYPE_CODE (type) == TYPE_CODE_FLT
237 && (gdbarch_long_double_format (gdbarch)
238 == floatformats_ibm_long_double))
239 || (TYPE_CODE (type) == TYPE_CODE_DECFLOAT
240 && tdep->soft_float)))
241 {
242 /* Soft-float IBM long double or _Decimal128 passed in
243 four consecutive registers, or on the stack. The
244 registers are not necessarily odd/even pairs. */
245 if (greg > 7)
246 {
247 greg = 11;
248 argoffset = align_up (argoffset, 8);
249 if (write_pass)
250 write_memory (sp + argoffset, val, len);
251 argoffset += 16;
252 }
253 else
254 {
255 if (write_pass)
256 {
257 regcache_cooked_write (regcache,
258 tdep->ppc_gp0_regnum + greg + 0,
259 val + 0);
260 regcache_cooked_write (regcache,
261 tdep->ppc_gp0_regnum + greg + 1,
262 val + 4);
263 regcache_cooked_write (regcache,
264 tdep->ppc_gp0_regnum + greg + 2,
265 val + 8);
266 regcache_cooked_write (regcache,
267 tdep->ppc_gp0_regnum + greg + 3,
268 val + 12);
269 }
270 greg += 4;
271 }
272 }
273 else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && len <= 8
274 && !tdep->soft_float)
275 {
276 /* 32-bit and 64-bit decimal floats go in f1 .. f8. They can
277 end up in memory. */
278
279 if (freg <= 8)
280 {
281 if (write_pass)
282 {
283 gdb_byte regval[MAX_REGISTER_SIZE];
284 const gdb_byte *p;
285
286 /* 32-bit decimal floats are right aligned in the
287 doubleword. */
288 if (TYPE_LENGTH (type) == 4)
289 {
290 memcpy (regval + 4, val, 4);
291 p = regval;
292 }
293 else
294 p = val;
295
296 regcache_cooked_write (regcache,
297 tdep->ppc_fp0_regnum + freg, p);
298 }
299
300 freg++;
301 }
302 else
303 {
304 argoffset = align_up (argoffset, len);
305
306 if (write_pass)
307 /* Write value in the stack's parameter save area. */
308 write_memory (sp + argoffset, val, len);
309
310 argoffset += len;
311 }
312 }
313 else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && len == 16
314 && !tdep->soft_float)
315 {
316 /* 128-bit decimal floats go in f2 .. f7, always in even/odd
317 pairs. They can end up in memory, using two doublewords. */
318
319 if (freg <= 6)
320 {
321 /* Make sure freg is even. */
322 freg += freg & 1;
323
324 if (write_pass)
325 {
326 regcache_cooked_write (regcache,
327 tdep->ppc_fp0_regnum + freg, val);
328 regcache_cooked_write (regcache,
329 tdep->ppc_fp0_regnum + freg + 1, val + 8);
330 }
331 }
332 else
333 {
334 argoffset = align_up (argoffset, 8);
335
336 if (write_pass)
337 write_memory (sp + argoffset, val, 16);
338
339 argoffset += 16;
340 }
341
342 /* If a 128-bit decimal float goes to the stack because only f7
343 and f8 are free (thus there's no even/odd register pair
344 available), these registers should be marked as occupied.
345 Hence we increase freg even when writing to memory. */
346 freg += 2;
347 }
348 else if (len < 16
349 && TYPE_CODE (type) == TYPE_CODE_ARRAY
350 && TYPE_VECTOR (type)
351 && opencl_abi)
352 {
353 /* OpenCL vectors shorter than 16 bytes are passed as if
354 a series of independent scalars. */
355 struct type *eltype = check_typedef (TYPE_TARGET_TYPE (type));
356 int i, nelt = TYPE_LENGTH (type) / TYPE_LENGTH (eltype);
357
358 for (i = 0; i < nelt; i++)
359 {
360 const gdb_byte *elval = val + i * TYPE_LENGTH (eltype);
361
362 if (TYPE_CODE (eltype) == TYPE_CODE_FLT && !tdep->soft_float)
363 {
364 if (freg <= 8)
365 {
366 if (write_pass)
367 {
368 int regnum = tdep->ppc_fp0_regnum + freg;
369 gdb_byte regval[MAX_REGISTER_SIZE];
370 struct type *regtype
371 = register_type (gdbarch, regnum);
372 convert_typed_floating (elval, eltype,
373 regval, regtype);
374 regcache_cooked_write (regcache, regnum, regval);
375 }
376 freg++;
377 }
378 else
379 {
380 argoffset = align_up (argoffset, len);
381 if (write_pass)
382 write_memory (sp + argoffset, val, len);
383 argoffset += len;
384 }
385 }
386 else if (TYPE_LENGTH (eltype) == 8)
387 {
388 if (greg > 9)
389 {
390 /* Just in case GREG was 10. */
391 greg = 11;
392 argoffset = align_up (argoffset, 8);
393 if (write_pass)
394 write_memory (sp + argoffset, elval,
395 TYPE_LENGTH (eltype));
396 argoffset += 8;
397 }
398 else
399 {
400 /* Must start on an odd register - r3/r4 etc. */
401 if ((greg & 1) == 0)
402 greg++;
403 if (write_pass)
404 {
405 int regnum = tdep->ppc_gp0_regnum + greg;
406 regcache_cooked_write (regcache,
407 regnum + 0, elval + 0);
408 regcache_cooked_write (regcache,
409 regnum + 1, elval + 4);
410 }
411 greg += 2;
412 }
413 }
414 else
415 {
416 gdb_byte word[MAX_REGISTER_SIZE];
417 store_unsigned_integer (word, tdep->wordsize, byte_order,
418 unpack_long (eltype, elval));
419
420 if (greg <= 10)
421 {
422 if (write_pass)
423 regcache_cooked_write (regcache,
424 tdep->ppc_gp0_regnum + greg,
425 word);
426 greg++;
427 }
428 else
429 {
430 argoffset = align_up (argoffset, tdep->wordsize);
431 if (write_pass)
432 write_memory (sp + argoffset, word, tdep->wordsize);
433 argoffset += tdep->wordsize;
434 }
435 }
436 }
437 }
438 else if (len >= 16
439 && TYPE_CODE (type) == TYPE_CODE_ARRAY
440 && TYPE_VECTOR (type)
441 && opencl_abi)
442 {
443 /* OpenCL vectors 16 bytes or longer are passed as if
444 a series of AltiVec vectors. */
445 int i;
446
447 for (i = 0; i < len / 16; i++)
448 {
449 const gdb_byte *elval = val + i * 16;
450
451 if (vreg <= 13)
452 {
453 if (write_pass)
454 regcache_cooked_write (regcache,
455 tdep->ppc_vr0_regnum + vreg,
456 elval);
457 vreg++;
458 }
459 else
460 {
461 argoffset = align_up (argoffset, 16);
462 if (write_pass)
463 write_memory (sp + argoffset, elval, 16);
464 argoffset += 16;
465 }
466 }
467 }
468 else if (len == 16
469 && TYPE_CODE (type) == TYPE_CODE_ARRAY
470 && TYPE_VECTOR (type)
471 && tdep->vector_abi == POWERPC_VEC_ALTIVEC)
472 {
473 /* Vector parameter passed in an Altivec register, or
474 when that runs out, 16 byte aligned stack location. */
475 if (vreg <= 13)
476 {
477 if (write_pass)
478 regcache_cooked_write (regcache,
479 tdep->ppc_vr0_regnum + vreg, val);
480 vreg++;
481 }
482 else
483 {
484 argoffset = align_up (argoffset, 16);
485 if (write_pass)
486 write_memory (sp + argoffset, val, 16);
487 argoffset += 16;
488 }
489 }
490 else if (len == 8
491 && TYPE_CODE (type) == TYPE_CODE_ARRAY
492 && TYPE_VECTOR (type)
493 && tdep->vector_abi == POWERPC_VEC_SPE)
494 {
495 /* Vector parameter passed in an e500 register, or when
496 that runs out, 8 byte aligned stack location. Note
497 that since e500 vector and general purpose registers
498 both map onto the same underlying register set, a
499 "greg" and not a "vreg" is consumed here. A cooked
500 write stores the value in the correct locations
501 within the raw register cache. */
502 if (greg <= 10)
503 {
504 if (write_pass)
505 regcache_cooked_write (regcache,
506 tdep->ppc_ev0_regnum + greg, val);
507 greg++;
508 }
509 else
510 {
511 argoffset = align_up (argoffset, 8);
512 if (write_pass)
513 write_memory (sp + argoffset, val, 8);
514 argoffset += 8;
515 }
516 }
517 else
518 {
519 /* Reduce the parameter down to something that fits in a
520 "word". */
521 gdb_byte word[MAX_REGISTER_SIZE];
522 memset (word, 0, MAX_REGISTER_SIZE);
523 if (len > tdep->wordsize
524 || TYPE_CODE (type) == TYPE_CODE_STRUCT
525 || TYPE_CODE (type) == TYPE_CODE_UNION)
526 {
527 /* Structs and large values are put in an
528 aligned stack slot ... */
529 if (TYPE_CODE (type) == TYPE_CODE_ARRAY
530 && TYPE_VECTOR (type)
531 && len >= 16)
532 structoffset = align_up (structoffset, 16);
533 else
534 structoffset = align_up (structoffset, 8);
535
536 if (write_pass)
537 write_memory (sp + structoffset, val, len);
538 /* ... and then a "word" pointing to that address is
539 passed as the parameter. */
540 store_unsigned_integer (word, tdep->wordsize, byte_order,
541 sp + structoffset);
542 structoffset += len;
543 }
544 else if (TYPE_CODE (type) == TYPE_CODE_INT)
545 /* Sign or zero extend the "int" into a "word". */
546 store_unsigned_integer (word, tdep->wordsize, byte_order,
547 unpack_long (type, val));
548 else
549 /* Always goes in the low address. */
550 memcpy (word, val, len);
551 /* Store that "word" in a register, or on the stack.
552 The words have "4" byte alignment. */
553 if (greg <= 10)
554 {
555 if (write_pass)
556 regcache_cooked_write (regcache,
557 tdep->ppc_gp0_regnum + greg, word);
558 greg++;
559 }
560 else
561 {
562 argoffset = align_up (argoffset, tdep->wordsize);
563 if (write_pass)
564 write_memory (sp + argoffset, word, tdep->wordsize);
565 argoffset += tdep->wordsize;
566 }
567 }
568 }
569
570 /* Compute the actual stack space requirements. */
571 if (!write_pass)
572 {
573 /* Remember the amount of space needed by the arguments. */
574 argspace = argoffset;
575 /* Allocate space for both the arguments and the structures. */
576 sp -= (argoffset + structoffset);
577 /* Ensure that the stack is still 16 byte aligned. */
578 sp = align_down (sp, 16);
579 }
580
581 /* The psABI says that "A caller of a function that takes a
582 variable argument list shall set condition register bit 6 to
583 1 if it passes one or more arguments in the floating-point
584 registers. It is strongly recommended that the caller set the
585 bit to 0 otherwise..." Doing this for normal functions too
586 shouldn't hurt. */
587 if (write_pass)
588 {
589 ULONGEST cr;
590
591 regcache_cooked_read_unsigned (regcache, tdep->ppc_cr_regnum, &cr);
592 if (freg > 1)
593 cr |= 0x02000000;
594 else
595 cr &= ~0x02000000;
596 regcache_cooked_write_unsigned (regcache, tdep->ppc_cr_regnum, cr);
597 }
598 }
599
600 /* Update %sp. */
601 regcache_cooked_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp);
602
603 /* Write the backchain (it occupies WORDSIZED bytes). */
604 write_memory_signed_integer (sp, tdep->wordsize, byte_order, saved_sp);
605
606 /* Point the inferior function call's return address at the dummy's
607 breakpoint. */
608 regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
609
610 return sp;
611 }
612
613 /* Handle the return-value conventions for Decimal Floating Point values
614 in both ppc32 and ppc64, which are the same. */
615 static int
616 get_decimal_float_return_value (struct gdbarch *gdbarch, struct type *valtype,
617 struct regcache *regcache, gdb_byte *readbuf,
618 const gdb_byte *writebuf)
619 {
620 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
621
622 gdb_assert (TYPE_CODE (valtype) == TYPE_CODE_DECFLOAT);
623
624 /* 32-bit and 64-bit decimal floats in f1. */
625 if (TYPE_LENGTH (valtype) <= 8)
626 {
627 if (writebuf != NULL)
628 {
629 gdb_byte regval[MAX_REGISTER_SIZE];
630 const gdb_byte *p;
631
632 /* 32-bit decimal float is right aligned in the doubleword. */
633 if (TYPE_LENGTH (valtype) == 4)
634 {
635 memcpy (regval + 4, writebuf, 4);
636 p = regval;
637 }
638 else
639 p = writebuf;
640
641 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, p);
642 }
643 if (readbuf != NULL)
644 {
645 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, readbuf);
646
647 /* Left align 32-bit decimal float. */
648 if (TYPE_LENGTH (valtype) == 4)
649 memcpy (readbuf, readbuf + 4, 4);
650 }
651 }
652 /* 128-bit decimal floats in f2,f3. */
653 else if (TYPE_LENGTH (valtype) == 16)
654 {
655 if (writebuf != NULL || readbuf != NULL)
656 {
657 int i;
658
659 for (i = 0; i < 2; i++)
660 {
661 if (writebuf != NULL)
662 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 2 + i,
663 writebuf + i * 8);
664 if (readbuf != NULL)
665 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 2 + i,
666 readbuf + i * 8);
667 }
668 }
669 }
670 else
671 /* Can't happen. */
672 internal_error (__FILE__, __LINE__, _("Unknown decimal float size."));
673
674 return RETURN_VALUE_REGISTER_CONVENTION;
675 }
676
677 /* Handle the return-value conventions specified by the SysV 32-bit
678 PowerPC ABI (including all the supplements):
679
680 no floating-point: floating-point values returned using 32-bit
681 general-purpose registers.
682
683 Altivec: 128-bit vectors returned using vector registers.
684
685 e500: 64-bit vectors returned using the full full 64 bit EV
686 register, floating-point values returned using 32-bit
687 general-purpose registers.
688
689 GCC (broken): Small struct values right (instead of left) aligned
690 when returned in general-purpose registers. */
691
692 static enum return_value_convention
693 do_ppc_sysv_return_value (struct gdbarch *gdbarch, struct type *func_type,
694 struct type *type, struct regcache *regcache,
695 gdb_byte *readbuf, const gdb_byte *writebuf,
696 int broken_gcc)
697 {
698 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
699 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
700 int opencl_abi = func_type? ppc_sysv_use_opencl_abi (func_type) : 0;
701
702 gdb_assert (tdep->wordsize == 4);
703
704 if (TYPE_CODE (type) == TYPE_CODE_FLT
705 && TYPE_LENGTH (type) <= 8
706 && !tdep->soft_float)
707 {
708 if (readbuf)
709 {
710 /* Floats and doubles stored in "f1". Convert the value to
711 the required type. */
712 gdb_byte regval[MAX_REGISTER_SIZE];
713 struct type *regtype = register_type (gdbarch,
714 tdep->ppc_fp0_regnum + 1);
715 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, regval);
716 convert_typed_floating (regval, regtype, readbuf, type);
717 }
718 if (writebuf)
719 {
720 /* Floats and doubles stored in "f1". Convert the value to
721 the register's "double" type. */
722 gdb_byte regval[MAX_REGISTER_SIZE];
723 struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum);
724 convert_typed_floating (writebuf, type, regval, regtype);
725 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval);
726 }
727 return RETURN_VALUE_REGISTER_CONVENTION;
728 }
729 if (TYPE_CODE (type) == TYPE_CODE_FLT
730 && TYPE_LENGTH (type) == 16
731 && !tdep->soft_float
732 && (gdbarch_long_double_format (gdbarch)
733 == floatformats_ibm_long_double))
734 {
735 /* IBM long double stored in f1 and f2. */
736 if (readbuf)
737 {
738 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, readbuf);
739 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 2,
740 readbuf + 8);
741 }
742 if (writebuf)
743 {
744 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, writebuf);
745 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 2,
746 writebuf + 8);
747 }
748 return RETURN_VALUE_REGISTER_CONVENTION;
749 }
750 if (TYPE_LENGTH (type) == 16
751 && ((TYPE_CODE (type) == TYPE_CODE_FLT
752 && (gdbarch_long_double_format (gdbarch)
753 == floatformats_ibm_long_double))
754 || (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && tdep->soft_float)))
755 {
756 /* Soft-float IBM long double or _Decimal128 stored in r3, r4,
757 r5, r6. */
758 if (readbuf)
759 {
760 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, readbuf);
761 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
762 readbuf + 4);
763 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 5,
764 readbuf + 8);
765 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 6,
766 readbuf + 12);
767 }
768 if (writebuf)
769 {
770 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, writebuf);
771 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
772 writebuf + 4);
773 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 5,
774 writebuf + 8);
775 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 6,
776 writebuf + 12);
777 }
778 return RETURN_VALUE_REGISTER_CONVENTION;
779 }
780 if ((TYPE_CODE (type) == TYPE_CODE_INT && TYPE_LENGTH (type) == 8)
781 || (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) == 8)
782 || (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && TYPE_LENGTH (type) == 8
783 && tdep->soft_float))
784 {
785 if (readbuf)
786 {
787 /* A long long, double or _Decimal64 stored in the 32 bit
788 r3/r4. */
789 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
790 readbuf + 0);
791 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
792 readbuf + 4);
793 }
794 if (writebuf)
795 {
796 /* A long long, double or _Decimal64 stored in the 32 bit
797 r3/r4. */
798 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
799 writebuf + 0);
800 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
801 writebuf + 4);
802 }
803 return RETURN_VALUE_REGISTER_CONVENTION;
804 }
805 if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && !tdep->soft_float)
806 return get_decimal_float_return_value (gdbarch, type, regcache, readbuf,
807 writebuf);
808 else if ((TYPE_CODE (type) == TYPE_CODE_INT
809 || TYPE_CODE (type) == TYPE_CODE_CHAR
810 || TYPE_CODE (type) == TYPE_CODE_BOOL
811 || TYPE_CODE (type) == TYPE_CODE_PTR
812 || TYPE_CODE (type) == TYPE_CODE_REF
813 || TYPE_CODE (type) == TYPE_CODE_ENUM)
814 && TYPE_LENGTH (type) <= tdep->wordsize)
815 {
816 if (readbuf)
817 {
818 /* Some sort of integer stored in r3. Since TYPE isn't
819 bigger than the register, sign extension isn't a problem
820 - just do everything unsigned. */
821 ULONGEST regval;
822 regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
823 &regval);
824 store_unsigned_integer (readbuf, TYPE_LENGTH (type), byte_order,
825 regval);
826 }
827 if (writebuf)
828 {
829 /* Some sort of integer stored in r3. Use unpack_long since
830 that should handle any required sign extension. */
831 regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
832 unpack_long (type, writebuf));
833 }
834 return RETURN_VALUE_REGISTER_CONVENTION;
835 }
836 /* OpenCL vectors < 16 bytes are returned as distinct
837 scalars in f1..f2 or r3..r10. */
838 if (TYPE_CODE (type) == TYPE_CODE_ARRAY
839 && TYPE_VECTOR (type)
840 && TYPE_LENGTH (type) < 16
841 && opencl_abi)
842 {
843 struct type *eltype = check_typedef (TYPE_TARGET_TYPE (type));
844 int i, nelt = TYPE_LENGTH (type) / TYPE_LENGTH (eltype);
845
846 for (i = 0; i < nelt; i++)
847 {
848 int offset = i * TYPE_LENGTH (eltype);
849
850 if (TYPE_CODE (eltype) == TYPE_CODE_FLT)
851 {
852 int regnum = tdep->ppc_fp0_regnum + 1 + i;
853 gdb_byte regval[MAX_REGISTER_SIZE];
854 struct type *regtype = register_type (gdbarch, regnum);
855
856 if (writebuf != NULL)
857 {
858 convert_typed_floating (writebuf + offset, eltype,
859 regval, regtype);
860 regcache_cooked_write (regcache, regnum, regval);
861 }
862 if (readbuf != NULL)
863 {
864 regcache_cooked_read (regcache, regnum, regval);
865 convert_typed_floating (regval, regtype,
866 readbuf + offset, eltype);
867 }
868 }
869 else
870 {
871 int regnum = tdep->ppc_gp0_regnum + 3 + i;
872 ULONGEST regval;
873
874 if (writebuf != NULL)
875 {
876 regval = unpack_long (eltype, writebuf + offset);
877 regcache_cooked_write_unsigned (regcache, regnum, regval);
878 }
879 if (readbuf != NULL)
880 {
881 regcache_cooked_read_unsigned (regcache, regnum, &regval);
882 store_unsigned_integer (readbuf + offset,
883 TYPE_LENGTH (eltype), byte_order,
884 regval);
885 }
886 }
887 }
888
889 return RETURN_VALUE_REGISTER_CONVENTION;
890 }
891 /* OpenCL vectors >= 16 bytes are returned in v2..v9. */
892 if (TYPE_CODE (type) == TYPE_CODE_ARRAY
893 && TYPE_VECTOR (type)
894 && TYPE_LENGTH (type) >= 16
895 && opencl_abi)
896 {
897 int n_regs = TYPE_LENGTH (type) / 16;
898 int i;
899
900 for (i = 0; i < n_regs; i++)
901 {
902 int offset = i * 16;
903 int regnum = tdep->ppc_vr0_regnum + 2 + i;
904
905 if (writebuf != NULL)
906 regcache_cooked_write (regcache, regnum, writebuf + offset);
907 if (readbuf != NULL)
908 regcache_cooked_read (regcache, regnum, readbuf + offset);
909 }
910
911 return RETURN_VALUE_REGISTER_CONVENTION;
912 }
913 if (TYPE_LENGTH (type) == 16
914 && TYPE_CODE (type) == TYPE_CODE_ARRAY
915 && TYPE_VECTOR (type)
916 && tdep->vector_abi == POWERPC_VEC_ALTIVEC)
917 {
918 if (readbuf)
919 {
920 /* Altivec places the return value in "v2". */
921 regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, readbuf);
922 }
923 if (writebuf)
924 {
925 /* Altivec places the return value in "v2". */
926 regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2, writebuf);
927 }
928 return RETURN_VALUE_REGISTER_CONVENTION;
929 }
930 if (TYPE_LENGTH (type) == 16
931 && TYPE_CODE (type) == TYPE_CODE_ARRAY
932 && TYPE_VECTOR (type)
933 && tdep->vector_abi == POWERPC_VEC_GENERIC)
934 {
935 /* GCC -maltivec -mabi=no-altivec returns vectors in r3/r4/r5/r6.
936 GCC without AltiVec returns them in memory, but it warns about
937 ABI risks in that case; we don't try to support it. */
938 if (readbuf)
939 {
940 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
941 readbuf + 0);
942 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
943 readbuf + 4);
944 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 5,
945 readbuf + 8);
946 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 6,
947 readbuf + 12);
948 }
949 if (writebuf)
950 {
951 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
952 writebuf + 0);
953 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
954 writebuf + 4);
955 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 5,
956 writebuf + 8);
957 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 6,
958 writebuf + 12);
959 }
960 return RETURN_VALUE_REGISTER_CONVENTION;
961 }
962 if (TYPE_LENGTH (type) == 8
963 && TYPE_CODE (type) == TYPE_CODE_ARRAY
964 && TYPE_VECTOR (type)
965 && tdep->vector_abi == POWERPC_VEC_SPE)
966 {
967 /* The e500 ABI places return values for the 64-bit DSP types
968 (__ev64_opaque__) in r3. However, in GDB-speak, ev3
969 corresponds to the entire r3 value for e500, whereas GDB's r3
970 only corresponds to the least significant 32-bits. So place
971 the 64-bit DSP type's value in ev3. */
972 if (readbuf)
973 regcache_cooked_read (regcache, tdep->ppc_ev0_regnum + 3, readbuf);
974 if (writebuf)
975 regcache_cooked_write (regcache, tdep->ppc_ev0_regnum + 3, writebuf);
976 return RETURN_VALUE_REGISTER_CONVENTION;
977 }
978 if (broken_gcc && TYPE_LENGTH (type) <= 8)
979 {
980 /* GCC screwed up for structures or unions whose size is less
981 than or equal to 8 bytes.. Instead of left-aligning, it
982 right-aligns the data into the buffer formed by r3, r4. */
983 gdb_byte regvals[MAX_REGISTER_SIZE * 2];
984 int len = TYPE_LENGTH (type);
985 int offset = (2 * tdep->wordsize - len) % tdep->wordsize;
986
987 if (readbuf)
988 {
989 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
990 regvals + 0 * tdep->wordsize);
991 if (len > tdep->wordsize)
992 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
993 regvals + 1 * tdep->wordsize);
994 memcpy (readbuf, regvals + offset, len);
995 }
996 if (writebuf)
997 {
998 memset (regvals, 0, sizeof regvals);
999 memcpy (regvals + offset, writebuf, len);
1000 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
1001 regvals + 0 * tdep->wordsize);
1002 if (len > tdep->wordsize)
1003 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
1004 regvals + 1 * tdep->wordsize);
1005 }
1006
1007 return RETURN_VALUE_REGISTER_CONVENTION;
1008 }
1009 if (TYPE_LENGTH (type) <= 8)
1010 {
1011 if (readbuf)
1012 {
1013 /* This matches SVr4 PPC, it does not match GCC. */
1014 /* The value is right-padded to 8 bytes and then loaded, as
1015 two "words", into r3/r4. */
1016 gdb_byte regvals[MAX_REGISTER_SIZE * 2];
1017 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
1018 regvals + 0 * tdep->wordsize);
1019 if (TYPE_LENGTH (type) > tdep->wordsize)
1020 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
1021 regvals + 1 * tdep->wordsize);
1022 memcpy (readbuf, regvals, TYPE_LENGTH (type));
1023 }
1024 if (writebuf)
1025 {
1026 /* This matches SVr4 PPC, it does not match GCC. */
1027 /* The value is padded out to 8 bytes and then loaded, as
1028 two "words" into r3/r4. */
1029 gdb_byte regvals[MAX_REGISTER_SIZE * 2];
1030 memset (regvals, 0, sizeof regvals);
1031 memcpy (regvals, writebuf, TYPE_LENGTH (type));
1032 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
1033 regvals + 0 * tdep->wordsize);
1034 if (TYPE_LENGTH (type) > tdep->wordsize)
1035 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
1036 regvals + 1 * tdep->wordsize);
1037 }
1038 return RETURN_VALUE_REGISTER_CONVENTION;
1039 }
1040 return RETURN_VALUE_STRUCT_CONVENTION;
1041 }
1042
1043 enum return_value_convention
1044 ppc_sysv_abi_return_value (struct gdbarch *gdbarch, struct value *function,
1045 struct type *valtype, struct regcache *regcache,
1046 gdb_byte *readbuf, const gdb_byte *writebuf)
1047 {
1048 return do_ppc_sysv_return_value (gdbarch,
1049 function ? value_type (function) : NULL,
1050 valtype, regcache, readbuf, writebuf, 0);
1051 }
1052
1053 enum return_value_convention
1054 ppc_sysv_abi_broken_return_value (struct gdbarch *gdbarch,
1055 struct value *function,
1056 struct type *valtype,
1057 struct regcache *regcache,
1058 gdb_byte *readbuf, const gdb_byte *writebuf)
1059 {
1060 return do_ppc_sysv_return_value (gdbarch,
1061 function ? value_type (function) : NULL,
1062 valtype, regcache, readbuf, writebuf, 1);
1063 }
1064
1065 /* The helper function for 64-bit SYSV push_dummy_call. Converts the
1066 function's code address back into the function's descriptor
1067 address.
1068
1069 Find a value for the TOC register. Every symbol should have both
1070 ".FN" and "FN" in the minimal symbol table. "FN" points at the
1071 FN's descriptor, while ".FN" points at the entry point (which
1072 matches FUNC_ADDR). Need to reverse from FUNC_ADDR back to the
1073 FN's descriptor address (while at the same time being careful to
1074 find "FN" in the same object file as ".FN"). */
1075
1076 static int
1077 convert_code_addr_to_desc_addr (CORE_ADDR code_addr, CORE_ADDR *desc_addr)
1078 {
1079 struct obj_section *dot_fn_section;
1080 struct minimal_symbol *dot_fn;
1081 struct minimal_symbol *fn;
1082 /* Find the minimal symbol that corresponds to CODE_ADDR (should
1083 have a name of the form ".FN"). */
1084 dot_fn = lookup_minimal_symbol_by_pc (code_addr);
1085 if (dot_fn == NULL || SYMBOL_LINKAGE_NAME (dot_fn)[0] != '.')
1086 return 0;
1087 /* Get the section that contains CODE_ADDR. Need this for the
1088 "objfile" that it contains. */
1089 dot_fn_section = find_pc_section (code_addr);
1090 if (dot_fn_section == NULL || dot_fn_section->objfile == NULL)
1091 return 0;
1092 /* Now find the corresponding "FN" (dropping ".") minimal symbol's
1093 address. Only look for the minimal symbol in ".FN"'s object file
1094 - avoids problems when two object files (i.e., shared libraries)
1095 contain a minimal symbol with the same name. */
1096 fn = lookup_minimal_symbol (SYMBOL_LINKAGE_NAME (dot_fn) + 1, NULL,
1097 dot_fn_section->objfile);
1098 if (fn == NULL)
1099 return 0;
1100 /* Found a descriptor. */
1101 (*desc_addr) = SYMBOL_VALUE_ADDRESS (fn);
1102 return 1;
1103 }
1104
1105 /* Pass the arguments in either registers, or in the stack. Using the
1106 ppc 64 bit SysV ABI.
1107
1108 This implements a dumbed down version of the ABI. It always writes
1109 values to memory, GPR and FPR, even when not necessary. Doing this
1110 greatly simplifies the logic. */
1111
1112 CORE_ADDR
1113 ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch,
1114 struct value *function,
1115 struct regcache *regcache, CORE_ADDR bp_addr,
1116 int nargs, struct value **args, CORE_ADDR sp,
1117 int struct_return, CORE_ADDR struct_addr)
1118 {
1119 CORE_ADDR func_addr = find_function_addr (function, NULL);
1120 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1121 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1122 int opencl_abi = ppc_sysv_use_opencl_abi (value_type (function));
1123 ULONGEST back_chain;
1124 /* See for-loop comment below. */
1125 int write_pass;
1126 /* Size of the by-reference parameter copy region, the final value is
1127 computed in the for-loop below. */
1128 LONGEST refparam_size = 0;
1129 /* Size of the general parameter region, the final value is computed
1130 in the for-loop below. */
1131 LONGEST gparam_size = 0;
1132 /* Kevin writes ... I don't mind seeing tdep->wordsize used in the
1133 calls to align_up(), align_down(), etc. because this makes it
1134 easier to reuse this code (in a copy/paste sense) in the future,
1135 but it is a 64-bit ABI and asserting that the wordsize is 8 bytes
1136 at some point makes it easier to verify that this function is
1137 correct without having to do a non-local analysis to figure out
1138 the possible values of tdep->wordsize. */
1139 gdb_assert (tdep->wordsize == 8);
1140
1141 /* This function exists to support a calling convention that
1142 requires floating-point registers. It shouldn't be used on
1143 processors that lack them. */
1144 gdb_assert (ppc_floating_point_unit_p (gdbarch));
1145
1146 /* By this stage in the proceedings, SP has been decremented by "red
1147 zone size" + "struct return size". Fetch the stack-pointer from
1148 before this and use that as the BACK_CHAIN. */
1149 regcache_cooked_read_unsigned (regcache, gdbarch_sp_regnum (gdbarch),
1150 &back_chain);
1151
1152 /* Go through the argument list twice.
1153
1154 Pass 1: Compute the function call's stack space and register
1155 requirements.
1156
1157 Pass 2: Replay the same computation but this time also write the
1158 values out to the target. */
1159
1160 for (write_pass = 0; write_pass < 2; write_pass++)
1161 {
1162 int argno;
1163 /* Next available floating point register for float and double
1164 arguments. */
1165 int freg = 1;
1166 /* Next available general register for non-vector (but possibly
1167 float) arguments. */
1168 int greg = 3;
1169 /* Next available vector register for vector arguments. */
1170 int vreg = 2;
1171 /* The address, at which the next general purpose parameter
1172 (integer, struct, float, vector, ...) should be saved. */
1173 CORE_ADDR gparam;
1174 /* The address, at which the next by-reference parameter
1175 (non-Altivec vector, variably-sized type) should be saved. */
1176 CORE_ADDR refparam;
1177
1178 if (!write_pass)
1179 {
1180 /* During the first pass, GPARAM and REFPARAM are more like
1181 offsets (start address zero) than addresses. That way
1182 they accumulate the total stack space each region
1183 requires. */
1184 gparam = 0;
1185 refparam = 0;
1186 }
1187 else
1188 {
1189 /* Decrement the stack pointer making space for the Altivec
1190 and general on-stack parameters. Set refparam and gparam
1191 to their corresponding regions. */
1192 refparam = align_down (sp - refparam_size, 16);
1193 gparam = align_down (refparam - gparam_size, 16);
1194 /* Add in space for the TOC, link editor double word,
1195 compiler double word, LR save area, CR save area. */
1196 sp = align_down (gparam - 48, 16);
1197 }
1198
1199 /* If the function is returning a `struct', then there is an
1200 extra hidden parameter (which will be passed in r3)
1201 containing the address of that struct.. In that case we
1202 should advance one word and start from r4 register to copy
1203 parameters. This also consumes one on-stack parameter slot. */
1204 if (struct_return)
1205 {
1206 if (write_pass)
1207 regcache_cooked_write_signed (regcache,
1208 tdep->ppc_gp0_regnum + greg,
1209 struct_addr);
1210 greg++;
1211 gparam = align_up (gparam + tdep->wordsize, tdep->wordsize);
1212 }
1213
1214 for (argno = 0; argno < nargs; argno++)
1215 {
1216 struct value *arg = args[argno];
1217 struct type *type = check_typedef (value_type (arg));
1218 const bfd_byte *val = value_contents (arg);
1219
1220 if (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) <= 8)
1221 {
1222 /* Floats and Doubles go in f1 .. f13. They also
1223 consume a left aligned GREG,, and can end up in
1224 memory. */
1225 if (write_pass)
1226 {
1227 gdb_byte regval[MAX_REGISTER_SIZE];
1228 const gdb_byte *p;
1229
1230 /* Version 1.7 of the 64-bit PowerPC ELF ABI says:
1231
1232 "Single precision floating point values are mapped to
1233 the first word in a single doubleword."
1234
1235 And version 1.9 says:
1236
1237 "Single precision floating point values are mapped to
1238 the second word in a single doubleword."
1239
1240 GDB then writes single precision floating point values
1241 at both words in a doubleword, to support both ABIs. */
1242 if (TYPE_LENGTH (type) == 4)
1243 {
1244 memcpy (regval, val, 4);
1245 memcpy (regval + 4, val, 4);
1246 p = regval;
1247 }
1248 else
1249 p = val;
1250
1251 /* Write value in the stack's parameter save area. */
1252 write_memory (gparam, p, 8);
1253
1254 if (freg <= 13)
1255 {
1256 struct type *regtype
1257 = register_type (gdbarch, tdep->ppc_fp0_regnum);
1258
1259 convert_typed_floating (val, type, regval, regtype);
1260 regcache_cooked_write (regcache,
1261 tdep->ppc_fp0_regnum + freg,
1262 regval);
1263 }
1264 if (greg <= 10)
1265 regcache_cooked_write (regcache,
1266 tdep->ppc_gp0_regnum + greg,
1267 regval);
1268 }
1269
1270 freg++;
1271 greg++;
1272 /* Always consume parameter stack space. */
1273 gparam = align_up (gparam + 8, tdep->wordsize);
1274 }
1275 else if (TYPE_CODE (type) == TYPE_CODE_FLT
1276 && TYPE_LENGTH (type) == 16
1277 && (gdbarch_long_double_format (gdbarch)
1278 == floatformats_ibm_long_double))
1279 {
1280 /* IBM long double stored in two doublewords of the
1281 parameter save area and corresponding registers. */
1282 if (write_pass)
1283 {
1284 if (!tdep->soft_float && freg <= 13)
1285 {
1286 regcache_cooked_write (regcache,
1287 tdep->ppc_fp0_regnum + freg,
1288 val);
1289 if (freg <= 12)
1290 regcache_cooked_write (regcache,
1291 tdep->ppc_fp0_regnum + freg + 1,
1292 val + 8);
1293 }
1294 if (greg <= 10)
1295 {
1296 regcache_cooked_write (regcache,
1297 tdep->ppc_gp0_regnum + greg,
1298 val);
1299 if (greg <= 9)
1300 regcache_cooked_write (regcache,
1301 tdep->ppc_gp0_regnum + greg + 1,
1302 val + 8);
1303 }
1304 write_memory (gparam, val, TYPE_LENGTH (type));
1305 }
1306 freg += 2;
1307 greg += 2;
1308 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
1309 }
1310 else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT
1311 && TYPE_LENGTH (type) <= 8)
1312 {
1313 /* 32-bit and 64-bit decimal floats go in f1 .. f13. They can
1314 end up in memory. */
1315 if (write_pass)
1316 {
1317 gdb_byte regval[MAX_REGISTER_SIZE];
1318 const gdb_byte *p;
1319
1320 /* 32-bit decimal floats are right aligned in the
1321 doubleword. */
1322 if (TYPE_LENGTH (type) == 4)
1323 {
1324 memcpy (regval + 4, val, 4);
1325 p = regval;
1326 }
1327 else
1328 p = val;
1329
1330 /* Write value in the stack's parameter save area. */
1331 write_memory (gparam, p, 8);
1332
1333 if (freg <= 13)
1334 regcache_cooked_write (regcache,
1335 tdep->ppc_fp0_regnum + freg, p);
1336 }
1337
1338 freg++;
1339 greg++;
1340 /* Always consume parameter stack space. */
1341 gparam = align_up (gparam + 8, tdep->wordsize);
1342 }
1343 else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT &&
1344 TYPE_LENGTH (type) == 16)
1345 {
1346 /* 128-bit decimal floats go in f2 .. f12, always in even/odd
1347 pairs. They can end up in memory, using two doublewords. */
1348 if (write_pass)
1349 {
1350 if (freg <= 12)
1351 {
1352 /* Make sure freg is even. */
1353 freg += freg & 1;
1354 regcache_cooked_write (regcache,
1355 tdep->ppc_fp0_regnum + freg, val);
1356 regcache_cooked_write (regcache,
1357 tdep->ppc_fp0_regnum + freg + 1, val + 8);
1358 }
1359
1360 write_memory (gparam, val, TYPE_LENGTH (type));
1361 }
1362
1363 freg += 2;
1364 greg += 2;
1365 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
1366 }
1367 else if (TYPE_LENGTH (type) < 16
1368 && TYPE_CODE (type) == TYPE_CODE_ARRAY
1369 && TYPE_VECTOR (type)
1370 && opencl_abi)
1371 {
1372 /* OpenCL vectors shorter than 16 bytes are passed as if
1373 a series of independent scalars. */
1374 struct type *eltype = check_typedef (TYPE_TARGET_TYPE (type));
1375 int i, nelt = TYPE_LENGTH (type) / TYPE_LENGTH (eltype);
1376
1377 for (i = 0; i < nelt; i++)
1378 {
1379 const gdb_byte *elval = val + i * TYPE_LENGTH (eltype);
1380
1381 if (TYPE_CODE (eltype) == TYPE_CODE_FLT)
1382 {
1383 if (write_pass)
1384 {
1385 gdb_byte regval[MAX_REGISTER_SIZE];
1386 const gdb_byte *p;
1387
1388 if (TYPE_LENGTH (eltype) == 4)
1389 {
1390 memcpy (regval, elval, 4);
1391 memcpy (regval + 4, elval, 4);
1392 p = regval;
1393 }
1394 else
1395 p = elval;
1396
1397 write_memory (gparam, p, 8);
1398
1399 if (freg <= 13)
1400 {
1401 int regnum = tdep->ppc_fp0_regnum + freg;
1402 struct type *regtype
1403 = register_type (gdbarch, regnum);
1404
1405 convert_typed_floating (elval, eltype,
1406 regval, regtype);
1407 regcache_cooked_write (regcache, regnum, regval);
1408 }
1409
1410 if (greg <= 10)
1411 regcache_cooked_write (regcache,
1412 tdep->ppc_gp0_regnum + greg,
1413 regval);
1414 }
1415
1416 freg++;
1417 greg++;
1418 gparam = align_up (gparam + 8, tdep->wordsize);
1419 }
1420 else
1421 {
1422 if (write_pass)
1423 {
1424 ULONGEST word = unpack_long (eltype, elval);
1425 if (greg <= 10)
1426 regcache_cooked_write_unsigned
1427 (regcache, tdep->ppc_gp0_regnum + greg, word);
1428
1429 write_memory_unsigned_integer
1430 (gparam, tdep->wordsize, byte_order, word);
1431 }
1432
1433 greg++;
1434 gparam = align_up (gparam + TYPE_LENGTH (eltype),
1435 tdep->wordsize);
1436 }
1437 }
1438 }
1439 else if (TYPE_LENGTH (type) >= 16
1440 && TYPE_CODE (type) == TYPE_CODE_ARRAY
1441 && TYPE_VECTOR (type)
1442 && opencl_abi)
1443 {
1444 /* OpenCL vectors 16 bytes or longer are passed as if
1445 a series of AltiVec vectors. */
1446 int i;
1447
1448 for (i = 0; i < TYPE_LENGTH (type) / 16; i++)
1449 {
1450 const gdb_byte *elval = val + i * 16;
1451
1452 gparam = align_up (gparam, 16);
1453 greg += greg & 1;
1454
1455 if (write_pass)
1456 {
1457 if (vreg <= 13)
1458 regcache_cooked_write (regcache,
1459 tdep->ppc_vr0_regnum + vreg,
1460 elval);
1461
1462 write_memory (gparam, elval, 16);
1463 }
1464
1465 greg += 2;
1466 vreg++;
1467 gparam += 16;
1468 }
1469 }
1470 else if (TYPE_LENGTH (type) == 16 && TYPE_VECTOR (type)
1471 && TYPE_CODE (type) == TYPE_CODE_ARRAY
1472 && tdep->vector_abi == POWERPC_VEC_ALTIVEC)
1473 {
1474 /* In the Altivec ABI, vectors go in the vector registers
1475 v2 .. v13, as well as the parameter area -- always at
1476 16-byte aligned addresses. */
1477
1478 gparam = align_up (gparam, 16);
1479 greg += greg & 1;
1480
1481 if (write_pass)
1482 {
1483 if (vreg <= 13)
1484 regcache_cooked_write (regcache,
1485 tdep->ppc_vr0_regnum + vreg, val);
1486
1487 write_memory (gparam, val, TYPE_LENGTH (type));
1488 }
1489
1490 greg += 2;
1491 vreg++;
1492 gparam += 16;
1493 }
1494 else if (TYPE_LENGTH (type) >= 16 && TYPE_VECTOR (type)
1495 && TYPE_CODE (type) == TYPE_CODE_ARRAY)
1496 {
1497 /* Non-Altivec vectors are passed by reference. */
1498
1499 /* Copy value onto the stack ... */
1500 refparam = align_up (refparam, 16);
1501 if (write_pass)
1502 write_memory (refparam, val, TYPE_LENGTH (type));
1503
1504 /* ... and pass a pointer to the copy as parameter. */
1505 if (write_pass)
1506 {
1507 if (greg <= 10)
1508 regcache_cooked_write_unsigned (regcache,
1509 tdep->ppc_gp0_regnum +
1510 greg, refparam);
1511 write_memory_unsigned_integer (gparam, tdep->wordsize,
1512 byte_order, refparam);
1513 }
1514 greg++;
1515 gparam = align_up (gparam + tdep->wordsize, tdep->wordsize);
1516 refparam = align_up (refparam + TYPE_LENGTH (type), tdep->wordsize);
1517 }
1518 else if ((TYPE_CODE (type) == TYPE_CODE_INT
1519 || TYPE_CODE (type) == TYPE_CODE_ENUM
1520 || TYPE_CODE (type) == TYPE_CODE_BOOL
1521 || TYPE_CODE (type) == TYPE_CODE_CHAR
1522 || TYPE_CODE (type) == TYPE_CODE_PTR
1523 || TYPE_CODE (type) == TYPE_CODE_REF)
1524 && TYPE_LENGTH (type) <= 8)
1525 {
1526 /* Scalars and Pointers get sign[un]extended and go in
1527 gpr3 .. gpr10. They can also end up in memory. */
1528 if (write_pass)
1529 {
1530 /* Sign extend the value, then store it unsigned. */
1531 ULONGEST word = unpack_long (type, val);
1532 /* Convert any function code addresses into
1533 descriptors. */
1534 if (TYPE_CODE (type) == TYPE_CODE_PTR
1535 || TYPE_CODE (type) == TYPE_CODE_REF)
1536 {
1537 struct type *target_type;
1538 target_type = check_typedef (TYPE_TARGET_TYPE (type));
1539
1540 if (TYPE_CODE (target_type) == TYPE_CODE_FUNC
1541 || TYPE_CODE (target_type) == TYPE_CODE_METHOD)
1542 {
1543 CORE_ADDR desc = word;
1544 convert_code_addr_to_desc_addr (word, &desc);
1545 word = desc;
1546 }
1547 }
1548 if (greg <= 10)
1549 regcache_cooked_write_unsigned (regcache,
1550 tdep->ppc_gp0_regnum +
1551 greg, word);
1552 write_memory_unsigned_integer (gparam, tdep->wordsize,
1553 byte_order, word);
1554 }
1555 greg++;
1556 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
1557 }
1558 else
1559 {
1560 int byte;
1561 for (byte = 0; byte < TYPE_LENGTH (type);
1562 byte += tdep->wordsize)
1563 {
1564 if (write_pass && greg <= 10)
1565 {
1566 gdb_byte regval[MAX_REGISTER_SIZE];
1567 int len = TYPE_LENGTH (type) - byte;
1568 if (len > tdep->wordsize)
1569 len = tdep->wordsize;
1570 memset (regval, 0, sizeof regval);
1571 /* The ABI (version 1.9) specifies that values
1572 smaller than one doubleword are right-aligned
1573 and those larger are left-aligned. GCC
1574 versions before 3.4 implemented this
1575 incorrectly; see
1576 <http://gcc.gnu.org/gcc-3.4/powerpc-abi.html>. */
1577 if (byte == 0)
1578 memcpy (regval + tdep->wordsize - len,
1579 val + byte, len);
1580 else
1581 memcpy (regval, val + byte, len);
1582 regcache_cooked_write (regcache, greg, regval);
1583 }
1584 greg++;
1585 }
1586 if (write_pass)
1587 {
1588 /* WARNING: cagney/2003-09-21: Strictly speaking, this
1589 isn't necessary, unfortunately, GCC appears to get
1590 "struct convention" parameter passing wrong putting
1591 odd sized structures in memory instead of in a
1592 register. Work around this by always writing the
1593 value to memory. Fortunately, doing this
1594 simplifies the code. */
1595 int len = TYPE_LENGTH (type);
1596 if (len < tdep->wordsize)
1597 write_memory (gparam + tdep->wordsize - len, val, len);
1598 else
1599 write_memory (gparam, val, len);
1600 }
1601 if (freg <= 13
1602 && TYPE_CODE (type) == TYPE_CODE_STRUCT
1603 && TYPE_NFIELDS (type) == 1
1604 && TYPE_LENGTH (type) <= 16)
1605 {
1606 /* The ABI (version 1.9) specifies that structs
1607 containing a single floating-point value, at any
1608 level of nesting of single-member structs, are
1609 passed in floating-point registers. */
1610 while (TYPE_CODE (type) == TYPE_CODE_STRUCT
1611 && TYPE_NFIELDS (type) == 1)
1612 type = check_typedef (TYPE_FIELD_TYPE (type, 0));
1613 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1614 {
1615 if (TYPE_LENGTH (type) <= 8)
1616 {
1617 if (write_pass)
1618 {
1619 gdb_byte regval[MAX_REGISTER_SIZE];
1620 struct type *regtype
1621 = register_type (gdbarch,
1622 tdep->ppc_fp0_regnum);
1623 convert_typed_floating (val, type, regval,
1624 regtype);
1625 regcache_cooked_write (regcache,
1626 (tdep->ppc_fp0_regnum
1627 + freg),
1628 regval);
1629 }
1630 freg++;
1631 }
1632 else if (TYPE_LENGTH (type) == 16
1633 && (gdbarch_long_double_format (gdbarch)
1634 == floatformats_ibm_long_double))
1635 {
1636 if (write_pass)
1637 {
1638 regcache_cooked_write (regcache,
1639 (tdep->ppc_fp0_regnum
1640 + freg),
1641 val);
1642 if (freg <= 12)
1643 regcache_cooked_write (regcache,
1644 (tdep->ppc_fp0_regnum
1645 + freg + 1),
1646 val + 8);
1647 }
1648 freg += 2;
1649 }
1650 }
1651 }
1652 /* Always consume parameter stack space. */
1653 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
1654 }
1655 }
1656
1657 if (!write_pass)
1658 {
1659 /* Save the true region sizes ready for the second pass. */
1660 refparam_size = refparam;
1661 /* Make certain that the general parameter save area is at
1662 least the minimum 8 registers (or doublewords) in size. */
1663 if (greg < 8)
1664 gparam_size = 8 * tdep->wordsize;
1665 else
1666 gparam_size = gparam;
1667 }
1668 }
1669
1670 /* Update %sp. */
1671 regcache_cooked_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp);
1672
1673 /* Write the backchain (it occupies WORDSIZED bytes). */
1674 write_memory_signed_integer (sp, tdep->wordsize, byte_order, back_chain);
1675
1676 /* Point the inferior function call's return address at the dummy's
1677 breakpoint. */
1678 regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
1679
1680 /* Use the func_addr to find the descriptor, and use that to find
1681 the TOC. If we're calling via a function pointer, the pointer
1682 itself identifies the descriptor. */
1683 {
1684 struct type *ftype = check_typedef (value_type (function));
1685 CORE_ADDR desc_addr = value_as_address (function);
1686
1687 if (TYPE_CODE (ftype) == TYPE_CODE_PTR
1688 || convert_code_addr_to_desc_addr (func_addr, &desc_addr))
1689 {
1690 /* The TOC is the second double word in the descriptor. */
1691 CORE_ADDR toc =
1692 read_memory_unsigned_integer (desc_addr + tdep->wordsize,
1693 tdep->wordsize, byte_order);
1694 regcache_cooked_write_unsigned (regcache,
1695 tdep->ppc_gp0_regnum + 2, toc);
1696 }
1697 }
1698
1699 return sp;
1700 }
1701
1702
1703 /* The 64 bit ABI return value convention.
1704
1705 Return non-zero if the return-value is stored in a register, return
1706 0 if the return-value is instead stored on the stack (a.k.a.,
1707 struct return convention).
1708
1709 For a return-value stored in a register: when WRITEBUF is non-NULL,
1710 copy the buffer to the corresponding register return-value location
1711 location; when READBUF is non-NULL, fill the buffer from the
1712 corresponding register return-value location. */
1713 enum return_value_convention
1714 ppc64_sysv_abi_return_value (struct gdbarch *gdbarch, struct value *function,
1715 struct type *valtype, struct regcache *regcache,
1716 gdb_byte *readbuf, const gdb_byte *writebuf)
1717 {
1718 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1719 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1720 struct type *func_type = function ? value_type (function) : NULL;
1721 int opencl_abi = func_type? ppc_sysv_use_opencl_abi (func_type) : 0;
1722
1723 /* This function exists to support a calling convention that
1724 requires floating-point registers. It shouldn't be used on
1725 processors that lack them. */
1726 gdb_assert (ppc_floating_point_unit_p (gdbarch));
1727
1728 /* Floats and doubles in F1. */
1729 if (TYPE_CODE (valtype) == TYPE_CODE_FLT && TYPE_LENGTH (valtype) <= 8)
1730 {
1731 gdb_byte regval[MAX_REGISTER_SIZE];
1732 struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum);
1733 if (writebuf != NULL)
1734 {
1735 convert_typed_floating (writebuf, valtype, regval, regtype);
1736 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval);
1737 }
1738 if (readbuf != NULL)
1739 {
1740 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, regval);
1741 convert_typed_floating (regval, regtype, readbuf, valtype);
1742 }
1743 return RETURN_VALUE_REGISTER_CONVENTION;
1744 }
1745 if (TYPE_CODE (valtype) == TYPE_CODE_DECFLOAT)
1746 return get_decimal_float_return_value (gdbarch, valtype, regcache, readbuf,
1747 writebuf);
1748 /* Integers in r3. */
1749 if ((TYPE_CODE (valtype) == TYPE_CODE_INT
1750 || TYPE_CODE (valtype) == TYPE_CODE_ENUM
1751 || TYPE_CODE (valtype) == TYPE_CODE_CHAR
1752 || TYPE_CODE (valtype) == TYPE_CODE_BOOL)
1753 && TYPE_LENGTH (valtype) <= 8)
1754 {
1755 if (writebuf != NULL)
1756 {
1757 /* Be careful to sign extend the value. */
1758 regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
1759 unpack_long (valtype, writebuf));
1760 }
1761 if (readbuf != NULL)
1762 {
1763 /* Extract the integer from r3. Since this is truncating the
1764 value, there isn't a sign extension problem. */
1765 ULONGEST regval;
1766 regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
1767 &regval);
1768 store_unsigned_integer (readbuf, TYPE_LENGTH (valtype), byte_order,
1769 regval);
1770 }
1771 return RETURN_VALUE_REGISTER_CONVENTION;
1772 }
1773 /* All pointers live in r3. */
1774 if (TYPE_CODE (valtype) == TYPE_CODE_PTR
1775 || TYPE_CODE (valtype) == TYPE_CODE_REF)
1776 {
1777 /* All pointers live in r3. */
1778 if (writebuf != NULL)
1779 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, writebuf);
1780 if (readbuf != NULL)
1781 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, readbuf);
1782 return RETURN_VALUE_REGISTER_CONVENTION;
1783 }
1784 /* OpenCL vectors < 16 bytes are returned as distinct
1785 scalars in f1..f2 or r3..r10. */
1786 if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY
1787 && TYPE_VECTOR (valtype)
1788 && TYPE_LENGTH (valtype) < 16
1789 && opencl_abi)
1790 {
1791 struct type *eltype = check_typedef (TYPE_TARGET_TYPE (valtype));
1792 int i, nelt = TYPE_LENGTH (valtype) / TYPE_LENGTH (eltype);
1793
1794 for (i = 0; i < nelt; i++)
1795 {
1796 int offset = i * TYPE_LENGTH (eltype);
1797
1798 if (TYPE_CODE (eltype) == TYPE_CODE_FLT)
1799 {
1800 int regnum = tdep->ppc_fp0_regnum + 1 + i;
1801 gdb_byte regval[MAX_REGISTER_SIZE];
1802 struct type *regtype = register_type (gdbarch, regnum);
1803
1804 if (writebuf != NULL)
1805 {
1806 convert_typed_floating (writebuf + offset, eltype,
1807 regval, regtype);
1808 regcache_cooked_write (regcache, regnum, regval);
1809 }
1810 if (readbuf != NULL)
1811 {
1812 regcache_cooked_read (regcache, regnum, regval);
1813 convert_typed_floating (regval, regtype,
1814 readbuf + offset, eltype);
1815 }
1816 }
1817 else
1818 {
1819 int regnum = tdep->ppc_gp0_regnum + 3 + i;
1820 ULONGEST regval;
1821
1822 if (writebuf != NULL)
1823 {
1824 regval = unpack_long (eltype, writebuf + offset);
1825 regcache_cooked_write_unsigned (regcache, regnum, regval);
1826 }
1827 if (readbuf != NULL)
1828 {
1829 regcache_cooked_read_unsigned (regcache, regnum, &regval);
1830 store_unsigned_integer (readbuf + offset,
1831 TYPE_LENGTH (eltype), byte_order,
1832 regval);
1833 }
1834 }
1835 }
1836
1837 return RETURN_VALUE_REGISTER_CONVENTION;
1838 }
1839 /* OpenCL vectors >= 16 bytes are returned in v2..v9. */
1840 if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY
1841 && TYPE_VECTOR (valtype)
1842 && TYPE_LENGTH (valtype) >= 16
1843 && opencl_abi)
1844 {
1845 int n_regs = TYPE_LENGTH (valtype) / 16;
1846 int i;
1847
1848 for (i = 0; i < n_regs; i++)
1849 {
1850 int offset = i * 16;
1851 int regnum = tdep->ppc_vr0_regnum + 2 + i;
1852
1853 if (writebuf != NULL)
1854 regcache_cooked_write (regcache, regnum, writebuf + offset);
1855 if (readbuf != NULL)
1856 regcache_cooked_read (regcache, regnum, readbuf + offset);
1857 }
1858
1859 return RETURN_VALUE_REGISTER_CONVENTION;
1860 }
1861 /* Array type has more than one use. */
1862 if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY)
1863 {
1864 /* Small character arrays are returned, right justified, in r3. */
1865 if (TYPE_LENGTH (valtype) <= 8
1866 && TYPE_CODE (TYPE_TARGET_TYPE (valtype)) == TYPE_CODE_INT
1867 && TYPE_LENGTH (TYPE_TARGET_TYPE (valtype)) == 1)
1868 {
1869 int offset = (register_size (gdbarch, tdep->ppc_gp0_regnum + 3)
1870 - TYPE_LENGTH (valtype));
1871 if (writebuf != NULL)
1872 regcache_cooked_write_part (regcache, tdep->ppc_gp0_regnum + 3,
1873 offset, TYPE_LENGTH (valtype), writebuf);
1874 if (readbuf != NULL)
1875 regcache_cooked_read_part (regcache, tdep->ppc_gp0_regnum + 3,
1876 offset, TYPE_LENGTH (valtype), readbuf);
1877 return RETURN_VALUE_REGISTER_CONVENTION;
1878 }
1879 /* A VMX vector is returned in v2. */
1880 if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY
1881 && TYPE_VECTOR (valtype)
1882 && tdep->vector_abi == POWERPC_VEC_ALTIVEC)
1883 {
1884 if (readbuf)
1885 regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, readbuf);
1886 if (writebuf)
1887 regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2,
1888 writebuf);
1889 return RETURN_VALUE_REGISTER_CONVENTION;
1890 }
1891 }
1892 /* Big floating point values get stored in adjacent floating
1893 point registers, starting with F1. */
1894 if (TYPE_CODE (valtype) == TYPE_CODE_FLT
1895 && (TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 32))
1896 {
1897 if (writebuf || readbuf != NULL)
1898 {
1899 int i;
1900 for (i = 0; i < TYPE_LENGTH (valtype) / 8; i++)
1901 {
1902 if (writebuf != NULL)
1903 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1 + i,
1904 (const bfd_byte *) writebuf + i * 8);
1905 if (readbuf != NULL)
1906 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1 + i,
1907 (bfd_byte *) readbuf + i * 8);
1908 }
1909 }
1910 return RETURN_VALUE_REGISTER_CONVENTION;
1911 }
1912 /* Complex values get returned in f1:f2, need to convert. */
1913 if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX
1914 && (TYPE_LENGTH (valtype) == 8 || TYPE_LENGTH (valtype) == 16))
1915 {
1916 if (regcache != NULL)
1917 {
1918 int i;
1919 for (i = 0; i < 2; i++)
1920 {
1921 gdb_byte regval[MAX_REGISTER_SIZE];
1922 struct type *regtype =
1923 register_type (gdbarch, tdep->ppc_fp0_regnum);
1924 if (writebuf != NULL)
1925 {
1926 convert_typed_floating ((const bfd_byte *) writebuf +
1927 i * (TYPE_LENGTH (valtype) / 2),
1928 valtype, regval, regtype);
1929 regcache_cooked_write (regcache,
1930 tdep->ppc_fp0_regnum + 1 + i,
1931 regval);
1932 }
1933 if (readbuf != NULL)
1934 {
1935 regcache_cooked_read (regcache,
1936 tdep->ppc_fp0_regnum + 1 + i,
1937 regval);
1938 convert_typed_floating (regval, regtype,
1939 (bfd_byte *) readbuf +
1940 i * (TYPE_LENGTH (valtype) / 2),
1941 valtype);
1942 }
1943 }
1944 }
1945 return RETURN_VALUE_REGISTER_CONVENTION;
1946 }
1947 /* Big complex values get stored in f1:f4. */
1948 if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX && TYPE_LENGTH (valtype) == 32)
1949 {
1950 if (regcache != NULL)
1951 {
1952 int i;
1953 for (i = 0; i < 4; i++)
1954 {
1955 if (writebuf != NULL)
1956 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1 + i,
1957 (const bfd_byte *) writebuf + i * 8);
1958 if (readbuf != NULL)
1959 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1 + i,
1960 (bfd_byte *) readbuf + i * 8);
1961 }
1962 }
1963 return RETURN_VALUE_REGISTER_CONVENTION;
1964 }
1965 return RETURN_VALUE_STRUCT_CONVENTION;
1966 }
1967
GDB Binutils - Deliverables
This page took 0.099481 seconds and 4 git commands to generate.