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* ppc-opc.c: Support optional L form mtmsr.
[deliverable/binutils-gdb.git] / gdb / ppc-sysv-tdep.c
1 /* Target-dependent code for PowerPC systems using the SVR4 ABI
2 for GDB, the GNU debugger.
3
4 Copyright (C) 2000, 2001, 2002, 2003, 2005, 2007, 2008
5 Free Software Foundation, Inc.
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21
22 #include "defs.h"
23 #include "gdbcore.h"
24 #include "inferior.h"
25 #include "regcache.h"
26 #include "value.h"
27 #include "gdb_string.h"
28 #include "gdb_assert.h"
29 #include "ppc-tdep.h"
30 #include "target.h"
31 #include "objfiles.h"
32 #include "infcall.h"
33
34 /* Pass the arguments in either registers, or in the stack. Using the
35 ppc sysv ABI, the first eight words of the argument list (that might
36 be less than eight parameters if some parameters occupy more than one
37 word) are passed in r3..r10 registers. float and double parameters are
38 passed in fpr's, in addition to that. Rest of the parameters if any
39 are passed in user stack.
40
41 If the function is returning a structure, then the return address is passed
42 in r3, then the first 7 words of the parametes can be passed in registers,
43 starting from r4. */
44
45 CORE_ADDR
46 ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
47 struct regcache *regcache, CORE_ADDR bp_addr,
48 int nargs, struct value **args, CORE_ADDR sp,
49 int struct_return, CORE_ADDR struct_addr)
50 {
51 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
52 ULONGEST saved_sp;
53 int argspace = 0; /* 0 is an initial wrong guess. */
54 int write_pass;
55
56 gdb_assert (tdep->wordsize == 4);
57
58 regcache_cooked_read_unsigned (regcache, gdbarch_sp_regnum (gdbarch),
59 &saved_sp);
60
61 /* Go through the argument list twice.
62
63 Pass 1: Figure out how much new stack space is required for
64 arguments and pushed values. Unlike the PowerOpen ABI, the SysV
65 ABI doesn't reserve any extra space for parameters which are put
66 in registers, but does always push structures and then pass their
67 address.
68
69 Pass 2: Replay the same computation but this time also write the
70 values out to the target. */
71
72 for (write_pass = 0; write_pass < 2; write_pass++)
73 {
74 int argno;
75 /* Next available floating point register for float and double
76 arguments. */
77 int freg = 1;
78 /* Next available general register for non-float, non-vector
79 arguments. */
80 int greg = 3;
81 /* Next available vector register for vector arguments. */
82 int vreg = 2;
83 /* Arguments start above the "LR save word" and "Back chain". */
84 int argoffset = 2 * tdep->wordsize;
85 /* Structures start after the arguments. */
86 int structoffset = argoffset + argspace;
87
88 /* If the function is returning a `struct', then the first word
89 (which will be passed in r3) is used for struct return
90 address. In that case we should advance one word and start
91 from r4 register to copy parameters. */
92 if (struct_return)
93 {
94 if (write_pass)
95 regcache_cooked_write_signed (regcache,
96 tdep->ppc_gp0_regnum + greg,
97 struct_addr);
98 greg++;
99 }
100
101 for (argno = 0; argno < nargs; argno++)
102 {
103 struct value *arg = args[argno];
104 struct type *type = check_typedef (value_type (arg));
105 int len = TYPE_LENGTH (type);
106 const bfd_byte *val = value_contents (arg);
107
108 if (TYPE_CODE (type) == TYPE_CODE_FLT && len <= 8
109 && !tdep->soft_float)
110 {
111 /* Floating point value converted to "double" then
112 passed in an FP register, when the registers run out,
113 8 byte aligned stack is used. */
114 if (freg <= 8)
115 {
116 if (write_pass)
117 {
118 /* Always store the floating point value using
119 the register's floating-point format. */
120 gdb_byte regval[MAX_REGISTER_SIZE];
121 struct type *regtype
122 = register_type (gdbarch, tdep->ppc_fp0_regnum + freg);
123 convert_typed_floating (val, type, regval, regtype);
124 regcache_cooked_write (regcache,
125 tdep->ppc_fp0_regnum + freg,
126 regval);
127 }
128 freg++;
129 }
130 else
131 {
132 /* SysV ABI converts floats to doubles before
133 writing them to an 8 byte aligned stack location. */
134 argoffset = align_up (argoffset, 8);
135 if (write_pass)
136 {
137 char memval[8];
138 convert_typed_floating (val, type, memval,
139 builtin_type_ieee_double);
140 write_memory (sp + argoffset, val, len);
141 }
142 argoffset += 8;
143 }
144 }
145 else if (TYPE_CODE (type) == TYPE_CODE_FLT
146 && len == 16
147 && !tdep->soft_float
148 && (gdbarch_long_double_format (gdbarch)
149 == floatformats_ibm_long_double))
150 {
151 /* IBM long double passed in two FP registers if
152 available, otherwise 8-byte aligned stack. */
153 if (freg <= 7)
154 {
155 if (write_pass)
156 {
157 regcache_cooked_write (regcache,
158 tdep->ppc_fp0_regnum + freg,
159 val);
160 regcache_cooked_write (regcache,
161 tdep->ppc_fp0_regnum + freg + 1,
162 val + 8);
163 }
164 freg += 2;
165 }
166 else
167 {
168 argoffset = align_up (argoffset, 8);
169 if (write_pass)
170 write_memory (sp + argoffset, val, len);
171 argoffset += 16;
172 }
173 }
174 else if (len == 8
175 && (TYPE_CODE (type) == TYPE_CODE_INT /* long long */
176 || TYPE_CODE (type) == TYPE_CODE_FLT)) /* double */
177 {
178 /* "long long" or soft-float "double" passed in an odd/even
179 register pair with the low addressed word in the odd
180 register and the high addressed word in the even
181 register, or when the registers run out an 8 byte
182 aligned stack location. */
183 if (greg > 9)
184 {
185 /* Just in case GREG was 10. */
186 greg = 11;
187 argoffset = align_up (argoffset, 8);
188 if (write_pass)
189 write_memory (sp + argoffset, val, len);
190 argoffset += 8;
191 }
192 else
193 {
194 /* Must start on an odd register - r3/r4 etc. */
195 if ((greg & 1) == 0)
196 greg++;
197 if (write_pass)
198 {
199 regcache_cooked_write (regcache,
200 tdep->ppc_gp0_regnum + greg + 0,
201 val + 0);
202 regcache_cooked_write (regcache,
203 tdep->ppc_gp0_regnum + greg + 1,
204 val + 4);
205 }
206 greg += 2;
207 }
208 }
209 else if (len == 16 && TYPE_CODE (type) == TYPE_CODE_FLT
210 && (gdbarch_long_double_format (gdbarch)
211 == floatformats_ibm_long_double))
212 {
213 /* Soft-float IBM long double passed in four consecutive
214 registers, or on the stack. The registers are not
215 necessarily odd/even pairs. */
216 if (greg > 7)
217 {
218 greg = 11;
219 argoffset = align_up (argoffset, 8);
220 if (write_pass)
221 write_memory (sp + argoffset, val, len);
222 argoffset += 16;
223 }
224 else
225 {
226 if (write_pass)
227 {
228 regcache_cooked_write (regcache,
229 tdep->ppc_gp0_regnum + greg + 0,
230 val + 0);
231 regcache_cooked_write (regcache,
232 tdep->ppc_gp0_regnum + greg + 1,
233 val + 4);
234 regcache_cooked_write (regcache,
235 tdep->ppc_gp0_regnum + greg + 2,
236 val + 8);
237 regcache_cooked_write (regcache,
238 tdep->ppc_gp0_regnum + greg + 3,
239 val + 12);
240 }
241 greg += 4;
242 }
243 }
244 else if (len == 16
245 && TYPE_CODE (type) == TYPE_CODE_ARRAY
246 && TYPE_VECTOR (type)
247 && tdep->vector_abi == POWERPC_VEC_ALTIVEC)
248 {
249 /* Vector parameter passed in an Altivec register, or
250 when that runs out, 16 byte aligned stack location. */
251 if (vreg <= 13)
252 {
253 if (write_pass)
254 regcache_cooked_write (regcache,
255 tdep->ppc_vr0_regnum + vreg, val);
256 vreg++;
257 }
258 else
259 {
260 argoffset = align_up (argoffset, 16);
261 if (write_pass)
262 write_memory (sp + argoffset, val, 16);
263 argoffset += 16;
264 }
265 }
266 else if (len == 8
267 && TYPE_CODE (type) == TYPE_CODE_ARRAY
268 && TYPE_VECTOR (type)
269 && tdep->vector_abi == POWERPC_VEC_SPE)
270 {
271 /* Vector parameter passed in an e500 register, or when
272 that runs out, 8 byte aligned stack location. Note
273 that since e500 vector and general purpose registers
274 both map onto the same underlying register set, a
275 "greg" and not a "vreg" is consumed here. A cooked
276 write stores the value in the correct locations
277 within the raw register cache. */
278 if (greg <= 10)
279 {
280 if (write_pass)
281 regcache_cooked_write (regcache,
282 tdep->ppc_ev0_regnum + greg, val);
283 greg++;
284 }
285 else
286 {
287 argoffset = align_up (argoffset, 8);
288 if (write_pass)
289 write_memory (sp + argoffset, val, 8);
290 argoffset += 8;
291 }
292 }
293 else
294 {
295 /* Reduce the parameter down to something that fits in a
296 "word". */
297 gdb_byte word[MAX_REGISTER_SIZE];
298 memset (word, 0, MAX_REGISTER_SIZE);
299 if (len > tdep->wordsize
300 || TYPE_CODE (type) == TYPE_CODE_STRUCT
301 || TYPE_CODE (type) == TYPE_CODE_UNION)
302 {
303 /* Structs and large values are put in an
304 aligned stack slot ... */
305 if (TYPE_CODE (type) == TYPE_CODE_ARRAY
306 && TYPE_VECTOR (type)
307 && len >= 16)
308 structoffset = align_up (structoffset, 16);
309 else
310 structoffset = align_up (structoffset, 8);
311
312 if (write_pass)
313 write_memory (sp + structoffset, val, len);
314 /* ... and then a "word" pointing to that address is
315 passed as the parameter. */
316 store_unsigned_integer (word, tdep->wordsize,
317 sp + structoffset);
318 structoffset += len;
319 }
320 else if (TYPE_CODE (type) == TYPE_CODE_INT)
321 /* Sign or zero extend the "int" into a "word". */
322 store_unsigned_integer (word, tdep->wordsize,
323 unpack_long (type, val));
324 else
325 /* Always goes in the low address. */
326 memcpy (word, val, len);
327 /* Store that "word" in a register, or on the stack.
328 The words have "4" byte alignment. */
329 if (greg <= 10)
330 {
331 if (write_pass)
332 regcache_cooked_write (regcache,
333 tdep->ppc_gp0_regnum + greg, word);
334 greg++;
335 }
336 else
337 {
338 argoffset = align_up (argoffset, tdep->wordsize);
339 if (write_pass)
340 write_memory (sp + argoffset, word, tdep->wordsize);
341 argoffset += tdep->wordsize;
342 }
343 }
344 }
345
346 /* Compute the actual stack space requirements. */
347 if (!write_pass)
348 {
349 /* Remember the amount of space needed by the arguments. */
350 argspace = argoffset;
351 /* Allocate space for both the arguments and the structures. */
352 sp -= (argoffset + structoffset);
353 /* Ensure that the stack is still 16 byte aligned. */
354 sp = align_down (sp, 16);
355 }
356
357 /* The psABI says that "A caller of a function that takes a
358 variable argument list shall set condition register bit 6 to
359 1 if it passes one or more arguments in the floating-point
360 registers. It is strongly recommended that the caller set the
361 bit to 0 otherwise..." Doing this for normal functions too
362 shouldn't hurt. */
363 if (write_pass)
364 {
365 ULONGEST cr;
366
367 regcache_cooked_read_unsigned (regcache, tdep->ppc_cr_regnum, &cr);
368 if (freg > 1)
369 cr |= 0x02000000;
370 else
371 cr &= ~0x02000000;
372 regcache_cooked_write_unsigned (regcache, tdep->ppc_cr_regnum, cr);
373 }
374 }
375
376 /* Update %sp. */
377 regcache_cooked_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp);
378
379 /* Write the backchain (it occupies WORDSIZED bytes). */
380 write_memory_signed_integer (sp, tdep->wordsize, saved_sp);
381
382 /* Point the inferior function call's return address at the dummy's
383 breakpoint. */
384 regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
385
386 return sp;
387 }
388
389 /* Handle the return-value conventions specified by the SysV 32-bit
390 PowerPC ABI (including all the supplements):
391
392 no floating-point: floating-point values returned using 32-bit
393 general-purpose registers.
394
395 Altivec: 128-bit vectors returned using vector registers.
396
397 e500: 64-bit vectors returned using the full full 64 bit EV
398 register, floating-point values returned using 32-bit
399 general-purpose registers.
400
401 GCC (broken): Small struct values right (instead of left) aligned
402 when returned in general-purpose registers. */
403
404 static enum return_value_convention
405 do_ppc_sysv_return_value (struct gdbarch *gdbarch, struct type *type,
406 struct regcache *regcache, gdb_byte *readbuf,
407 const gdb_byte *writebuf, int broken_gcc)
408 {
409 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
410 gdb_assert (tdep->wordsize == 4);
411 if (TYPE_CODE (type) == TYPE_CODE_FLT
412 && TYPE_LENGTH (type) <= 8
413 && !tdep->soft_float)
414 {
415 if (readbuf)
416 {
417 /* Floats and doubles stored in "f1". Convert the value to
418 the required type. */
419 gdb_byte regval[MAX_REGISTER_SIZE];
420 struct type *regtype = register_type (gdbarch,
421 tdep->ppc_fp0_regnum + 1);
422 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, regval);
423 convert_typed_floating (regval, regtype, readbuf, type);
424 }
425 if (writebuf)
426 {
427 /* Floats and doubles stored in "f1". Convert the value to
428 the register's "double" type. */
429 gdb_byte regval[MAX_REGISTER_SIZE];
430 struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum);
431 convert_typed_floating (writebuf, type, regval, regtype);
432 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval);
433 }
434 return RETURN_VALUE_REGISTER_CONVENTION;
435 }
436 if (TYPE_CODE (type) == TYPE_CODE_FLT
437 && TYPE_LENGTH (type) == 16
438 && !tdep->soft_float
439 && (gdbarch_long_double_format (gdbarch) == floatformats_ibm_long_double))
440 {
441 /* IBM long double stored in f1 and f2. */
442 if (readbuf)
443 {
444 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, readbuf);
445 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 2,
446 readbuf + 8);
447 }
448 if (writebuf)
449 {
450 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, writebuf);
451 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 2,
452 writebuf + 8);
453 }
454 return RETURN_VALUE_REGISTER_CONVENTION;
455 }
456 if (TYPE_CODE (type) == TYPE_CODE_FLT
457 && TYPE_LENGTH (type) == 16
458 && (gdbarch_long_double_format (gdbarch) == floatformats_ibm_long_double))
459 {
460 /* Soft-float IBM long double stored in r3, r4, r5, r6. */
461 if (readbuf)
462 {
463 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, readbuf);
464 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
465 readbuf + 4);
466 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 5,
467 readbuf + 8);
468 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 6,
469 readbuf + 12);
470 }
471 if (writebuf)
472 {
473 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, writebuf);
474 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
475 writebuf + 4);
476 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 5,
477 writebuf + 8);
478 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 6,
479 writebuf + 12);
480 }
481 return RETURN_VALUE_REGISTER_CONVENTION;
482 }
483 if ((TYPE_CODE (type) == TYPE_CODE_INT && TYPE_LENGTH (type) == 8)
484 || (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) == 8))
485 {
486 if (readbuf)
487 {
488 /* A long long, or a double stored in the 32 bit r3/r4. */
489 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
490 readbuf + 0);
491 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
492 readbuf + 4);
493 }
494 if (writebuf)
495 {
496 /* A long long, or a double stored in the 32 bit r3/r4. */
497 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
498 writebuf + 0);
499 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
500 writebuf + 4);
501 }
502 return RETURN_VALUE_REGISTER_CONVENTION;
503 }
504 else if ((TYPE_CODE (type) == TYPE_CODE_INT
505 || TYPE_CODE (type) == TYPE_CODE_CHAR
506 || TYPE_CODE (type) == TYPE_CODE_BOOL
507 || TYPE_CODE (type) == TYPE_CODE_PTR
508 || TYPE_CODE (type) == TYPE_CODE_REF
509 || TYPE_CODE (type) == TYPE_CODE_ENUM)
510 && TYPE_LENGTH (type) <= tdep->wordsize)
511 {
512 if (readbuf)
513 {
514 /* Some sort of integer stored in r3. Since TYPE isn't
515 bigger than the register, sign extension isn't a problem
516 - just do everything unsigned. */
517 ULONGEST regval;
518 regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
519 &regval);
520 store_unsigned_integer (readbuf, TYPE_LENGTH (type), regval);
521 }
522 if (writebuf)
523 {
524 /* Some sort of integer stored in r3. Use unpack_long since
525 that should handle any required sign extension. */
526 regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
527 unpack_long (type, writebuf));
528 }
529 return RETURN_VALUE_REGISTER_CONVENTION;
530 }
531 if (TYPE_LENGTH (type) == 16
532 && TYPE_CODE (type) == TYPE_CODE_ARRAY
533 && TYPE_VECTOR (type)
534 && tdep->vector_abi == POWERPC_VEC_ALTIVEC)
535 {
536 if (readbuf)
537 {
538 /* Altivec places the return value in "v2". */
539 regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, readbuf);
540 }
541 if (writebuf)
542 {
543 /* Altivec places the return value in "v2". */
544 regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2, writebuf);
545 }
546 return RETURN_VALUE_REGISTER_CONVENTION;
547 }
548 if (TYPE_LENGTH (type) == 16
549 && TYPE_CODE (type) == TYPE_CODE_ARRAY
550 && TYPE_VECTOR (type)
551 && tdep->vector_abi == POWERPC_VEC_GENERIC)
552 {
553 /* GCC -maltivec -mabi=no-altivec returns vectors in r3/r4/r5/r6.
554 GCC without AltiVec returns them in memory, but it warns about
555 ABI risks in that case; we don't try to support it. */
556 if (readbuf)
557 {
558 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
559 readbuf + 0);
560 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
561 readbuf + 4);
562 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 5,
563 readbuf + 8);
564 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 6,
565 readbuf + 12);
566 }
567 if (writebuf)
568 {
569 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
570 writebuf + 0);
571 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
572 writebuf + 4);
573 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 5,
574 writebuf + 8);
575 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 6,
576 writebuf + 12);
577 }
578 return RETURN_VALUE_REGISTER_CONVENTION;
579 }
580 if (TYPE_LENGTH (type) == 8
581 && TYPE_CODE (type) == TYPE_CODE_ARRAY
582 && TYPE_VECTOR (type)
583 && tdep->vector_abi == POWERPC_VEC_SPE)
584 {
585 /* The e500 ABI places return values for the 64-bit DSP types
586 (__ev64_opaque__) in r3. However, in GDB-speak, ev3
587 corresponds to the entire r3 value for e500, whereas GDB's r3
588 only corresponds to the least significant 32-bits. So place
589 the 64-bit DSP type's value in ev3. */
590 if (readbuf)
591 regcache_cooked_read (regcache, tdep->ppc_ev0_regnum + 3, readbuf);
592 if (writebuf)
593 regcache_cooked_write (regcache, tdep->ppc_ev0_regnum + 3, writebuf);
594 return RETURN_VALUE_REGISTER_CONVENTION;
595 }
596 if (broken_gcc && TYPE_LENGTH (type) <= 8)
597 {
598 /* GCC screwed up for structures or unions whose size is less
599 than or equal to 8 bytes.. Instead of left-aligning, it
600 right-aligns the data into the buffer formed by r3, r4. */
601 gdb_byte regvals[MAX_REGISTER_SIZE * 2];
602 int len = TYPE_LENGTH (type);
603 int offset = (2 * tdep->wordsize - len) % tdep->wordsize;
604
605 if (readbuf)
606 {
607 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
608 regvals + 0 * tdep->wordsize);
609 if (len > tdep->wordsize)
610 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
611 regvals + 1 * tdep->wordsize);
612 memcpy (readbuf, regvals + offset, len);
613 }
614 if (writebuf)
615 {
616 memset (regvals, 0, sizeof regvals);
617 memcpy (regvals + offset, writebuf, len);
618 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
619 regvals + 0 * tdep->wordsize);
620 if (len > tdep->wordsize)
621 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
622 regvals + 1 * tdep->wordsize);
623 }
624
625 return RETURN_VALUE_REGISTER_CONVENTION;
626 }
627 if (TYPE_LENGTH (type) <= 8)
628 {
629 if (readbuf)
630 {
631 /* This matches SVr4 PPC, it does not match GCC. */
632 /* The value is right-padded to 8 bytes and then loaded, as
633 two "words", into r3/r4. */
634 gdb_byte regvals[MAX_REGISTER_SIZE * 2];
635 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
636 regvals + 0 * tdep->wordsize);
637 if (TYPE_LENGTH (type) > tdep->wordsize)
638 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
639 regvals + 1 * tdep->wordsize);
640 memcpy (readbuf, regvals, TYPE_LENGTH (type));
641 }
642 if (writebuf)
643 {
644 /* This matches SVr4 PPC, it does not match GCC. */
645 /* The value is padded out to 8 bytes and then loaded, as
646 two "words" into r3/r4. */
647 gdb_byte regvals[MAX_REGISTER_SIZE * 2];
648 memset (regvals, 0, sizeof regvals);
649 memcpy (regvals, writebuf, TYPE_LENGTH (type));
650 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
651 regvals + 0 * tdep->wordsize);
652 if (TYPE_LENGTH (type) > tdep->wordsize)
653 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
654 regvals + 1 * tdep->wordsize);
655 }
656 return RETURN_VALUE_REGISTER_CONVENTION;
657 }
658 return RETURN_VALUE_STRUCT_CONVENTION;
659 }
660
661 enum return_value_convention
662 ppc_sysv_abi_return_value (struct gdbarch *gdbarch, struct type *valtype,
663 struct regcache *regcache, gdb_byte *readbuf,
664 const gdb_byte *writebuf)
665 {
666 return do_ppc_sysv_return_value (gdbarch, valtype, regcache, readbuf,
667 writebuf, 0);
668 }
669
670 enum return_value_convention
671 ppc_sysv_abi_broken_return_value (struct gdbarch *gdbarch,
672 struct type *valtype,
673 struct regcache *regcache,
674 gdb_byte *readbuf, const gdb_byte *writebuf)
675 {
676 return do_ppc_sysv_return_value (gdbarch, valtype, regcache, readbuf,
677 writebuf, 1);
678 }
679
680 /* The helper function for 64-bit SYSV push_dummy_call. Converts the
681 function's code address back into the function's descriptor
682 address.
683
684 Find a value for the TOC register. Every symbol should have both
685 ".FN" and "FN" in the minimal symbol table. "FN" points at the
686 FN's descriptor, while ".FN" points at the entry point (which
687 matches FUNC_ADDR). Need to reverse from FUNC_ADDR back to the
688 FN's descriptor address (while at the same time being careful to
689 find "FN" in the same object file as ".FN"). */
690
691 static int
692 convert_code_addr_to_desc_addr (CORE_ADDR code_addr, CORE_ADDR *desc_addr)
693 {
694 struct obj_section *dot_fn_section;
695 struct minimal_symbol *dot_fn;
696 struct minimal_symbol *fn;
697 CORE_ADDR toc;
698 /* Find the minimal symbol that corresponds to CODE_ADDR (should
699 have a name of the form ".FN"). */
700 dot_fn = lookup_minimal_symbol_by_pc (code_addr);
701 if (dot_fn == NULL || SYMBOL_LINKAGE_NAME (dot_fn)[0] != '.')
702 return 0;
703 /* Get the section that contains CODE_ADDR. Need this for the
704 "objfile" that it contains. */
705 dot_fn_section = find_pc_section (code_addr);
706 if (dot_fn_section == NULL || dot_fn_section->objfile == NULL)
707 return 0;
708 /* Now find the corresponding "FN" (dropping ".") minimal symbol's
709 address. Only look for the minimal symbol in ".FN"'s object file
710 - avoids problems when two object files (i.e., shared libraries)
711 contain a minimal symbol with the same name. */
712 fn = lookup_minimal_symbol (SYMBOL_LINKAGE_NAME (dot_fn) + 1, NULL,
713 dot_fn_section->objfile);
714 if (fn == NULL)
715 return 0;
716 /* Found a descriptor. */
717 (*desc_addr) = SYMBOL_VALUE_ADDRESS (fn);
718 return 1;
719 }
720
721 /* Pass the arguments in either registers, or in the stack. Using the
722 ppc 64 bit SysV ABI.
723
724 This implements a dumbed down version of the ABI. It always writes
725 values to memory, GPR and FPR, even when not necessary. Doing this
726 greatly simplifies the logic. */
727
728 CORE_ADDR
729 ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
730 struct regcache *regcache, CORE_ADDR bp_addr,
731 int nargs, struct value **args, CORE_ADDR sp,
732 int struct_return, CORE_ADDR struct_addr)
733 {
734 CORE_ADDR func_addr = find_function_addr (function, NULL);
735 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
736 ULONGEST back_chain;
737 /* See for-loop comment below. */
738 int write_pass;
739 /* Size of the Altivec's vector parameter region, the final value is
740 computed in the for-loop below. */
741 LONGEST vparam_size = 0;
742 /* Size of the general parameter region, the final value is computed
743 in the for-loop below. */
744 LONGEST gparam_size = 0;
745 /* Kevin writes ... I don't mind seeing tdep->wordsize used in the
746 calls to align_up(), align_down(), etc. because this makes it
747 easier to reuse this code (in a copy/paste sense) in the future,
748 but it is a 64-bit ABI and asserting that the wordsize is 8 bytes
749 at some point makes it easier to verify that this function is
750 correct without having to do a non-local analysis to figure out
751 the possible values of tdep->wordsize. */
752 gdb_assert (tdep->wordsize == 8);
753
754 /* This function exists to support a calling convention that
755 requires floating-point registers. It shouldn't be used on
756 processors that lack them. */
757 gdb_assert (ppc_floating_point_unit_p (gdbarch));
758
759 /* By this stage in the proceedings, SP has been decremented by "red
760 zone size" + "struct return size". Fetch the stack-pointer from
761 before this and use that as the BACK_CHAIN. */
762 regcache_cooked_read_unsigned (regcache, gdbarch_sp_regnum (gdbarch),
763 &back_chain);
764
765 /* Go through the argument list twice.
766
767 Pass 1: Compute the function call's stack space and register
768 requirements.
769
770 Pass 2: Replay the same computation but this time also write the
771 values out to the target. */
772
773 for (write_pass = 0; write_pass < 2; write_pass++)
774 {
775 int argno;
776 /* Next available floating point register for float and double
777 arguments. */
778 int freg = 1;
779 /* Next available general register for non-vector (but possibly
780 float) arguments. */
781 int greg = 3;
782 /* Next available vector register for vector arguments. */
783 int vreg = 2;
784 /* The address, at which the next general purpose parameter
785 (integer, struct, float, ...) should be saved. */
786 CORE_ADDR gparam;
787 /* Address, at which the next Altivec vector parameter should be
788 saved. */
789 CORE_ADDR vparam;
790
791 if (!write_pass)
792 {
793 /* During the first pass, GPARAM and VPARAM are more like
794 offsets (start address zero) than addresses. That way
795 the accumulate the total stack space each region
796 requires. */
797 gparam = 0;
798 vparam = 0;
799 }
800 else
801 {
802 /* Decrement the stack pointer making space for the Altivec
803 and general on-stack parameters. Set vparam and gparam
804 to their corresponding regions. */
805 vparam = align_down (sp - vparam_size, 16);
806 gparam = align_down (vparam - gparam_size, 16);
807 /* Add in space for the TOC, link editor double word,
808 compiler double word, LR save area, CR save area. */
809 sp = align_down (gparam - 48, 16);
810 }
811
812 /* If the function is returning a `struct', then there is an
813 extra hidden parameter (which will be passed in r3)
814 containing the address of that struct.. In that case we
815 should advance one word and start from r4 register to copy
816 parameters. This also consumes one on-stack parameter slot. */
817 if (struct_return)
818 {
819 if (write_pass)
820 regcache_cooked_write_signed (regcache,
821 tdep->ppc_gp0_regnum + greg,
822 struct_addr);
823 greg++;
824 gparam = align_up (gparam + tdep->wordsize, tdep->wordsize);
825 }
826
827 for (argno = 0; argno < nargs; argno++)
828 {
829 struct value *arg = args[argno];
830 struct type *type = check_typedef (value_type (arg));
831 const bfd_byte *val = value_contents (arg);
832 if (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) <= 8)
833 {
834 /* Floats and Doubles go in f1 .. f13. They also
835 consume a left aligned GREG,, and can end up in
836 memory. */
837 if (write_pass)
838 {
839 if (freg <= 13)
840 {
841 gdb_byte regval[MAX_REGISTER_SIZE];
842 struct type *regtype
843 = register_type (gdbarch, tdep->ppc_fp0_regnum);
844 convert_typed_floating (val, type, regval, regtype);
845 regcache_cooked_write (regcache,
846 tdep->ppc_fp0_regnum + freg,
847 regval);
848 }
849 if (greg <= 10)
850 {
851 /* The ABI states "Single precision floating
852 point values are mapped to the first word in
853 a single doubleword" and "... floating point
854 values mapped to the first eight doublewords
855 of the parameter save area are also passed in
856 general registers").
857
858 This code interprets that to mean: store it,
859 left aligned, in the general register. */
860 gdb_byte regval[MAX_REGISTER_SIZE];
861 memset (regval, 0, sizeof regval);
862 memcpy (regval, val, TYPE_LENGTH (type));
863 regcache_cooked_write (regcache,
864 tdep->ppc_gp0_regnum + greg,
865 regval);
866 }
867 write_memory (gparam, val, TYPE_LENGTH (type));
868 }
869 /* Always consume parameter stack space. */
870 freg++;
871 greg++;
872 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
873 }
874 else if (TYPE_CODE (type) == TYPE_CODE_FLT
875 && TYPE_LENGTH (type) == 16
876 && (gdbarch_long_double_format (gdbarch)
877 == floatformats_ibm_long_double))
878 {
879 /* IBM long double stored in two doublewords of the
880 parameter save area and corresponding registers. */
881 if (write_pass)
882 {
883 if (!tdep->soft_float && freg <= 13)
884 {
885 regcache_cooked_write (regcache,
886 tdep->ppc_fp0_regnum + freg,
887 val);
888 if (freg <= 12)
889 regcache_cooked_write (regcache,
890 tdep->ppc_fp0_regnum + freg + 1,
891 val + 8);
892 }
893 if (greg <= 10)
894 {
895 regcache_cooked_write (regcache,
896 tdep->ppc_gp0_regnum + greg,
897 val);
898 if (greg <= 9)
899 regcache_cooked_write (regcache,
900 tdep->ppc_gp0_regnum + greg + 1,
901 val + 8);
902 }
903 write_memory (gparam, val, TYPE_LENGTH (type));
904 }
905 freg += 2;
906 greg += 2;
907 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
908 }
909 else if (TYPE_LENGTH (type) == 16 && TYPE_VECTOR (type)
910 && TYPE_CODE (type) == TYPE_CODE_ARRAY
911 && tdep->ppc_vr0_regnum >= 0)
912 {
913 /* In the Altivec ABI, vectors go in the vector
914 registers v2 .. v13, or when that runs out, a vector
915 annex which goes above all the normal parameters.
916 NOTE: cagney/2003-09-21: This is a guess based on the
917 PowerOpen Altivec ABI. */
918 if (vreg <= 13)
919 {
920 if (write_pass)
921 regcache_cooked_write (regcache,
922 tdep->ppc_vr0_regnum + vreg, val);
923 vreg++;
924 }
925 else
926 {
927 if (write_pass)
928 write_memory (vparam, val, TYPE_LENGTH (type));
929 vparam = align_up (vparam + TYPE_LENGTH (type), 16);
930 }
931 }
932 else if ((TYPE_CODE (type) == TYPE_CODE_INT
933 || TYPE_CODE (type) == TYPE_CODE_ENUM
934 || TYPE_CODE (type) == TYPE_CODE_PTR)
935 && TYPE_LENGTH (type) <= 8)
936 {
937 /* Scalars and Pointers get sign[un]extended and go in
938 gpr3 .. gpr10. They can also end up in memory. */
939 if (write_pass)
940 {
941 /* Sign extend the value, then store it unsigned. */
942 ULONGEST word = unpack_long (type, val);
943 /* Convert any function code addresses into
944 descriptors. */
945 if (TYPE_CODE (type) == TYPE_CODE_PTR
946 && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
947 {
948 CORE_ADDR desc = word;
949 convert_code_addr_to_desc_addr (word, &desc);
950 word = desc;
951 }
952 if (greg <= 10)
953 regcache_cooked_write_unsigned (regcache,
954 tdep->ppc_gp0_regnum +
955 greg, word);
956 write_memory_unsigned_integer (gparam, tdep->wordsize,
957 word);
958 }
959 greg++;
960 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
961 }
962 else
963 {
964 int byte;
965 for (byte = 0; byte < TYPE_LENGTH (type);
966 byte += tdep->wordsize)
967 {
968 if (write_pass && greg <= 10)
969 {
970 gdb_byte regval[MAX_REGISTER_SIZE];
971 int len = TYPE_LENGTH (type) - byte;
972 if (len > tdep->wordsize)
973 len = tdep->wordsize;
974 memset (regval, 0, sizeof regval);
975 /* The ABI (version 1.9) specifies that values
976 smaller than one doubleword are right-aligned
977 and those larger are left-aligned. GCC
978 versions before 3.4 implemented this
979 incorrectly; see
980 <http://gcc.gnu.org/gcc-3.4/powerpc-abi.html>. */
981 if (byte == 0)
982 memcpy (regval + tdep->wordsize - len,
983 val + byte, len);
984 else
985 memcpy (regval, val + byte, len);
986 regcache_cooked_write (regcache, greg, regval);
987 }
988 greg++;
989 }
990 if (write_pass)
991 /* WARNING: cagney/2003-09-21: Strictly speaking, this
992 isn't necessary, unfortunately, GCC appears to get
993 "struct convention" parameter passing wrong putting
994 odd sized structures in memory instead of in a
995 register. Work around this by always writing the
996 value to memory. Fortunately, doing this
997 simplifies the code. */
998 write_memory (gparam, val, TYPE_LENGTH (type));
999 if (freg <= 13
1000 && TYPE_CODE (type) == TYPE_CODE_STRUCT
1001 && TYPE_NFIELDS (type) == 1
1002 && TYPE_LENGTH (type) <= 16)
1003 {
1004 /* The ABI (version 1.9) specifies that structs
1005 containing a single floating-point value, at any
1006 level of nesting of single-member structs, are
1007 passed in floating-point registers. */
1008 while (TYPE_CODE (type) == TYPE_CODE_STRUCT
1009 && TYPE_NFIELDS (type) == 1)
1010 type = check_typedef (TYPE_FIELD_TYPE (type, 0));
1011 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1012 {
1013 if (TYPE_LENGTH (type) <= 8)
1014 {
1015 if (write_pass)
1016 {
1017 gdb_byte regval[MAX_REGISTER_SIZE];
1018 struct type *regtype
1019 = register_type (gdbarch,
1020 tdep->ppc_fp0_regnum);
1021 convert_typed_floating (val, type, regval,
1022 regtype);
1023 regcache_cooked_write (regcache,
1024 (tdep->ppc_fp0_regnum
1025 + freg),
1026 regval);
1027 }
1028 freg++;
1029 }
1030 else if (TYPE_LENGTH (type) == 16
1031 && (gdbarch_long_double_format (gdbarch)
1032 == floatformats_ibm_long_double))
1033 {
1034 if (write_pass)
1035 {
1036 regcache_cooked_write (regcache,
1037 (tdep->ppc_fp0_regnum
1038 + freg),
1039 val);
1040 if (freg <= 12)
1041 regcache_cooked_write (regcache,
1042 (tdep->ppc_fp0_regnum
1043 + freg + 1),
1044 val + 8);
1045 }
1046 freg += 2;
1047 }
1048 }
1049 }
1050 /* Always consume parameter stack space. */
1051 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
1052 }
1053 }
1054
1055 if (!write_pass)
1056 {
1057 /* Save the true region sizes ready for the second pass. */
1058 vparam_size = vparam;
1059 /* Make certain that the general parameter save area is at
1060 least the minimum 8 registers (or doublewords) in size. */
1061 if (greg < 8)
1062 gparam_size = 8 * tdep->wordsize;
1063 else
1064 gparam_size = gparam;
1065 }
1066 }
1067
1068 /* Update %sp. */
1069 regcache_cooked_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp);
1070
1071 /* Write the backchain (it occupies WORDSIZED bytes). */
1072 write_memory_signed_integer (sp, tdep->wordsize, back_chain);
1073
1074 /* Point the inferior function call's return address at the dummy's
1075 breakpoint. */
1076 regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
1077
1078 /* Use the func_addr to find the descriptor, and use that to find
1079 the TOC. */
1080 {
1081 CORE_ADDR desc_addr;
1082 if (convert_code_addr_to_desc_addr (func_addr, &desc_addr))
1083 {
1084 /* The TOC is the second double word in the descriptor. */
1085 CORE_ADDR toc =
1086 read_memory_unsigned_integer (desc_addr + tdep->wordsize,
1087 tdep->wordsize);
1088 regcache_cooked_write_unsigned (regcache,
1089 tdep->ppc_gp0_regnum + 2, toc);
1090 }
1091 }
1092
1093 return sp;
1094 }
1095
1096
1097 /* The 64 bit ABI return value convention.
1098
1099 Return non-zero if the return-value is stored in a register, return
1100 0 if the return-value is instead stored on the stack (a.k.a.,
1101 struct return convention).
1102
1103 For a return-value stored in a register: when WRITEBUF is non-NULL,
1104 copy the buffer to the corresponding register return-value location
1105 location; when READBUF is non-NULL, fill the buffer from the
1106 corresponding register return-value location. */
1107 enum return_value_convention
1108 ppc64_sysv_abi_return_value (struct gdbarch *gdbarch, struct type *valtype,
1109 struct regcache *regcache, gdb_byte *readbuf,
1110 const gdb_byte *writebuf)
1111 {
1112 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1113
1114 /* This function exists to support a calling convention that
1115 requires floating-point registers. It shouldn't be used on
1116 processors that lack them. */
1117 gdb_assert (ppc_floating_point_unit_p (gdbarch));
1118
1119 /* Floats and doubles in F1. */
1120 if (TYPE_CODE (valtype) == TYPE_CODE_FLT && TYPE_LENGTH (valtype) <= 8)
1121 {
1122 gdb_byte regval[MAX_REGISTER_SIZE];
1123 struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum);
1124 if (writebuf != NULL)
1125 {
1126 convert_typed_floating (writebuf, valtype, regval, regtype);
1127 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval);
1128 }
1129 if (readbuf != NULL)
1130 {
1131 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, regval);
1132 convert_typed_floating (regval, regtype, readbuf, valtype);
1133 }
1134 return RETURN_VALUE_REGISTER_CONVENTION;
1135 }
1136 /* Integers in r3. */
1137 if ((TYPE_CODE (valtype) == TYPE_CODE_INT
1138 || TYPE_CODE (valtype) == TYPE_CODE_ENUM)
1139 && TYPE_LENGTH (valtype) <= 8)
1140 {
1141 if (writebuf != NULL)
1142 {
1143 /* Be careful to sign extend the value. */
1144 regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
1145 unpack_long (valtype, writebuf));
1146 }
1147 if (readbuf != NULL)
1148 {
1149 /* Extract the integer from r3. Since this is truncating the
1150 value, there isn't a sign extension problem. */
1151 ULONGEST regval;
1152 regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
1153 &regval);
1154 store_unsigned_integer (readbuf, TYPE_LENGTH (valtype), regval);
1155 }
1156 return RETURN_VALUE_REGISTER_CONVENTION;
1157 }
1158 /* All pointers live in r3. */
1159 if (TYPE_CODE (valtype) == TYPE_CODE_PTR)
1160 {
1161 /* All pointers live in r3. */
1162 if (writebuf != NULL)
1163 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, writebuf);
1164 if (readbuf != NULL)
1165 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, readbuf);
1166 return RETURN_VALUE_REGISTER_CONVENTION;
1167 }
1168 /* Array type has more than one use. */
1169 if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY)
1170 {
1171 /* Small character arrays are returned, right justified, in r3. */
1172 if (TYPE_LENGTH (valtype) <= 8
1173 && TYPE_CODE (TYPE_TARGET_TYPE (valtype)) == TYPE_CODE_INT
1174 && TYPE_LENGTH (TYPE_TARGET_TYPE (valtype)) == 1)
1175 {
1176 int offset = (register_size (gdbarch, tdep->ppc_gp0_regnum + 3)
1177 - TYPE_LENGTH (valtype));
1178 if (writebuf != NULL)
1179 regcache_cooked_write_part (regcache, tdep->ppc_gp0_regnum + 3,
1180 offset, TYPE_LENGTH (valtype), writebuf);
1181 if (readbuf != NULL)
1182 regcache_cooked_read_part (regcache, tdep->ppc_gp0_regnum + 3,
1183 offset, TYPE_LENGTH (valtype), readbuf);
1184 return RETURN_VALUE_REGISTER_CONVENTION;
1185 }
1186 /* A VMX vector is returned in v2. */
1187 if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY
1188 && TYPE_VECTOR (valtype) && tdep->ppc_vr0_regnum >= 0)
1189 {
1190 if (readbuf)
1191 regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, readbuf);
1192 if (writebuf)
1193 regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2, writebuf);
1194 return RETURN_VALUE_REGISTER_CONVENTION;
1195 }
1196 }
1197 /* Big floating point values get stored in adjacent floating
1198 point registers, starting with F1. */
1199 if (TYPE_CODE (valtype) == TYPE_CODE_FLT
1200 && (TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 32))
1201 {
1202 if (writebuf || readbuf != NULL)
1203 {
1204 int i;
1205 for (i = 0; i < TYPE_LENGTH (valtype) / 8; i++)
1206 {
1207 if (writebuf != NULL)
1208 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1 + i,
1209 (const bfd_byte *) writebuf + i * 8);
1210 if (readbuf != NULL)
1211 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1 + i,
1212 (bfd_byte *) readbuf + i * 8);
1213 }
1214 }
1215 return RETURN_VALUE_REGISTER_CONVENTION;
1216 }
1217 /* Complex values get returned in f1:f2, need to convert. */
1218 if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX
1219 && (TYPE_LENGTH (valtype) == 8 || TYPE_LENGTH (valtype) == 16))
1220 {
1221 if (regcache != NULL)
1222 {
1223 int i;
1224 for (i = 0; i < 2; i++)
1225 {
1226 gdb_byte regval[MAX_REGISTER_SIZE];
1227 struct type *regtype =
1228 register_type (gdbarch, tdep->ppc_fp0_regnum);
1229 if (writebuf != NULL)
1230 {
1231 convert_typed_floating ((const bfd_byte *) writebuf +
1232 i * (TYPE_LENGTH (valtype) / 2),
1233 valtype, regval, regtype);
1234 regcache_cooked_write (regcache,
1235 tdep->ppc_fp0_regnum + 1 + i,
1236 regval);
1237 }
1238 if (readbuf != NULL)
1239 {
1240 regcache_cooked_read (regcache,
1241 tdep->ppc_fp0_regnum + 1 + i,
1242 regval);
1243 convert_typed_floating (regval, regtype,
1244 (bfd_byte *) readbuf +
1245 i * (TYPE_LENGTH (valtype) / 2),
1246 valtype);
1247 }
1248 }
1249 }
1250 return RETURN_VALUE_REGISTER_CONVENTION;
1251 }
1252 /* Big complex values get stored in f1:f4. */
1253 if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX && TYPE_LENGTH (valtype) == 32)
1254 {
1255 if (regcache != NULL)
1256 {
1257 int i;
1258 for (i = 0; i < 4; i++)
1259 {
1260 if (writebuf != NULL)
1261 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1 + i,
1262 (const bfd_byte *) writebuf + i * 8);
1263 if (readbuf != NULL)
1264 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1 + i,
1265 (bfd_byte *) readbuf + i * 8);
1266 }
1267 }
1268 return RETURN_VALUE_REGISTER_CONVENTION;
1269 }
1270 return RETURN_VALUE_STRUCT_CONVENTION;
1271 }
1272
1273 CORE_ADDR
1274 ppc64_sysv_abi_adjust_breakpoint_address (struct gdbarch *gdbarch,
1275 CORE_ADDR bpaddr)
1276 {
1277 /* PPC64 SYSV specifies that the minimal-symbol "FN" should point at
1278 a function-descriptor while the corresponding minimal-symbol
1279 ".FN" should point at the entry point. Consequently, a command
1280 like "break FN" applied to an object file with only minimal
1281 symbols, will insert the breakpoint into the descriptor at "FN"
1282 and not the function at ".FN". Avoid this confusion by adjusting
1283 any attempt to set a descriptor breakpoint into a corresponding
1284 function breakpoint. Note that GDB warns the user when this
1285 adjustment is applied - that's ok as otherwise the user will have
1286 no way of knowing why their breakpoint at "FN" resulted in the
1287 program stopping at ".FN". */
1288 return gdbarch_convert_from_func_ptr_addr (gdbarch, bpaddr, &current_target);
1289 }
GDB Binutils - Deliverables
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