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[deliverable/binutils-gdb.git] / gdb / ppc-sysv-tdep.c
1 /* Target-dependent code for PowerPC systems using the SVR4 ABI
2 for GDB, the GNU debugger.
3
4 Copyright (C) 2000, 2001, 2002, 2003, 2005, 2007, 2008
5 Free Software Foundation, Inc.
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21
22 #include "defs.h"
23 #include "gdbcore.h"
24 #include "inferior.h"
25 #include "regcache.h"
26 #include "value.h"
27 #include "gdb_string.h"
28 #include "gdb_assert.h"
29 #include "ppc-tdep.h"
30 #include "target.h"
31 #include "objfiles.h"
32 #include "infcall.h"
33
34 /* Pass the arguments in either registers, or in the stack. Using the
35 ppc sysv ABI, the first eight words of the argument list (that might
36 be less than eight parameters if some parameters occupy more than one
37 word) are passed in r3..r10 registers. float and double parameters are
38 passed in fpr's, in addition to that. Rest of the parameters if any
39 are passed in user stack.
40
41 If the function is returning a structure, then the return address is passed
42 in r3, then the first 7 words of the parametes can be passed in registers,
43 starting from r4. */
44
45 CORE_ADDR
46 ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
47 struct regcache *regcache, CORE_ADDR bp_addr,
48 int nargs, struct value **args, CORE_ADDR sp,
49 int struct_return, CORE_ADDR struct_addr)
50 {
51 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
52 ULONGEST saved_sp;
53 int argspace = 0; /* 0 is an initial wrong guess. */
54 int write_pass;
55
56 gdb_assert (tdep->wordsize == 4);
57
58 regcache_cooked_read_unsigned (regcache, gdbarch_sp_regnum (gdbarch),
59 &saved_sp);
60
61 /* Go through the argument list twice.
62
63 Pass 1: Figure out how much new stack space is required for
64 arguments and pushed values. Unlike the PowerOpen ABI, the SysV
65 ABI doesn't reserve any extra space for parameters which are put
66 in registers, but does always push structures and then pass their
67 address.
68
69 Pass 2: Replay the same computation but this time also write the
70 values out to the target. */
71
72 for (write_pass = 0; write_pass < 2; write_pass++)
73 {
74 int argno;
75 /* Next available floating point register for float and double
76 arguments. */
77 int freg = 1;
78 /* Next available general register for non-float, non-vector
79 arguments. */
80 int greg = 3;
81 /* Next available vector register for vector arguments. */
82 int vreg = 2;
83 /* Arguments start above the "LR save word" and "Back chain". */
84 int argoffset = 2 * tdep->wordsize;
85 /* Structures start after the arguments. */
86 int structoffset = argoffset + argspace;
87
88 /* If the function is returning a `struct', then the first word
89 (which will be passed in r3) is used for struct return
90 address. In that case we should advance one word and start
91 from r4 register to copy parameters. */
92 if (struct_return)
93 {
94 if (write_pass)
95 regcache_cooked_write_signed (regcache,
96 tdep->ppc_gp0_regnum + greg,
97 struct_addr);
98 greg++;
99 }
100
101 for (argno = 0; argno < nargs; argno++)
102 {
103 struct value *arg = args[argno];
104 struct type *type = check_typedef (value_type (arg));
105 int len = TYPE_LENGTH (type);
106 const bfd_byte *val = value_contents (arg);
107
108 if (TYPE_CODE (type) == TYPE_CODE_FLT && len <= 8
109 && !tdep->soft_float)
110 {
111 /* Floating point value converted to "double" then
112 passed in an FP register, when the registers run out,
113 8 byte aligned stack is used. */
114 if (freg <= 8)
115 {
116 if (write_pass)
117 {
118 /* Always store the floating point value using
119 the register's floating-point format. */
120 gdb_byte regval[MAX_REGISTER_SIZE];
121 struct type *regtype
122 = register_type (gdbarch, tdep->ppc_fp0_regnum + freg);
123 convert_typed_floating (val, type, regval, regtype);
124 regcache_cooked_write (regcache,
125 tdep->ppc_fp0_regnum + freg,
126 regval);
127 }
128 freg++;
129 }
130 else
131 {
132 /* The SysV ABI tells us to convert floats to
133 doubles before writing them to an 8 byte aligned
134 stack location. Unfortunately GCC does not do
135 that, and stores floats into 4 byte aligned
136 locations without converting them to doubles.
137 Since there is no know compiler that actually
138 follows the ABI here, we implement the GCC
139 convention. */
140
141 /* Align to 4 bytes or 8 bytes depending on the type of
142 the argument (float or double). */
143 argoffset = align_up (argoffset, len);
144 if (write_pass)
145 write_memory (sp + argoffset, val, len);
146 argoffset += len;
147 }
148 }
149 else if (TYPE_CODE (type) == TYPE_CODE_FLT
150 && len == 16
151 && !tdep->soft_float
152 && (gdbarch_long_double_format (gdbarch)
153 == floatformats_ibm_long_double))
154 {
155 /* IBM long double passed in two FP registers if
156 available, otherwise 8-byte aligned stack. */
157 if (freg <= 7)
158 {
159 if (write_pass)
160 {
161 regcache_cooked_write (regcache,
162 tdep->ppc_fp0_regnum + freg,
163 val);
164 regcache_cooked_write (regcache,
165 tdep->ppc_fp0_regnum + freg + 1,
166 val + 8);
167 }
168 freg += 2;
169 }
170 else
171 {
172 argoffset = align_up (argoffset, 8);
173 if (write_pass)
174 write_memory (sp + argoffset, val, len);
175 argoffset += 16;
176 }
177 }
178 else if (len == 8
179 && (TYPE_CODE (type) == TYPE_CODE_INT /* long long */
180 || TYPE_CODE (type) == TYPE_CODE_FLT)) /* double */
181 {
182 /* "long long" or soft-float "double" passed in an odd/even
183 register pair with the low addressed word in the odd
184 register and the high addressed word in the even
185 register, or when the registers run out an 8 byte
186 aligned stack location. */
187 if (greg > 9)
188 {
189 /* Just in case GREG was 10. */
190 greg = 11;
191 argoffset = align_up (argoffset, 8);
192 if (write_pass)
193 write_memory (sp + argoffset, val, len);
194 argoffset += 8;
195 }
196 else
197 {
198 /* Must start on an odd register - r3/r4 etc. */
199 if ((greg & 1) == 0)
200 greg++;
201 if (write_pass)
202 {
203 regcache_cooked_write (regcache,
204 tdep->ppc_gp0_regnum + greg + 0,
205 val + 0);
206 regcache_cooked_write (regcache,
207 tdep->ppc_gp0_regnum + greg + 1,
208 val + 4);
209 }
210 greg += 2;
211 }
212 }
213 else if (len == 16 && TYPE_CODE (type) == TYPE_CODE_FLT
214 && (gdbarch_long_double_format (gdbarch)
215 == floatformats_ibm_long_double))
216 {
217 /* Soft-float IBM long double passed in four consecutive
218 registers, or on the stack. The registers are not
219 necessarily odd/even pairs. */
220 if (greg > 7)
221 {
222 greg = 11;
223 argoffset = align_up (argoffset, 8);
224 if (write_pass)
225 write_memory (sp + argoffset, val, len);
226 argoffset += 16;
227 }
228 else
229 {
230 if (write_pass)
231 {
232 regcache_cooked_write (regcache,
233 tdep->ppc_gp0_regnum + greg + 0,
234 val + 0);
235 regcache_cooked_write (regcache,
236 tdep->ppc_gp0_regnum + greg + 1,
237 val + 4);
238 regcache_cooked_write (regcache,
239 tdep->ppc_gp0_regnum + greg + 2,
240 val + 8);
241 regcache_cooked_write (regcache,
242 tdep->ppc_gp0_regnum + greg + 3,
243 val + 12);
244 }
245 greg += 4;
246 }
247 }
248 else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && len <= 8
249 && !tdep->soft_float)
250 {
251 /* 32-bit and 64-bit decimal floats go in f1 .. f8. They can
252 end up in memory. */
253
254 if (freg <= 8)
255 {
256 if (write_pass)
257 {
258 gdb_byte regval[MAX_REGISTER_SIZE];
259 const gdb_byte *p;
260
261 /* 32-bit decimal floats are right aligned in the
262 doubleword. */
263 if (TYPE_LENGTH (type) == 4)
264 {
265 memcpy (regval + 4, val, 4);
266 p = regval;
267 }
268 else
269 p = val;
270
271 regcache_cooked_write (regcache,
272 tdep->ppc_fp0_regnum + freg, p);
273 }
274
275 freg++;
276 }
277 else
278 {
279 argoffset = align_up (argoffset, len);
280
281 if (write_pass)
282 /* Write value in the stack's parameter save area. */
283 write_memory (sp + argoffset, val, len);
284
285 argoffset += len;
286 }
287 }
288 else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && len == 16
289 && !tdep->soft_float)
290 {
291 /* 128-bit decimal floats go in f2 .. f7, always in even/odd
292 pairs. They can end up in memory, using two doublewords. */
293
294 if (freg <= 6)
295 {
296 /* Make sure freg is even. */
297 freg += freg & 1;
298
299 if (write_pass)
300 {
301 regcache_cooked_write (regcache,
302 tdep->ppc_fp0_regnum + freg, val);
303 regcache_cooked_write (regcache,
304 tdep->ppc_fp0_regnum + freg + 1, val + 8);
305 }
306 }
307 else
308 {
309 argoffset = align_up (argoffset, 8);
310
311 if (write_pass)
312 write_memory (sp + argoffset, val, 16);
313
314 argoffset += 16;
315 }
316
317 /* If a 128-bit decimal float goes to the stack because only f7
318 and f8 are free (thus there's no even/odd register pair
319 available), these registers should be marked as occupied.
320 Hence we increase freg even when writing to memory. */
321 freg += 2;
322 }
323 else if (len == 16
324 && TYPE_CODE (type) == TYPE_CODE_ARRAY
325 && TYPE_VECTOR (type)
326 && tdep->vector_abi == POWERPC_VEC_ALTIVEC)
327 {
328 /* Vector parameter passed in an Altivec register, or
329 when that runs out, 16 byte aligned stack location. */
330 if (vreg <= 13)
331 {
332 if (write_pass)
333 regcache_cooked_write (regcache,
334 tdep->ppc_vr0_regnum + vreg, val);
335 vreg++;
336 }
337 else
338 {
339 argoffset = align_up (argoffset, 16);
340 if (write_pass)
341 write_memory (sp + argoffset, val, 16);
342 argoffset += 16;
343 }
344 }
345 else if (len == 8
346 && TYPE_CODE (type) == TYPE_CODE_ARRAY
347 && TYPE_VECTOR (type)
348 && tdep->vector_abi == POWERPC_VEC_SPE)
349 {
350 /* Vector parameter passed in an e500 register, or when
351 that runs out, 8 byte aligned stack location. Note
352 that since e500 vector and general purpose registers
353 both map onto the same underlying register set, a
354 "greg" and not a "vreg" is consumed here. A cooked
355 write stores the value in the correct locations
356 within the raw register cache. */
357 if (greg <= 10)
358 {
359 if (write_pass)
360 regcache_cooked_write (regcache,
361 tdep->ppc_ev0_regnum + greg, val);
362 greg++;
363 }
364 else
365 {
366 argoffset = align_up (argoffset, 8);
367 if (write_pass)
368 write_memory (sp + argoffset, val, 8);
369 argoffset += 8;
370 }
371 }
372 else
373 {
374 /* Reduce the parameter down to something that fits in a
375 "word". */
376 gdb_byte word[MAX_REGISTER_SIZE];
377 memset (word, 0, MAX_REGISTER_SIZE);
378 if (len > tdep->wordsize
379 || TYPE_CODE (type) == TYPE_CODE_STRUCT
380 || TYPE_CODE (type) == TYPE_CODE_UNION)
381 {
382 /* Structs and large values are put in an
383 aligned stack slot ... */
384 if (TYPE_CODE (type) == TYPE_CODE_ARRAY
385 && TYPE_VECTOR (type)
386 && len >= 16)
387 structoffset = align_up (structoffset, 16);
388 else
389 structoffset = align_up (structoffset, 8);
390
391 if (write_pass)
392 write_memory (sp + structoffset, val, len);
393 /* ... and then a "word" pointing to that address is
394 passed as the parameter. */
395 store_unsigned_integer (word, tdep->wordsize,
396 sp + structoffset);
397 structoffset += len;
398 }
399 else if (TYPE_CODE (type) == TYPE_CODE_INT)
400 /* Sign or zero extend the "int" into a "word". */
401 store_unsigned_integer (word, tdep->wordsize,
402 unpack_long (type, val));
403 else
404 /* Always goes in the low address. */
405 memcpy (word, val, len);
406 /* Store that "word" in a register, or on the stack.
407 The words have "4" byte alignment. */
408 if (greg <= 10)
409 {
410 if (write_pass)
411 regcache_cooked_write (regcache,
412 tdep->ppc_gp0_regnum + greg, word);
413 greg++;
414 }
415 else
416 {
417 argoffset = align_up (argoffset, tdep->wordsize);
418 if (write_pass)
419 write_memory (sp + argoffset, word, tdep->wordsize);
420 argoffset += tdep->wordsize;
421 }
422 }
423 }
424
425 /* Compute the actual stack space requirements. */
426 if (!write_pass)
427 {
428 /* Remember the amount of space needed by the arguments. */
429 argspace = argoffset;
430 /* Allocate space for both the arguments and the structures. */
431 sp -= (argoffset + structoffset);
432 /* Ensure that the stack is still 16 byte aligned. */
433 sp = align_down (sp, 16);
434 }
435
436 /* The psABI says that "A caller of a function that takes a
437 variable argument list shall set condition register bit 6 to
438 1 if it passes one or more arguments in the floating-point
439 registers. It is strongly recommended that the caller set the
440 bit to 0 otherwise..." Doing this for normal functions too
441 shouldn't hurt. */
442 if (write_pass)
443 {
444 ULONGEST cr;
445
446 regcache_cooked_read_unsigned (regcache, tdep->ppc_cr_regnum, &cr);
447 if (freg > 1)
448 cr |= 0x02000000;
449 else
450 cr &= ~0x02000000;
451 regcache_cooked_write_unsigned (regcache, tdep->ppc_cr_regnum, cr);
452 }
453 }
454
455 /* Update %sp. */
456 regcache_cooked_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp);
457
458 /* Write the backchain (it occupies WORDSIZED bytes). */
459 write_memory_signed_integer (sp, tdep->wordsize, saved_sp);
460
461 /* Point the inferior function call's return address at the dummy's
462 breakpoint. */
463 regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
464
465 return sp;
466 }
467
468 /* Handle the return-value conventions for Decimal Floating Point values
469 in both ppc32 and ppc64, which are the same. */
470 static int
471 get_decimal_float_return_value (struct gdbarch *gdbarch, struct type *valtype,
472 struct regcache *regcache, gdb_byte *readbuf,
473 const gdb_byte *writebuf)
474 {
475 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
476
477 gdb_assert (TYPE_CODE (valtype) == TYPE_CODE_DECFLOAT);
478
479 /* 32-bit and 64-bit decimal floats in f1. */
480 if (TYPE_LENGTH (valtype) <= 8)
481 {
482 if (writebuf != NULL)
483 {
484 gdb_byte regval[MAX_REGISTER_SIZE];
485 const gdb_byte *p;
486
487 /* 32-bit decimal float is right aligned in the doubleword. */
488 if (TYPE_LENGTH (valtype) == 4)
489 {
490 memcpy (regval + 4, writebuf, 4);
491 p = regval;
492 }
493 else
494 p = writebuf;
495
496 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, p);
497 }
498 if (readbuf != NULL)
499 {
500 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, readbuf);
501
502 /* Left align 32-bit decimal float. */
503 if (TYPE_LENGTH (valtype) == 4)
504 memcpy (readbuf, readbuf + 4, 4);
505 }
506 }
507 /* 128-bit decimal floats in f2,f3. */
508 else if (TYPE_LENGTH (valtype) == 16)
509 {
510 if (writebuf != NULL || readbuf != NULL)
511 {
512 int i;
513
514 for (i = 0; i < 2; i++)
515 {
516 if (writebuf != NULL)
517 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 2 + i,
518 writebuf + i * 8);
519 if (readbuf != NULL)
520 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 2 + i,
521 readbuf + i * 8);
522 }
523 }
524 }
525 else
526 /* Can't happen. */
527 internal_error (__FILE__, __LINE__, "Unknown decimal float size.");
528
529 return RETURN_VALUE_REGISTER_CONVENTION;
530 }
531
532 /* Handle the return-value conventions specified by the SysV 32-bit
533 PowerPC ABI (including all the supplements):
534
535 no floating-point: floating-point values returned using 32-bit
536 general-purpose registers.
537
538 Altivec: 128-bit vectors returned using vector registers.
539
540 e500: 64-bit vectors returned using the full full 64 bit EV
541 register, floating-point values returned using 32-bit
542 general-purpose registers.
543
544 GCC (broken): Small struct values right (instead of left) aligned
545 when returned in general-purpose registers. */
546
547 static enum return_value_convention
548 do_ppc_sysv_return_value (struct gdbarch *gdbarch, struct type *type,
549 struct regcache *regcache, gdb_byte *readbuf,
550 const gdb_byte *writebuf, int broken_gcc)
551 {
552 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
553 gdb_assert (tdep->wordsize == 4);
554 if (TYPE_CODE (type) == TYPE_CODE_FLT
555 && TYPE_LENGTH (type) <= 8
556 && !tdep->soft_float)
557 {
558 if (readbuf)
559 {
560 /* Floats and doubles stored in "f1". Convert the value to
561 the required type. */
562 gdb_byte regval[MAX_REGISTER_SIZE];
563 struct type *regtype = register_type (gdbarch,
564 tdep->ppc_fp0_regnum + 1);
565 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, regval);
566 convert_typed_floating (regval, regtype, readbuf, type);
567 }
568 if (writebuf)
569 {
570 /* Floats and doubles stored in "f1". Convert the value to
571 the register's "double" type. */
572 gdb_byte regval[MAX_REGISTER_SIZE];
573 struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum);
574 convert_typed_floating (writebuf, type, regval, regtype);
575 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval);
576 }
577 return RETURN_VALUE_REGISTER_CONVENTION;
578 }
579 if (TYPE_CODE (type) == TYPE_CODE_FLT
580 && TYPE_LENGTH (type) == 16
581 && !tdep->soft_float
582 && (gdbarch_long_double_format (gdbarch) == floatformats_ibm_long_double))
583 {
584 /* IBM long double stored in f1 and f2. */
585 if (readbuf)
586 {
587 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, readbuf);
588 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 2,
589 readbuf + 8);
590 }
591 if (writebuf)
592 {
593 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, writebuf);
594 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 2,
595 writebuf + 8);
596 }
597 return RETURN_VALUE_REGISTER_CONVENTION;
598 }
599 if (TYPE_CODE (type) == TYPE_CODE_FLT
600 && TYPE_LENGTH (type) == 16
601 && (gdbarch_long_double_format (gdbarch) == floatformats_ibm_long_double))
602 {
603 /* Soft-float IBM long double stored in r3, r4, r5, r6. */
604 if (readbuf)
605 {
606 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, readbuf);
607 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
608 readbuf + 4);
609 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 5,
610 readbuf + 8);
611 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 6,
612 readbuf + 12);
613 }
614 if (writebuf)
615 {
616 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, writebuf);
617 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
618 writebuf + 4);
619 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 5,
620 writebuf + 8);
621 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 6,
622 writebuf + 12);
623 }
624 return RETURN_VALUE_REGISTER_CONVENTION;
625 }
626 if ((TYPE_CODE (type) == TYPE_CODE_INT && TYPE_LENGTH (type) == 8)
627 || (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) == 8))
628 {
629 if (readbuf)
630 {
631 /* A long long, or a double stored in the 32 bit r3/r4. */
632 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
633 readbuf + 0);
634 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
635 readbuf + 4);
636 }
637 if (writebuf)
638 {
639 /* A long long, or a double stored in the 32 bit r3/r4. */
640 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
641 writebuf + 0);
642 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
643 writebuf + 4);
644 }
645 return RETURN_VALUE_REGISTER_CONVENTION;
646 }
647 if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && !tdep->soft_float)
648 return get_decimal_float_return_value (gdbarch, type, regcache, readbuf,
649 writebuf);
650 else if ((TYPE_CODE (type) == TYPE_CODE_INT
651 || TYPE_CODE (type) == TYPE_CODE_CHAR
652 || TYPE_CODE (type) == TYPE_CODE_BOOL
653 || TYPE_CODE (type) == TYPE_CODE_PTR
654 || TYPE_CODE (type) == TYPE_CODE_REF
655 || TYPE_CODE (type) == TYPE_CODE_ENUM)
656 && TYPE_LENGTH (type) <= tdep->wordsize)
657 {
658 if (readbuf)
659 {
660 /* Some sort of integer stored in r3. Since TYPE isn't
661 bigger than the register, sign extension isn't a problem
662 - just do everything unsigned. */
663 ULONGEST regval;
664 regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
665 &regval);
666 store_unsigned_integer (readbuf, TYPE_LENGTH (type), regval);
667 }
668 if (writebuf)
669 {
670 /* Some sort of integer stored in r3. Use unpack_long since
671 that should handle any required sign extension. */
672 regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
673 unpack_long (type, writebuf));
674 }
675 return RETURN_VALUE_REGISTER_CONVENTION;
676 }
677 if (TYPE_LENGTH (type) == 16
678 && TYPE_CODE (type) == TYPE_CODE_ARRAY
679 && TYPE_VECTOR (type)
680 && tdep->vector_abi == POWERPC_VEC_ALTIVEC)
681 {
682 if (readbuf)
683 {
684 /* Altivec places the return value in "v2". */
685 regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, readbuf);
686 }
687 if (writebuf)
688 {
689 /* Altivec places the return value in "v2". */
690 regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2, writebuf);
691 }
692 return RETURN_VALUE_REGISTER_CONVENTION;
693 }
694 if (TYPE_LENGTH (type) == 16
695 && TYPE_CODE (type) == TYPE_CODE_ARRAY
696 && TYPE_VECTOR (type)
697 && tdep->vector_abi == POWERPC_VEC_GENERIC)
698 {
699 /* GCC -maltivec -mabi=no-altivec returns vectors in r3/r4/r5/r6.
700 GCC without AltiVec returns them in memory, but it warns about
701 ABI risks in that case; we don't try to support it. */
702 if (readbuf)
703 {
704 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
705 readbuf + 0);
706 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
707 readbuf + 4);
708 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 5,
709 readbuf + 8);
710 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 6,
711 readbuf + 12);
712 }
713 if (writebuf)
714 {
715 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
716 writebuf + 0);
717 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
718 writebuf + 4);
719 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 5,
720 writebuf + 8);
721 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 6,
722 writebuf + 12);
723 }
724 return RETURN_VALUE_REGISTER_CONVENTION;
725 }
726 if (TYPE_LENGTH (type) == 8
727 && TYPE_CODE (type) == TYPE_CODE_ARRAY
728 && TYPE_VECTOR (type)
729 && tdep->vector_abi == POWERPC_VEC_SPE)
730 {
731 /* The e500 ABI places return values for the 64-bit DSP types
732 (__ev64_opaque__) in r3. However, in GDB-speak, ev3
733 corresponds to the entire r3 value for e500, whereas GDB's r3
734 only corresponds to the least significant 32-bits. So place
735 the 64-bit DSP type's value in ev3. */
736 if (readbuf)
737 regcache_cooked_read (regcache, tdep->ppc_ev0_regnum + 3, readbuf);
738 if (writebuf)
739 regcache_cooked_write (regcache, tdep->ppc_ev0_regnum + 3, writebuf);
740 return RETURN_VALUE_REGISTER_CONVENTION;
741 }
742 if (broken_gcc && TYPE_LENGTH (type) <= 8)
743 {
744 /* GCC screwed up for structures or unions whose size is less
745 than or equal to 8 bytes.. Instead of left-aligning, it
746 right-aligns the data into the buffer formed by r3, r4. */
747 gdb_byte regvals[MAX_REGISTER_SIZE * 2];
748 int len = TYPE_LENGTH (type);
749 int offset = (2 * tdep->wordsize - len) % tdep->wordsize;
750
751 if (readbuf)
752 {
753 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
754 regvals + 0 * tdep->wordsize);
755 if (len > tdep->wordsize)
756 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
757 regvals + 1 * tdep->wordsize);
758 memcpy (readbuf, regvals + offset, len);
759 }
760 if (writebuf)
761 {
762 memset (regvals, 0, sizeof regvals);
763 memcpy (regvals + offset, writebuf, len);
764 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
765 regvals + 0 * tdep->wordsize);
766 if (len > tdep->wordsize)
767 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
768 regvals + 1 * tdep->wordsize);
769 }
770
771 return RETURN_VALUE_REGISTER_CONVENTION;
772 }
773 if (TYPE_LENGTH (type) <= 8)
774 {
775 if (readbuf)
776 {
777 /* This matches SVr4 PPC, it does not match GCC. */
778 /* The value is right-padded to 8 bytes and then loaded, as
779 two "words", into r3/r4. */
780 gdb_byte regvals[MAX_REGISTER_SIZE * 2];
781 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
782 regvals + 0 * tdep->wordsize);
783 if (TYPE_LENGTH (type) > tdep->wordsize)
784 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
785 regvals + 1 * tdep->wordsize);
786 memcpy (readbuf, regvals, TYPE_LENGTH (type));
787 }
788 if (writebuf)
789 {
790 /* This matches SVr4 PPC, it does not match GCC. */
791 /* The value is padded out to 8 bytes and then loaded, as
792 two "words" into r3/r4. */
793 gdb_byte regvals[MAX_REGISTER_SIZE * 2];
794 memset (regvals, 0, sizeof regvals);
795 memcpy (regvals, writebuf, TYPE_LENGTH (type));
796 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
797 regvals + 0 * tdep->wordsize);
798 if (TYPE_LENGTH (type) > tdep->wordsize)
799 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
800 regvals + 1 * tdep->wordsize);
801 }
802 return RETURN_VALUE_REGISTER_CONVENTION;
803 }
804 return RETURN_VALUE_STRUCT_CONVENTION;
805 }
806
807 enum return_value_convention
808 ppc_sysv_abi_return_value (struct gdbarch *gdbarch, struct type *func_type,
809 struct type *valtype, struct regcache *regcache,
810 gdb_byte *readbuf, const gdb_byte *writebuf)
811 {
812 return do_ppc_sysv_return_value (gdbarch, valtype, regcache, readbuf,
813 writebuf, 0);
814 }
815
816 enum return_value_convention
817 ppc_sysv_abi_broken_return_value (struct gdbarch *gdbarch,
818 struct type *func_type,
819 struct type *valtype,
820 struct regcache *regcache,
821 gdb_byte *readbuf, const gdb_byte *writebuf)
822 {
823 return do_ppc_sysv_return_value (gdbarch, valtype, regcache, readbuf,
824 writebuf, 1);
825 }
826
827 /* The helper function for 64-bit SYSV push_dummy_call. Converts the
828 function's code address back into the function's descriptor
829 address.
830
831 Find a value for the TOC register. Every symbol should have both
832 ".FN" and "FN" in the minimal symbol table. "FN" points at the
833 FN's descriptor, while ".FN" points at the entry point (which
834 matches FUNC_ADDR). Need to reverse from FUNC_ADDR back to the
835 FN's descriptor address (while at the same time being careful to
836 find "FN" in the same object file as ".FN"). */
837
838 static int
839 convert_code_addr_to_desc_addr (CORE_ADDR code_addr, CORE_ADDR *desc_addr)
840 {
841 struct obj_section *dot_fn_section;
842 struct minimal_symbol *dot_fn;
843 struct minimal_symbol *fn;
844 CORE_ADDR toc;
845 /* Find the minimal symbol that corresponds to CODE_ADDR (should
846 have a name of the form ".FN"). */
847 dot_fn = lookup_minimal_symbol_by_pc (code_addr);
848 if (dot_fn == NULL || SYMBOL_LINKAGE_NAME (dot_fn)[0] != '.')
849 return 0;
850 /* Get the section that contains CODE_ADDR. Need this for the
851 "objfile" that it contains. */
852 dot_fn_section = find_pc_section (code_addr);
853 if (dot_fn_section == NULL || dot_fn_section->objfile == NULL)
854 return 0;
855 /* Now find the corresponding "FN" (dropping ".") minimal symbol's
856 address. Only look for the minimal symbol in ".FN"'s object file
857 - avoids problems when two object files (i.e., shared libraries)
858 contain a minimal symbol with the same name. */
859 fn = lookup_minimal_symbol (SYMBOL_LINKAGE_NAME (dot_fn) + 1, NULL,
860 dot_fn_section->objfile);
861 if (fn == NULL)
862 return 0;
863 /* Found a descriptor. */
864 (*desc_addr) = SYMBOL_VALUE_ADDRESS (fn);
865 return 1;
866 }
867
868 /* Pass the arguments in either registers, or in the stack. Using the
869 ppc 64 bit SysV ABI.
870
871 This implements a dumbed down version of the ABI. It always writes
872 values to memory, GPR and FPR, even when not necessary. Doing this
873 greatly simplifies the logic. */
874
875 CORE_ADDR
876 ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
877 struct regcache *regcache, CORE_ADDR bp_addr,
878 int nargs, struct value **args, CORE_ADDR sp,
879 int struct_return, CORE_ADDR struct_addr)
880 {
881 CORE_ADDR func_addr = find_function_addr (function, NULL);
882 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
883 ULONGEST back_chain;
884 /* See for-loop comment below. */
885 int write_pass;
886 /* Size of the Altivec's vector parameter region, the final value is
887 computed in the for-loop below. */
888 LONGEST vparam_size = 0;
889 /* Size of the general parameter region, the final value is computed
890 in the for-loop below. */
891 LONGEST gparam_size = 0;
892 /* Kevin writes ... I don't mind seeing tdep->wordsize used in the
893 calls to align_up(), align_down(), etc. because this makes it
894 easier to reuse this code (in a copy/paste sense) in the future,
895 but it is a 64-bit ABI and asserting that the wordsize is 8 bytes
896 at some point makes it easier to verify that this function is
897 correct without having to do a non-local analysis to figure out
898 the possible values of tdep->wordsize. */
899 gdb_assert (tdep->wordsize == 8);
900
901 /* This function exists to support a calling convention that
902 requires floating-point registers. It shouldn't be used on
903 processors that lack them. */
904 gdb_assert (ppc_floating_point_unit_p (gdbarch));
905
906 /* By this stage in the proceedings, SP has been decremented by "red
907 zone size" + "struct return size". Fetch the stack-pointer from
908 before this and use that as the BACK_CHAIN. */
909 regcache_cooked_read_unsigned (regcache, gdbarch_sp_regnum (gdbarch),
910 &back_chain);
911
912 /* Go through the argument list twice.
913
914 Pass 1: Compute the function call's stack space and register
915 requirements.
916
917 Pass 2: Replay the same computation but this time also write the
918 values out to the target. */
919
920 for (write_pass = 0; write_pass < 2; write_pass++)
921 {
922 int argno;
923 /* Next available floating point register for float and double
924 arguments. */
925 int freg = 1;
926 /* Next available general register for non-vector (but possibly
927 float) arguments. */
928 int greg = 3;
929 /* Next available vector register for vector arguments. */
930 int vreg = 2;
931 /* The address, at which the next general purpose parameter
932 (integer, struct, float, ...) should be saved. */
933 CORE_ADDR gparam;
934 /* Address, at which the next Altivec vector parameter should be
935 saved. */
936 CORE_ADDR vparam;
937
938 if (!write_pass)
939 {
940 /* During the first pass, GPARAM and VPARAM are more like
941 offsets (start address zero) than addresses. That way
942 the accumulate the total stack space each region
943 requires. */
944 gparam = 0;
945 vparam = 0;
946 }
947 else
948 {
949 /* Decrement the stack pointer making space for the Altivec
950 and general on-stack parameters. Set vparam and gparam
951 to their corresponding regions. */
952 vparam = align_down (sp - vparam_size, 16);
953 gparam = align_down (vparam - gparam_size, 16);
954 /* Add in space for the TOC, link editor double word,
955 compiler double word, LR save area, CR save area. */
956 sp = align_down (gparam - 48, 16);
957 }
958
959 /* If the function is returning a `struct', then there is an
960 extra hidden parameter (which will be passed in r3)
961 containing the address of that struct.. In that case we
962 should advance one word and start from r4 register to copy
963 parameters. This also consumes one on-stack parameter slot. */
964 if (struct_return)
965 {
966 if (write_pass)
967 regcache_cooked_write_signed (regcache,
968 tdep->ppc_gp0_regnum + greg,
969 struct_addr);
970 greg++;
971 gparam = align_up (gparam + tdep->wordsize, tdep->wordsize);
972 }
973
974 for (argno = 0; argno < nargs; argno++)
975 {
976 struct value *arg = args[argno];
977 struct type *type = check_typedef (value_type (arg));
978 const bfd_byte *val = value_contents (arg);
979
980 if (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) <= 8)
981 {
982 /* Floats and Doubles go in f1 .. f13. They also
983 consume a left aligned GREG,, and can end up in
984 memory. */
985 if (write_pass)
986 {
987 gdb_byte regval[MAX_REGISTER_SIZE];
988 const gdb_byte *p;
989
990 /* Version 1.7 of the 64-bit PowerPC ELF ABI says:
991
992 "Single precision floating point values are mapped to
993 the first word in a single doubleword."
994
995 And version 1.9 says:
996
997 "Single precision floating point values are mapped to
998 the second word in a single doubleword."
999
1000 GDB then writes single precision floating point values
1001 at both words in a doubleword, to support both ABIs. */
1002 if (TYPE_LENGTH (type) == 4)
1003 {
1004 memcpy (regval, val, 4);
1005 memcpy (regval + 4, val, 4);
1006 p = regval;
1007 }
1008 else
1009 p = val;
1010
1011 /* Write value in the stack's parameter save area. */
1012 write_memory (gparam, p, 8);
1013
1014 if (freg <= 13)
1015 {
1016 struct type *regtype
1017 = register_type (gdbarch, tdep->ppc_fp0_regnum);
1018
1019 convert_typed_floating (val, type, regval, regtype);
1020 regcache_cooked_write (regcache,
1021 tdep->ppc_fp0_regnum + freg,
1022 regval);
1023 }
1024 if (greg <= 10)
1025 regcache_cooked_write (regcache,
1026 tdep->ppc_gp0_regnum + greg,
1027 regval);
1028 }
1029
1030 freg++;
1031 greg++;
1032 /* Always consume parameter stack space. */
1033 gparam = align_up (gparam + 8, tdep->wordsize);
1034 }
1035 else if (TYPE_CODE (type) == TYPE_CODE_FLT
1036 && TYPE_LENGTH (type) == 16
1037 && (gdbarch_long_double_format (gdbarch)
1038 == floatformats_ibm_long_double))
1039 {
1040 /* IBM long double stored in two doublewords of the
1041 parameter save area and corresponding registers. */
1042 if (write_pass)
1043 {
1044 if (!tdep->soft_float && freg <= 13)
1045 {
1046 regcache_cooked_write (regcache,
1047 tdep->ppc_fp0_regnum + freg,
1048 val);
1049 if (freg <= 12)
1050 regcache_cooked_write (regcache,
1051 tdep->ppc_fp0_regnum + freg + 1,
1052 val + 8);
1053 }
1054 if (greg <= 10)
1055 {
1056 regcache_cooked_write (regcache,
1057 tdep->ppc_gp0_regnum + greg,
1058 val);
1059 if (greg <= 9)
1060 regcache_cooked_write (regcache,
1061 tdep->ppc_gp0_regnum + greg + 1,
1062 val + 8);
1063 }
1064 write_memory (gparam, val, TYPE_LENGTH (type));
1065 }
1066 freg += 2;
1067 greg += 2;
1068 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
1069 }
1070 else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT
1071 && TYPE_LENGTH (type) <= 8)
1072 {
1073 /* 32-bit and 64-bit decimal floats go in f1 .. f13. They can
1074 end up in memory. */
1075 if (write_pass)
1076 {
1077 gdb_byte regval[MAX_REGISTER_SIZE];
1078 const gdb_byte *p;
1079
1080 /* 32-bit decimal floats are right aligned in the
1081 doubleword. */
1082 if (TYPE_LENGTH (type) == 4)
1083 {
1084 memcpy (regval + 4, val, 4);
1085 p = regval;
1086 }
1087 else
1088 p = val;
1089
1090 /* Write value in the stack's parameter save area. */
1091 write_memory (gparam, p, 8);
1092
1093 if (freg <= 13)
1094 regcache_cooked_write (regcache,
1095 tdep->ppc_fp0_regnum + freg, p);
1096 }
1097
1098 freg++;
1099 greg++;
1100 /* Always consume parameter stack space. */
1101 gparam = align_up (gparam + 8, tdep->wordsize);
1102 }
1103 else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT &&
1104 TYPE_LENGTH (type) == 16)
1105 {
1106 /* 128-bit decimal floats go in f2 .. f12, always in even/odd
1107 pairs. They can end up in memory, using two doublewords. */
1108 if (write_pass)
1109 {
1110 if (freg <= 12)
1111 {
1112 /* Make sure freg is even. */
1113 freg += freg & 1;
1114 regcache_cooked_write (regcache,
1115 tdep->ppc_fp0_regnum + freg, val);
1116 regcache_cooked_write (regcache,
1117 tdep->ppc_fp0_regnum + freg + 1, val + 8);
1118 }
1119
1120 write_memory (gparam, val, TYPE_LENGTH (type));
1121 }
1122
1123 freg += 2;
1124 greg += 2;
1125 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
1126 }
1127 else if (TYPE_LENGTH (type) == 16 && TYPE_VECTOR (type)
1128 && TYPE_CODE (type) == TYPE_CODE_ARRAY
1129 && tdep->ppc_vr0_regnum >= 0)
1130 {
1131 /* In the Altivec ABI, vectors go in the vector
1132 registers v2 .. v13, or when that runs out, a vector
1133 annex which goes above all the normal parameters.
1134 NOTE: cagney/2003-09-21: This is a guess based on the
1135 PowerOpen Altivec ABI. */
1136 if (vreg <= 13)
1137 {
1138 if (write_pass)
1139 regcache_cooked_write (regcache,
1140 tdep->ppc_vr0_regnum + vreg, val);
1141 vreg++;
1142 }
1143 else
1144 {
1145 if (write_pass)
1146 write_memory (vparam, val, TYPE_LENGTH (type));
1147 vparam = align_up (vparam + TYPE_LENGTH (type), 16);
1148 }
1149 }
1150 else if ((TYPE_CODE (type) == TYPE_CODE_INT
1151 || TYPE_CODE (type) == TYPE_CODE_ENUM
1152 || TYPE_CODE (type) == TYPE_CODE_PTR)
1153 && TYPE_LENGTH (type) <= 8)
1154 {
1155 /* Scalars and Pointers get sign[un]extended and go in
1156 gpr3 .. gpr10. They can also end up in memory. */
1157 if (write_pass)
1158 {
1159 /* Sign extend the value, then store it unsigned. */
1160 ULONGEST word = unpack_long (type, val);
1161 /* Convert any function code addresses into
1162 descriptors. */
1163 if (TYPE_CODE (type) == TYPE_CODE_PTR
1164 && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
1165 {
1166 CORE_ADDR desc = word;
1167 convert_code_addr_to_desc_addr (word, &desc);
1168 word = desc;
1169 }
1170 if (greg <= 10)
1171 regcache_cooked_write_unsigned (regcache,
1172 tdep->ppc_gp0_regnum +
1173 greg, word);
1174 write_memory_unsigned_integer (gparam, tdep->wordsize,
1175 word);
1176 }
1177 greg++;
1178 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
1179 }
1180 else
1181 {
1182 int byte;
1183 for (byte = 0; byte < TYPE_LENGTH (type);
1184 byte += tdep->wordsize)
1185 {
1186 if (write_pass && greg <= 10)
1187 {
1188 gdb_byte regval[MAX_REGISTER_SIZE];
1189 int len = TYPE_LENGTH (type) - byte;
1190 if (len > tdep->wordsize)
1191 len = tdep->wordsize;
1192 memset (regval, 0, sizeof regval);
1193 /* The ABI (version 1.9) specifies that values
1194 smaller than one doubleword are right-aligned
1195 and those larger are left-aligned. GCC
1196 versions before 3.4 implemented this
1197 incorrectly; see
1198 <http://gcc.gnu.org/gcc-3.4/powerpc-abi.html>. */
1199 if (byte == 0)
1200 memcpy (regval + tdep->wordsize - len,
1201 val + byte, len);
1202 else
1203 memcpy (regval, val + byte, len);
1204 regcache_cooked_write (regcache, greg, regval);
1205 }
1206 greg++;
1207 }
1208 if (write_pass)
1209 /* WARNING: cagney/2003-09-21: Strictly speaking, this
1210 isn't necessary, unfortunately, GCC appears to get
1211 "struct convention" parameter passing wrong putting
1212 odd sized structures in memory instead of in a
1213 register. Work around this by always writing the
1214 value to memory. Fortunately, doing this
1215 simplifies the code. */
1216 write_memory (gparam, val, TYPE_LENGTH (type));
1217 if (freg <= 13
1218 && TYPE_CODE (type) == TYPE_CODE_STRUCT
1219 && TYPE_NFIELDS (type) == 1
1220 && TYPE_LENGTH (type) <= 16)
1221 {
1222 /* The ABI (version 1.9) specifies that structs
1223 containing a single floating-point value, at any
1224 level of nesting of single-member structs, are
1225 passed in floating-point registers. */
1226 while (TYPE_CODE (type) == TYPE_CODE_STRUCT
1227 && TYPE_NFIELDS (type) == 1)
1228 type = check_typedef (TYPE_FIELD_TYPE (type, 0));
1229 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1230 {
1231 if (TYPE_LENGTH (type) <= 8)
1232 {
1233 if (write_pass)
1234 {
1235 gdb_byte regval[MAX_REGISTER_SIZE];
1236 struct type *regtype
1237 = register_type (gdbarch,
1238 tdep->ppc_fp0_regnum);
1239 convert_typed_floating (val, type, regval,
1240 regtype);
1241 regcache_cooked_write (regcache,
1242 (tdep->ppc_fp0_regnum
1243 + freg),
1244 regval);
1245 }
1246 freg++;
1247 }
1248 else if (TYPE_LENGTH (type) == 16
1249 && (gdbarch_long_double_format (gdbarch)
1250 == floatformats_ibm_long_double))
1251 {
1252 if (write_pass)
1253 {
1254 regcache_cooked_write (regcache,
1255 (tdep->ppc_fp0_regnum
1256 + freg),
1257 val);
1258 if (freg <= 12)
1259 regcache_cooked_write (regcache,
1260 (tdep->ppc_fp0_regnum
1261 + freg + 1),
1262 val + 8);
1263 }
1264 freg += 2;
1265 }
1266 }
1267 }
1268 /* Always consume parameter stack space. */
1269 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
1270 }
1271 }
1272
1273 if (!write_pass)
1274 {
1275 /* Save the true region sizes ready for the second pass. */
1276 vparam_size = vparam;
1277 /* Make certain that the general parameter save area is at
1278 least the minimum 8 registers (or doublewords) in size. */
1279 if (greg < 8)
1280 gparam_size = 8 * tdep->wordsize;
1281 else
1282 gparam_size = gparam;
1283 }
1284 }
1285
1286 /* Update %sp. */
1287 regcache_cooked_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp);
1288
1289 /* Write the backchain (it occupies WORDSIZED bytes). */
1290 write_memory_signed_integer (sp, tdep->wordsize, back_chain);
1291
1292 /* Point the inferior function call's return address at the dummy's
1293 breakpoint. */
1294 regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
1295
1296 /* Use the func_addr to find the descriptor, and use that to find
1297 the TOC. */
1298 {
1299 CORE_ADDR desc_addr;
1300 if (convert_code_addr_to_desc_addr (func_addr, &desc_addr))
1301 {
1302 /* The TOC is the second double word in the descriptor. */
1303 CORE_ADDR toc =
1304 read_memory_unsigned_integer (desc_addr + tdep->wordsize,
1305 tdep->wordsize);
1306 regcache_cooked_write_unsigned (regcache,
1307 tdep->ppc_gp0_regnum + 2, toc);
1308 }
1309 }
1310
1311 return sp;
1312 }
1313
1314
1315 /* The 64 bit ABI return value convention.
1316
1317 Return non-zero if the return-value is stored in a register, return
1318 0 if the return-value is instead stored on the stack (a.k.a.,
1319 struct return convention).
1320
1321 For a return-value stored in a register: when WRITEBUF is non-NULL,
1322 copy the buffer to the corresponding register return-value location
1323 location; when READBUF is non-NULL, fill the buffer from the
1324 corresponding register return-value location. */
1325 enum return_value_convention
1326 ppc64_sysv_abi_return_value (struct gdbarch *gdbarch, struct type *func_type,
1327 struct type *valtype, struct regcache *regcache,
1328 gdb_byte *readbuf, const gdb_byte *writebuf)
1329 {
1330 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1331
1332 /* This function exists to support a calling convention that
1333 requires floating-point registers. It shouldn't be used on
1334 processors that lack them. */
1335 gdb_assert (ppc_floating_point_unit_p (gdbarch));
1336
1337 /* Floats and doubles in F1. */
1338 if (TYPE_CODE (valtype) == TYPE_CODE_FLT && TYPE_LENGTH (valtype) <= 8)
1339 {
1340 gdb_byte regval[MAX_REGISTER_SIZE];
1341 struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum);
1342 if (writebuf != NULL)
1343 {
1344 convert_typed_floating (writebuf, valtype, regval, regtype);
1345 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval);
1346 }
1347 if (readbuf != NULL)
1348 {
1349 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, regval);
1350 convert_typed_floating (regval, regtype, readbuf, valtype);
1351 }
1352 return RETURN_VALUE_REGISTER_CONVENTION;
1353 }
1354 if (TYPE_CODE (valtype) == TYPE_CODE_DECFLOAT)
1355 return get_decimal_float_return_value (gdbarch, valtype, regcache, readbuf,
1356 writebuf);
1357 /* Integers in r3. */
1358 if ((TYPE_CODE (valtype) == TYPE_CODE_INT
1359 || TYPE_CODE (valtype) == TYPE_CODE_ENUM)
1360 && TYPE_LENGTH (valtype) <= 8)
1361 {
1362 if (writebuf != NULL)
1363 {
1364 /* Be careful to sign extend the value. */
1365 regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
1366 unpack_long (valtype, writebuf));
1367 }
1368 if (readbuf != NULL)
1369 {
1370 /* Extract the integer from r3. Since this is truncating the
1371 value, there isn't a sign extension problem. */
1372 ULONGEST regval;
1373 regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
1374 &regval);
1375 store_unsigned_integer (readbuf, TYPE_LENGTH (valtype), regval);
1376 }
1377 return RETURN_VALUE_REGISTER_CONVENTION;
1378 }
1379 /* All pointers live in r3. */
1380 if (TYPE_CODE (valtype) == TYPE_CODE_PTR)
1381 {
1382 /* All pointers live in r3. */
1383 if (writebuf != NULL)
1384 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, writebuf);
1385 if (readbuf != NULL)
1386 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, readbuf);
1387 return RETURN_VALUE_REGISTER_CONVENTION;
1388 }
1389 /* Array type has more than one use. */
1390 if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY)
1391 {
1392 /* Small character arrays are returned, right justified, in r3. */
1393 if (TYPE_LENGTH (valtype) <= 8
1394 && TYPE_CODE (TYPE_TARGET_TYPE (valtype)) == TYPE_CODE_INT
1395 && TYPE_LENGTH (TYPE_TARGET_TYPE (valtype)) == 1)
1396 {
1397 int offset = (register_size (gdbarch, tdep->ppc_gp0_regnum + 3)
1398 - TYPE_LENGTH (valtype));
1399 if (writebuf != NULL)
1400 regcache_cooked_write_part (regcache, tdep->ppc_gp0_regnum + 3,
1401 offset, TYPE_LENGTH (valtype), writebuf);
1402 if (readbuf != NULL)
1403 regcache_cooked_read_part (regcache, tdep->ppc_gp0_regnum + 3,
1404 offset, TYPE_LENGTH (valtype), readbuf);
1405 return RETURN_VALUE_REGISTER_CONVENTION;
1406 }
1407 /* A VMX vector is returned in v2. */
1408 if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY
1409 && TYPE_VECTOR (valtype) && tdep->ppc_vr0_regnum >= 0)
1410 {
1411 if (readbuf)
1412 regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, readbuf);
1413 if (writebuf)
1414 regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2, writebuf);
1415 return RETURN_VALUE_REGISTER_CONVENTION;
1416 }
1417 }
1418 /* Big floating point values get stored in adjacent floating
1419 point registers, starting with F1. */
1420 if (TYPE_CODE (valtype) == TYPE_CODE_FLT
1421 && (TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 32))
1422 {
1423 if (writebuf || readbuf != NULL)
1424 {
1425 int i;
1426 for (i = 0; i < TYPE_LENGTH (valtype) / 8; i++)
1427 {
1428 if (writebuf != NULL)
1429 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1 + i,
1430 (const bfd_byte *) writebuf + i * 8);
1431 if (readbuf != NULL)
1432 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1 + i,
1433 (bfd_byte *) readbuf + i * 8);
1434 }
1435 }
1436 return RETURN_VALUE_REGISTER_CONVENTION;
1437 }
1438 /* Complex values get returned in f1:f2, need to convert. */
1439 if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX
1440 && (TYPE_LENGTH (valtype) == 8 || TYPE_LENGTH (valtype) == 16))
1441 {
1442 if (regcache != NULL)
1443 {
1444 int i;
1445 for (i = 0; i < 2; i++)
1446 {
1447 gdb_byte regval[MAX_REGISTER_SIZE];
1448 struct type *regtype =
1449 register_type (gdbarch, tdep->ppc_fp0_regnum);
1450 if (writebuf != NULL)
1451 {
1452 convert_typed_floating ((const bfd_byte *) writebuf +
1453 i * (TYPE_LENGTH (valtype) / 2),
1454 valtype, regval, regtype);
1455 regcache_cooked_write (regcache,
1456 tdep->ppc_fp0_regnum + 1 + i,
1457 regval);
1458 }
1459 if (readbuf != NULL)
1460 {
1461 regcache_cooked_read (regcache,
1462 tdep->ppc_fp0_regnum + 1 + i,
1463 regval);
1464 convert_typed_floating (regval, regtype,
1465 (bfd_byte *) readbuf +
1466 i * (TYPE_LENGTH (valtype) / 2),
1467 valtype);
1468 }
1469 }
1470 }
1471 return RETURN_VALUE_REGISTER_CONVENTION;
1472 }
1473 /* Big complex values get stored in f1:f4. */
1474 if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX && TYPE_LENGTH (valtype) == 32)
1475 {
1476 if (regcache != NULL)
1477 {
1478 int i;
1479 for (i = 0; i < 4; i++)
1480 {
1481 if (writebuf != NULL)
1482 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1 + i,
1483 (const bfd_byte *) writebuf + i * 8);
1484 if (readbuf != NULL)
1485 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1 + i,
1486 (bfd_byte *) readbuf + i * 8);
1487 }
1488 }
1489 return RETURN_VALUE_REGISTER_CONVENTION;
1490 }
1491 return RETURN_VALUE_STRUCT_CONVENTION;
1492 }
1493
1494 CORE_ADDR
1495 ppc64_sysv_abi_adjust_breakpoint_address (struct gdbarch *gdbarch,
1496 CORE_ADDR bpaddr)
1497 {
1498 /* PPC64 SYSV specifies that the minimal-symbol "FN" should point at
1499 a function-descriptor while the corresponding minimal-symbol
1500 ".FN" should point at the entry point. Consequently, a command
1501 like "break FN" applied to an object file with only minimal
1502 symbols, will insert the breakpoint into the descriptor at "FN"
1503 and not the function at ".FN". Avoid this confusion by adjusting
1504 any attempt to set a descriptor breakpoint into a corresponding
1505 function breakpoint. Note that GDB warns the user when this
1506 adjustment is applied - that's ok as otherwise the user will have
1507 no way of knowing why their breakpoint at "FN" resulted in the
1508 program stopping at ".FN". */
1509 return gdbarch_convert_from_func_ptr_addr (gdbarch, bpaddr, &current_target);
1510 }
GDB Binutils - Deliverables
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