2003-10-10 Andrew Cagney <cagney@redhat.com>
[deliverable/binutils-gdb.git] / gdb / ppc-sysv-tdep.c
1 /* Target-dependent code for PowerPC systems using the SVR4 ABI
2 for GDB, the GNU debugger.
3
4 Copyright 2000, 2001, 2002 Free Software Foundation, Inc.
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
22
23 #include "defs.h"
24 #include "gdbcore.h"
25 #include "inferior.h"
26 #include "regcache.h"
27 #include "value.h"
28 #include "gdb_string.h"
29 #include "gdb_assert.h"
30 #include "ppc-tdep.h"
31
32 /* Pass the arguments in either registers, or in the stack. Using the
33 ppc sysv ABI, the first eight words of the argument list (that might
34 be less than eight parameters if some parameters occupy more than one
35 word) are passed in r3..r10 registers. float and double parameters are
36 passed in fpr's, in addition to that. Rest of the parameters if any
37 are passed in user stack.
38
39 If the function is returning a structure, then the return address is passed
40 in r3, then the first 7 words of the parametes can be passed in registers,
41 starting from r4. */
42
43 CORE_ADDR
44 ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
45 struct regcache *regcache, CORE_ADDR bp_addr,
46 int nargs, struct value **args, CORE_ADDR sp,
47 int struct_return, CORE_ADDR struct_addr)
48 {
49 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
50 const CORE_ADDR saved_sp = read_sp ();
51 int argspace = 0; /* 0 is an initial wrong guess. */
52 int write_pass;
53
54 /* Go through the argument list twice.
55
56 Pass 1: Figure out how much new stack space is required for
57 arguments and pushed values. Unlike the PowerOpen ABI, the SysV
58 ABI doesn't reserve any extra space for parameters which are put
59 in registers, but does always push structures and then pass their
60 address.
61
62 Pass 2: Replay the same computation but this time also write the
63 values out to the target. */
64
65 for (write_pass = 0; write_pass < 2; write_pass++)
66 {
67 int argno;
68 /* Next available floating point register for float and double
69 arguments. */
70 int freg = 1;
71 /* Next available general register for non-float, non-vector
72 arguments. */
73 int greg = 3;
74 /* Next available vector register for vector arguments. */
75 int vreg = 2;
76 /* Arguments start above the "LR save word" and "Back chain". */
77 int argoffset = 2 * tdep->wordsize;
78 /* Structures start after the arguments. */
79 int structoffset = argoffset + argspace;
80
81 /* If the function is returning a `struct', then the first word
82 (which will be passed in r3) is used for struct return
83 address. In that case we should advance one word and start
84 from r4 register to copy parameters. */
85 if (struct_return)
86 {
87 if (write_pass)
88 regcache_cooked_write_signed (regcache,
89 tdep->ppc_gp0_regnum + greg,
90 struct_addr);
91 greg++;
92 }
93
94 for (argno = 0; argno < nargs; argno++)
95 {
96 struct value *arg = args[argno];
97 struct type *type = check_typedef (VALUE_TYPE (arg));
98 int len = TYPE_LENGTH (type);
99 char *val = VALUE_CONTENTS (arg);
100
101 if (TYPE_CODE (type) == TYPE_CODE_FLT
102 && ppc_floating_point_unit_p (current_gdbarch) && len <= 8)
103 {
104 /* Floating point value converted to "double" then
105 passed in an FP register, when the registers run out,
106 8 byte aligned stack is used. */
107 if (freg <= 8)
108 {
109 if (write_pass)
110 {
111 /* Always store the floating point value using
112 the register's floating-point format. */
113 char regval[MAX_REGISTER_SIZE];
114 struct type *regtype
115 = register_type (gdbarch, FP0_REGNUM + freg);
116 convert_typed_floating (val, type, regval, regtype);
117 regcache_cooked_write (regcache, FP0_REGNUM + freg,
118 regval);
119 }
120 freg++;
121 }
122 else
123 {
124 /* SysV ABI converts floats to doubles before
125 writing them to an 8 byte aligned stack location. */
126 argoffset = align_up (argoffset, 8);
127 if (write_pass)
128 {
129 char memval[8];
130 struct type *memtype;
131 switch (TARGET_BYTE_ORDER)
132 {
133 case BFD_ENDIAN_BIG:
134 memtype = builtin_type_ieee_double_big;
135 break;
136 case BFD_ENDIAN_LITTLE:
137 memtype = builtin_type_ieee_double_little;
138 break;
139 default:
140 internal_error (__FILE__, __LINE__, "bad switch");
141 }
142 convert_typed_floating (val, type, memval, memtype);
143 write_memory (sp + argoffset, val, len);
144 }
145 argoffset += 8;
146 }
147 }
148 else if (len == 8 && (TYPE_CODE (type) == TYPE_CODE_INT /* long long */
149 || (!ppc_floating_point_unit_p (current_gdbarch) && TYPE_CODE (type) == TYPE_CODE_FLT))) /* double */
150 {
151 /* "long long" or "double" passed in an odd/even
152 register pair with the low addressed word in the odd
153 register and the high addressed word in the even
154 register, or when the registers run out an 8 byte
155 aligned stack location. */
156 if (greg > 9)
157 {
158 /* Just in case GREG was 10. */
159 greg = 11;
160 argoffset = align_up (argoffset, 8);
161 if (write_pass)
162 write_memory (sp + argoffset, val, len);
163 argoffset += 8;
164 }
165 else if (tdep->wordsize == 8)
166 {
167 if (write_pass)
168 regcache_cooked_write (regcache,
169 tdep->ppc_gp0_regnum + greg, val);
170 greg += 1;
171 }
172 else
173 {
174 /* Must start on an odd register - r3/r4 etc. */
175 if ((greg & 1) == 0)
176 greg++;
177 if (write_pass)
178 {
179 regcache_cooked_write (regcache,
180 tdep->ppc_gp0_regnum + greg + 0,
181 val + 0);
182 regcache_cooked_write (regcache,
183 tdep->ppc_gp0_regnum + greg + 1,
184 val + 4);
185 }
186 greg += 2;
187 }
188 }
189 else if (len == 16
190 && TYPE_CODE (type) == TYPE_CODE_ARRAY
191 && TYPE_VECTOR (type) && tdep->ppc_vr0_regnum >= 0)
192 {
193 /* Vector parameter passed in an Altivec register, or
194 when that runs out, 16 byte aligned stack location. */
195 if (vreg <= 13)
196 {
197 if (write_pass)
198 regcache_cooked_write (current_regcache,
199 tdep->ppc_vr0_regnum + vreg, val);
200 vreg++;
201 }
202 else
203 {
204 argoffset = align_up (argoffset, 16);
205 if (write_pass)
206 write_memory (sp + argoffset, val, 16);
207 argoffset += 16;
208 }
209 }
210 else if (len == 8
211 && TYPE_CODE (type) == TYPE_CODE_ARRAY
212 && TYPE_VECTOR (type) && tdep->ppc_ev0_regnum >= 0)
213 {
214 /* Vector parameter passed in an e500 register, or when
215 that runs out, 8 byte aligned stack location. Note
216 that since e500 vector and general purpose registers
217 both map onto the same underlying register set, a
218 "greg" and not a "vreg" is consumed here. A cooked
219 write stores the value in the correct locations
220 within the raw register cache. */
221 if (greg <= 10)
222 {
223 if (write_pass)
224 regcache_cooked_write (current_regcache,
225 tdep->ppc_ev0_regnum + greg, val);
226 greg++;
227 }
228 else
229 {
230 argoffset = align_up (argoffset, 8);
231 if (write_pass)
232 write_memory (sp + argoffset, val, 8);
233 argoffset += 8;
234 }
235 }
236 else
237 {
238 /* Reduce the parameter down to something that fits in a
239 "word". */
240 char word[MAX_REGISTER_SIZE];
241 memset (word, 0, MAX_REGISTER_SIZE);
242 if (len > tdep->wordsize
243 || TYPE_CODE (type) == TYPE_CODE_STRUCT
244 || TYPE_CODE (type) == TYPE_CODE_UNION)
245 {
246 /* Structs and large values are put on an 8 byte
247 aligned stack ... */
248 structoffset = align_up (structoffset, 8);
249 if (write_pass)
250 write_memory (sp + structoffset, val, len);
251 /* ... and then a "word" pointing to that address is
252 passed as the parameter. */
253 store_unsigned_integer (word, tdep->wordsize,
254 sp + structoffset);
255 structoffset += len;
256 }
257 else if (TYPE_CODE (type) == TYPE_CODE_INT)
258 /* Sign or zero extend the "int" into a "word". */
259 store_unsigned_integer (word, tdep->wordsize,
260 unpack_long (type, val));
261 else
262 /* Always goes in the low address. */
263 memcpy (word, val, len);
264 /* Store that "word" in a register, or on the stack.
265 The words have "4" byte alignment. */
266 if (greg <= 10)
267 {
268 if (write_pass)
269 regcache_cooked_write (regcache,
270 tdep->ppc_gp0_regnum + greg, word);
271 greg++;
272 }
273 else
274 {
275 argoffset = align_up (argoffset, tdep->wordsize);
276 if (write_pass)
277 write_memory (sp + argoffset, word, tdep->wordsize);
278 argoffset += tdep->wordsize;
279 }
280 }
281 }
282
283 /* Compute the actual stack space requirements. */
284 if (!write_pass)
285 {
286 /* Remember the amount of space needed by the arguments. */
287 argspace = argoffset;
288 /* Allocate space for both the arguments and the structures. */
289 sp -= (argoffset + structoffset);
290 /* Ensure that the stack is still 16 byte aligned. */
291 sp = align_down (sp, 16);
292 }
293 }
294
295 /* Update %sp. */
296 regcache_cooked_write_signed (regcache, SP_REGNUM, sp);
297
298 /* Write the backchain (it occupies WORDSIZED bytes). */
299 write_memory_signed_integer (sp, tdep->wordsize, saved_sp);
300
301 /* Point the inferior function call's return address at the dummy's
302 breakpoint. */
303 regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
304
305 return sp;
306 }
307
308 /* Potential ways that a function can return a value of a given type. */
309 enum return_value_convention
310 {
311 /* Where the return value has been squeezed into one or more
312 registers. */
313 RETURN_VALUE_REGISTER_CONVENTION,
314 /* Commonly known as the "struct return convention". The caller
315 passes an additional hidden first parameter to the caller. That
316 parameter contains the address at which the value being returned
317 should be stored. While typically, and historically, used for
318 large structs, this is convention is applied to values of many
319 different types. */
320 RETURN_VALUE_STRUCT_CONVENTION
321 };
322
323 /* Handle the return-value conventions specified by the SysV 32-bit
324 PowerPC ABI (including all the supplements):
325
326 no floating-point: floating-point values returned using 32-bit
327 general-purpose registers.
328
329 Altivec: 128-bit vectors returned using vector registers.
330
331 e500: 64-bit vectors returned using the full full 64 bit EV
332 register, floating-point values returned using 32-bit
333 general-purpose registers.
334
335 GCC (broken): Small struct values right (instead of left) aligned
336 when returned in general-purpose registers. */
337
338 static enum return_value_convention
339 do_ppc_sysv_return_value (struct type *type, struct regcache *regcache,
340 const void *inval, void *outval, int broken_gcc)
341 {
342 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
343 gdb_assert (tdep->wordsize == 4);
344 if (TYPE_CODE (type) == TYPE_CODE_FLT
345 && TYPE_LENGTH (type) <= 8
346 && ppc_floating_point_unit_p (current_gdbarch))
347 {
348 if (outval)
349 {
350 /* Floats and doubles stored in "f1". Convert the value to
351 the required type. */
352 char regval[MAX_REGISTER_SIZE];
353 struct type *regtype = register_type (current_gdbarch,
354 FP0_REGNUM + 1);
355 regcache_cooked_read (regcache, FP0_REGNUM + 1, regval);
356 convert_typed_floating (regval, regtype, outval, type);
357 }
358 if (inval)
359 {
360 /* Floats and doubles stored in "f1". Convert the value to
361 the register's "double" type. */
362 char regval[MAX_REGISTER_SIZE];
363 struct type *regtype = register_type (current_gdbarch, FP0_REGNUM);
364 convert_typed_floating (inval, type, regval, regtype);
365 regcache_cooked_write (regcache, FP0_REGNUM + 1, regval);
366 }
367 return RETURN_VALUE_REGISTER_CONVENTION;
368 }
369 if ((TYPE_CODE (type) == TYPE_CODE_INT && TYPE_LENGTH (type) == 8)
370 || (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) == 8))
371 {
372 if (outval)
373 {
374 /* A long long, or a double stored in the 32 bit r3/r4. */
375 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
376 (bfd_byte *) outval + 0);
377 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
378 (bfd_byte *) outval + 4);
379 }
380 if (inval)
381 {
382 /* A long long, or a double stored in the 32 bit r3/r4. */
383 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
384 (bfd_byte *) inval + 0);
385 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
386 (bfd_byte *) inval + 4);
387 }
388 return RETURN_VALUE_REGISTER_CONVENTION;
389 }
390 if (TYPE_CODE (type) == TYPE_CODE_INT
391 && TYPE_LENGTH (type) <= tdep->wordsize)
392 {
393 if (outval)
394 {
395 /* Some sort of integer stored in r3. Since TYPE isn't
396 bigger than the register, sign extension isn't a problem
397 - just do everything unsigned. */
398 ULONGEST regval;
399 regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
400 &regval);
401 store_unsigned_integer (outval, TYPE_LENGTH (type), regval);
402 }
403 if (inval)
404 {
405 /* Some sort of integer stored in r3. Use unpack_long since
406 that should handle any required sign extension. */
407 regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
408 unpack_long (type, inval));
409 }
410 return RETURN_VALUE_REGISTER_CONVENTION;
411 }
412 if (TYPE_LENGTH (type) == 16
413 && TYPE_CODE (type) == TYPE_CODE_ARRAY
414 && TYPE_VECTOR (type) && tdep->ppc_vr0_regnum >= 0)
415 {
416 if (outval)
417 {
418 /* Altivec places the return value in "v2". */
419 regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, outval);
420 }
421 if (inval)
422 {
423 /* Altivec places the return value in "v2". */
424 regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2, inval);
425 }
426 return RETURN_VALUE_REGISTER_CONVENTION;
427 }
428 if (TYPE_LENGTH (type) == 8
429 && TYPE_CODE (type) == TYPE_CODE_ARRAY
430 && TYPE_VECTOR (type) && tdep->ppc_ev0_regnum >= 0)
431 {
432 /* The e500 ABI places return values for the 64-bit DSP types
433 (__ev64_opaque__) in r3. However, in GDB-speak, ev3
434 corresponds to the entire r3 value for e500, whereas GDB's r3
435 only corresponds to the least significant 32-bits. So place
436 the 64-bit DSP type's value in ev3. */
437 if (outval)
438 regcache_cooked_read (regcache, tdep->ppc_ev0_regnum + 3, outval);
439 if (inval)
440 regcache_cooked_write (regcache, tdep->ppc_ev0_regnum + 3, inval);
441 return RETURN_VALUE_REGISTER_CONVENTION;
442 }
443 if (broken_gcc && TYPE_LENGTH (type) <= 8)
444 {
445 if (outval)
446 {
447 /* GCC screwed up. The last register isn't "left" aligned.
448 Need to extract the least significant part of each
449 register and then store that. */
450 /* Transfer any full words. */
451 int word = 0;
452 while (1)
453 {
454 ULONGEST reg;
455 int len = TYPE_LENGTH (type) - word * tdep->wordsize;
456 if (len <= 0)
457 break;
458 if (len > tdep->wordsize)
459 len = tdep->wordsize;
460 regcache_cooked_read_unsigned (regcache,
461 tdep->ppc_gp0_regnum + 3 + word,
462 &reg);
463 store_unsigned_integer (((bfd_byte *) outval
464 + word * tdep->wordsize), len, reg);
465 word++;
466 }
467 }
468 if (inval)
469 {
470 /* GCC screwed up. The last register isn't "left" aligned.
471 Need to extract the least significant part of each
472 register and then store that. */
473 /* Transfer any full words. */
474 int word = 0;
475 while (1)
476 {
477 ULONGEST reg;
478 int len = TYPE_LENGTH (type) - word * tdep->wordsize;
479 if (len <= 0)
480 break;
481 if (len > tdep->wordsize)
482 len = tdep->wordsize;
483 reg = extract_unsigned_integer (((bfd_byte *) inval
484 + word * tdep->wordsize), len);
485 regcache_cooked_write_unsigned (regcache,
486 tdep->ppc_gp0_regnum + 3 + word,
487 reg);
488 word++;
489 }
490 }
491 return RETURN_VALUE_REGISTER_CONVENTION;
492 }
493 if (TYPE_LENGTH (type) <= 8)
494 {
495 if (outval)
496 {
497 /* This matches SVr4 PPC, it does not match GCC. */
498 /* The value is right-padded to 8 bytes and then loaded, as
499 two "words", into r3/r4. */
500 char regvals[MAX_REGISTER_SIZE * 2];
501 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
502 regvals + 0 * tdep->wordsize);
503 if (TYPE_LENGTH (type) > tdep->wordsize)
504 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
505 regvals + 1 * tdep->wordsize);
506 memcpy (outval, regvals, TYPE_LENGTH (type));
507 }
508 if (inval)
509 {
510 /* This matches SVr4 PPC, it does not match GCC. */
511 /* The value is padded out to 8 bytes and then loaded, as
512 two "words" into r3/r4. */
513 char regvals[MAX_REGISTER_SIZE * 2];
514 memset (regvals, 0, sizeof regvals);
515 memcpy (regvals, inval, TYPE_LENGTH (type));
516 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
517 regvals + 0 * tdep->wordsize);
518 if (TYPE_LENGTH (type) > tdep->wordsize)
519 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
520 regvals + 1 * tdep->wordsize);
521 }
522 return RETURN_VALUE_REGISTER_CONVENTION;
523 }
524 return RETURN_VALUE_STRUCT_CONVENTION;
525 }
526
527 void
528 ppc_sysv_abi_extract_return_value (struct type *type,
529 struct regcache *regcache, void *valbuf)
530 {
531 do_ppc_sysv_return_value (type, regcache, NULL, valbuf, 0);
532 }
533
534 void
535 ppc_sysv_abi_broken_extract_return_value (struct type *type,
536 struct regcache *regcache,
537 void *valbuf)
538 {
539 do_ppc_sysv_return_value (type, regcache, NULL, valbuf, 1);
540 }
541
542 void
543 ppc_sysv_abi_store_return_value (struct type *type, struct regcache *regcache,
544 const void *valbuf)
545 {
546 do_ppc_sysv_return_value (type, regcache, valbuf, NULL, 0);
547 }
548
549 void
550 ppc_sysv_abi_broken_store_return_value (struct type *type,
551 struct regcache *regcache,
552 const void *valbuf)
553 {
554 do_ppc_sysv_return_value (type, regcache, valbuf, NULL, 1);
555 }
556
557 /* Structures 8 bytes or less long are returned in the r3 & r4
558 registers, according to the SYSV ABI. */
559 int
560 ppc_sysv_abi_use_struct_convention (int gcc_p, struct type *value_type)
561 {
562 return (do_ppc_sysv_return_value (value_type, NULL, NULL, NULL, 0)
563 == RETURN_VALUE_STRUCT_CONVENTION);
564 }
565
566 /* Pass the arguments in either registers, or in the stack. Using the
567 ppc 64 bit SysV ABI.
568
569 This implements a dumbed down version of the ABI. It always writes
570 values to memory, GPR and FPR, even when not necessary. Doing this
571 greatly simplifies the logic. */
572
573 CORE_ADDR
574 ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
575 struct regcache *regcache, CORE_ADDR bp_addr,
576 int nargs, struct value **args, CORE_ADDR sp,
577 int struct_return, CORE_ADDR struct_addr)
578 {
579 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
580 /* By this stage in the proceedings, SP has been decremented by "red
581 zone size" + "struct return size". Fetch the stack-pointer from
582 before this and use that as the BACK_CHAIN. */
583 const CORE_ADDR back_chain = read_sp ();
584 /* See for-loop comment below. */
585 int write_pass;
586 /* Size of the Altivec's vector parameter region, the final value is
587 computed in the for-loop below. */
588 LONGEST vparam_size = 0;
589 /* Size of the general parameter region, the final value is computed
590 in the for-loop below. */
591 LONGEST gparam_size = 0;
592 /* Kevin writes ... I don't mind seeing tdep->wordsize used in the
593 calls to align_up(), align_down(), etc. because this makes it
594 easier to reuse this code (in a copy/paste sense) in the future,
595 but it is a 64-bit ABI and asserting that the wordsize is 8 bytes
596 at some point makes it easier to verify that this function is
597 correct without having to do a non-local analysis to figure out
598 the possible values of tdep->wordsize. */
599 gdb_assert (tdep->wordsize == 8);
600
601 /* Go through the argument list twice.
602
603 Pass 1: Compute the function call's stack space and register
604 requirements.
605
606 Pass 2: Replay the same computation but this time also write the
607 values out to the target. */
608
609 for (write_pass = 0; write_pass < 2; write_pass++)
610 {
611 int argno;
612 /* Next available floating point register for float and double
613 arguments. */
614 int freg = 1;
615 /* Next available general register for non-vector (but possibly
616 float) arguments. */
617 int greg = 3;
618 /* Next available vector register for vector arguments. */
619 int vreg = 2;
620 /* The address, at which the next general purpose parameter
621 (integer, struct, float, ...) should be saved. */
622 CORE_ADDR gparam;
623 /* Address, at which the next Altivec vector parameter should be
624 saved. */
625 CORE_ADDR vparam;
626
627 if (!write_pass)
628 {
629 /* During the first pass, GPARAM and VPARAM are more like
630 offsets (start address zero) than addresses. That way
631 the accumulate the total stack space each region
632 requires. */
633 gparam = 0;
634 vparam = 0;
635 }
636 else
637 {
638 /* Decrement the stack pointer making space for the Altivec
639 and general on-stack parameters. Set vparam and gparam
640 to their corresponding regions. */
641 vparam = align_down (sp - vparam_size, 16);
642 gparam = align_down (vparam - gparam_size, 16);
643 /* Add in space for the TOC, link editor double word,
644 compiler double word, LR save area, CR save area. */
645 sp = align_down (gparam - 48, 16);
646 }
647
648 /* If the function is returning a `struct', then there is an
649 extra hidden parameter (which will be passed in r3)
650 containing the address of that struct.. In that case we
651 should advance one word and start from r4 register to copy
652 parameters. This also consumes one on-stack parameter slot. */
653 if (struct_return)
654 {
655 if (write_pass)
656 regcache_cooked_write_signed (regcache,
657 tdep->ppc_gp0_regnum + greg,
658 struct_addr);
659 greg++;
660 gparam = align_up (gparam + tdep->wordsize, tdep->wordsize);
661 }
662
663 for (argno = 0; argno < nargs; argno++)
664 {
665 struct value *arg = args[argno];
666 struct type *type = check_typedef (VALUE_TYPE (arg));
667 char *val = VALUE_CONTENTS (arg);
668 if (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) <= 8)
669 {
670 /* Floats and Doubles go in f1 .. f13. They also
671 consume a left aligned GREG,, and can end up in
672 memory. */
673 if (write_pass)
674 {
675 if (ppc_floating_point_unit_p (current_gdbarch)
676 && freg <= 13)
677 {
678 char regval[MAX_REGISTER_SIZE];
679 struct type *regtype = register_type (gdbarch,
680 FP0_REGNUM);
681 convert_typed_floating (val, type, regval, regtype);
682 regcache_cooked_write (regcache, FP0_REGNUM + freg,
683 regval);
684 }
685 if (greg <= 10)
686 {
687 /* The ABI states "Single precision floating
688 point values are mapped to the first word in
689 a single doubleword" and "... floating point
690 values mapped to the first eight doublewords
691 of the parameter save area are also passed in
692 general registers").
693
694 This code interprets that to mean: store it,
695 left aligned, in the general register. */
696 char regval[MAX_REGISTER_SIZE];
697 memset (regval, 0, sizeof regval);
698 memcpy (regval, val, TYPE_LENGTH (type));
699 regcache_cooked_write (regcache,
700 tdep->ppc_gp0_regnum + greg,
701 regval);
702 }
703 write_memory (gparam, val, TYPE_LENGTH (type));
704 }
705 /* Always consume parameter stack space. */
706 freg++;
707 greg++;
708 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
709 }
710 else if (TYPE_LENGTH (type) == 16 && TYPE_VECTOR (type)
711 && TYPE_CODE (type) == TYPE_CODE_ARRAY
712 && tdep->ppc_vr0_regnum >= 0)
713 {
714 /* In the Altivec ABI, vectors go in the vector
715 registers v2 .. v13, or when that runs out, a vector
716 annex which goes above all the normal parameters.
717 NOTE: cagney/2003-09-21: This is a guess based on the
718 PowerOpen Altivec ABI. */
719 if (vreg <= 13)
720 {
721 if (write_pass)
722 regcache_cooked_write (regcache,
723 tdep->ppc_vr0_regnum + vreg, val);
724 vreg++;
725 }
726 else
727 {
728 if (write_pass)
729 write_memory (vparam, val, TYPE_LENGTH (type));
730 vparam = align_up (vparam + TYPE_LENGTH (type), 16);
731 }
732 }
733 else if ((TYPE_CODE (type) == TYPE_CODE_INT
734 || TYPE_CODE (type) == TYPE_CODE_ENUM)
735 && TYPE_LENGTH (type) <= 8)
736 {
737 /* Scalars get sign[un]extended and go in gpr3 .. gpr10.
738 They can also end up in memory. */
739 if (write_pass)
740 {
741 /* Sign extend the value, then store it unsigned. */
742 ULONGEST word = unpack_long (type, val);
743 if (greg <= 10)
744 regcache_cooked_write_unsigned (regcache,
745 tdep->ppc_gp0_regnum +
746 greg, word);
747 write_memory_unsigned_integer (gparam, tdep->wordsize,
748 word);
749 }
750 greg++;
751 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
752 }
753 else
754 {
755 int byte;
756 for (byte = 0; byte < TYPE_LENGTH (type);
757 byte += tdep->wordsize)
758 {
759 if (write_pass && greg <= 10)
760 {
761 char regval[MAX_REGISTER_SIZE];
762 int len = TYPE_LENGTH (type) - byte;
763 if (len > tdep->wordsize)
764 len = tdep->wordsize;
765 memset (regval, 0, sizeof regval);
766 /* WARNING: cagney/2003-09-21: As best I can
767 tell, the ABI specifies that the value should
768 be left aligned. Unfortunately, GCC doesn't
769 do this - it instead right aligns even sized
770 values and puts odd sized values on the
771 stack. Work around that by putting both a
772 left and right aligned value into the
773 register (hopefully no one notices :-^).
774 Arrrgh! */
775 /* Left aligned (8 byte values such as pointers
776 fill the buffer). */
777 memcpy (regval, val + byte, len);
778 /* Right aligned (but only if even). */
779 if (len == 1 || len == 2 || len == 4)
780 memcpy (regval + tdep->wordsize - len,
781 val + byte, len);
782 regcache_cooked_write (regcache, greg, regval);
783 }
784 greg++;
785 }
786 if (write_pass)
787 /* WARNING: cagney/2003-09-21: Strictly speaking, this
788 isn't necessary, unfortunately, GCC appears to get
789 "struct convention" parameter passing wrong putting
790 odd sized structures in memory instead of in a
791 register. Work around this by always writing the
792 value to memory. Fortunately, doing this
793 simplifies the code. */
794 write_memory (gparam, val, TYPE_LENGTH (type));
795 /* Always consume parameter stack space. */
796 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
797 }
798 }
799
800 if (!write_pass)
801 {
802 /* Save the true region sizes ready for the second pass. */
803 vparam_size = vparam;
804 /* Make certain that the general parameter save area is at
805 least the minimum 8 registers (or doublewords) in size. */
806 if (greg < 8)
807 gparam_size = 8 * tdep->wordsize;
808 else
809 gparam_size = gparam;
810 }
811 }
812
813 /* Update %sp. */
814 regcache_cooked_write_signed (regcache, SP_REGNUM, sp);
815
816 /* Write the backchain (it occupies WORDSIZED bytes). */
817 write_memory_signed_integer (sp, tdep->wordsize, back_chain);
818
819 /* Point the inferior function call's return address at the dummy's
820 breakpoint. */
821 regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
822
823 /* Find a value for the TOC register. Every symbol should have both
824 ".FN" and "FN" in the minimal symbol table. "FN" points at the
825 FN's descriptor, while ".FN" points at the entry point (which
826 matches FUNC_ADDR). Need to reverse from FUNC_ADDR back to the
827 FN's descriptor address. */
828 {
829 /* Find the minimal symbol that corresponds to FUNC_ADDR (should
830 have the name ".FN"). */
831 struct minimal_symbol *dot_fn = lookup_minimal_symbol_by_pc (func_addr);
832 if (dot_fn != NULL && SYMBOL_LINKAGE_NAME (dot_fn)[0] == '.')
833 {
834 /* Now find the corresponding "FN" (dropping ".") minimal
835 symbol's address. */
836 struct minimal_symbol *fn =
837 lookup_minimal_symbol (SYMBOL_LINKAGE_NAME (dot_fn) + 1, NULL,
838 NULL);
839 if (fn != NULL)
840 {
841 /* Got the address of that descriptor. The TOC is the
842 second double word. */
843 CORE_ADDR toc =
844 read_memory_unsigned_integer (SYMBOL_VALUE_ADDRESS (fn) +
845 tdep->wordsize, tdep->wordsize);
846 regcache_cooked_write_unsigned (regcache,
847 tdep->ppc_gp0_regnum + 2, toc);
848 }
849 }
850 }
851
852 return sp;
853 }
854
855
856 /* The 64 bit ABI retun value convention.
857
858 Return non-zero if the return-value is stored in a register, return
859 0 if the return-value is instead stored on the stack (a.k.a.,
860 struct return convention).
861
862 For a return-value stored in a register: when INVAL is non-NULL,
863 copy the buffer to the corresponding register return-value location
864 location; when OUTVAL is non-NULL, fill the buffer from the
865 corresponding register return-value location. */
866 static enum return_value_convention
867 ppc64_sysv_abi_return_value (struct type *valtype, struct regcache *regcache,
868 const void *inval, void *outval)
869 {
870 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
871 /* Floats and doubles in F1. */
872 if (TYPE_CODE (valtype) == TYPE_CODE_FLT && TYPE_LENGTH (valtype) <= 8)
873 {
874 char regval[MAX_REGISTER_SIZE];
875 struct type *regtype = register_type (current_gdbarch, FP0_REGNUM);
876 if (inval != NULL)
877 {
878 convert_typed_floating (inval, valtype, regval, regtype);
879 regcache_cooked_write (regcache, FP0_REGNUM + 1, regval);
880 }
881 if (outval != NULL)
882 {
883 regcache_cooked_read (regcache, FP0_REGNUM + 1, regval);
884 convert_typed_floating (regval, regtype, outval, valtype);
885 }
886 return RETURN_VALUE_REGISTER_CONVENTION;
887 }
888 if (TYPE_CODE (valtype) == TYPE_CODE_INT && TYPE_LENGTH (valtype) <= 8)
889 {
890 /* Integers in r3. */
891 if (inval != NULL)
892 {
893 /* Be careful to sign extend the value. */
894 regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
895 unpack_long (valtype, inval));
896 }
897 if (outval != NULL)
898 {
899 /* Extract the integer from r3. Since this is truncating the
900 value, there isn't a sign extension problem. */
901 ULONGEST regval;
902 regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
903 &regval);
904 store_unsigned_integer (outval, TYPE_LENGTH (valtype), regval);
905 }
906 return RETURN_VALUE_REGISTER_CONVENTION;
907 }
908 /* All pointers live in r3. */
909 if (TYPE_CODE (valtype) == TYPE_CODE_PTR)
910 {
911 /* All pointers live in r3. */
912 if (inval != NULL)
913 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, inval);
914 if (outval != NULL)
915 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, outval);
916 return RETURN_VALUE_REGISTER_CONVENTION;
917 }
918 if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY
919 && TYPE_LENGTH (valtype) <= 8
920 && TYPE_CODE (TYPE_TARGET_TYPE (valtype)) == TYPE_CODE_INT
921 && TYPE_LENGTH (TYPE_TARGET_TYPE (valtype)) == 1)
922 {
923 /* Small character arrays are returned, right justified, in r3. */
924 int offset = (register_size (current_gdbarch, tdep->ppc_gp0_regnum + 3)
925 - TYPE_LENGTH (valtype));
926 if (inval != NULL)
927 regcache_cooked_write_part (regcache, tdep->ppc_gp0_regnum + 3,
928 offset, TYPE_LENGTH (valtype), inval);
929 if (outval != NULL)
930 regcache_cooked_read_part (regcache, tdep->ppc_gp0_regnum + 3,
931 offset, TYPE_LENGTH (valtype), outval);
932 return RETURN_VALUE_REGISTER_CONVENTION;
933 }
934 /* Big floating point values get stored in adjacent floating
935 point registers. */
936 if (TYPE_CODE (valtype) == TYPE_CODE_FLT
937 && (TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 32))
938 {
939 if (inval || outval != NULL)
940 {
941 int i;
942 for (i = 0; i < TYPE_LENGTH (valtype) / 8; i++)
943 {
944 if (inval != NULL)
945 regcache_cooked_write (regcache, FP0_REGNUM + 1 + i,
946 (const bfd_byte *) inval + i * 8);
947 if (outval != NULL)
948 regcache_cooked_read (regcache, FP0_REGNUM + 1 + i,
949 (bfd_byte *) outval + i * 8);
950 }
951 }
952 return RETURN_VALUE_REGISTER_CONVENTION;
953 }
954 /* Complex values get returned in f1:f2, need to convert. */
955 if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX
956 && (TYPE_LENGTH (valtype) == 8 || TYPE_LENGTH (valtype) == 16))
957 {
958 if (regcache != NULL)
959 {
960 int i;
961 for (i = 0; i < 2; i++)
962 {
963 char regval[MAX_REGISTER_SIZE];
964 struct type *regtype =
965 register_type (current_gdbarch, FP0_REGNUM);
966 if (inval != NULL)
967 {
968 convert_typed_floating ((const bfd_byte *) inval +
969 i * (TYPE_LENGTH (valtype) / 2),
970 valtype, regval, regtype);
971 regcache_cooked_write (regcache, FP0_REGNUM + 1 + i,
972 regval);
973 }
974 if (outval != NULL)
975 {
976 regcache_cooked_read (regcache, FP0_REGNUM + 1 + i, regval);
977 convert_typed_floating (regval, regtype,
978 (bfd_byte *) outval +
979 i * (TYPE_LENGTH (valtype) / 2),
980 valtype);
981 }
982 }
983 }
984 return RETURN_VALUE_REGISTER_CONVENTION;
985 }
986 /* Big complex values get stored in f1:f4. */
987 if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX && TYPE_LENGTH (valtype) == 32)
988 {
989 if (regcache != NULL)
990 {
991 int i;
992 for (i = 0; i < 4; i++)
993 {
994 if (inval != NULL)
995 regcache_cooked_write (regcache, FP0_REGNUM + 1 + i,
996 (const bfd_byte *) inval + i * 8);
997 if (outval != NULL)
998 regcache_cooked_read (regcache, FP0_REGNUM + 1 + i,
999 (bfd_byte *) outval + i * 8);
1000 }
1001 }
1002 return RETURN_VALUE_REGISTER_CONVENTION;
1003 }
1004 return RETURN_VALUE_STRUCT_CONVENTION;
1005 }
1006
1007 int
1008 ppc64_sysv_abi_use_struct_convention (int gcc_p, struct type *value_type)
1009 {
1010 return (ppc64_sysv_abi_return_value (value_type, NULL, NULL, NULL)
1011 == RETURN_VALUE_STRUCT_CONVENTION);
1012 }
1013
1014 void
1015 ppc64_sysv_abi_extract_return_value (struct type *valtype,
1016 struct regcache *regbuf, void *valbuf)
1017 {
1018 if (ppc64_sysv_abi_return_value (valtype, regbuf, NULL, valbuf)
1019 != RETURN_VALUE_REGISTER_CONVENTION)
1020 error ("Function return value unknown");
1021 }
1022
1023 void
1024 ppc64_sysv_abi_store_return_value (struct type *valtype,
1025 struct regcache *regbuf,
1026 const void *valbuf)
1027 {
1028 if (!ppc64_sysv_abi_return_value (valtype, regbuf, valbuf, NULL))
1029 error ("Function return value location unknown");
1030 }
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