bfd/
[deliverable/binutils-gdb.git] / gdb / ppc-tdep.h
1 /* Target-dependent code for GDB, the GNU debugger.
2
3 Copyright (C) 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008
4 Free Software Foundation, Inc.
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20
21 #ifndef PPC_TDEP_H
22 #define PPC_TDEP_H
23
24 struct gdbarch;
25 struct frame_info;
26 struct value;
27 struct regcache;
28 struct type;
29
30 /* From ppc-sysv-tdep.c ... */
31 enum return_value_convention ppc_sysv_abi_return_value (struct gdbarch *gdbarch,
32 struct type *func_type,
33 struct type *valtype,
34 struct regcache *regcache,
35 gdb_byte *readbuf,
36 const gdb_byte *writebuf);
37 enum return_value_convention ppc_sysv_abi_broken_return_value (struct gdbarch *gdbarch,
38 struct type *func_type,
39 struct type *valtype,
40 struct regcache *regcache,
41 gdb_byte *readbuf,
42 const gdb_byte *writebuf);
43 CORE_ADDR ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch,
44 struct value *function,
45 struct regcache *regcache,
46 CORE_ADDR bp_addr, int nargs,
47 struct value **args, CORE_ADDR sp,
48 int struct_return,
49 CORE_ADDR struct_addr);
50 CORE_ADDR ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch,
51 struct value *function,
52 struct regcache *regcache,
53 CORE_ADDR bp_addr, int nargs,
54 struct value **args, CORE_ADDR sp,
55 int struct_return,
56 CORE_ADDR struct_addr);
57 enum return_value_convention ppc64_sysv_abi_return_value (struct gdbarch *gdbarch,
58 struct type *func_type,
59 struct type *valtype,
60 struct regcache *regcache,
61 gdb_byte *readbuf,
62 const gdb_byte *writebuf);
63
64 /* From rs6000-tdep.c... */
65 int altivec_register_p (struct gdbarch *gdbarch, int regno);
66 int spe_register_p (struct gdbarch *gdbarch, int regno);
67
68 /* Return non-zero if the architecture described by GDBARCH has
69 floating-point registers (f0 --- f31 and fpscr). */
70 int ppc_floating_point_unit_p (struct gdbarch *gdbarch);
71
72 /* Return non-zero if the architecture described by GDBARCH has
73 Altivec registers (vr0 --- vr31, vrsave and vscr). */
74 int ppc_altivec_support_p (struct gdbarch *gdbarch);
75
76 int ppc_deal_with_atomic_sequence (struct frame_info *frame);
77
78
79 /* Register set description. */
80
81 struct ppc_reg_offsets
82 {
83 /* General-purpose registers. */
84 int r0_offset;
85 int gpr_size; /* size for r0-31, pc, ps, lr, ctr. */
86 int xr_size; /* size for cr, xer, mq. */
87 int pc_offset;
88 int ps_offset;
89 int cr_offset;
90 int lr_offset;
91 int ctr_offset;
92 int xer_offset;
93 int mq_offset;
94
95 /* Floating-point registers. */
96 int f0_offset;
97 int fpscr_offset;
98 int fpscr_size;
99
100 /* AltiVec registers. */
101 int vr0_offset;
102 int vscr_offset;
103 int vrsave_offset;
104 };
105
106 extern void ppc_supply_reg (struct regcache *regcache, int regnum,
107 const gdb_byte *regs, size_t offset, int regsize);
108
109 extern void ppc_collect_reg (const struct regcache *regcache, int regnum,
110 gdb_byte *regs, size_t offset, int regsize);
111
112 /* Supply register REGNUM in the general-purpose register set REGSET
113 from the buffer specified by GREGS and LEN to register cache
114 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
115
116 extern void ppc_supply_gregset (const struct regset *regset,
117 struct regcache *regcache,
118 int regnum, const void *gregs, size_t len);
119
120 /* Supply register REGNUM in the floating-point register set REGSET
121 from the buffer specified by FPREGS and LEN to register cache
122 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
123
124 extern void ppc_supply_fpregset (const struct regset *regset,
125 struct regcache *regcache,
126 int regnum, const void *fpregs, size_t len);
127
128 /* Supply register REGNUM in the Altivec register set REGSET
129 from the buffer specified by VRREGS and LEN to register cache
130 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
131
132 extern void ppc_supply_vrregset (const struct regset *regset,
133 struct regcache *regcache,
134 int regnum, const void *vrregs, size_t len);
135
136 /* Collect register REGNUM in the general-purpose register set
137 REGSET. from register cache REGCACHE into the buffer specified by
138 GREGS and LEN. If REGNUM is -1, do this for all registers in
139 REGSET. */
140
141 extern void ppc_collect_gregset (const struct regset *regset,
142 const struct regcache *regcache,
143 int regnum, void *gregs, size_t len);
144
145 /* Collect register REGNUM in the floating-point register set
146 REGSET. from register cache REGCACHE into the buffer specified by
147 FPREGS and LEN. If REGNUM is -1, do this for all registers in
148 REGSET. */
149
150 extern void ppc_collect_fpregset (const struct regset *regset,
151 const struct regcache *regcache,
152 int regnum, void *fpregs, size_t len);
153
154 /* Collect register REGNUM in the Altivec register set
155 REGSET from register cache REGCACHE into the buffer specified by
156 VRREGS and LEN. If REGNUM is -1, do this for all registers in
157 REGSET. */
158
159 extern void ppc_collect_vrregset (const struct regset *regset,
160 const struct regcache *regcache,
161 int regnum, void *vrregs, size_t len);
162
163 /* Private data that this module attaches to struct gdbarch. */
164
165 /* Vector ABI used by the inferior. */
166 enum powerpc_vector_abi
167 {
168 POWERPC_VEC_AUTO,
169 POWERPC_VEC_GENERIC,
170 POWERPC_VEC_ALTIVEC,
171 POWERPC_VEC_SPE,
172 POWERPC_VEC_LAST
173 };
174
175 struct gdbarch_tdep
176 {
177 int wordsize; /* Size in bytes of fixed-point word. */
178 int soft_float; /* Avoid FP registers for arguments? */
179
180 /* How to pass vector arguments. Never set to AUTO or LAST. */
181 enum powerpc_vector_abi vector_abi;
182
183 int ppc_gp0_regnum; /* GPR register 0 */
184 int ppc_toc_regnum; /* TOC register */
185 int ppc_ps_regnum; /* Processor (or machine) status (%msr) */
186 int ppc_cr_regnum; /* Condition register */
187 int ppc_lr_regnum; /* Link register */
188 int ppc_ctr_regnum; /* Count register */
189 int ppc_xer_regnum; /* Integer exception register */
190
191 /* Not all PPC and RS6000 variants will have the registers
192 represented below. A -1 is used to indicate that the register
193 is not present in this variant. */
194
195 /* Floating-point registers. */
196 int ppc_fp0_regnum; /* floating-point register 0 */
197 int ppc_fpscr_regnum; /* fp status and condition register */
198
199 /* Multiplier-Quotient Register (older POWER architectures only). */
200 int ppc_mq_regnum;
201
202 /* Altivec registers. */
203 int ppc_vr0_regnum; /* First AltiVec register */
204 int ppc_vrsave_regnum; /* Last AltiVec register */
205
206 /* SPE registers. */
207 int ppc_ev0_upper_regnum; /* First GPR upper half register */
208 int ppc_ev0_regnum; /* First ev register */
209 int ppc_acc_regnum; /* SPE 'acc' register */
210 int ppc_spefscr_regnum; /* SPE 'spefscr' register */
211
212 /* Decimal 128 registers. */
213 int ppc_dl0_regnum; /* First Decimal128 argument register pair. */
214
215 /* Offset to ABI specific location where link register is saved. */
216 int lr_frame_offset;
217
218 /* An array of integers, such that sim_regno[I] is the simulator
219 register number for GDB register number I, or -1 if the
220 simulator does not implement that register. */
221 int *sim_regno;
222
223 /* ISA-specific types. */
224 struct type *ppc_builtin_type_vec64;
225 };
226
227
228 /* Constants for register set sizes. */
229 enum
230 {
231 ppc_num_gprs = 32, /* 32 general-purpose registers */
232 ppc_num_fprs = 32, /* 32 floating-point registers */
233 ppc_num_srs = 16, /* 16 segment registers */
234 ppc_num_vrs = 32 /* 32 Altivec vector registers */
235 };
236
237
238 /* Register number constants. These are GDB internal register
239 numbers; they are not used for the simulator or remote targets.
240 Extra SPRs (those other than MQ, CTR, LR, XER, SPEFSCR) are given
241 numbers above PPC_NUM_REGS. So are segment registers and other
242 target-defined registers. */
243 enum {
244 PPC_R0_REGNUM = 0,
245 PPC_F0_REGNUM = 32,
246 PPC_PC_REGNUM = 64,
247 PPC_MSR_REGNUM = 65,
248 PPC_CR_REGNUM = 66,
249 PPC_LR_REGNUM = 67,
250 PPC_CTR_REGNUM = 68,
251 PPC_XER_REGNUM = 69,
252 PPC_FPSCR_REGNUM = 70,
253 PPC_MQ_REGNUM = 71,
254 PPC_SPE_UPPER_GP0_REGNUM = 72,
255 PPC_SPE_ACC_REGNUM = 104,
256 PPC_SPE_FSCR_REGNUM = 105,
257 PPC_VR0_REGNUM = 106,
258 PPC_VSCR_REGNUM = 138,
259 PPC_VRSAVE_REGNUM = 139,
260 PPC_NUM_REGS
261 };
262
263
264 /* Instruction size. */
265 #define PPC_INSN_SIZE 4
266
267 /* Estimate for the maximum number of instrctions in a function epilogue. */
268 #define PPC_MAX_EPILOGUE_INSTRUCTIONS 52
269
270 #endif /* ppc-tdep.h */
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