1 /* Target-dependent code for GDB, the GNU debugger.
3 Copyright (C) 2000-2018 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
29 /* From ppc-sysv-tdep.c ... */
30 enum return_value_convention
ppc_sysv_abi_return_value (struct gdbarch
*gdbarch
,
31 struct value
*function
,
33 struct regcache
*regcache
,
35 const gdb_byte
*writebuf
);
36 enum return_value_convention
ppc_sysv_abi_broken_return_value (struct gdbarch
*gdbarch
,
37 struct value
*function
,
39 struct regcache
*regcache
,
41 const gdb_byte
*writebuf
);
42 CORE_ADDR
ppc_sysv_abi_push_dummy_call (struct gdbarch
*gdbarch
,
43 struct value
*function
,
44 struct regcache
*regcache
,
45 CORE_ADDR bp_addr
, int nargs
,
46 struct value
**args
, CORE_ADDR sp
,
48 CORE_ADDR struct_addr
);
49 CORE_ADDR
ppc64_sysv_abi_push_dummy_call (struct gdbarch
*gdbarch
,
50 struct value
*function
,
51 struct regcache
*regcache
,
52 CORE_ADDR bp_addr
, int nargs
,
53 struct value
**args
, CORE_ADDR sp
,
55 CORE_ADDR struct_addr
);
56 enum return_value_convention
ppc64_sysv_abi_return_value (struct gdbarch
*gdbarch
,
57 struct value
*function
,
59 struct regcache
*regcache
,
61 const gdb_byte
*writebuf
);
63 /* From rs6000-tdep.c... */
64 int altivec_register_p (struct gdbarch
*gdbarch
, int regno
);
65 int vsx_register_p (struct gdbarch
*gdbarch
, int regno
);
66 int spe_register_p (struct gdbarch
*gdbarch
, int regno
);
68 /* Return non-zero if the architecture described by GDBARCH has
69 floating-point registers (f0 --- f31 and fpscr). */
70 int ppc_floating_point_unit_p (struct gdbarch
*gdbarch
);
72 /* Return non-zero if the architecture described by GDBARCH has
73 Altivec registers (vr0 --- vr31, vrsave and vscr). */
74 int ppc_altivec_support_p (struct gdbarch
*gdbarch
);
76 /* Return non-zero if the architecture described by GDBARCH has
77 VSX registers (vsr0 --- vsr63). */
78 int vsx_support_p (struct gdbarch
*gdbarch
);
79 std::vector
<CORE_ADDR
> ppc_deal_with_atomic_sequence
80 (struct regcache
*regcache
);
83 /* Register set description. */
85 struct ppc_reg_offsets
87 /* General-purpose registers. */
89 int gpr_size
; /* size for r0-31, pc, ps, lr, ctr. */
90 int xr_size
; /* size for cr, xer, mq. */
99 /* Floating-point registers. */
105 extern void ppc_supply_reg (struct regcache
*regcache
, int regnum
,
106 const gdb_byte
*regs
, size_t offset
, int regsize
);
108 extern void ppc_collect_reg (const struct regcache
*regcache
, int regnum
,
109 gdb_byte
*regs
, size_t offset
, int regsize
);
111 /* Supply register REGNUM in the general-purpose register set REGSET
112 from the buffer specified by GREGS and LEN to register cache
113 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
115 extern void ppc_supply_gregset (const struct regset
*regset
,
116 struct regcache
*regcache
,
117 int regnum
, const void *gregs
, size_t len
);
119 /* Supply register REGNUM in the floating-point register set REGSET
120 from the buffer specified by FPREGS and LEN to register cache
121 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
123 extern void ppc_supply_fpregset (const struct regset
*regset
,
124 struct regcache
*regcache
,
125 int regnum
, const void *fpregs
, size_t len
);
127 /* Supply register REGNUM in the Altivec register set REGSET
128 from the buffer specified by VRREGS and LEN to register cache
129 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
131 extern void ppc_supply_vrregset (const struct regset
*regset
,
132 struct regcache
*regcache
,
133 int regnum
, const void *vrregs
, size_t len
);
135 /* Supply register REGNUM in the VSX register set REGSET
136 from the buffer specified by VSXREGS and LEN to register cache
137 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
139 extern void ppc_supply_vsxregset (const struct regset
*regset
,
140 struct regcache
*regcache
,
141 int regnum
, const void *vsxregs
, size_t len
);
143 /* Collect register REGNUM in the general-purpose register set
144 REGSET, from register cache REGCACHE into the buffer specified by
145 GREGS and LEN. If REGNUM is -1, do this for all registers in
148 extern void ppc_collect_gregset (const struct regset
*regset
,
149 const struct regcache
*regcache
,
150 int regnum
, void *gregs
, size_t len
);
152 /* Collect register REGNUM in the floating-point register set
153 REGSET, from register cache REGCACHE into the buffer specified by
154 FPREGS and LEN. If REGNUM is -1, do this for all registers in
157 extern void ppc_collect_fpregset (const struct regset
*regset
,
158 const struct regcache
*regcache
,
159 int regnum
, void *fpregs
, size_t len
);
161 /* Collect register REGNUM in the Altivec register set
162 REGSET from register cache REGCACHE into the buffer specified by
163 VRREGS and LEN. If REGNUM is -1, do this for all registers in
166 extern void ppc_collect_vrregset (const struct regset
*regset
,
167 const struct regcache
*regcache
,
168 int regnum
, void *vrregs
, size_t len
);
170 /* Collect register REGNUM in the VSX register set
171 REGSET from register cache REGCACHE into the buffer specified by
172 VSXREGS and LEN. If REGNUM is -1, do this for all registers in
175 extern void ppc_collect_vsxregset (const struct regset
*regset
,
176 const struct regcache
*regcache
,
177 int regnum
, void *vsxregs
, size_t len
);
179 /* Private data that this module attaches to struct gdbarch. */
181 /* ELF ABI version used by the inferior. */
190 /* Vector ABI used by the inferior. */
191 enum powerpc_vector_abi
200 /* long double ABI version used by the inferior. */
201 enum powerpc_long_double_abi
203 POWERPC_LONG_DOUBLE_AUTO
,
204 POWERPC_LONG_DOUBLE_IBM128
,
205 POWERPC_LONG_DOUBLE_IEEE128
,
206 POWERPC_LONG_DOUBLE_LAST
211 int wordsize
; /* Size in bytes of fixed-point word. */
212 int soft_float
; /* Avoid FP registers for arguments? */
214 enum powerpc_elf_abi elf_abi
; /* ELF ABI version. */
216 /* Format to use for the "long double" data type. */
217 enum powerpc_long_double_abi long_double_abi
;
219 /* How to pass vector arguments. Never set to AUTO or LAST. */
220 enum powerpc_vector_abi vector_abi
;
222 int ppc_gp0_regnum
; /* GPR register 0 */
223 int ppc_toc_regnum
; /* TOC register */
224 int ppc_ps_regnum
; /* Processor (or machine) status (%msr) */
225 int ppc_cr_regnum
; /* Condition register */
226 int ppc_lr_regnum
; /* Link register */
227 int ppc_ctr_regnum
; /* Count register */
228 int ppc_xer_regnum
; /* Integer exception register */
230 /* Not all PPC and RS6000 variants will have the registers
231 represented below. A -1 is used to indicate that the register
232 is not present in this variant. */
234 /* Floating-point registers. */
235 int ppc_fp0_regnum
; /* Floating-point register 0. */
236 int ppc_fpscr_regnum
; /* fp status and condition register. */
238 /* Multiplier-Quotient Register (older POWER architectures only). */
241 /* POWER7 VSX registers. */
242 int ppc_vsr0_regnum
; /* First VSX register. */
243 int ppc_vsr0_upper_regnum
; /* First right most dword vsx register. */
244 int ppc_efpr0_regnum
; /* First Extended FP register. */
246 /* Altivec registers. */
247 int ppc_vr0_regnum
; /* First AltiVec register. */
248 int ppc_vrsave_regnum
; /* Last AltiVec register. */
251 int ppc_ev0_upper_regnum
; /* First GPR upper half register. */
252 int ppc_ev0_regnum
; /* First ev register. */
253 int ppc_acc_regnum
; /* SPE 'acc' register. */
254 int ppc_spefscr_regnum
; /* SPE 'spefscr' register. */
256 /* Program Priority Register. */
259 /* Data Stream Control Register. */
262 /* Target Address Register. */
265 /* Decimal 128 registers. */
266 int ppc_dl0_regnum
; /* First Decimal128 argument register pair. */
268 /* Offset to ABI specific location where link register is saved. */
271 /* An array of integers, such that sim_regno[I] is the simulator
272 register number for GDB register number I, or -1 if the
273 simulator does not implement that register. */
276 /* ISA-specific types. */
277 struct type
*ppc_builtin_type_vec64
;
278 struct type
*ppc_builtin_type_vec128
;
280 int (*ppc_syscall_record
) (struct regcache
*regcache
);
284 /* Constants for register set sizes. */
287 ppc_num_gprs
= 32, /* 32 general-purpose registers. */
288 ppc_num_fprs
= 32, /* 32 floating-point registers. */
289 ppc_num_srs
= 16, /* 16 segment registers. */
290 ppc_num_vrs
= 32, /* 32 Altivec vector registers. */
291 ppc_num_vshrs
= 32, /* 32 doublewords (dword 1 of vs0~vs31). */
292 ppc_num_vsrs
= 64, /* 64 VSX vector registers. */
293 ppc_num_efprs
= 32 /* 32 Extended FP registers. */
297 /* Register number constants. These are GDB internal register
298 numbers; they are not used for the simulator or remote targets.
299 Extra SPRs (those other than MQ, CTR, LR, XER, SPEFSCR) are given
300 numbers above PPC_NUM_REGS. So are segment registers and other
301 target-defined registers. */
311 PPC_FPSCR_REGNUM
= 70,
313 PPC_SPE_UPPER_GP0_REGNUM
= 72,
314 PPC_SPE_ACC_REGNUM
= 104,
315 PPC_SPE_FSCR_REGNUM
= 105,
316 PPC_VR0_REGNUM
= 106,
317 PPC_VSCR_REGNUM
= 138,
318 PPC_VRSAVE_REGNUM
= 139,
319 PPC_VSR0_UPPER_REGNUM
= 140,
320 PPC_VSR31_UPPER_REGNUM
= 171,
321 PPC_PPR_REGNUM
= 172,
322 PPC_DSCR_REGNUM
= 173,
323 PPC_TAR_REGNUM
= 174,
327 /* Big enough to hold the size of the largest register in bytes. */
328 #define PPC_MAX_REGISTER_SIZE 64
330 /* An instruction to match. */
332 struct ppc_insn_pattern
334 unsigned int mask
; /* mask the insn with this... */
335 unsigned int data
; /* ...and see if it matches this. */
336 int optional
; /* If non-zero, this insn may be absent. */
339 extern int ppc_insns_match_pattern (struct frame_info
*frame
, CORE_ADDR pc
,
340 const struct ppc_insn_pattern
*pattern
,
341 unsigned int *insns
);
342 extern CORE_ADDR
ppc_insn_d_field (unsigned int insn
);
344 extern CORE_ADDR
ppc_insn_ds_field (unsigned int insn
);
346 extern int ppc_process_record (struct gdbarch
*gdbarch
,
347 struct regcache
*regcache
, CORE_ADDR addr
);
349 /* Instruction size. */
350 #define PPC_INSN_SIZE 4
352 /* Estimate for the maximum number of instrctions in a function epilogue. */
353 #define PPC_MAX_EPILOGUE_INSTRUCTIONS 52
355 #endif /* ppc-tdep.h */