c1d4146b4899b5f3f68c0dccbeddcb656a7a613b
[deliverable/binutils-gdb.git] / gdb / ppcnbsd-tdep.c
1 /* Target-dependent code for PowerPC systems running NetBSD.
2
3 Copyright 2002, 2003, 2004 Free Software Foundation, Inc.
4
5 Contributed by Wasabi Systems, Inc.
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
23
24 #include "defs.h"
25 #include "gdbcore.h"
26 #include "regcache.h"
27 #include "target.h"
28 #include "breakpoint.h"
29 #include "value.h"
30 #include "osabi.h"
31
32 #include "ppc-tdep.h"
33 #include "ppcnbsd-tdep.h"
34 #include "nbsd-tdep.h"
35 #include "tramp-frame.h"
36 #include "trad-frame.h"
37
38 #include "solib-svr4.h"
39
40 #define REG_FIXREG_OFFSET(x) ((x) * 4)
41 #define REG_LR_OFFSET (32 * 4)
42 #define REG_CR_OFFSET (33 * 4)
43 #define REG_XER_OFFSET (34 * 4)
44 #define REG_CTR_OFFSET (35 * 4)
45 #define REG_PC_OFFSET (36 * 4)
46 #define SIZEOF_STRUCT_REG (37 * 4)
47
48 #define FPREG_FPR_OFFSET(x) ((x) * 8)
49 #define FPREG_FPSCR_OFFSET (32 * 8)
50 #define SIZEOF_STRUCT_FPREG (33 * 8)
51
52 void
53 ppcnbsd_supply_reg (char *regs, int regno)
54 {
55 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
56 int i;
57
58 for (i = 0; i <= 31; i++)
59 {
60 if (regno == i || regno == -1)
61 supply_register (i, regs + REG_FIXREG_OFFSET (i));
62 }
63
64 if (regno == tdep->ppc_lr_regnum || regno == -1)
65 supply_register (tdep->ppc_lr_regnum, regs + REG_LR_OFFSET);
66
67 if (regno == tdep->ppc_cr_regnum || regno == -1)
68 supply_register (tdep->ppc_cr_regnum, regs + REG_CR_OFFSET);
69
70 if (regno == tdep->ppc_xer_regnum || regno == -1)
71 supply_register (tdep->ppc_xer_regnum, regs + REG_XER_OFFSET);
72
73 if (regno == tdep->ppc_ctr_regnum || regno == -1)
74 supply_register (tdep->ppc_ctr_regnum, regs + REG_CTR_OFFSET);
75
76 if (regno == PC_REGNUM || regno == -1)
77 supply_register (PC_REGNUM, regs + REG_PC_OFFSET);
78 }
79
80 void
81 ppcnbsd_fill_reg (char *regs, int regno)
82 {
83 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
84 int i;
85
86 for (i = 0; i <= 31; i++)
87 {
88 if (regno == i || regno == -1)
89 regcache_collect (i, regs + REG_FIXREG_OFFSET (i));
90 }
91
92 if (regno == tdep->ppc_lr_regnum || regno == -1)
93 regcache_collect (tdep->ppc_lr_regnum, regs + REG_LR_OFFSET);
94
95 if (regno == tdep->ppc_cr_regnum || regno == -1)
96 regcache_collect (tdep->ppc_cr_regnum, regs + REG_CR_OFFSET);
97
98 if (regno == tdep->ppc_xer_regnum || regno == -1)
99 regcache_collect (tdep->ppc_xer_regnum, regs + REG_XER_OFFSET);
100
101 if (regno == tdep->ppc_ctr_regnum || regno == -1)
102 regcache_collect (tdep->ppc_ctr_regnum, regs + REG_CTR_OFFSET);
103
104 if (regno == PC_REGNUM || regno == -1)
105 regcache_collect (PC_REGNUM, regs + REG_PC_OFFSET);
106 }
107
108 void
109 ppcnbsd_supply_fpreg (char *fpregs, int regno)
110 {
111 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
112 int i;
113
114 /* FIXME: jimb/2004-05-05: Some PPC variants don't have
115 floating-point registers. For such variants,
116 tdep->ppc_fp0_regnum and tdep->ppc_fpscr_regnum will be -1. I
117 don't think NetBSD runs on any of those chips, but we can at
118 least make sure that if someone tries it, they'll get a proper
119 notification. */
120 gdb_assert (ppc_floating_point_unit_p (current_gdbarch));
121
122 for (i = 0; i < ppc_num_fprs; i++)
123 {
124 if (regno == tdep->ppc_fp0_regnum + i || regno == -1)
125 supply_register (tdep->ppc_fp0_regnum + i,
126 fpregs + FPREG_FPR_OFFSET (i));
127 }
128
129 if (regno == tdep->ppc_fpscr_regnum || regno == -1)
130 supply_register (tdep->ppc_fpscr_regnum, fpregs + FPREG_FPSCR_OFFSET);
131 }
132
133 void
134 ppcnbsd_fill_fpreg (char *fpregs, int regno)
135 {
136 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
137 int i;
138
139 /* FIXME: jimb/2004-05-05: Some PPC variants don't have
140 floating-point registers. For such variants,
141 tdep->ppc_fp0_regnum and tdep->ppc_fpscr_regnum will be -1. I
142 don't think NetBSD runs on any of those chips, but we can at
143 least make sure that if someone tries it, they'll get a proper
144 notification. */
145 gdb_assert (ppc_floating_point_unit_p (current_gdbarch));
146
147 for (i = 0; i < ppc_num_fprs; i++)
148 {
149 if (regno == tdep->ppc_fp0_regnum + i || regno == -1)
150 regcache_collect (tdep->ppc_fp0_regnum + i,
151 fpregs + FPREG_FPR_OFFSET (i));
152 }
153
154 if (regno == tdep->ppc_fpscr_regnum || regno == -1)
155 regcache_collect (tdep->ppc_fpscr_regnum, fpregs + FPREG_FPSCR_OFFSET);
156 }
157
158 static void
159 fetch_core_registers (char *core_reg_sect, unsigned core_reg_size, int which,
160 CORE_ADDR ignore)
161 {
162 char *regs, *fpregs;
163
164 /* We get everything from one section. */
165 if (which != 0)
166 return;
167
168 regs = core_reg_sect;
169 fpregs = core_reg_sect + SIZEOF_STRUCT_REG;
170
171 /* Integer registers. */
172 ppcnbsd_supply_reg (regs, -1);
173
174 /* Floating point registers. */
175 ppcnbsd_supply_fpreg (fpregs, -1);
176 }
177
178 static void
179 fetch_elfcore_registers (char *core_reg_sect, unsigned core_reg_size, int which,
180 CORE_ADDR ignore)
181 {
182 switch (which)
183 {
184 case 0: /* Integer registers. */
185 if (core_reg_size != SIZEOF_STRUCT_REG)
186 warning ("Wrong size register set in core file.");
187 else
188 ppcnbsd_supply_reg (core_reg_sect, -1);
189 break;
190
191 case 2: /* Floating point registers. */
192 if (core_reg_size != SIZEOF_STRUCT_FPREG)
193 warning ("Wrong size FP register set in core file.");
194 else
195 ppcnbsd_supply_fpreg (core_reg_sect, -1);
196 break;
197
198 default:
199 /* Don't know what kind of register request this is; just ignore it. */
200 break;
201 }
202 }
203
204 static struct core_fns ppcnbsd_core_fns =
205 {
206 bfd_target_unknown_flavour, /* core_flavour */
207 default_check_format, /* check_format */
208 default_core_sniffer, /* core_sniffer */
209 fetch_core_registers, /* core_read_registers */
210 NULL /* next */
211 };
212
213 static struct core_fns ppcnbsd_elfcore_fns =
214 {
215 bfd_target_elf_flavour, /* core_flavour */
216 default_check_format, /* check_format */
217 default_core_sniffer, /* core_sniffer */
218 fetch_elfcore_registers, /* core_read_registers */
219 NULL /* next */
220 };
221
222 /* NetBSD is confused. It appears that 1.5 was using the correct SVr4
223 convention but, 1.6 switched to the below broken convention. For
224 the moment use the broken convention. Ulgh!. */
225
226 static enum return_value_convention
227 ppcnbsd_return_value (struct gdbarch *gdbarch, struct type *valtype,
228 struct regcache *regcache, void *readbuf,
229 const void *writebuf)
230 {
231 if ((TYPE_CODE (valtype) == TYPE_CODE_STRUCT
232 || TYPE_CODE (valtype) == TYPE_CODE_UNION)
233 && !((TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 8)
234 && TYPE_VECTOR (valtype))
235 && !(TYPE_LENGTH (valtype) == 1
236 || TYPE_LENGTH (valtype) == 2
237 || TYPE_LENGTH (valtype) == 4
238 || TYPE_LENGTH (valtype) == 8))
239 return RETURN_VALUE_STRUCT_CONVENTION;
240 else
241 return ppc_sysv_abi_broken_return_value (gdbarch, valtype, regcache,
242 readbuf, writebuf);
243 }
244
245 static void
246 ppcnbsd_sigtramp_cache_init (const struct tramp_frame *self,
247 struct frame_info *next_frame,
248 struct trad_frame_cache *this_cache,
249 CORE_ADDR func)
250 {
251 CORE_ADDR base;
252 CORE_ADDR offset;
253 int i;
254 struct gdbarch *gdbarch = get_frame_arch (next_frame);
255 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
256
257 base = frame_unwind_register_unsigned (next_frame, SP_REGNUM);
258 offset = base + 0x18 + 2 * tdep->wordsize;
259 for (i = 0; i < 32; i++)
260 {
261 int regnum = i + tdep->ppc_gp0_regnum;
262 trad_frame_set_reg_addr (this_cache, regnum, offset);
263 offset += tdep->wordsize;
264 }
265 trad_frame_set_reg_addr (this_cache, tdep->ppc_lr_regnum, offset);
266 offset += tdep->wordsize;
267 trad_frame_set_reg_addr (this_cache, tdep->ppc_cr_regnum, offset);
268 offset += tdep->wordsize;
269 trad_frame_set_reg_addr (this_cache, tdep->ppc_xer_regnum, offset);
270 offset += tdep->wordsize;
271 trad_frame_set_reg_addr (this_cache, tdep->ppc_ctr_regnum, offset);
272 offset += tdep->wordsize;
273 trad_frame_set_reg_addr (this_cache, PC_REGNUM, offset); /* SRR0? */
274 offset += tdep->wordsize;
275
276 /* Construct the frame ID using the function start. */
277 trad_frame_set_id (this_cache, frame_id_build (base, func));
278 }
279
280 /* Given the NEXT frame, examine the instructions at and around this
281 frame's resume address (aka PC) to see of they look like a signal
282 trampoline. Return the address of the trampolines first
283 instruction, or zero if it isn't a signal trampoline. */
284
285 static const struct tramp_frame ppcnbsd_sigtramp = {
286 4, /* insn size */
287 { /* insn */
288 0x38610018, /* addi r3,r1,24 */
289 0x38000127, /* li r0,295 */
290 0x44000002, /* sc */
291 0x38000001, /* li r0,1 */
292 0x44000002, /* sc */
293 TRAMP_SENTINEL_INSN
294 },
295 ppcnbsd_sigtramp_cache_init
296 };
297
298 static void
299 ppcnbsd_init_abi (struct gdbarch_info info,
300 struct gdbarch *gdbarch)
301 {
302 /* For NetBSD, this is an on again, off again thing. Some systems
303 do use the broken struct convention, and some don't. */
304 set_gdbarch_return_value (gdbarch, ppcnbsd_return_value);
305 set_solib_svr4_fetch_link_map_offsets (gdbarch,
306 nbsd_ilp32_solib_svr4_fetch_link_map_offsets);
307 tramp_frame_prepend_unwinder (gdbarch, &ppcnbsd_sigtramp);
308 }
309
310 void
311 _initialize_ppcnbsd_tdep (void)
312 {
313 gdbarch_register_osabi (bfd_arch_powerpc, 0, GDB_OSABI_NETBSD_ELF,
314 ppcnbsd_init_abi);
315
316 deprecated_add_core_fns (&ppcnbsd_core_fns);
317 deprecated_add_core_fns (&ppcnbsd_elfcore_fns);
318 }
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