1 /* Target-dependent code for OpenBSD/powerpc.
3 Copyright (C) 2004, 2005, 2006 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street, Fifth Floor,
20 Boston, MA 02110-1301, USA. */
23 #include "arch-utils.h"
24 #include "floatformat.h"
26 #include "frame-unwind.h"
31 #include "trad-frame.h"
33 #include "gdb_assert.h"
34 #include "gdb_string.h"
37 #include "ppcobsd-tdep.h"
38 #include "solib-svr4.h"
40 /* Register offsets from <machine/reg.h>. */
41 struct ppc_reg_offsets ppcobsd_reg_offsets
;
42 struct ppc_reg_offsets ppcobsd_fpreg_offsets
;
45 /* Core file support. */
47 /* Supply register REGNUM in the general-purpose register set REGSET
48 from the buffer specified by GREGS and LEN to register cache
49 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
52 ppcobsd_supply_gregset (const struct regset
*regset
,
53 struct regcache
*regcache
, int regnum
,
54 const void *gregs
, size_t len
)
56 /* FIXME: jimb/2004-05-05: Some PPC variants don't have floating
57 point registers. Traditionally, GDB's register set has still
58 listed the floating point registers for such machines, so this
59 code is harmless. However, the new E500 port actually omits the
60 floating point registers entirely from the register set --- they
61 don't even have register numbers assigned to them.
63 It's not clear to me how best to update this code, so this assert
64 will alert the first person to encounter the OpenBSD/E500
65 combination to the problem. */
66 gdb_assert (ppc_floating_point_unit_p (current_gdbarch
));
68 ppc_supply_gregset (regset
, regcache
, regnum
, gregs
, len
);
69 ppc_supply_fpregset (regset
, regcache
, regnum
, gregs
, len
);
72 /* Collect register REGNUM in the general-purpose register set
73 REGSET. from register cache REGCACHE into the buffer specified by
74 GREGS and LEN. If REGNUM is -1, do this for all registers in
78 ppcobsd_collect_gregset (const struct regset
*regset
,
79 const struct regcache
*regcache
, int regnum
,
80 void *gregs
, size_t len
)
82 /* FIXME: jimb/2004-05-05: Some PPC variants don't have floating
83 point registers. Traditionally, GDB's register set has still
84 listed the floating point registers for such machines, so this
85 code is harmless. However, the new E500 port actually omits the
86 floating point registers entirely from the register set --- they
87 don't even have register numbers assigned to them.
89 It's not clear to me how best to update this code, so this assert
90 will alert the first person to encounter the OpenBSD/E500
91 combination to the problem. */
92 gdb_assert (ppc_floating_point_unit_p (current_gdbarch
));
94 ppc_collect_gregset (regset
, regcache
, regnum
, gregs
, len
);
95 ppc_collect_fpregset (regset
, regcache
, regnum
, gregs
, len
);
98 /* OpenBSD/powerpc register set. */
100 struct regset ppcobsd_gregset
=
102 &ppcobsd_reg_offsets
,
103 ppcobsd_supply_gregset
106 struct regset ppcobsd_fpregset
=
108 &ppcobsd_fpreg_offsets
,
112 /* Return the appropriate register set for the core section identified
113 by SECT_NAME and SECT_SIZE. */
115 static const struct regset
*
116 ppcobsd_regset_from_core_section (struct gdbarch
*gdbarch
,
117 const char *sect_name
, size_t sect_size
)
119 if (strcmp (sect_name
, ".reg") == 0 && sect_size
>= 412)
120 return &ppcobsd_gregset
;
126 /* Signal trampolines. */
128 /* Since OpenBSD 3.2, the sigtramp routine is mapped at a random page
129 in virtual memory. The randomness makes it somewhat tricky to
130 detect it, but fortunately we can rely on the fact that the start
131 of the sigtramp routine is page-aligned. We recognize the
132 trampoline by looking for the code that invokes the sigreturn
133 system call. The offset where we can find that code varies from
136 By the way, the mapping mentioned above is read-only, so you cannot
137 place a breakpoint in the signal trampoline. */
139 /* Default page size. */
140 static const int ppcobsd_page_size
= 4096;
142 /* Offset for sigreturn(2). */
143 static const int ppcobsd_sigreturn_offset
[] = {
144 0x98, /* OpenBSD 3.8 */
145 0x0c, /* OpenBSD 3.2 */
150 ppcobsd_sigtramp_p (struct frame_info
*next_frame
)
152 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
153 CORE_ADDR start_pc
= (pc
& ~(ppcobsd_page_size
- 1));
157 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
161 for (offset
= ppcobsd_sigreturn_offset
; *offset
!= -1; offset
++)
163 gdb_byte buf
[2 * PPC_INSN_SIZE
];
166 if (!safe_frame_unwind_memory (next_frame
, start_pc
+ *offset
,
170 /* Check for "li r0,SYS_sigreturn". */
171 insn
= extract_unsigned_integer (buf
, PPC_INSN_SIZE
);
172 if (insn
!= 0x38000067)
175 /* Check for "sc". */
176 insn
= extract_unsigned_integer (buf
+ PPC_INSN_SIZE
, PPC_INSN_SIZE
);
177 if (insn
!= 0x44000002)
186 static struct trad_frame_cache
*
187 ppcobsd_sigtramp_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
189 struct gdbarch
*gdbarch
= get_frame_arch (next_frame
);
190 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
191 struct trad_frame_cache
*cache
;
192 CORE_ADDR addr
, base
, func
;
193 gdb_byte buf
[PPC_INSN_SIZE
];
194 unsigned long insn
, sigcontext_offset
;
200 cache
= trad_frame_cache_zalloc (next_frame
);
203 func
= frame_pc_unwind (next_frame
);
204 func
&= ~(ppcobsd_page_size
- 1);
205 if (!safe_frame_unwind_memory (next_frame
, func
, buf
, sizeof buf
))
208 /* Calculate the offset where we can find `struct sigcontext'. We
209 base our calculation on the amount of stack space reserved by the
210 first instruction of the signal trampoline. */
211 insn
= extract_unsigned_integer (buf
, PPC_INSN_SIZE
);
212 sigcontext_offset
= (0x10000 - (insn
& 0x0000ffff)) + 8;
214 base
= frame_unwind_register_unsigned (next_frame
, SP_REGNUM
);
215 addr
= base
+ sigcontext_offset
+ 2 * tdep
->wordsize
;
216 for (i
= 0; i
< ppc_num_gprs
; i
++, addr
+= tdep
->wordsize
)
218 int regnum
= i
+ tdep
->ppc_gp0_regnum
;
219 trad_frame_set_reg_addr (cache
, regnum
, addr
);
221 trad_frame_set_reg_addr (cache
, tdep
->ppc_lr_regnum
, addr
);
222 addr
+= tdep
->wordsize
;
223 trad_frame_set_reg_addr (cache
, tdep
->ppc_cr_regnum
, addr
);
224 addr
+= tdep
->wordsize
;
225 trad_frame_set_reg_addr (cache
, tdep
->ppc_xer_regnum
, addr
);
226 addr
+= tdep
->wordsize
;
227 trad_frame_set_reg_addr (cache
, tdep
->ppc_ctr_regnum
, addr
);
228 addr
+= tdep
->wordsize
;
229 trad_frame_set_reg_addr (cache
, PC_REGNUM
, addr
); /* SRR0? */
230 addr
+= tdep
->wordsize
;
232 /* Construct the frame ID using the function start. */
233 trad_frame_set_id (cache
, frame_id_build (base
, func
));
239 ppcobsd_sigtramp_frame_this_id (struct frame_info
*next_frame
,
240 void **this_cache
, struct frame_id
*this_id
)
242 struct trad_frame_cache
*cache
=
243 ppcobsd_sigtramp_frame_cache (next_frame
, this_cache
);
245 trad_frame_get_id (cache
, this_id
);
249 ppcobsd_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
250 void **this_cache
, int regnum
,
251 int *optimizedp
, enum lval_type
*lvalp
,
252 CORE_ADDR
*addrp
, int *realnump
,
255 struct trad_frame_cache
*cache
=
256 ppcobsd_sigtramp_frame_cache (next_frame
, this_cache
);
258 trad_frame_get_register (cache
, next_frame
, regnum
,
259 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
262 static const struct frame_unwind ppcobsd_sigtramp_frame_unwind
= {
264 ppcobsd_sigtramp_frame_this_id
,
265 ppcobsd_sigtramp_frame_prev_register
268 static const struct frame_unwind
*
269 ppcobsd_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
271 if (ppcobsd_sigtramp_p (next_frame
))
272 return &ppcobsd_sigtramp_frame_unwind
;
279 ppcobsd_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
281 /* OpenBSD doesn't support the 128-bit `long double' from the psABI. */
282 set_gdbarch_long_double_bit (gdbarch
, 64);
283 set_gdbarch_long_double_format (gdbarch
, &floatformat_ieee_double_big
);
285 /* OpenBSD currently uses a broken GCC. */
286 set_gdbarch_return_value (gdbarch
, ppc_sysv_abi_broken_return_value
);
288 /* OpenBSD uses SVR4-style shared libraries. */
289 set_solib_svr4_fetch_link_map_offsets
290 (gdbarch
, svr4_ilp32_fetch_link_map_offsets
);
292 set_gdbarch_regset_from_core_section
293 (gdbarch
, ppcobsd_regset_from_core_section
);
295 frame_unwind_append_sniffer (gdbarch
, ppcobsd_sigtramp_frame_sniffer
);
299 /* OpenBSD uses uses the traditional NetBSD core file format, even for
300 ports that use ELF. */
301 #define GDB_OSABI_NETBSD_CORE GDB_OSABI_OPENBSD_ELF
303 static enum gdb_osabi
304 ppcobsd_core_osabi_sniffer (bfd
*abfd
)
306 if (strcmp (bfd_get_target (abfd
), "netbsd-core") == 0)
307 return GDB_OSABI_NETBSD_CORE
;
309 return GDB_OSABI_UNKNOWN
;
313 /* Provide a prototype to silence -Wmissing-prototypes. */
314 void _initialize_ppcobsd_tdep (void);
317 _initialize_ppcobsd_tdep (void)
319 /* BFD doesn't set a flavour for NetBSD style a.out core files. */
320 gdbarch_register_osabi_sniffer (bfd_arch_powerpc
, bfd_target_unknown_flavour
,
321 ppcobsd_core_osabi_sniffer
);
323 gdbarch_register_osabi (bfd_arch_rs6000
, 0, GDB_OSABI_OPENBSD_ELF
,
325 gdbarch_register_osabi (bfd_arch_powerpc
, 0, GDB_OSABI_OPENBSD_ELF
,
328 /* Avoid initializing the register offsets again if they were
329 already initailized by ppcobsd-nat.c. */
330 if (ppcobsd_reg_offsets
.pc_offset
== 0)
332 /* General-purpose registers. */
333 ppcobsd_reg_offsets
.r0_offset
= 0;
334 ppcobsd_reg_offsets
.pc_offset
= 384;
335 ppcobsd_reg_offsets
.ps_offset
= 388;
336 ppcobsd_reg_offsets
.cr_offset
= 392;
337 ppcobsd_reg_offsets
.lr_offset
= 396;
338 ppcobsd_reg_offsets
.ctr_offset
= 400;
339 ppcobsd_reg_offsets
.xer_offset
= 404;
340 ppcobsd_reg_offsets
.mq_offset
= 408;
342 /* Floating-point registers. */
343 ppcobsd_reg_offsets
.f0_offset
= 128;
344 ppcobsd_reg_offsets
.fpscr_offset
= -1;
346 /* AltiVec registers. */
347 ppcobsd_reg_offsets
.vr0_offset
= 0;
348 ppcobsd_reg_offsets
.vscr_offset
= 512;
349 ppcobsd_reg_offsets
.vrsave_offset
= 520;
352 if (ppcobsd_fpreg_offsets
.fpscr_offset
== 0)
354 /* Floating-point registers. */
355 ppcobsd_reg_offsets
.f0_offset
= 0;
356 ppcobsd_reg_offsets
.fpscr_offset
= 256;