* alpha-tdep.c (alpha_register_name): New function.
[deliverable/binutils-gdb.git] / gdb / regcache.c
1 /* Cache and manage the values of registers for GDB, the GNU debugger.
2 Copyright 1986, 1987, 1989, 1991, 1994, 1995, 1996, 1998, 2000, 2001
3 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22 #include "defs.h"
23 #include "inferior.h"
24 #include "target.h"
25 #include "gdbarch.h"
26 #include "gdbcmd.h"
27 #include "regcache.h"
28 #include "gdb_assert.h"
29
30 /*
31 * DATA STRUCTURE
32 *
33 * Here is the actual register cache.
34 */
35
36 /* NOTE: this is a write-through cache. There is no "dirty" bit for
37 recording if the register values have been changed (eg. by the
38 user). Therefore all registers must be written back to the
39 target when appropriate. */
40
41 /* REGISTERS contains the cached register values (in target byte order). */
42
43 char *registers;
44
45 /* REGISTER_VALID is 0 if the register needs to be fetched,
46 1 if it has been fetched, and
47 -1 if the register value was not available.
48 "Not available" means don't try to fetch it again. */
49
50 signed char *register_valid;
51
52 /* The thread/process associated with the current set of registers. */
53
54 static ptid_t registers_ptid;
55
56 /*
57 * FUNCTIONS:
58 */
59
60 /* REGISTER_CACHED()
61
62 Returns 0 if the value is not in the cache (needs fetch).
63 >0 if the value is in the cache.
64 <0 if the value is permanently unavailable (don't ask again). */
65
66 int
67 register_cached (int regnum)
68 {
69 return register_valid[regnum];
70 }
71
72 /* Record that REGNUM's value is cached if STATE is >0, uncached but
73 fetchable if STATE is 0, and uncached and unfetchable if STATE is <0. */
74
75 void
76 set_register_cached (int regnum, int state)
77 {
78 register_valid[regnum] = state;
79 }
80
81 /* REGISTER_CHANGED
82
83 invalidate a single register REGNUM in the cache */
84 void
85 register_changed (int regnum)
86 {
87 set_register_cached (regnum, 0);
88 }
89
90 /* If REGNUM >= 0, return a pointer to register REGNUM's cache buffer area,
91 else return a pointer to the start of the cache buffer. */
92
93 static char *
94 register_buffer (int regnum)
95 {
96 gdb_assert (regnum >= 0 && regnum < (NUM_REGS + NUM_PSEUDO_REGS));
97 return &registers[REGISTER_BYTE (regnum)];
98 }
99
100 /* Return whether register REGNUM is a real register. */
101
102 static int
103 real_register (int regnum)
104 {
105 return regnum >= 0 && regnum < NUM_REGS;
106 }
107
108 /* Return whether register REGNUM is a pseudo register. */
109
110 static int
111 pseudo_register (int regnum)
112 {
113 return regnum >= NUM_REGS && regnum < NUM_REGS + NUM_PSEUDO_REGS;
114 }
115
116 /* Fetch register REGNUM into the cache. */
117
118 static void
119 fetch_register (int regnum)
120 {
121 /* NOTE: cagney/2001-12-04: Legacy targets were using fetch/store
122 pseudo-register as a way of handling registers that needed to be
123 constructed from one or more raw registers. New targets instead
124 use gdbarch register read/write. */
125 if (FETCH_PSEUDO_REGISTER_P ()
126 && pseudo_register (regnum))
127 FETCH_PSEUDO_REGISTER (regnum);
128 target_fetch_registers (regnum);
129 }
130
131 /* Write register REGNUM cached value to the target. */
132
133 static void
134 store_register (int regnum)
135 {
136 /* NOTE: cagney/2001-12-04: Legacy targets were using fetch/store
137 pseudo-register as a way of handling registers that needed to be
138 constructed from one or more raw registers. New targets instead
139 use gdbarch register read/write. */
140 if (STORE_PSEUDO_REGISTER_P ()
141 && pseudo_register (regnum))
142 STORE_PSEUDO_REGISTER (regnum);
143 target_store_registers (regnum);
144 }
145
146 /* Low level examining and depositing of registers.
147
148 The caller is responsible for making sure that the inferior is
149 stopped before calling the fetching routines, or it will get
150 garbage. (a change from GDB version 3, in which the caller got the
151 value from the last stop). */
152
153 /* REGISTERS_CHANGED ()
154
155 Indicate that registers may have changed, so invalidate the cache. */
156
157 void
158 registers_changed (void)
159 {
160 int i;
161
162 registers_ptid = pid_to_ptid (-1);
163
164 /* Force cleanup of any alloca areas if using C alloca instead of
165 a builtin alloca. This particular call is used to clean up
166 areas allocated by low level target code which may build up
167 during lengthy interactions between gdb and the target before
168 gdb gives control to the user (ie watchpoints). */
169 alloca (0);
170
171 for (i = 0; i < NUM_REGS + NUM_PSEUDO_REGS; i++)
172 set_register_cached (i, 0);
173
174 if (registers_changed_hook)
175 registers_changed_hook ();
176 }
177
178 /* REGISTERS_FETCHED ()
179
180 Indicate that all registers have been fetched, so mark them all valid. */
181
182 /* NOTE: cagney/2001-12-04: This function does not set valid on the
183 pseudo-register range since pseudo registers are always supplied
184 using supply_register(). */
185 /* FIXME: cagney/2001-12-04: This function is DEPRECATED. The target
186 code was blatting the registers[] array and then calling this.
187 Since targets should only be using supply_register() the need for
188 this function/hack is eliminated. */
189
190 void
191 registers_fetched (void)
192 {
193 int i;
194
195 for (i = 0; i < NUM_REGS; i++)
196 set_register_cached (i, 1);
197 /* Do not assume that the pseudo-regs have also been fetched.
198 Fetching all real regs NEVER accounts for pseudo-regs. */
199 }
200
201 /* read_register_bytes and write_register_bytes are generally a *BAD*
202 idea. They are inefficient because they need to check for partial
203 updates, which can only be done by scanning through all of the
204 registers and seeing if the bytes that are being read/written fall
205 inside of an invalid register. [The main reason this is necessary
206 is that register sizes can vary, so a simple index won't suffice.]
207 It is far better to call read_register_gen and write_register_gen
208 if you want to get at the raw register contents, as it only takes a
209 regnum as an argument, and therefore can't do a partial register
210 update.
211
212 Prior to the recent fixes to check for partial updates, both read
213 and write_register_bytes always checked to see if any registers
214 were stale, and then called target_fetch_registers (-1) to update
215 the whole set. This caused really slowed things down for remote
216 targets. */
217
218 /* Copy INLEN bytes of consecutive data from registers
219 starting with the INREGBYTE'th byte of register data
220 into memory at MYADDR. */
221
222 void
223 read_register_bytes (int in_start, char *in_buf, int in_len)
224 {
225 int in_end = in_start + in_len;
226 int regnum;
227 char *reg_buf = alloca (MAX_REGISTER_RAW_SIZE);
228
229 /* See if we are trying to read bytes from out-of-date registers. If so,
230 update just those registers. */
231
232 for (regnum = 0; regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++)
233 {
234 int reg_start;
235 int reg_end;
236 int reg_len;
237 int start;
238 int end;
239 int byte;
240
241 reg_start = REGISTER_BYTE (regnum);
242 reg_len = REGISTER_RAW_SIZE (regnum);
243 reg_end = reg_start + reg_len;
244
245 if (reg_end <= in_start || in_end <= reg_start)
246 /* The range the user wants to read doesn't overlap with regnum. */
247 continue;
248
249 if (REGISTER_NAME (regnum) != NULL && *REGISTER_NAME (regnum) != '\0')
250 /* Force the cache to fetch the entire register. */
251 read_register_gen (regnum, reg_buf);
252 else
253 /* Legacy note: even though this register is ``invalid'' we
254 still need to return something. It would appear that some
255 code relies on apparent gaps in the register array also
256 being returned. */
257 /* FIXME: cagney/2001-08-18: This is just silly. It defeats
258 the entire register read/write flow of control. Must
259 resist temptation to return 0xdeadbeef. */
260 memcpy (reg_buf, registers + reg_start, reg_len);
261
262 /* Legacy note: This function, for some reason, allows a NULL
263 input buffer. If the buffer is NULL, the registers are still
264 fetched, just the final transfer is skipped. */
265 if (in_buf == NULL)
266 continue;
267
268 /* start = max (reg_start, in_start) */
269 if (reg_start > in_start)
270 start = reg_start;
271 else
272 start = in_start;
273
274 /* end = min (reg_end, in_end) */
275 if (reg_end < in_end)
276 end = reg_end;
277 else
278 end = in_end;
279
280 /* Transfer just the bytes common to both IN_BUF and REG_BUF */
281 for (byte = start; byte < end; byte++)
282 {
283 in_buf[byte - in_start] = reg_buf[byte - reg_start];
284 }
285 }
286 }
287
288 /* Read register REGNUM into memory at MYADDR, which must be large
289 enough for REGISTER_RAW_BYTES (REGNUM). Target byte-order. If the
290 register is known to be the size of a CORE_ADDR or smaller,
291 read_register can be used instead. */
292
293 static void
294 legacy_read_register_gen (int regnum, char *myaddr)
295 {
296 gdb_assert (regnum >= 0 && regnum < (NUM_REGS + NUM_PSEUDO_REGS));
297 if (! ptid_equal (registers_ptid, inferior_ptid))
298 {
299 registers_changed ();
300 registers_ptid = inferior_ptid;
301 }
302
303 if (!register_cached (regnum))
304 fetch_register (regnum);
305
306 memcpy (myaddr, register_buffer (regnum),
307 REGISTER_RAW_SIZE (regnum));
308 }
309
310 void
311 regcache_read (int rawnum, char *buf)
312 {
313 gdb_assert (rawnum >= 0 && rawnum < NUM_REGS);
314 /* For moment, just use underlying legacy code. Ulgh!!! */
315 legacy_read_register_gen (rawnum, buf);
316 }
317
318 void
319 read_register_gen (int regnum, char *buf)
320 {
321 if (! gdbarch_register_read_p (current_gdbarch))
322 {
323 legacy_read_register_gen (regnum, buf);
324 return;
325 }
326 gdbarch_register_read (current_gdbarch, regnum, buf);
327 }
328
329
330 /* Write register REGNUM at MYADDR to the target. MYADDR points at
331 REGISTER_RAW_BYTES(REGNUM), which must be in target byte-order. */
332
333 static void
334 legacy_write_register_gen (int regnum, char *myaddr)
335 {
336 int size;
337 gdb_assert (regnum >= 0 && regnum < (NUM_REGS + NUM_PSEUDO_REGS));
338
339 /* On the sparc, writing %g0 is a no-op, so we don't even want to
340 change the registers array if something writes to this register. */
341 if (CANNOT_STORE_REGISTER (regnum))
342 return;
343
344 if (! ptid_equal (registers_ptid, inferior_ptid))
345 {
346 registers_changed ();
347 registers_ptid = inferior_ptid;
348 }
349
350 size = REGISTER_RAW_SIZE (regnum);
351
352 if (real_register (regnum))
353 {
354 /* If we have a valid copy of the register, and new value == old
355 value, then don't bother doing the actual store. */
356 if (register_cached (regnum)
357 && memcmp (register_buffer (regnum), myaddr, size) == 0)
358 return;
359 else
360 target_prepare_to_store ();
361 }
362
363 memcpy (register_buffer (regnum), myaddr, size);
364
365 set_register_cached (regnum, 1);
366 store_register (regnum);
367 }
368
369 void
370 regcache_write (int rawnum, char *buf)
371 {
372 gdb_assert (rawnum >= 0 && rawnum < NUM_REGS);
373 /* For moment, just use underlying legacy code. Ulgh!!! */
374 legacy_write_register_gen (rawnum, buf);
375 }
376
377 void
378 write_register_gen (int regnum, char *buf)
379 {
380 if (! gdbarch_register_write_p (current_gdbarch))
381 {
382 legacy_write_register_gen (regnum, buf);
383 return;
384 }
385 gdbarch_register_write (current_gdbarch, regnum, buf);
386 }
387
388 /* Copy INLEN bytes of consecutive data from memory at MYADDR
389 into registers starting with the MYREGSTART'th byte of register data. */
390
391 void
392 write_register_bytes (int myregstart, char *myaddr, int inlen)
393 {
394 int myregend = myregstart + inlen;
395 int regnum;
396
397 target_prepare_to_store ();
398
399 /* Scan through the registers updating any that are covered by the
400 range myregstart<=>myregend using write_register_gen, which does
401 nice things like handling threads, and avoiding updates when the
402 new and old contents are the same. */
403
404 for (regnum = 0; regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++)
405 {
406 int regstart, regend;
407
408 regstart = REGISTER_BYTE (regnum);
409 regend = regstart + REGISTER_RAW_SIZE (regnum);
410
411 /* Is this register completely outside the range the user is writing? */
412 if (myregend <= regstart || regend <= myregstart)
413 /* do nothing */ ;
414
415 /* Is this register completely within the range the user is writing? */
416 else if (myregstart <= regstart && regend <= myregend)
417 write_register_gen (regnum, myaddr + (regstart - myregstart));
418
419 /* The register partially overlaps the range being written. */
420 else
421 {
422 char *regbuf = (char*) alloca (MAX_REGISTER_RAW_SIZE);
423 /* What's the overlap between this register's bytes and
424 those the caller wants to write? */
425 int overlapstart = max (regstart, myregstart);
426 int overlapend = min (regend, myregend);
427
428 /* We may be doing a partial update of an invalid register.
429 Update it from the target before scribbling on it. */
430 read_register_gen (regnum, regbuf);
431
432 memcpy (registers + overlapstart,
433 myaddr + (overlapstart - myregstart),
434 overlapend - overlapstart);
435
436 store_register (regnum);
437 }
438 }
439 }
440
441
442 /* Return the contents of register REGNUM as an unsigned integer. */
443
444 ULONGEST
445 read_register (int regnum)
446 {
447 char *buf = alloca (REGISTER_RAW_SIZE (regnum));
448 read_register_gen (regnum, buf);
449 return (extract_unsigned_integer (buf, REGISTER_RAW_SIZE (regnum)));
450 }
451
452 ULONGEST
453 read_register_pid (int regnum, ptid_t ptid)
454 {
455 ptid_t save_ptid;
456 int save_pid;
457 CORE_ADDR retval;
458
459 if (ptid_equal (ptid, inferior_ptid))
460 return read_register (regnum);
461
462 save_ptid = inferior_ptid;
463
464 inferior_ptid = ptid;
465
466 retval = read_register (regnum);
467
468 inferior_ptid = save_ptid;
469
470 return retval;
471 }
472
473 /* Return the contents of register REGNUM as a signed integer. */
474
475 LONGEST
476 read_signed_register (int regnum)
477 {
478 void *buf = alloca (REGISTER_RAW_SIZE (regnum));
479 read_register_gen (regnum, buf);
480 return (extract_signed_integer (buf, REGISTER_RAW_SIZE (regnum)));
481 }
482
483 LONGEST
484 read_signed_register_pid (int regnum, ptid_t ptid)
485 {
486 ptid_t save_ptid;
487 LONGEST retval;
488
489 if (ptid_equal (ptid, inferior_ptid))
490 return read_signed_register (regnum);
491
492 save_ptid = inferior_ptid;
493
494 inferior_ptid = ptid;
495
496 retval = read_signed_register (regnum);
497
498 inferior_ptid = save_ptid;
499
500 return retval;
501 }
502
503 /* Store VALUE into the raw contents of register number REGNUM. */
504
505 void
506 write_register (int regnum, LONGEST val)
507 {
508 void *buf;
509 int size;
510 size = REGISTER_RAW_SIZE (regnum);
511 buf = alloca (size);
512 store_signed_integer (buf, size, (LONGEST) val);
513 write_register_gen (regnum, buf);
514 }
515
516 void
517 write_register_pid (int regnum, CORE_ADDR val, ptid_t ptid)
518 {
519 ptid_t save_ptid;
520
521 if (ptid_equal (ptid, inferior_ptid))
522 {
523 write_register (regnum, val);
524 return;
525 }
526
527 save_ptid = inferior_ptid;
528
529 inferior_ptid = ptid;
530
531 write_register (regnum, val);
532
533 inferior_ptid = save_ptid;
534 }
535
536 /* SUPPLY_REGISTER()
537
538 Record that register REGNUM contains VAL. This is used when the
539 value is obtained from the inferior or core dump, so there is no
540 need to store the value there.
541
542 If VAL is a NULL pointer, then it's probably an unsupported register.
543 We just set its value to all zeros. We might want to record this
544 fact, and report it to the users of read_register and friends. */
545
546 void
547 supply_register (int regnum, char *val)
548 {
549 #if 1
550 if (! ptid_equal (registers_ptid, inferior_ptid))
551 {
552 registers_changed ();
553 registers_ptid = inferior_ptid;
554 }
555 #endif
556
557 set_register_cached (regnum, 1);
558 if (val)
559 memcpy (register_buffer (regnum), val,
560 REGISTER_RAW_SIZE (regnum));
561 else
562 memset (register_buffer (regnum), '\000',
563 REGISTER_RAW_SIZE (regnum));
564
565 /* On some architectures, e.g. HPPA, there are a few stray bits in
566 some registers, that the rest of the code would like to ignore. */
567
568 /* NOTE: cagney/2001-03-16: The macro CLEAN_UP_REGISTER_VALUE is
569 going to be deprecated. Instead architectures will leave the raw
570 register value as is and instead clean things up as they pass
571 through the method gdbarch_register_read() clean up the
572 values. */
573
574 #ifdef DEPRECATED_CLEAN_UP_REGISTER_VALUE
575 DEPRECATED_CLEAN_UP_REGISTER_VALUE (regnum, register_buffer (regnum));
576 #endif
577 }
578
579 void
580 regcache_collect (int regnum, void *buf)
581 {
582 memcpy (buf, register_buffer (regnum), REGISTER_RAW_SIZE (regnum));
583 }
584
585
586 /* read_pc, write_pc, read_sp, write_sp, read_fp, write_fp, etc.
587 Special handling for registers PC, SP, and FP. */
588
589 /* NOTE: cagney/2001-02-18: The functions generic_target_read_pc(),
590 read_pc_pid(), read_pc(), generic_target_write_pc(),
591 write_pc_pid(), write_pc(), generic_target_read_sp(), read_sp(),
592 generic_target_write_sp(), write_sp(), generic_target_read_fp(),
593 read_fp(), generic_target_write_fp(), write_fp will eventually be
594 moved out of the reg-cache into either frame.[hc] or to the
595 multi-arch framework. The are not part of the raw register cache. */
596
597 /* This routine is getting awfully cluttered with #if's. It's probably
598 time to turn this into READ_PC and define it in the tm.h file.
599 Ditto for write_pc.
600
601 1999-06-08: The following were re-written so that it assumes the
602 existence of a TARGET_READ_PC et.al. macro. A default generic
603 version of that macro is made available where needed.
604
605 Since the ``TARGET_READ_PC'' et.al. macro is going to be controlled
606 by the multi-arch framework, it will eventually be possible to
607 eliminate the intermediate read_pc_pid(). The client would call
608 TARGET_READ_PC directly. (cagney). */
609
610 CORE_ADDR
611 generic_target_read_pc (ptid_t ptid)
612 {
613 #ifdef PC_REGNUM
614 if (PC_REGNUM >= 0)
615 {
616 CORE_ADDR pc_val = ADDR_BITS_REMOVE ((CORE_ADDR) read_register_pid (PC_REGNUM, ptid));
617 return pc_val;
618 }
619 #endif
620 internal_error (__FILE__, __LINE__,
621 "generic_target_read_pc");
622 return 0;
623 }
624
625 CORE_ADDR
626 read_pc_pid (ptid_t ptid)
627 {
628 ptid_t saved_inferior_ptid;
629 CORE_ADDR pc_val;
630
631 /* In case ptid != inferior_ptid. */
632 saved_inferior_ptid = inferior_ptid;
633 inferior_ptid = ptid;
634
635 pc_val = TARGET_READ_PC (ptid);
636
637 inferior_ptid = saved_inferior_ptid;
638 return pc_val;
639 }
640
641 CORE_ADDR
642 read_pc (void)
643 {
644 return read_pc_pid (inferior_ptid);
645 }
646
647 void
648 generic_target_write_pc (CORE_ADDR pc, ptid_t ptid)
649 {
650 #ifdef PC_REGNUM
651 if (PC_REGNUM >= 0)
652 write_register_pid (PC_REGNUM, pc, ptid);
653 if (NPC_REGNUM >= 0)
654 write_register_pid (NPC_REGNUM, pc + 4, ptid);
655 if (NNPC_REGNUM >= 0)
656 write_register_pid (NNPC_REGNUM, pc + 8, ptid);
657 #else
658 internal_error (__FILE__, __LINE__,
659 "generic_target_write_pc");
660 #endif
661 }
662
663 void
664 write_pc_pid (CORE_ADDR pc, ptid_t ptid)
665 {
666 ptid_t saved_inferior_ptid;
667
668 /* In case ptid != inferior_ptid. */
669 saved_inferior_ptid = inferior_ptid;
670 inferior_ptid = ptid;
671
672 TARGET_WRITE_PC (pc, ptid);
673
674 inferior_ptid = saved_inferior_ptid;
675 }
676
677 void
678 write_pc (CORE_ADDR pc)
679 {
680 write_pc_pid (pc, inferior_ptid);
681 }
682
683 /* Cope with strage ways of getting to the stack and frame pointers */
684
685 CORE_ADDR
686 generic_target_read_sp (void)
687 {
688 #ifdef SP_REGNUM
689 if (SP_REGNUM >= 0)
690 return read_register (SP_REGNUM);
691 #endif
692 internal_error (__FILE__, __LINE__,
693 "generic_target_read_sp");
694 }
695
696 CORE_ADDR
697 read_sp (void)
698 {
699 return TARGET_READ_SP ();
700 }
701
702 void
703 generic_target_write_sp (CORE_ADDR val)
704 {
705 #ifdef SP_REGNUM
706 if (SP_REGNUM >= 0)
707 {
708 write_register (SP_REGNUM, val);
709 return;
710 }
711 #endif
712 internal_error (__FILE__, __LINE__,
713 "generic_target_write_sp");
714 }
715
716 void
717 write_sp (CORE_ADDR val)
718 {
719 TARGET_WRITE_SP (val);
720 }
721
722 CORE_ADDR
723 generic_target_read_fp (void)
724 {
725 #ifdef FP_REGNUM
726 if (FP_REGNUM >= 0)
727 return read_register (FP_REGNUM);
728 #endif
729 internal_error (__FILE__, __LINE__,
730 "generic_target_read_fp");
731 }
732
733 CORE_ADDR
734 read_fp (void)
735 {
736 return TARGET_READ_FP ();
737 }
738
739 void
740 generic_target_write_fp (CORE_ADDR val)
741 {
742 #ifdef FP_REGNUM
743 if (FP_REGNUM >= 0)
744 {
745 write_register (FP_REGNUM, val);
746 return;
747 }
748 #endif
749 internal_error (__FILE__, __LINE__,
750 "generic_target_write_fp");
751 }
752
753 void
754 write_fp (CORE_ADDR val)
755 {
756 TARGET_WRITE_FP (val);
757 }
758
759 /* ARGSUSED */
760 static void
761 reg_flush_command (char *command, int from_tty)
762 {
763 /* Force-flush the register cache. */
764 registers_changed ();
765 if (from_tty)
766 printf_filtered ("Register cache flushed.\n");
767 }
768
769 static void
770 build_regcache (void)
771 {
772 int i;
773 int sizeof_register_valid;
774 /* Come up with the real size of the registers buffer. */
775 int sizeof_registers = REGISTER_BYTES; /* OK use. */
776 for (i = 0; i < NUM_REGS + NUM_PSEUDO_REGS; i++)
777 {
778 long regend;
779 /* Keep extending the buffer so that there is always enough
780 space for all registers. The comparison is necessary since
781 legacy code is free to put registers in random places in the
782 buffer separated by holes. Once REGISTER_BYTE() is killed
783 this can be greatly simplified. */
784 /* FIXME: cagney/2001-12-04: This code shouldn't need to use
785 REGISTER_BYTE(). Unfortunatly, legacy code likes to lay the
786 buffer out so that certain registers just happen to overlap.
787 Ulgh! New targets use gdbarch's register read/write and
788 entirely avoid this uglyness. */
789 regend = REGISTER_BYTE (i) + REGISTER_RAW_SIZE (i);
790 if (sizeof_registers < regend)
791 sizeof_registers = regend;
792 }
793 registers = xmalloc (sizeof_registers);
794 sizeof_register_valid = ((NUM_REGS + NUM_PSEUDO_REGS)
795 * sizeof (*register_valid));
796 register_valid = xmalloc (sizeof_register_valid);
797 memset (register_valid, 0, sizeof_register_valid);
798 }
799
800 void
801 _initialize_regcache (void)
802 {
803 build_regcache ();
804
805 register_gdbarch_swap (&registers, sizeof (registers), NULL);
806 register_gdbarch_swap (&register_valid, sizeof (register_valid), NULL);
807 register_gdbarch_swap (NULL, 0, build_regcache);
808
809 add_com ("flushregs", class_maintenance, reg_flush_command,
810 "Force gdb to flush its register cache (maintainer command)");
811
812 /* Initialize the thread/process associated with the current set of
813 registers. For now, -1 is special, and means `no current process'. */
814 registers_ptid = pid_to_ptid (-1);
815 }
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