gdb/regcache.c

   1 /* Cache and manage the values of registers for GDB, the GNU debugger.
   2    Copyright 1986, 1987, 1989, 1991, 1994, 1995, 1996, 1998, 2000, 2001
   3    Free Software Foundation, Inc.
   4
   5    This file is part of GDB.
   6
   7    This program is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 2 of the License, or
  10    (at your option) any later version.
  11
  12    This program is distributed in the hope that it will be useful,
  13    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15    GNU General Public License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this program; if not, write to the Free Software
  19    Foundation, Inc., 59 Temple Place - Suite 330,
  20    Boston, MA 02111-1307, USA.  */
  21
  22 #include "defs.h"
  23 #include "inferior.h"
  24 #include "target.h"
  25 #include "gdbarch.h"
  26 #include "gdbcmd.h"
  27 #include "regcache.h"
  28 #include "gdb_assert.h"
  29
  30 /*
  31  * DATA STRUCTURE
  32  *
  33  * Here is the actual register cache.
  34  */
  35
  36 /* NOTE: this is a write-through cache.  There is no "dirty" bit for
  37    recording if the register values have been changed (eg. by the
  38    user).  Therefore all registers must be written back to the
  39    target when appropriate.  */
  40
  41 /* REGISTERS contains the cached register values (in target byte order). */
  42
  43 char *registers;
  44
  45 /* REGISTER_VALID is 0 if the register needs to be fetched,
  46                      1 if it has been fetched, and
  47                     -1 if the register value was not available.
  48    "Not available" means don't try to fetch it again.  */
  49
  50 signed char *register_valid;
  51
  52 /* The thread/process associated with the current set of registers. */
  53
  54 static ptid_t registers_ptid;
  55
  56 /*
  57  * FUNCTIONS:
  58  */
  59
  60 /* REGISTER_CACHED()
  61
  62    Returns 0 if the value is not in the cache (needs fetch).
  63           >0 if the value is in the cache.
  64           <0 if the value is permanently unavailable (don't ask again).  */
  65
  66 int
  67 register_cached (int regnum)
  68 {
  69   return register_valid[regnum];
  70 }
  71
  72 /* Record that REGNUM's value is cached if STATE is >0, uncached but
  73    fetchable if STATE is 0, and uncached and unfetchable if STATE is <0.  */
  74
  75 void
  76 set_register_cached (int regnum, int state)
  77 {
  78   register_valid[regnum] = state;
  79 }
  80
  81 /* REGISTER_CHANGED
  82
  83    invalidate a single register REGNUM in the cache */
  84 void
  85 register_changed (int regnum)
  86 {
  87   set_register_cached (regnum, 0);
  88 }
  89
  90 /* If REGNUM >= 0, return a pointer to register REGNUM's cache buffer area,
  91    else return a pointer to the start of the cache buffer.  */
  92
  93 char *
  94 register_buffer (int regnum)
  95 {
  96   if (regnum < 0)
  97     return registers;
  98   else
  99     return &registers[REGISTER_BYTE (regnum)];
 100 }
 101
 102 /* Return whether register REGNUM is a real register.  */
 103
 104 static int
 105 real_register (int regnum)
 106 {
 107   return regnum >= 0 && regnum < NUM_REGS;
 108 }
 109
 110 /* Return whether register REGNUM is a pseudo register.  */
 111
 112 static int
 113 pseudo_register (int regnum)
 114 {
 115   return regnum >= NUM_REGS && regnum < NUM_REGS + NUM_PSEUDO_REGS;
 116 }
 117
 118 /* Fetch register REGNUM into the cache.  */
 119
 120 static void
 121 fetch_register (int regnum)
 122 {
 123   if (real_register (regnum))
 124     target_fetch_registers (regnum);
 125   else if (pseudo_register (regnum))
 126     FETCH_PSEUDO_REGISTER (regnum);
 127 }
 128
 129 /* Write register REGNUM cached value to the target.  */
 130
 131 static void
 132 store_register (int regnum)
 133 {
 134   if (real_register (regnum))
 135     target_store_registers (regnum);
 136   else if (pseudo_register (regnum))
 137     STORE_PSEUDO_REGISTER (regnum);
 138 }
 139
 140 /* Low level examining and depositing of registers.
 141
 142    The caller is responsible for making sure that the inferior is
 143    stopped before calling the fetching routines, or it will get
 144    garbage.  (a change from GDB version 3, in which the caller got the
 145    value from the last stop).  */
 146
 147 /* REGISTERS_CHANGED ()
 148
 149    Indicate that registers may have changed, so invalidate the cache.  */
 150
 151 void
 152 registers_changed (void)
 153 {
 154   int i;
 155
 156   registers_ptid = pid_to_ptid (-1);
 157
 158   /* Force cleanup of any alloca areas if using C alloca instead of
 159      a builtin alloca.  This particular call is used to clean up
 160      areas allocated by low level target code which may build up
 161      during lengthy interactions between gdb and the target before
 162      gdb gives control to the user (ie watchpoints).  */
 163   alloca (0);
 164
 165   for (i = 0; i < NUM_REGS; i++)
 166     set_register_cached (i, 0);
 167
 168   /* Assume that if all the hardware regs have changed,
 169      then so have the pseudo-registers.  */
 170   for (i = NUM_REGS; i < NUM_REGS + NUM_PSEUDO_REGS; i++)
 171     set_register_cached (i, 0);
 172
 173   if (registers_changed_hook)
 174     registers_changed_hook ();
 175 }
 176
 177 /* REGISTERS_FETCHED ()
 178
 179    Indicate that all registers have been fetched, so mark them all valid.  */
 180
 181
 182 void
 183 registers_fetched (void)
 184 {
 185   int i;
 186
 187   for (i = 0; i < NUM_REGS; i++)
 188     set_register_cached (i, 1);
 189   /* Do not assume that the pseudo-regs have also been fetched.
 190      Fetching all real regs might not account for all pseudo-regs.  */
 191 }
 192
 193 /* read_register_bytes and write_register_bytes are generally a *BAD*
 194    idea.  They are inefficient because they need to check for partial
 195    updates, which can only be done by scanning through all of the
 196    registers and seeing if the bytes that are being read/written fall
 197    inside of an invalid register.  [The main reason this is necessary
 198    is that register sizes can vary, so a simple index won't suffice.]
 199    It is far better to call read_register_gen and write_register_gen
 200    if you want to get at the raw register contents, as it only takes a
 201    regnum as an argument, and therefore can't do a partial register
 202    update.
 203
 204    Prior to the recent fixes to check for partial updates, both read
 205    and write_register_bytes always checked to see if any registers
 206    were stale, and then called target_fetch_registers (-1) to update
 207    the whole set.  This caused really slowed things down for remote
 208    targets.  */
 209
 210 /* Copy INLEN bytes of consecutive data from registers
 211    starting with the INREGBYTE'th byte of register data
 212    into memory at MYADDR.  */
 213
 214 void
 215 read_register_bytes (int in_start, char *in_buf, int in_len)
 216 {
 217   int in_end = in_start + in_len;
 218   int regnum;
 219   char *reg_buf = alloca (MAX_REGISTER_RAW_SIZE);
 220
 221   /* See if we are trying to read bytes from out-of-date registers.  If so,
 222      update just those registers.  */
 223
 224   for (regnum = 0; regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++)
 225     {
 226       int reg_start;
 227       int reg_end;
 228       int reg_len;
 229       int start;
 230       int end;
 231       int byte;
 232
 233       reg_start = REGISTER_BYTE (regnum);
 234       reg_len = REGISTER_RAW_SIZE (regnum);
 235       reg_end = reg_start + reg_len;
 236
 237       if (reg_end <= in_start || in_end <= reg_start)
 238         /* The range the user wants to read doesn't overlap with regnum.  */
 239         continue;
 240
 241       if (REGISTER_NAME (regnum) != NULL && *REGISTER_NAME (regnum) != '\0')
 242         /* Force the cache to fetch the entire register.  */
 243         read_register_gen (regnum, reg_buf);
 244       else
 245         /* Legacy note: even though this register is ``invalid'' we
 246            still need to return something.  It would appear that some
 247            code relies on apparent gaps in the register array also
 248            being returned.  */
 249         /* FIXME: cagney/2001-08-18: This is just silly.  It defeats
 250            the entire register read/write flow of control.  Must
 251            resist temptation to return 0xdeadbeef.  */
 252         memcpy (reg_buf, registers + reg_start, reg_len);
 253
 254       /* Legacy note: This function, for some reason, allows a NULL
 255          input buffer.  If the buffer is NULL, the registers are still
 256          fetched, just the final transfer is skipped. */
 257       if (in_buf == NULL)
 258         continue;
 259
 260       /* start = max (reg_start, in_start) */
 261       if (reg_start > in_start)
 262         start = reg_start;
 263       else
 264         start = in_start;
 265
 266       /* end = min (reg_end, in_end) */
 267       if (reg_end < in_end)
 268         end = reg_end;
 269       else
 270         end = in_end;
 271
 272       /* Transfer just the bytes common to both IN_BUF and REG_BUF */
 273       for (byte = start; byte < end; byte++)
 274         {
 275           in_buf[byte - in_start] = reg_buf[byte - reg_start];
 276         }
 277     }
 278 }
 279
 280 /* Read register REGNUM into memory at MYADDR, which must be large
 281    enough for REGISTER_RAW_BYTES (REGNUM).  Target byte-order.  If the
 282    register is known to be the size of a CORE_ADDR or smaller,
 283    read_register can be used instead.  */
 284
 285 static void
 286 legacy_read_register_gen (int regnum, char *myaddr)
 287 {
 288   gdb_assert (regnum >= 0 && regnum < (NUM_REGS + NUM_PSEUDO_REGS));
 289   if (! ptid_equal (registers_ptid, inferior_ptid))
 290     {
 291       registers_changed ();
 292       registers_ptid = inferior_ptid;
 293     }
 294
 295   if (!register_cached (regnum))
 296     fetch_register (regnum);
 297
 298   memcpy (myaddr, register_buffer (regnum),
 299           REGISTER_RAW_SIZE (regnum));
 300 }
 301
 302 void
 303 regcache_read (int rawnum, char *buf)
 304 {
 305   gdb_assert (rawnum >= 0 && rawnum < NUM_REGS);
 306   /* For moment, just use underlying legacy code. Ulgh!!! */
 307   legacy_read_register_gen (rawnum, buf);
 308 }
 309
 310 void
 311 read_register_gen (int regnum, char *buf)
 312 {
 313   if (! gdbarch_register_read_p (current_gdbarch))
 314     {
 315       legacy_read_register_gen (regnum, buf);
 316       return;
 317     }
 318   gdbarch_register_read (current_gdbarch, regnum, buf);
 319 }
 320
 321
 322 /* Write register REGNUM at MYADDR to the target.  MYADDR points at
 323    REGISTER_RAW_BYTES(REGNUM), which must be in target byte-order.  */
 324
 325 static void
 326 legacy_write_register_gen (int regnum, char *myaddr)
 327 {
 328   int size;
 329   gdb_assert (regnum >= 0 && regnum < (NUM_REGS + NUM_PSEUDO_REGS));
 330
 331   /* On the sparc, writing %g0 is a no-op, so we don't even want to
 332      change the registers array if something writes to this register.  */
 333   if (CANNOT_STORE_REGISTER (regnum))
 334     return;
 335
 336   if (! ptid_equal (registers_ptid, inferior_ptid))
 337     {
 338       registers_changed ();
 339       registers_ptid = inferior_ptid;
 340     }
 341
 342   size = REGISTER_RAW_SIZE (regnum);
 343
 344   if (real_register (regnum))
 345     {
 346       /* If we have a valid copy of the register, and new value == old
 347          value, then don't bother doing the actual store. */
 348       if (register_cached (regnum)
 349           && memcmp (register_buffer (regnum), myaddr, size) == 0)
 350         return;
 351       else
 352         target_prepare_to_store ();
 353     }
 354
 355   memcpy (register_buffer (regnum), myaddr, size);
 356
 357   set_register_cached (regnum, 1);
 358   store_register (regnum);
 359 }
 360
 361 void
 362 regcache_write (int rawnum, char *buf)
 363 {
 364   gdb_assert (rawnum >= 0 && rawnum < NUM_REGS);
 365   /* For moment, just use underlying legacy code. Ulgh!!! */
 366   legacy_write_register_gen (rawnum, buf);
 367 }
 368
 369 void
 370 write_register_gen (int regnum, char *buf)
 371 {
 372   if (! gdbarch_register_write_p (current_gdbarch))
 373     {
 374       legacy_write_register_gen (regnum, buf);
 375       return;
 376     }
 377   gdbarch_register_write (current_gdbarch, regnum, buf);
 378 }
 379
 380 /* Copy INLEN bytes of consecutive data from memory at MYADDR
 381    into registers starting with the MYREGSTART'th byte of register data.  */
 382
 383 void
 384 write_register_bytes (int myregstart, char *myaddr, int inlen)
 385 {
 386   int myregend = myregstart + inlen;
 387   int regnum;
 388
 389   target_prepare_to_store ();
 390
 391   /* Scan through the registers updating any that are covered by the
 392      range myregstart<=>myregend using write_register_gen, which does
 393      nice things like handling threads, and avoiding updates when the
 394      new and old contents are the same.  */
 395
 396   for (regnum = 0; regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++)
 397     {
 398       int regstart, regend;
 399
 400       regstart = REGISTER_BYTE (regnum);
 401       regend = regstart + REGISTER_RAW_SIZE (regnum);
 402
 403       /* Is this register completely outside the range the user is writing?  */
 404       if (myregend <= regstart || regend <= myregstart)
 405         /* do nothing */ ;
 406
 407       /* Is this register completely within the range the user is writing?  */
 408       else if (myregstart <= regstart && regend <= myregend)
 409         write_register_gen (regnum, myaddr + (regstart - myregstart));
 410
 411       /* The register partially overlaps the range being written.  */
 412       else
 413         {
 414           char *regbuf = (char*) alloca (MAX_REGISTER_RAW_SIZE);
 415           /* What's the overlap between this register's bytes and
 416              those the caller wants to write?  */
 417           int overlapstart = max (regstart, myregstart);
 418           int overlapend   = min (regend,   myregend);
 419
 420           /* We may be doing a partial update of an invalid register.
 421              Update it from the target before scribbling on it.  */
 422           read_register_gen (regnum, regbuf);
 423
 424           memcpy (registers + overlapstart,
 425                   myaddr + (overlapstart - myregstart),
 426                   overlapend - overlapstart);
 427
 428           store_register (regnum);
 429         }
 430     }
 431 }
 432
 433
 434 /* Return the contents of register REGNUM as an unsigned integer.  */
 435
 436 ULONGEST
 437 read_register (int regnum)
 438 {
 439   char *buf = alloca (REGISTER_RAW_SIZE (regnum));
 440   read_register_gen (regnum, buf);
 441   return (extract_unsigned_integer (buf, REGISTER_RAW_SIZE (regnum)));
 442 }
 443
 444 ULONGEST
 445 read_register_pid (int regnum, ptid_t ptid)
 446 {
 447   ptid_t save_ptid;
 448   int save_pid;
 449   CORE_ADDR retval;
 450
 451   if (ptid_equal (ptid, inferior_ptid))
 452     return read_register (regnum);
 453
 454   save_ptid = inferior_ptid;
 455
 456   inferior_ptid = ptid;
 457
 458   retval = read_register (regnum);
 459
 460   inferior_ptid = save_ptid;
 461
 462   return retval;
 463 }
 464
 465 /* Return the contents of register REGNUM as a signed integer.  */
 466
 467 LONGEST
 468 read_signed_register (int regnum)
 469 {
 470   void *buf = alloca (REGISTER_RAW_SIZE (regnum));
 471   read_register_gen (regnum, buf);
 472   return (extract_signed_integer (buf, REGISTER_RAW_SIZE (regnum)));
 473 }
 474
 475 LONGEST
 476 read_signed_register_pid (int regnum, ptid_t ptid)
 477 {
 478   ptid_t save_ptid;
 479   LONGEST retval;
 480
 481   if (ptid_equal (ptid, inferior_ptid))
 482     return read_signed_register (regnum);
 483
 484   save_ptid = inferior_ptid;
 485
 486   inferior_ptid = ptid;
 487
 488   retval = read_signed_register (regnum);
 489
 490   inferior_ptid = save_ptid;
 491
 492   return retval;
 493 }
 494
 495 /* Store VALUE into the raw contents of register number REGNUM.  */
 496
 497 void
 498 write_register (int regnum, LONGEST val)
 499 {
 500   void *buf;
 501   int size;
 502   size = REGISTER_RAW_SIZE (regnum);
 503   buf = alloca (size);
 504   store_signed_integer (buf, size, (LONGEST) val);
 505   write_register_gen (regnum, buf);
 506 }
 507
 508 void
 509 write_register_pid (int regnum, CORE_ADDR val, ptid_t ptid)
 510 {
 511   ptid_t save_ptid;
 512
 513   if (ptid_equal (ptid, inferior_ptid))
 514     {
 515       write_register (regnum, val);
 516       return;
 517     }
 518
 519   save_ptid = inferior_ptid;
 520
 521   inferior_ptid = ptid;
 522
 523   write_register (regnum, val);
 524
 525   inferior_ptid = save_ptid;
 526 }
 527
 528 /* SUPPLY_REGISTER()
 529
 530    Record that register REGNUM contains VAL.  This is used when the
 531    value is obtained from the inferior or core dump, so there is no
 532    need to store the value there.
 533
 534    If VAL is a NULL pointer, then it's probably an unsupported register.
 535    We just set its value to all zeros.  We might want to record this
 536    fact, and report it to the users of read_register and friends.  */
 537
 538 void
 539 supply_register (int regnum, char *val)
 540 {
 541 #if 1
 542   if (! ptid_equal (registers_ptid, inferior_ptid))
 543     {
 544       registers_changed ();
 545       registers_ptid = inferior_ptid;
 546     }
 547 #endif
 548
 549   set_register_cached (regnum, 1);
 550   if (val)
 551     memcpy (register_buffer (regnum), val,
 552             REGISTER_RAW_SIZE (regnum));
 553   else
 554     memset (register_buffer (regnum), '\000',
 555             REGISTER_RAW_SIZE (regnum));
 556
 557   /* On some architectures, e.g. HPPA, there are a few stray bits in
 558      some registers, that the rest of the code would like to ignore.  */
 559
 560   /* NOTE: cagney/2001-03-16: The macro CLEAN_UP_REGISTER_VALUE is
 561      going to be deprecated.  Instead architectures will leave the raw
 562      register value as is and instead clean things up as they pass
 563      through the method gdbarch_register_read() clean up the
 564      values. */
 565
 566 #ifdef CLEAN_UP_REGISTER_VALUE
 567   CLEAN_UP_REGISTER_VALUE (regnum, register_buffer (regnum));
 568 #endif
 569 }
 570
 571 /* read_pc, write_pc, read_sp, write_sp, read_fp, write_fp, etc.
 572    Special handling for registers PC, SP, and FP.  */
 573
 574 /* NOTE: cagney/2001-02-18: The functions generic_target_read_pc(),
 575    read_pc_pid(), read_pc(), generic_target_write_pc(),
 576    write_pc_pid(), write_pc(), generic_target_read_sp(), read_sp(),
 577    generic_target_write_sp(), write_sp(), generic_target_read_fp(),
 578    read_fp(), generic_target_write_fp(), write_fp will eventually be
 579    moved out of the reg-cache into either frame.[hc] or to the
 580    multi-arch framework.  The are not part of the raw register cache.  */
 581
 582 /* This routine is getting awfully cluttered with #if's.  It's probably
 583    time to turn this into READ_PC and define it in the tm.h file.
 584    Ditto for write_pc.
 585
 586    1999-06-08: The following were re-written so that it assumes the
 587    existence of a TARGET_READ_PC et.al. macro.  A default generic
 588    version of that macro is made available where needed.
 589
 590    Since the ``TARGET_READ_PC'' et.al. macro is going to be controlled
 591    by the multi-arch framework, it will eventually be possible to
 592    eliminate the intermediate read_pc_pid().  The client would call
 593    TARGET_READ_PC directly. (cagney). */
 594
 595 CORE_ADDR
 596 generic_target_read_pc (ptid_t ptid)
 597 {
 598 #ifdef PC_REGNUM
 599   if (PC_REGNUM >= 0)
 600     {
 601       CORE_ADDR pc_val = ADDR_BITS_REMOVE ((CORE_ADDR) read_register_pid (PC_REGNUM, ptid));
 602       return pc_val;
 603     }
 604 #endif
 605   internal_error (__FILE__, __LINE__,
 606                   "generic_target_read_pc");
 607   return 0;
 608 }
 609
 610 CORE_ADDR
 611 read_pc_pid (ptid_t ptid)
 612 {
 613   ptid_t saved_inferior_ptid;
 614   CORE_ADDR pc_val;
 615
 616   /* In case ptid != inferior_ptid. */
 617   saved_inferior_ptid = inferior_ptid;
 618   inferior_ptid = ptid;
 619
 620   pc_val = TARGET_READ_PC (ptid);
 621
 622   inferior_ptid = saved_inferior_ptid;
 623   return pc_val;
 624 }
 625
 626 CORE_ADDR
 627 read_pc (void)
 628 {
 629   return read_pc_pid (inferior_ptid);
 630 }
 631
 632 void
 633 generic_target_write_pc (CORE_ADDR pc, ptid_t ptid)
 634 {
 635 #ifdef PC_REGNUM
 636   if (PC_REGNUM >= 0)
 637     write_register_pid (PC_REGNUM, pc, ptid);
 638   if (NPC_REGNUM >= 0)
 639     write_register_pid (NPC_REGNUM, pc + 4, ptid);
 640   if (NNPC_REGNUM >= 0)
 641     write_register_pid (NNPC_REGNUM, pc + 8, ptid);
 642 #else
 643   internal_error (__FILE__, __LINE__,
 644                   "generic_target_write_pc");
 645 #endif
 646 }
 647
 648 void
 649 write_pc_pid (CORE_ADDR pc, ptid_t ptid)
 650 {
 651   ptid_t saved_inferior_ptid;
 652
 653   /* In case ptid != inferior_ptid. */
 654   saved_inferior_ptid = inferior_ptid;
 655   inferior_ptid = ptid;
 656
 657   TARGET_WRITE_PC (pc, ptid);
 658
 659   inferior_ptid = saved_inferior_ptid;
 660 }
 661
 662 void
 663 write_pc (CORE_ADDR pc)
 664 {
 665   write_pc_pid (pc, inferior_ptid);
 666 }
 667
 668 /* Cope with strage ways of getting to the stack and frame pointers */
 669
 670 CORE_ADDR
 671 generic_target_read_sp (void)
 672 {
 673 #ifdef SP_REGNUM
 674   if (SP_REGNUM >= 0)
 675     return read_register (SP_REGNUM);
 676 #endif
 677   internal_error (__FILE__, __LINE__,
 678                   "generic_target_read_sp");
 679 }
 680
 681 CORE_ADDR
 682 read_sp (void)
 683 {
 684   return TARGET_READ_SP ();
 685 }
 686
 687 void
 688 generic_target_write_sp (CORE_ADDR val)
 689 {
 690 #ifdef SP_REGNUM
 691   if (SP_REGNUM >= 0)
 692     {
 693       write_register (SP_REGNUM, val);
 694       return;
 695     }
 696 #endif
 697   internal_error (__FILE__, __LINE__,
 698                   "generic_target_write_sp");
 699 }
 700
 701 void
 702 write_sp (CORE_ADDR val)
 703 {
 704   TARGET_WRITE_SP (val);
 705 }
 706
 707 CORE_ADDR
 708 generic_target_read_fp (void)
 709 {
 710 #ifdef FP_REGNUM
 711   if (FP_REGNUM >= 0)
 712     return read_register (FP_REGNUM);
 713 #endif
 714   internal_error (__FILE__, __LINE__,
 715                   "generic_target_read_fp");
 716 }
 717
 718 CORE_ADDR
 719 read_fp (void)
 720 {
 721   return TARGET_READ_FP ();
 722 }
 723
 724 void
 725 generic_target_write_fp (CORE_ADDR val)
 726 {
 727 #ifdef FP_REGNUM
 728   if (FP_REGNUM >= 0)
 729     {
 730       write_register (FP_REGNUM, val);
 731       return;
 732     }
 733 #endif
 734   internal_error (__FILE__, __LINE__,
 735                   "generic_target_write_fp");
 736 }
 737
 738 void
 739 write_fp (CORE_ADDR val)
 740 {
 741   TARGET_WRITE_FP (val);
 742 }
 743
 744 /* ARGSUSED */
 745 static void
 746 reg_flush_command (char *command, int from_tty)
 747 {
 748   /* Force-flush the register cache.  */
 749   registers_changed ();
 750   if (from_tty)
 751     printf_filtered ("Register cache flushed.\n");
 752 }
 753
 754
 755 static void
 756 build_regcache (void)
 757 {
 758   /* We allocate some extra slop since we do a lot of memcpy's around
 759      `registers', and failing-soft is better than failing hard.  */
 760   int sizeof_registers = REGISTER_BYTES + /* SLOP */ 256;
 761   int sizeof_register_valid =
 762     (NUM_REGS + NUM_PSEUDO_REGS) * sizeof (*register_valid);
 763   registers = xmalloc (sizeof_registers);
 764   memset (registers, 0, sizeof_registers);
 765   register_valid = xmalloc (sizeof_register_valid);
 766   memset (register_valid, 0, sizeof_register_valid);
 767 }
 768
 769 void
 770 _initialize_regcache (void)
 771 {
 772   build_regcache ();
 773
 774   register_gdbarch_swap (&registers, sizeof (registers), NULL);
 775   register_gdbarch_swap (&register_valid, sizeof (register_valid), NULL);
 776   register_gdbarch_swap (NULL, 0, build_regcache);
 777
 778   add_com ("flushregs", class_maintenance, reg_flush_command,
 779            "Force gdb to flush its register cache (maintainer command)");
 780
 781    /* Initialize the thread/process associated with the current set of
 782       registers.  For now, -1 is special, and means `no current process'.  */
 783   registers_ptid = pid_to_ptid (-1);
 784 }