[PowerPC] Add support for HTM registers
[deliverable/binutils-gdb.git] / gdb / regformats / rs6000 / powerpc-isa207-htm-vsx32l.dat
1 # THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi :set ro:
2 # Generated from: rs6000/powerpc-isa207-htm-vsx32l.xml
3 name:powerpc_isa207_htm_vsx32l
4 xmltarget:powerpc-isa207-htm-vsx32l.xml
5 expedite:r1,pc
6 32:r0
7 32:r1
8 32:r2
9 32:r3
10 32:r4
11 32:r5
12 32:r6
13 32:r7
14 32:r8
15 32:r9
16 32:r10
17 32:r11
18 32:r12
19 32:r13
20 32:r14
21 32:r15
22 32:r16
23 32:r17
24 32:r18
25 32:r19
26 32:r20
27 32:r21
28 32:r22
29 32:r23
30 32:r24
31 32:r25
32 32:r26
33 32:r27
34 32:r28
35 32:r29
36 32:r30
37 32:r31
38 64:f0
39 64:f1
40 64:f2
41 64:f3
42 64:f4
43 64:f5
44 64:f6
45 64:f7
46 64:f8
47 64:f9
48 64:f10
49 64:f11
50 64:f12
51 64:f13
52 64:f14
53 64:f15
54 64:f16
55 64:f17
56 64:f18
57 64:f19
58 64:f20
59 64:f21
60 64:f22
61 64:f23
62 64:f24
63 64:f25
64 64:f26
65 64:f27
66 64:f28
67 64:f29
68 64:f30
69 64:f31
70 32:pc
71 32:msr
72 32:cr
73 32:lr
74 32:ctr
75 32:xer
76 64:fpscr
77 32:orig_r3
78 32:trap
79 128:vr0
80 128:vr1
81 128:vr2
82 128:vr3
83 128:vr4
84 128:vr5
85 128:vr6
86 128:vr7
87 128:vr8
88 128:vr9
89 128:vr10
90 128:vr11
91 128:vr12
92 128:vr13
93 128:vr14
94 128:vr15
95 128:vr16
96 128:vr17
97 128:vr18
98 128:vr19
99 128:vr20
100 128:vr21
101 128:vr22
102 128:vr23
103 128:vr24
104 128:vr25
105 128:vr26
106 128:vr27
107 128:vr28
108 128:vr29
109 128:vr30
110 128:vr31
111 32:vscr
112 32:vrsave
113 64:vs0h
114 64:vs1h
115 64:vs2h
116 64:vs3h
117 64:vs4h
118 64:vs5h
119 64:vs6h
120 64:vs7h
121 64:vs8h
122 64:vs9h
123 64:vs10h
124 64:vs11h
125 64:vs12h
126 64:vs13h
127 64:vs14h
128 64:vs15h
129 64:vs16h
130 64:vs17h
131 64:vs18h
132 64:vs19h
133 64:vs20h
134 64:vs21h
135 64:vs22h
136 64:vs23h
137 64:vs24h
138 64:vs25h
139 64:vs26h
140 64:vs27h
141 64:vs28h
142 64:vs29h
143 64:vs30h
144 64:vs31h
145 64:ppr
146 64:dscr
147 64:tar
148 64:bescr
149 64:ebbhr
150 64:ebbrr
151 64:mmcr0
152 64:mmcr2
153 64:siar
154 64:sdar
155 64:sier
156 64:tfhar
157 64:texasr
158 64:tfiar
159 32:cr0
160 32:cr1
161 32:cr2
162 32:cr3
163 32:cr4
164 32:cr5
165 32:cr6
166 32:cr7
167 32:cr8
168 32:cr9
169 32:cr10
170 32:cr11
171 32:cr12
172 32:cr13
173 32:cr14
174 32:cr15
175 32:cr16
176 32:cr17
177 32:cr18
178 32:cr19
179 32:cr20
180 32:cr21
181 32:cr22
182 32:cr23
183 32:cr24
184 32:cr25
185 32:cr26
186 32:cr27
187 32:cr28
188 32:cr29
189 32:cr30
190 32:cr31
191 32:ccr
192 32:cxer
193 32:clr
194 32:cctr
195 64:cf0
196 64:cf1
197 64:cf2
198 64:cf3
199 64:cf4
200 64:cf5
201 64:cf6
202 64:cf7
203 64:cf8
204 64:cf9
205 64:cf10
206 64:cf11
207 64:cf12
208 64:cf13
209 64:cf14
210 64:cf15
211 64:cf16
212 64:cf17
213 64:cf18
214 64:cf19
215 64:cf20
216 64:cf21
217 64:cf22
218 64:cf23
219 64:cf24
220 64:cf25
221 64:cf26
222 64:cf27
223 64:cf28
224 64:cf29
225 64:cf30
226 64:cf31
227 64:cfpscr
228 128:cvr0
229 128:cvr1
230 128:cvr2
231 128:cvr3
232 128:cvr4
233 128:cvr5
234 128:cvr6
235 128:cvr7
236 128:cvr8
237 128:cvr9
238 128:cvr10
239 128:cvr11
240 128:cvr12
241 128:cvr13
242 128:cvr14
243 128:cvr15
244 128:cvr16
245 128:cvr17
246 128:cvr18
247 128:cvr19
248 128:cvr20
249 128:cvr21
250 128:cvr22
251 128:cvr23
252 128:cvr24
253 128:cvr25
254 128:cvr26
255 128:cvr27
256 128:cvr28
257 128:cvr29
258 128:cvr30
259 128:cvr31
260 32:cvscr
261 32:cvrsave
262 64:cvs0h
263 64:cvs1h
264 64:cvs2h
265 64:cvs3h
266 64:cvs4h
267 64:cvs5h
268 64:cvs6h
269 64:cvs7h
270 64:cvs8h
271 64:cvs9h
272 64:cvs10h
273 64:cvs11h
274 64:cvs12h
275 64:cvs13h
276 64:cvs14h
277 64:cvs15h
278 64:cvs16h
279 64:cvs17h
280 64:cvs18h
281 64:cvs19h
282 64:cvs20h
283 64:cvs21h
284 64:cvs22h
285 64:cvs23h
286 64:cvs24h
287 64:cvs25h
288 64:cvs26h
289 64:cvs27h
290 64:cvs28h
291 64:cvs29h
292 64:cvs30h
293 64:cvs31h
294 64:cppr
295 64:cdscr
296 64:ctar
This page took 0.043564 seconds and 4 git commands to generate.