Update years in copyright notice for the GDB files.
[deliverable/binutils-gdb.git] / gdb / rs6000-aix-tdep.c
1 /* Native support code for PPC AIX, for GDB the GNU debugger.
2
3 Copyright (C) 2006-2013 Free Software Foundation, Inc.
4
5 Free Software Foundation, Inc.
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21
22 #include "defs.h"
23 #include "gdb_string.h"
24 #include "gdb_assert.h"
25 #include "osabi.h"
26 #include "regcache.h"
27 #include "regset.h"
28 #include "gdbtypes.h"
29 #include "gdbcore.h"
30 #include "target.h"
31 #include "value.h"
32 #include "infcall.h"
33 #include "objfiles.h"
34 #include "breakpoint.h"
35 #include "rs6000-tdep.h"
36 #include "ppc-tdep.h"
37 #include "exceptions.h"
38 #include "xcoffread.h"
39
40 /* Hook for determining the TOC address when calling functions in the
41 inferior under AIX. The initialization code in rs6000-nat.c sets
42 this hook to point to find_toc_address. */
43
44 CORE_ADDR (*rs6000_find_toc_address_hook) (CORE_ADDR) = NULL;
45
46 /* If the kernel has to deliver a signal, it pushes a sigcontext
47 structure on the stack and then calls the signal handler, passing
48 the address of the sigcontext in an argument register. Usually
49 the signal handler doesn't save this register, so we have to
50 access the sigcontext structure via an offset from the signal handler
51 frame.
52 The following constants were determined by experimentation on AIX 3.2. */
53 #define SIG_FRAME_PC_OFFSET 96
54 #define SIG_FRAME_LR_OFFSET 108
55 #define SIG_FRAME_FP_OFFSET 284
56
57
58 /* Core file support. */
59
60 static struct ppc_reg_offsets rs6000_aix32_reg_offsets =
61 {
62 /* General-purpose registers. */
63 208, /* r0_offset */
64 4, /* gpr_size */
65 4, /* xr_size */
66 24, /* pc_offset */
67 28, /* ps_offset */
68 32, /* cr_offset */
69 36, /* lr_offset */
70 40, /* ctr_offset */
71 44, /* xer_offset */
72 48, /* mq_offset */
73
74 /* Floating-point registers. */
75 336, /* f0_offset */
76 56, /* fpscr_offset */
77 4, /* fpscr_size */
78
79 /* AltiVec registers. */
80 -1, /* vr0_offset */
81 -1, /* vscr_offset */
82 -1 /* vrsave_offset */
83 };
84
85 static struct ppc_reg_offsets rs6000_aix64_reg_offsets =
86 {
87 /* General-purpose registers. */
88 0, /* r0_offset */
89 8, /* gpr_size */
90 4, /* xr_size */
91 264, /* pc_offset */
92 256, /* ps_offset */
93 288, /* cr_offset */
94 272, /* lr_offset */
95 280, /* ctr_offset */
96 292, /* xer_offset */
97 -1, /* mq_offset */
98
99 /* Floating-point registers. */
100 312, /* f0_offset */
101 296, /* fpscr_offset */
102 4, /* fpscr_size */
103
104 /* AltiVec registers. */
105 -1, /* vr0_offset */
106 -1, /* vscr_offset */
107 -1 /* vrsave_offset */
108 };
109
110
111 /* Supply register REGNUM in the general-purpose register set REGSET
112 from the buffer specified by GREGS and LEN to register cache
113 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
114
115 static void
116 rs6000_aix_supply_regset (const struct regset *regset,
117 struct regcache *regcache, int regnum,
118 const void *gregs, size_t len)
119 {
120 ppc_supply_gregset (regset, regcache, regnum, gregs, len);
121 ppc_supply_fpregset (regset, regcache, regnum, gregs, len);
122 }
123
124 /* Collect register REGNUM in the general-purpose register set
125 REGSET, from register cache REGCACHE into the buffer specified by
126 GREGS and LEN. If REGNUM is -1, do this for all registers in
127 REGSET. */
128
129 static void
130 rs6000_aix_collect_regset (const struct regset *regset,
131 const struct regcache *regcache, int regnum,
132 void *gregs, size_t len)
133 {
134 ppc_collect_gregset (regset, regcache, regnum, gregs, len);
135 ppc_collect_fpregset (regset, regcache, regnum, gregs, len);
136 }
137
138 /* AIX register set. */
139
140 static struct regset rs6000_aix32_regset =
141 {
142 &rs6000_aix32_reg_offsets,
143 rs6000_aix_supply_regset,
144 rs6000_aix_collect_regset,
145 };
146
147 static struct regset rs6000_aix64_regset =
148 {
149 &rs6000_aix64_reg_offsets,
150 rs6000_aix_supply_regset,
151 rs6000_aix_collect_regset,
152 };
153
154 /* Return the appropriate register set for the core section identified
155 by SECT_NAME and SECT_SIZE. */
156
157 static const struct regset *
158 rs6000_aix_regset_from_core_section (struct gdbarch *gdbarch,
159 const char *sect_name, size_t sect_size)
160 {
161 if (gdbarch_tdep (gdbarch)->wordsize == 4)
162 {
163 if (strcmp (sect_name, ".reg") == 0 && sect_size >= 592)
164 return &rs6000_aix32_regset;
165 }
166 else
167 {
168 if (strcmp (sect_name, ".reg") == 0 && sect_size >= 576)
169 return &rs6000_aix64_regset;
170 }
171
172 return NULL;
173 }
174
175
176 /* Pass the arguments in either registers, or in the stack. In RS/6000,
177 the first eight words of the argument list (that might be less than
178 eight parameters if some parameters occupy more than one word) are
179 passed in r3..r10 registers. Float and double parameters are
180 passed in fpr's, in addition to that. Rest of the parameters if any
181 are passed in user stack. There might be cases in which half of the
182 parameter is copied into registers, the other half is pushed into
183 stack.
184
185 Stack must be aligned on 64-bit boundaries when synthesizing
186 function calls.
187
188 If the function is returning a structure, then the return address is passed
189 in r3, then the first 7 words of the parameters can be passed in registers,
190 starting from r4. */
191
192 static CORE_ADDR
193 rs6000_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
194 struct regcache *regcache, CORE_ADDR bp_addr,
195 int nargs, struct value **args, CORE_ADDR sp,
196 int struct_return, CORE_ADDR struct_addr)
197 {
198 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
199 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
200 int ii;
201 int len = 0;
202 int argno; /* current argument number */
203 int argbytes; /* current argument byte */
204 gdb_byte tmp_buffer[50];
205 int f_argno = 0; /* current floating point argno */
206 int wordsize = gdbarch_tdep (gdbarch)->wordsize;
207 CORE_ADDR func_addr = find_function_addr (function, NULL);
208
209 struct value *arg = 0;
210 struct type *type;
211
212 ULONGEST saved_sp;
213
214 /* The calling convention this function implements assumes the
215 processor has floating-point registers. We shouldn't be using it
216 on PPC variants that lack them. */
217 gdb_assert (ppc_floating_point_unit_p (gdbarch));
218
219 /* The first eight words of ther arguments are passed in registers.
220 Copy them appropriately. */
221 ii = 0;
222
223 /* If the function is returning a `struct', then the first word
224 (which will be passed in r3) is used for struct return address.
225 In that case we should advance one word and start from r4
226 register to copy parameters. */
227 if (struct_return)
228 {
229 regcache_raw_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
230 struct_addr);
231 ii++;
232 }
233
234 /* effectively indirect call... gcc does...
235
236 return_val example( float, int);
237
238 eabi:
239 float in fp0, int in r3
240 offset of stack on overflow 8/16
241 for varargs, must go by type.
242 power open:
243 float in r3&r4, int in r5
244 offset of stack on overflow different
245 both:
246 return in r3 or f0. If no float, must study how gcc emulates floats;
247 pay attention to arg promotion.
248 User may have to cast\args to handle promotion correctly
249 since gdb won't know if prototype supplied or not. */
250
251 for (argno = 0, argbytes = 0; argno < nargs && ii < 8; ++ii)
252 {
253 int reg_size = register_size (gdbarch, ii + 3);
254
255 arg = args[argno];
256 type = check_typedef (value_type (arg));
257 len = TYPE_LENGTH (type);
258
259 if (TYPE_CODE (type) == TYPE_CODE_FLT)
260 {
261
262 /* Floating point arguments are passed in fpr's, as well as gpr's.
263 There are 13 fpr's reserved for passing parameters. At this point
264 there is no way we would run out of them. */
265
266 gdb_assert (len <= 8);
267
268 regcache_cooked_write (regcache,
269 tdep->ppc_fp0_regnum + 1 + f_argno,
270 value_contents (arg));
271 ++f_argno;
272 }
273
274 if (len > reg_size)
275 {
276
277 /* Argument takes more than one register. */
278 while (argbytes < len)
279 {
280 gdb_byte word[MAX_REGISTER_SIZE];
281 memset (word, 0, reg_size);
282 memcpy (word,
283 ((char *) value_contents (arg)) + argbytes,
284 (len - argbytes) > reg_size
285 ? reg_size : len - argbytes);
286 regcache_cooked_write (regcache,
287 tdep->ppc_gp0_regnum + 3 + ii,
288 word);
289 ++ii, argbytes += reg_size;
290
291 if (ii >= 8)
292 goto ran_out_of_registers_for_arguments;
293 }
294 argbytes = 0;
295 --ii;
296 }
297 else
298 {
299 /* Argument can fit in one register. No problem. */
300 int adj = gdbarch_byte_order (gdbarch)
301 == BFD_ENDIAN_BIG ? reg_size - len : 0;
302 gdb_byte word[MAX_REGISTER_SIZE];
303
304 memset (word, 0, reg_size);
305 memcpy (word, value_contents (arg), len);
306 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3 +ii, word);
307 }
308 ++argno;
309 }
310
311 ran_out_of_registers_for_arguments:
312
313 regcache_cooked_read_unsigned (regcache,
314 gdbarch_sp_regnum (gdbarch),
315 &saved_sp);
316
317 /* Location for 8 parameters are always reserved. */
318 sp -= wordsize * 8;
319
320 /* Another six words for back chain, TOC register, link register, etc. */
321 sp -= wordsize * 6;
322
323 /* Stack pointer must be quadword aligned. */
324 sp &= -16;
325
326 /* If there are more arguments, allocate space for them in
327 the stack, then push them starting from the ninth one. */
328
329 if ((argno < nargs) || argbytes)
330 {
331 int space = 0, jj;
332
333 if (argbytes)
334 {
335 space += ((len - argbytes + 3) & -4);
336 jj = argno + 1;
337 }
338 else
339 jj = argno;
340
341 for (; jj < nargs; ++jj)
342 {
343 struct value *val = args[jj];
344 space += ((TYPE_LENGTH (value_type (val))) + 3) & -4;
345 }
346
347 /* Add location required for the rest of the parameters. */
348 space = (space + 15) & -16;
349 sp -= space;
350
351 /* This is another instance we need to be concerned about
352 securing our stack space. If we write anything underneath %sp
353 (r1), we might conflict with the kernel who thinks he is free
354 to use this area. So, update %sp first before doing anything
355 else. */
356
357 regcache_raw_write_signed (regcache,
358 gdbarch_sp_regnum (gdbarch), sp);
359
360 /* If the last argument copied into the registers didn't fit there
361 completely, push the rest of it into stack. */
362
363 if (argbytes)
364 {
365 write_memory (sp + 24 + (ii * 4),
366 value_contents (arg) + argbytes,
367 len - argbytes);
368 ++argno;
369 ii += ((len - argbytes + 3) & -4) / 4;
370 }
371
372 /* Push the rest of the arguments into stack. */
373 for (; argno < nargs; ++argno)
374 {
375
376 arg = args[argno];
377 type = check_typedef (value_type (arg));
378 len = TYPE_LENGTH (type);
379
380
381 /* Float types should be passed in fpr's, as well as in the
382 stack. */
383 if (TYPE_CODE (type) == TYPE_CODE_FLT && f_argno < 13)
384 {
385
386 gdb_assert (len <= 8);
387
388 regcache_cooked_write (regcache,
389 tdep->ppc_fp0_regnum + 1 + f_argno,
390 value_contents (arg));
391 ++f_argno;
392 }
393
394 write_memory (sp + 24 + (ii * 4), value_contents (arg), len);
395 ii += ((len + 3) & -4) / 4;
396 }
397 }
398
399 /* Set the stack pointer. According to the ABI, the SP is meant to
400 be set _before_ the corresponding stack space is used. On AIX,
401 this even applies when the target has been completely stopped!
402 Not doing this can lead to conflicts with the kernel which thinks
403 that it still has control over this not-yet-allocated stack
404 region. */
405 regcache_raw_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp);
406
407 /* Set back chain properly. */
408 store_unsigned_integer (tmp_buffer, wordsize, byte_order, saved_sp);
409 write_memory (sp, tmp_buffer, wordsize);
410
411 /* Point the inferior function call's return address at the dummy's
412 breakpoint. */
413 regcache_raw_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
414
415 /* Set the TOC register, get the value from the objfile reader
416 which, in turn, gets it from the VMAP table. */
417 if (rs6000_find_toc_address_hook != NULL)
418 {
419 CORE_ADDR tocvalue = (*rs6000_find_toc_address_hook) (func_addr);
420 regcache_raw_write_signed (regcache, tdep->ppc_toc_regnum, tocvalue);
421 }
422
423 target_store_registers (regcache, -1);
424 return sp;
425 }
426
427 static enum return_value_convention
428 rs6000_return_value (struct gdbarch *gdbarch, struct value *function,
429 struct type *valtype, struct regcache *regcache,
430 gdb_byte *readbuf, const gdb_byte *writebuf)
431 {
432 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
433 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
434
435 /* The calling convention this function implements assumes the
436 processor has floating-point registers. We shouldn't be using it
437 on PowerPC variants that lack them. */
438 gdb_assert (ppc_floating_point_unit_p (gdbarch));
439
440 /* AltiVec extension: Functions that declare a vector data type as a
441 return value place that return value in VR2. */
442 if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY && TYPE_VECTOR (valtype)
443 && TYPE_LENGTH (valtype) == 16)
444 {
445 if (readbuf)
446 regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, readbuf);
447 if (writebuf)
448 regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2, writebuf);
449
450 return RETURN_VALUE_REGISTER_CONVENTION;
451 }
452
453 /* If the called subprogram returns an aggregate, there exists an
454 implicit first argument, whose value is the address of a caller-
455 allocated buffer into which the callee is assumed to store its
456 return value. All explicit parameters are appropriately
457 relabeled. */
458 if (TYPE_CODE (valtype) == TYPE_CODE_STRUCT
459 || TYPE_CODE (valtype) == TYPE_CODE_UNION
460 || TYPE_CODE (valtype) == TYPE_CODE_ARRAY)
461 return RETURN_VALUE_STRUCT_CONVENTION;
462
463 /* Scalar floating-point values are returned in FPR1 for float or
464 double, and in FPR1:FPR2 for quadword precision. Fortran
465 complex*8 and complex*16 are returned in FPR1:FPR2, and
466 complex*32 is returned in FPR1:FPR4. */
467 if (TYPE_CODE (valtype) == TYPE_CODE_FLT
468 && (TYPE_LENGTH (valtype) == 4 || TYPE_LENGTH (valtype) == 8))
469 {
470 struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum);
471 gdb_byte regval[8];
472
473 /* FIXME: kettenis/2007-01-01: Add support for quadword
474 precision and complex. */
475
476 if (readbuf)
477 {
478 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, regval);
479 convert_typed_floating (regval, regtype, readbuf, valtype);
480 }
481 if (writebuf)
482 {
483 convert_typed_floating (writebuf, valtype, regval, regtype);
484 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval);
485 }
486
487 return RETURN_VALUE_REGISTER_CONVENTION;
488 }
489
490 /* Values of the types int, long, short, pointer, and char (length
491 is less than or equal to four bytes), as well as bit values of
492 lengths less than or equal to 32 bits, must be returned right
493 justified in GPR3 with signed values sign extended and unsigned
494 values zero extended, as necessary. */
495 if (TYPE_LENGTH (valtype) <= tdep->wordsize)
496 {
497 if (readbuf)
498 {
499 ULONGEST regval;
500
501 /* For reading we don't have to worry about sign extension. */
502 regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
503 &regval);
504 store_unsigned_integer (readbuf, TYPE_LENGTH (valtype), byte_order,
505 regval);
506 }
507 if (writebuf)
508 {
509 /* For writing, use unpack_long since that should handle any
510 required sign extension. */
511 regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
512 unpack_long (valtype, writebuf));
513 }
514
515 return RETURN_VALUE_REGISTER_CONVENTION;
516 }
517
518 /* Eight-byte non-floating-point scalar values must be returned in
519 GPR3:GPR4. */
520
521 if (TYPE_LENGTH (valtype) == 8)
522 {
523 gdb_assert (TYPE_CODE (valtype) != TYPE_CODE_FLT);
524 gdb_assert (tdep->wordsize == 4);
525
526 if (readbuf)
527 {
528 gdb_byte regval[8];
529
530 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, regval);
531 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
532 regval + 4);
533 memcpy (readbuf, regval, 8);
534 }
535 if (writebuf)
536 {
537 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, writebuf);
538 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
539 writebuf + 4);
540 }
541
542 return RETURN_VALUE_REGISTER_CONVENTION;
543 }
544
545 return RETURN_VALUE_STRUCT_CONVENTION;
546 }
547
548 /* Support for CONVERT_FROM_FUNC_PTR_ADDR (ARCH, ADDR, TARG).
549
550 Usually a function pointer's representation is simply the address
551 of the function. On the RS/6000 however, a function pointer is
552 represented by a pointer to an OPD entry. This OPD entry contains
553 three words, the first word is the address of the function, the
554 second word is the TOC pointer (r2), and the third word is the
555 static chain value. Throughout GDB it is currently assumed that a
556 function pointer contains the address of the function, which is not
557 easy to fix. In addition, the conversion of a function address to
558 a function pointer would require allocation of an OPD entry in the
559 inferior's memory space, with all its drawbacks. To be able to
560 call C++ virtual methods in the inferior (which are called via
561 function pointers), find_function_addr uses this function to get the
562 function address from a function pointer. */
563
564 /* Return real function address if ADDR (a function pointer) is in the data
565 space and is therefore a special function pointer. */
566
567 static CORE_ADDR
568 rs6000_convert_from_func_ptr_addr (struct gdbarch *gdbarch,
569 CORE_ADDR addr,
570 struct target_ops *targ)
571 {
572 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
573 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
574 struct obj_section *s;
575
576 s = find_pc_section (addr);
577
578 /* Normally, functions live inside a section that is executable.
579 So, if ADDR points to a non-executable section, then treat it
580 as a function descriptor and return the target address iff
581 the target address itself points to a section that is executable. */
582 if (s && (s->the_bfd_section->flags & SEC_CODE) == 0)
583 {
584 CORE_ADDR pc = 0;
585 struct obj_section *pc_section;
586 volatile struct gdb_exception e;
587
588 TRY_CATCH (e, RETURN_MASK_ERROR)
589 {
590 pc = read_memory_unsigned_integer (addr, tdep->wordsize, byte_order);
591 }
592 if (e.reason < 0)
593 {
594 /* An error occured during reading. Probably a memory error
595 due to the section not being loaded yet. This address
596 cannot be a function descriptor. */
597 return addr;
598 }
599 pc_section = find_pc_section (pc);
600
601 if (pc_section && (pc_section->the_bfd_section->flags & SEC_CODE))
602 return pc;
603 }
604
605 return addr;
606 }
607
608
609 /* Calculate the destination of a branch/jump. Return -1 if not a branch. */
610
611 static CORE_ADDR
612 branch_dest (struct frame_info *frame, int opcode, int instr,
613 CORE_ADDR pc, CORE_ADDR safety)
614 {
615 struct gdbarch *gdbarch = get_frame_arch (frame);
616 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
617 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
618 CORE_ADDR dest;
619 int immediate;
620 int absolute;
621 int ext_op;
622
623 absolute = (int) ((instr >> 1) & 1);
624
625 switch (opcode)
626 {
627 case 18:
628 immediate = ((instr & ~3) << 6) >> 6; /* br unconditional */
629 if (absolute)
630 dest = immediate;
631 else
632 dest = pc + immediate;
633 break;
634
635 case 16:
636 immediate = ((instr & ~3) << 16) >> 16; /* br conditional */
637 if (absolute)
638 dest = immediate;
639 else
640 dest = pc + immediate;
641 break;
642
643 case 19:
644 ext_op = (instr >> 1) & 0x3ff;
645
646 if (ext_op == 16) /* br conditional register */
647 {
648 dest = get_frame_register_unsigned (frame, tdep->ppc_lr_regnum) & ~3;
649
650 /* If we are about to return from a signal handler, dest is
651 something like 0x3c90. The current frame is a signal handler
652 caller frame, upon completion of the sigreturn system call
653 execution will return to the saved PC in the frame. */
654 if (dest < AIX_TEXT_SEGMENT_BASE)
655 dest = read_memory_unsigned_integer
656 (get_frame_base (frame) + SIG_FRAME_PC_OFFSET,
657 tdep->wordsize, byte_order);
658 }
659
660 else if (ext_op == 528) /* br cond to count reg */
661 {
662 dest = get_frame_register_unsigned (frame,
663 tdep->ppc_ctr_regnum) & ~3;
664
665 /* If we are about to execute a system call, dest is something
666 like 0x22fc or 0x3b00. Upon completion the system call
667 will return to the address in the link register. */
668 if (dest < AIX_TEXT_SEGMENT_BASE)
669 dest = get_frame_register_unsigned (frame,
670 tdep->ppc_lr_regnum) & ~3;
671 }
672 else
673 return -1;
674 break;
675
676 default:
677 return -1;
678 }
679 return (dest < AIX_TEXT_SEGMENT_BASE) ? safety : dest;
680 }
681
682 /* AIX does not support PT_STEP. Simulate it. */
683
684 static int
685 rs6000_software_single_step (struct frame_info *frame)
686 {
687 struct gdbarch *gdbarch = get_frame_arch (frame);
688 struct address_space *aspace = get_frame_address_space (frame);
689 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
690 int ii, insn;
691 CORE_ADDR loc;
692 CORE_ADDR breaks[2];
693 int opcode;
694
695 loc = get_frame_pc (frame);
696
697 insn = read_memory_integer (loc, 4, byte_order);
698
699 if (ppc_deal_with_atomic_sequence (frame))
700 return 1;
701
702 breaks[0] = loc + PPC_INSN_SIZE;
703 opcode = insn >> 26;
704 breaks[1] = branch_dest (frame, opcode, insn, loc, breaks[0]);
705
706 /* Don't put two breakpoints on the same address. */
707 if (breaks[1] == breaks[0])
708 breaks[1] = -1;
709
710 for (ii = 0; ii < 2; ++ii)
711 {
712 /* ignore invalid breakpoint. */
713 if (breaks[ii] == -1)
714 continue;
715 insert_single_step_breakpoint (gdbarch, aspace, breaks[ii]);
716 }
717
718 errno = 0; /* FIXME, don't ignore errors! */
719 /* What errors? {read,write}_memory call error(). */
720 return 1;
721 }
722
723 /* Implement the "auto_wide_charset" gdbarch method for this platform. */
724
725 static const char *
726 rs6000_aix_auto_wide_charset (void)
727 {
728 return "UTF-16";
729 }
730
731 /* Implement an osabi sniffer for RS6000/AIX.
732
733 This function assumes that ABFD's flavour is XCOFF. In other words,
734 it should be registered as a sniffer for bfd_target_xcoff_flavour
735 objfiles only. A failed assertion will be raised if this condition
736 is not met. */
737
738 static enum gdb_osabi
739 rs6000_aix_osabi_sniffer (bfd *abfd)
740 {
741 gdb_assert (bfd_get_flavour (abfd) == bfd_target_xcoff_flavour);
742
743 /* The only noticeable difference between Lynx178 XCOFF files and
744 AIX XCOFF files comes from the fact that there are no shared
745 libraries on Lynx178. On AIX, we are betting that an executable
746 linked with no shared library will never exist. */
747 if (xcoff_get_n_import_files (abfd) <= 0)
748 return GDB_OSABI_UNKNOWN;
749
750 return GDB_OSABI_AIX;
751 }
752
753 static void
754 rs6000_aix_init_osabi (struct gdbarch_info info, struct gdbarch *gdbarch)
755 {
756 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
757
758 /* RS6000/AIX does not support PT_STEP. Has to be simulated. */
759 set_gdbarch_software_single_step (gdbarch, rs6000_software_single_step);
760
761 /* Displaced stepping is currently not supported in combination with
762 software single-stepping. */
763 set_gdbarch_displaced_step_copy_insn (gdbarch, NULL);
764 set_gdbarch_displaced_step_fixup (gdbarch, NULL);
765 set_gdbarch_displaced_step_free_closure (gdbarch, NULL);
766 set_gdbarch_displaced_step_location (gdbarch, NULL);
767
768 set_gdbarch_push_dummy_call (gdbarch, rs6000_push_dummy_call);
769 set_gdbarch_return_value (gdbarch, rs6000_return_value);
770 set_gdbarch_long_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
771
772 /* Handle RS/6000 function pointers (which are really function
773 descriptors). */
774 set_gdbarch_convert_from_func_ptr_addr
775 (gdbarch, rs6000_convert_from_func_ptr_addr);
776
777 /* Core file support. */
778 set_gdbarch_regset_from_core_section
779 (gdbarch, rs6000_aix_regset_from_core_section);
780
781 if (tdep->wordsize == 8)
782 tdep->lr_frame_offset = 16;
783 else
784 tdep->lr_frame_offset = 8;
785
786 if (tdep->wordsize == 4)
787 /* PowerOpen / AIX 32 bit. The saved area or red zone consists of
788 19 4 byte GPRS + 18 8 byte FPRs giving a total of 220 bytes.
789 Problem is, 220 isn't frame (16 byte) aligned. Round it up to
790 224. */
791 set_gdbarch_frame_red_zone_size (gdbarch, 224);
792 else
793 set_gdbarch_frame_red_zone_size (gdbarch, 0);
794
795 set_gdbarch_auto_wide_charset (gdbarch, rs6000_aix_auto_wide_charset);
796 }
797
798 /* Provide a prototype to silence -Wmissing-prototypes. */
799 extern initialize_file_ftype _initialize_rs6000_aix_tdep;
800
801 void
802 _initialize_rs6000_aix_tdep (void)
803 {
804 gdbarch_register_osabi_sniffer (bfd_arch_rs6000,
805 bfd_target_xcoff_flavour,
806 rs6000_aix_osabi_sniffer);
807 gdbarch_register_osabi_sniffer (bfd_arch_powerpc,
808 bfd_target_xcoff_flavour,
809 rs6000_aix_osabi_sniffer);
810
811 gdbarch_register_osabi (bfd_arch_rs6000, 0, GDB_OSABI_AIX,
812 rs6000_aix_init_osabi);
813 gdbarch_register_osabi (bfd_arch_powerpc, 0, GDB_OSABI_AIX,
814 rs6000_aix_init_osabi);
815 }
816
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