1 /* Target-dependent code for GDB, the GNU debugger.
2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002
4 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
32 #include "arch-utils.h"
36 #include "parser-defs.h"
38 #include "libbfd.h" /* for bfd_default_set_arch_mach */
39 #include "coff/internal.h" /* for libcoff.h */
40 #include "libcoff.h" /* for xcoff_data */
41 #include "coff/xcoff.h"
46 #include "solib-svr4.h"
49 /* If the kernel has to deliver a signal, it pushes a sigcontext
50 structure on the stack and then calls the signal handler, passing
51 the address of the sigcontext in an argument register. Usually
52 the signal handler doesn't save this register, so we have to
53 access the sigcontext structure via an offset from the signal handler
55 The following constants were determined by experimentation on AIX 3.2. */
56 #define SIG_FRAME_PC_OFFSET 96
57 #define SIG_FRAME_LR_OFFSET 108
58 #define SIG_FRAME_FP_OFFSET 284
60 /* To be used by skip_prologue. */
62 struct rs6000_framedata
64 int offset
; /* total size of frame --- the distance
65 by which we decrement sp to allocate
67 int saved_gpr
; /* smallest # of saved gpr */
68 int saved_fpr
; /* smallest # of saved fpr */
69 int saved_vr
; /* smallest # of saved vr */
70 int saved_ev
; /* smallest # of saved ev */
71 int alloca_reg
; /* alloca register number (frame ptr) */
72 char frameless
; /* true if frameless functions. */
73 char nosavedpc
; /* true if pc not saved. */
74 int gpr_offset
; /* offset of saved gprs from prev sp */
75 int fpr_offset
; /* offset of saved fprs from prev sp */
76 int vr_offset
; /* offset of saved vrs from prev sp */
77 int ev_offset
; /* offset of saved evs from prev sp */
78 int lr_offset
; /* offset of saved lr */
79 int cr_offset
; /* offset of saved cr */
80 int vrsave_offset
; /* offset of saved vrsave register */
83 /* Description of a single register. */
87 char *name
; /* name of register */
88 unsigned char sz32
; /* size on 32-bit arch, 0 if nonextant */
89 unsigned char sz64
; /* size on 64-bit arch, 0 if nonextant */
90 unsigned char fpr
; /* whether register is floating-point */
91 unsigned char pseudo
; /* whether register is pseudo */
94 /* Breakpoint shadows for the single step instructions will be kept here. */
96 static struct sstep_breaks
98 /* Address, or 0 if this is not in use. */
100 /* Shadow contents. */
105 /* Hook for determining the TOC address when calling functions in the
106 inferior under AIX. The initialization code in rs6000-nat.c sets
107 this hook to point to find_toc_address. */
109 CORE_ADDR (*rs6000_find_toc_address_hook
) (CORE_ADDR
) = NULL
;
111 /* Hook to set the current architecture when starting a child process.
112 rs6000-nat.c sets this. */
114 void (*rs6000_set_host_arch_hook
) (int) = NULL
;
116 /* Static function prototypes */
118 static CORE_ADDR
branch_dest (int opcode
, int instr
, CORE_ADDR pc
,
120 static CORE_ADDR
skip_prologue (CORE_ADDR
, CORE_ADDR
,
121 struct rs6000_framedata
*);
122 static void frame_get_saved_regs (struct frame_info
* fi
,
123 struct rs6000_framedata
* fdatap
);
124 static CORE_ADDR
frame_initial_stack_address (struct frame_info
*);
126 /* Is REGNO an AltiVec register? Return 1 if so, 0 otherwise. */
128 altivec_register_p (int regno
)
130 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
131 if (tdep
->ppc_vr0_regnum
< 0 || tdep
->ppc_vrsave_regnum
< 0)
134 return (regno
>= tdep
->ppc_vr0_regnum
&& regno
<= tdep
->ppc_vrsave_regnum
);
137 /* Read a LEN-byte address from debugged memory address MEMADDR. */
140 read_memory_addr (CORE_ADDR memaddr
, int len
)
142 return read_memory_unsigned_integer (memaddr
, len
);
146 rs6000_skip_prologue (CORE_ADDR pc
)
148 struct rs6000_framedata frame
;
149 pc
= skip_prologue (pc
, 0, &frame
);
154 /* Fill in fi->saved_regs */
156 struct frame_extra_info
158 /* Functions calling alloca() change the value of the stack
159 pointer. We need to use initial stack pointer (which is saved in
160 r31 by gcc) in such cases. If a compiler emits traceback table,
161 then we should use the alloca register specified in traceback
163 CORE_ADDR initial_sp
; /* initial stack pointer. */
167 rs6000_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
169 fi
->extra_info
= (struct frame_extra_info
*)
170 frame_obstack_alloc (sizeof (struct frame_extra_info
));
171 fi
->extra_info
->initial_sp
= 0;
172 if (get_next_frame (fi
) != NULL
173 && get_frame_pc (fi
) < TEXT_SEGMENT_BASE
)
174 /* We're in get_prev_frame */
175 /* and this is a special signal frame. */
176 /* (fi->pc will be some low address in the kernel, */
177 /* to which the signal handler returns). */
178 deprecated_set_frame_type (fi
, SIGTRAMP_FRAME
);
181 /* Put here the code to store, into a struct frame_saved_regs,
182 the addresses of the saved registers of frame described by FRAME_INFO.
183 This includes special registers such as pc and fp saved in special
184 ways in the stack frame. sp is even more special:
185 the address we return for it IS the sp for the next frame. */
187 /* In this implementation for RS/6000, we do *not* save sp. I am
188 not sure if it will be needed. The following function takes care of gpr's
192 rs6000_frame_init_saved_regs (struct frame_info
*fi
)
194 frame_get_saved_regs (fi
, NULL
);
198 rs6000_frame_args_address (struct frame_info
*fi
)
200 if (fi
->extra_info
->initial_sp
!= 0)
201 return fi
->extra_info
->initial_sp
;
203 return frame_initial_stack_address (fi
);
206 /* Immediately after a function call, return the saved pc.
207 Can't go through the frames for this because on some machines
208 the new frame is not set up until the new function executes
209 some instructions. */
212 rs6000_saved_pc_after_call (struct frame_info
*fi
)
214 return read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
);
217 /* Calculate the destination of a branch/jump. Return -1 if not a branch. */
220 branch_dest (int opcode
, int instr
, CORE_ADDR pc
, CORE_ADDR safety
)
227 absolute
= (int) ((instr
>> 1) & 1);
232 immediate
= ((instr
& ~3) << 6) >> 6; /* br unconditional */
236 dest
= pc
+ immediate
;
240 immediate
= ((instr
& ~3) << 16) >> 16; /* br conditional */
244 dest
= pc
+ immediate
;
248 ext_op
= (instr
>> 1) & 0x3ff;
250 if (ext_op
== 16) /* br conditional register */
252 dest
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
) & ~3;
254 /* If we are about to return from a signal handler, dest is
255 something like 0x3c90. The current frame is a signal handler
256 caller frame, upon completion of the sigreturn system call
257 execution will return to the saved PC in the frame. */
258 if (dest
< TEXT_SEGMENT_BASE
)
260 struct frame_info
*fi
;
262 fi
= get_current_frame ();
264 dest
= read_memory_addr (get_frame_base (fi
) + SIG_FRAME_PC_OFFSET
,
265 gdbarch_tdep (current_gdbarch
)->wordsize
);
269 else if (ext_op
== 528) /* br cond to count reg */
271 dest
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_ctr_regnum
) & ~3;
273 /* If we are about to execute a system call, dest is something
274 like 0x22fc or 0x3b00. Upon completion the system call
275 will return to the address in the link register. */
276 if (dest
< TEXT_SEGMENT_BASE
)
277 dest
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
) & ~3;
286 return (dest
< TEXT_SEGMENT_BASE
) ? safety
: dest
;
290 /* Sequence of bytes for breakpoint instruction. */
292 #define BIG_BREAKPOINT { 0x7d, 0x82, 0x10, 0x08 }
293 #define LITTLE_BREAKPOINT { 0x08, 0x10, 0x82, 0x7d }
295 const static unsigned char *
296 rs6000_breakpoint_from_pc (CORE_ADDR
*bp_addr
, int *bp_size
)
298 static unsigned char big_breakpoint
[] = BIG_BREAKPOINT
;
299 static unsigned char little_breakpoint
[] = LITTLE_BREAKPOINT
;
301 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
302 return big_breakpoint
;
304 return little_breakpoint
;
308 /* AIX does not support PT_STEP. Simulate it. */
311 rs6000_software_single_step (enum target_signal signal
,
312 int insert_breakpoints_p
)
316 const char *breakp
= rs6000_breakpoint_from_pc (&dummy
, &breakp_sz
);
322 if (insert_breakpoints_p
)
327 insn
= read_memory_integer (loc
, 4);
329 breaks
[0] = loc
+ breakp_sz
;
331 breaks
[1] = branch_dest (opcode
, insn
, loc
, breaks
[0]);
333 /* Don't put two breakpoints on the same address. */
334 if (breaks
[1] == breaks
[0])
337 stepBreaks
[1].address
= 0;
339 for (ii
= 0; ii
< 2; ++ii
)
342 /* ignore invalid breakpoint. */
343 if (breaks
[ii
] == -1)
345 target_insert_breakpoint (breaks
[ii
], stepBreaks
[ii
].data
);
346 stepBreaks
[ii
].address
= breaks
[ii
];
353 /* remove step breakpoints. */
354 for (ii
= 0; ii
< 2; ++ii
)
355 if (stepBreaks
[ii
].address
!= 0)
356 target_remove_breakpoint (stepBreaks
[ii
].address
,
357 stepBreaks
[ii
].data
);
359 errno
= 0; /* FIXME, don't ignore errors! */
360 /* What errors? {read,write}_memory call error(). */
364 /* return pc value after skipping a function prologue and also return
365 information about a function frame.
367 in struct rs6000_framedata fdata:
368 - frameless is TRUE, if function does not have a frame.
369 - nosavedpc is TRUE, if function does not save %pc value in its frame.
370 - offset is the initial size of this stack frame --- the amount by
371 which we decrement the sp to allocate the frame.
372 - saved_gpr is the number of the first saved gpr.
373 - saved_fpr is the number of the first saved fpr.
374 - saved_vr is the number of the first saved vr.
375 - saved_ev is the number of the first saved ev.
376 - alloca_reg is the number of the register used for alloca() handling.
378 - gpr_offset is the offset of the first saved gpr from the previous frame.
379 - fpr_offset is the offset of the first saved fpr from the previous frame.
380 - vr_offset is the offset of the first saved vr from the previous frame.
381 - ev_offset is the offset of the first saved ev from the previous frame.
382 - lr_offset is the offset of the saved lr
383 - cr_offset is the offset of the saved cr
384 - vrsave_offset is the offset of the saved vrsave register
387 #define SIGNED_SHORT(x) \
388 ((sizeof (short) == 2) \
389 ? ((int)(short)(x)) \
390 : ((int)((((x) & 0xffff) ^ 0x8000) - 0x8000)))
392 #define GET_SRC_REG(x) (((x) >> 21) & 0x1f)
394 /* Limit the number of skipped non-prologue instructions, as the examining
395 of the prologue is expensive. */
396 static int max_skip_non_prologue_insns
= 10;
398 /* Given PC representing the starting address of a function, and
399 LIM_PC which is the (sloppy) limit to which to scan when looking
400 for a prologue, attempt to further refine this limit by using
401 the line data in the symbol table. If successful, a better guess
402 on where the prologue ends is returned, otherwise the previous
403 value of lim_pc is returned. */
405 refine_prologue_limit (CORE_ADDR pc
, CORE_ADDR lim_pc
)
407 struct symtab_and_line prologue_sal
;
409 prologue_sal
= find_pc_line (pc
, 0);
410 if (prologue_sal
.line
!= 0)
413 CORE_ADDR addr
= prologue_sal
.end
;
415 /* Handle the case in which compiler's optimizer/scheduler
416 has moved instructions into the prologue. We scan ahead
417 in the function looking for address ranges whose corresponding
418 line number is less than or equal to the first one that we
419 found for the function. (It can be less than when the
420 scheduler puts a body instruction before the first prologue
422 for (i
= 2 * max_skip_non_prologue_insns
;
423 i
> 0 && (lim_pc
== 0 || addr
< lim_pc
);
426 struct symtab_and_line sal
;
428 sal
= find_pc_line (addr
, 0);
431 if (sal
.line
<= prologue_sal
.line
432 && sal
.symtab
== prologue_sal
.symtab
)
439 if (lim_pc
== 0 || prologue_sal
.end
< lim_pc
)
440 lim_pc
= prologue_sal
.end
;
447 skip_prologue (CORE_ADDR pc
, CORE_ADDR lim_pc
, struct rs6000_framedata
*fdata
)
449 CORE_ADDR orig_pc
= pc
;
450 CORE_ADDR last_prologue_pc
= pc
;
451 CORE_ADDR li_found_pc
= 0;
455 long vr_saved_offset
= 0;
464 int minimal_toc_loaded
= 0;
465 int prev_insn_was_prologue_insn
= 1;
466 int num_skip_non_prologue_insns
= 0;
467 const struct bfd_arch_info
*arch_info
= gdbarch_bfd_arch_info (current_gdbarch
);
468 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
470 /* Attempt to find the end of the prologue when no limit is specified.
471 Note that refine_prologue_limit() has been written so that it may
472 be used to "refine" the limits of non-zero PC values too, but this
473 is only safe if we 1) trust the line information provided by the
474 compiler and 2) iterate enough to actually find the end of the
477 It may become a good idea at some point (for both performance and
478 accuracy) to unconditionally call refine_prologue_limit(). But,
479 until we can make a clear determination that this is beneficial,
480 we'll play it safe and only use it to obtain a limit when none
481 has been specified. */
483 lim_pc
= refine_prologue_limit (pc
, lim_pc
);
485 memset (fdata
, 0, sizeof (struct rs6000_framedata
));
486 fdata
->saved_gpr
= -1;
487 fdata
->saved_fpr
= -1;
488 fdata
->saved_vr
= -1;
489 fdata
->saved_ev
= -1;
490 fdata
->alloca_reg
= -1;
491 fdata
->frameless
= 1;
492 fdata
->nosavedpc
= 1;
496 /* Sometimes it isn't clear if an instruction is a prologue
497 instruction or not. When we encounter one of these ambiguous
498 cases, we'll set prev_insn_was_prologue_insn to 0 (false).
499 Otherwise, we'll assume that it really is a prologue instruction. */
500 if (prev_insn_was_prologue_insn
)
501 last_prologue_pc
= pc
;
503 /* Stop scanning if we've hit the limit. */
504 if (lim_pc
!= 0 && pc
>= lim_pc
)
507 prev_insn_was_prologue_insn
= 1;
509 /* Fetch the instruction and convert it to an integer. */
510 if (target_read_memory (pc
, buf
, 4))
512 op
= extract_signed_integer (buf
, 4);
514 if ((op
& 0xfc1fffff) == 0x7c0802a6)
516 lr_reg
= (op
& 0x03e00000) | 0x90010000;
520 else if ((op
& 0xfc1fffff) == 0x7c000026)
522 cr_reg
= (op
& 0x03e00000) | 0x90010000;
526 else if ((op
& 0xfc1f0000) == 0xd8010000)
527 { /* stfd Rx,NUM(r1) */
528 reg
= GET_SRC_REG (op
);
529 if (fdata
->saved_fpr
== -1 || fdata
->saved_fpr
> reg
)
531 fdata
->saved_fpr
= reg
;
532 fdata
->fpr_offset
= SIGNED_SHORT (op
) + offset
;
537 else if (((op
& 0xfc1f0000) == 0xbc010000) || /* stm Rx, NUM(r1) */
538 (((op
& 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */
539 (op
& 0xfc1f0003) == 0xf8010000) && /* std rx,NUM(r1) */
540 (op
& 0x03e00000) >= 0x01a00000)) /* rx >= r13 */
543 reg
= GET_SRC_REG (op
);
544 if (fdata
->saved_gpr
== -1 || fdata
->saved_gpr
> reg
)
546 fdata
->saved_gpr
= reg
;
547 if ((op
& 0xfc1f0003) == 0xf8010000)
549 fdata
->gpr_offset
= SIGNED_SHORT (op
) + offset
;
554 else if ((op
& 0xffff0000) == 0x60000000)
557 /* Allow nops in the prologue, but do not consider them to
558 be part of the prologue unless followed by other prologue
560 prev_insn_was_prologue_insn
= 0;
564 else if ((op
& 0xffff0000) == 0x3c000000)
565 { /* addis 0,0,NUM, used
567 fdata
->offset
= (op
& 0x0000ffff) << 16;
568 fdata
->frameless
= 0;
572 else if ((op
& 0xffff0000) == 0x60000000)
573 { /* ori 0,0,NUM, 2nd ha
574 lf of >= 32k frames */
575 fdata
->offset
|= (op
& 0x0000ffff);
576 fdata
->frameless
= 0;
580 else if (lr_reg
!= -1 && (op
& 0xffff0000) == lr_reg
)
583 fdata
->lr_offset
= SIGNED_SHORT (op
) + offset
;
584 fdata
->nosavedpc
= 0;
589 else if (cr_reg
!= -1 && (op
& 0xffff0000) == cr_reg
)
592 fdata
->cr_offset
= SIGNED_SHORT (op
) + offset
;
597 else if (op
== 0x48000005)
603 else if (op
== 0x48000004)
608 else if ((op
& 0xffff0000) == 0x3fc00000 || /* addis 30,0,foo@ha, used
609 in V.4 -mminimal-toc */
610 (op
& 0xffff0000) == 0x3bde0000)
611 { /* addi 30,30,foo@l */
615 else if ((op
& 0xfc000001) == 0x48000001)
619 fdata
->frameless
= 0;
620 /* Don't skip over the subroutine call if it is not within
621 the first three instructions of the prologue. */
622 if ((pc
- orig_pc
) > 8)
625 op
= read_memory_integer (pc
+ 4, 4);
627 /* At this point, make sure this is not a trampoline
628 function (a function that simply calls another functions,
629 and nothing else). If the next is not a nop, this branch
630 was part of the function prologue. */
632 if (op
== 0x4def7b82 || op
== 0) /* crorc 15, 15, 15 */
633 break; /* don't skip over
637 /* update stack pointer */
639 else if ((op
& 0xffff0000) == 0x94210000 || /* stu r1,NUM(r1) */
640 (op
& 0xffff0003) == 0xf8210001) /* stdu r1,NUM(r1) */
642 fdata
->frameless
= 0;
643 if ((op
& 0xffff0003) == 0xf8210001)
645 fdata
->offset
= SIGNED_SHORT (op
);
646 offset
= fdata
->offset
;
650 else if (op
== 0x7c21016e)
652 fdata
->frameless
= 0;
653 offset
= fdata
->offset
;
656 /* Load up minimal toc pointer */
658 else if ((op
>> 22) == 0x20f
659 && !minimal_toc_loaded
)
660 { /* l r31,... or l r30,... */
661 minimal_toc_loaded
= 1;
664 /* move parameters from argument registers to local variable
667 else if ((op
& 0xfc0007fe) == 0x7c000378 && /* mr(.) Rx,Ry */
668 (((op
>> 21) & 31) >= 3) && /* R3 >= Ry >= R10 */
669 (((op
>> 21) & 31) <= 10) &&
670 ((long) ((op
>> 16) & 31) >= fdata
->saved_gpr
)) /* Rx: local var reg */
674 /* store parameters in stack */
676 else if ((op
& 0xfc1f0003) == 0xf8010000 || /* std rx,NUM(r1) */
677 (op
& 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */
678 (op
& 0xfc1f0000) == 0xfc010000) /* frsp, fp?,NUM(r1) */
682 /* store parameters in stack via frame pointer */
685 ((op
& 0xfc1f0000) == 0x901f0000 || /* st rx,NUM(r1) */
686 (op
& 0xfc1f0000) == 0xd81f0000 || /* stfd Rx,NUM(r1) */
687 (op
& 0xfc1f0000) == 0xfc1f0000))
688 { /* frsp, fp?,NUM(r1) */
691 /* Set up frame pointer */
693 else if (op
== 0x603f0000 /* oril r31, r1, 0x0 */
696 fdata
->frameless
= 0;
698 fdata
->alloca_reg
= (tdep
->ppc_gp0_regnum
+ 31);
701 /* Another way to set up the frame pointer. */
703 else if ((op
& 0xfc1fffff) == 0x38010000)
704 { /* addi rX, r1, 0x0 */
705 fdata
->frameless
= 0;
707 fdata
->alloca_reg
= (tdep
->ppc_gp0_regnum
708 + ((op
& ~0x38010000) >> 21));
711 /* AltiVec related instructions. */
712 /* Store the vrsave register (spr 256) in another register for
713 later manipulation, or load a register into the vrsave
714 register. 2 instructions are used: mfvrsave and
715 mtvrsave. They are shorthand notation for mfspr Rn, SPR256
716 and mtspr SPR256, Rn. */
717 /* mfspr Rn SPR256 == 011111 nnnnn 0000001000 01010100110
718 mtspr SPR256 Rn == 011111 nnnnn 0000001000 01110100110 */
719 else if ((op
& 0xfc1fffff) == 0x7c0042a6) /* mfvrsave Rn */
721 vrsave_reg
= GET_SRC_REG (op
);
724 else if ((op
& 0xfc1fffff) == 0x7c0043a6) /* mtvrsave Rn */
728 /* Store the register where vrsave was saved to onto the stack:
729 rS is the register where vrsave was stored in a previous
731 /* 100100 sssss 00001 dddddddd dddddddd */
732 else if ((op
& 0xfc1f0000) == 0x90010000) /* stw rS, d(r1) */
734 if (vrsave_reg
== GET_SRC_REG (op
))
736 fdata
->vrsave_offset
= SIGNED_SHORT (op
) + offset
;
741 /* Compute the new value of vrsave, by modifying the register
742 where vrsave was saved to. */
743 else if (((op
& 0xfc000000) == 0x64000000) /* oris Ra, Rs, UIMM */
744 || ((op
& 0xfc000000) == 0x60000000))/* ori Ra, Rs, UIMM */
748 /* li r0, SIMM (short for addi r0, 0, SIMM). This is the first
749 in a pair of insns to save the vector registers on the
751 /* 001110 00000 00000 iiii iiii iiii iiii */
752 /* 001110 01110 00000 iiii iiii iiii iiii */
753 else if ((op
& 0xffff0000) == 0x38000000 /* li r0, SIMM */
754 || (op
& 0xffff0000) == 0x39c00000) /* li r14, SIMM */
757 vr_saved_offset
= SIGNED_SHORT (op
);
759 /* Store vector register S at (r31+r0) aligned to 16 bytes. */
760 /* 011111 sssss 11111 00000 00111001110 */
761 else if ((op
& 0xfc1fffff) == 0x7c1f01ce) /* stvx Vs, R31, R0 */
763 if (pc
== (li_found_pc
+ 4))
765 vr_reg
= GET_SRC_REG (op
);
766 /* If this is the first vector reg to be saved, or if
767 it has a lower number than others previously seen,
768 reupdate the frame info. */
769 if (fdata
->saved_vr
== -1 || fdata
->saved_vr
> vr_reg
)
771 fdata
->saved_vr
= vr_reg
;
772 fdata
->vr_offset
= vr_saved_offset
+ offset
;
774 vr_saved_offset
= -1;
779 /* End AltiVec related instructions. */
781 /* Start BookE related instructions. */
782 /* Store gen register S at (r31+uimm).
783 Any register less than r13 is volatile, so we don't care. */
784 /* 000100 sssss 11111 iiiii 01100100001 */
785 else if (arch_info
->mach
== bfd_mach_ppc_e500
786 && (op
& 0xfc1f07ff) == 0x101f0321) /* evstdd Rs,uimm(R31) */
788 if ((op
& 0x03e00000) >= 0x01a00000) /* Rs >= r13 */
791 ev_reg
= GET_SRC_REG (op
);
792 imm
= (op
>> 11) & 0x1f;
794 /* If this is the first vector reg to be saved, or if
795 it has a lower number than others previously seen,
796 reupdate the frame info. */
797 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
799 fdata
->saved_ev
= ev_reg
;
800 fdata
->ev_offset
= ev_offset
+ offset
;
805 /* Store gen register rS at (r1+rB). */
806 /* 000100 sssss 00001 bbbbb 01100100000 */
807 else if (arch_info
->mach
== bfd_mach_ppc_e500
808 && (op
& 0xffe007ff) == 0x13e00320) /* evstddx RS,R1,Rb */
810 if (pc
== (li_found_pc
+ 4))
812 ev_reg
= GET_SRC_REG (op
);
813 /* If this is the first vector reg to be saved, or if
814 it has a lower number than others previously seen,
815 reupdate the frame info. */
816 /* We know the contents of rB from the previous instruction. */
817 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
819 fdata
->saved_ev
= ev_reg
;
820 fdata
->ev_offset
= vr_saved_offset
+ offset
;
822 vr_saved_offset
= -1;
828 /* Store gen register r31 at (rA+uimm). */
829 /* 000100 11111 aaaaa iiiii 01100100001 */
830 else if (arch_info
->mach
== bfd_mach_ppc_e500
831 && (op
& 0xffe007ff) == 0x13e00321) /* evstdd R31,Ra,UIMM */
833 /* Wwe know that the source register is 31 already, but
834 it can't hurt to compute it. */
835 ev_reg
= GET_SRC_REG (op
);
836 ev_offset
= ((op
>> 11) & 0x1f) * 8;
837 /* If this is the first vector reg to be saved, or if
838 it has a lower number than others previously seen,
839 reupdate the frame info. */
840 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
842 fdata
->saved_ev
= ev_reg
;
843 fdata
->ev_offset
= ev_offset
+ offset
;
848 /* Store gen register S at (r31+r0).
849 Store param on stack when offset from SP bigger than 4 bytes. */
850 /* 000100 sssss 11111 00000 01100100000 */
851 else if (arch_info
->mach
== bfd_mach_ppc_e500
852 && (op
& 0xfc1fffff) == 0x101f0320) /* evstddx Rs,R31,R0 */
854 if (pc
== (li_found_pc
+ 4))
856 if ((op
& 0x03e00000) >= 0x01a00000)
858 ev_reg
= GET_SRC_REG (op
);
859 /* If this is the first vector reg to be saved, or if
860 it has a lower number than others previously seen,
861 reupdate the frame info. */
862 /* We know the contents of r0 from the previous
864 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
866 fdata
->saved_ev
= ev_reg
;
867 fdata
->ev_offset
= vr_saved_offset
+ offset
;
871 vr_saved_offset
= -1;
876 /* End BookE related instructions. */
880 /* Not a recognized prologue instruction.
881 Handle optimizer code motions into the prologue by continuing
882 the search if we have no valid frame yet or if the return
883 address is not yet saved in the frame. */
884 if (fdata
->frameless
== 0
885 && (lr_reg
== -1 || fdata
->nosavedpc
== 0))
888 if (op
== 0x4e800020 /* blr */
889 || op
== 0x4e800420) /* bctr */
890 /* Do not scan past epilogue in frameless functions or
893 if ((op
& 0xf4000000) == 0x40000000) /* bxx */
894 /* Never skip branches. */
897 if (num_skip_non_prologue_insns
++ > max_skip_non_prologue_insns
)
898 /* Do not scan too many insns, scanning insns is expensive with
902 /* Continue scanning. */
903 prev_insn_was_prologue_insn
= 0;
909 /* I have problems with skipping over __main() that I need to address
910 * sometime. Previously, I used to use misc_function_vector which
911 * didn't work as well as I wanted to be. -MGO */
913 /* If the first thing after skipping a prolog is a branch to a function,
914 this might be a call to an initializer in main(), introduced by gcc2.
915 We'd like to skip over it as well. Fortunately, xlc does some extra
916 work before calling a function right after a prologue, thus we can
917 single out such gcc2 behaviour. */
920 if ((op
& 0xfc000001) == 0x48000001)
921 { /* bl foo, an initializer function? */
922 op
= read_memory_integer (pc
+ 4, 4);
924 if (op
== 0x4def7b82)
925 { /* cror 0xf, 0xf, 0xf (nop) */
927 /* Check and see if we are in main. If so, skip over this
928 initializer function as well. */
930 tmp
= find_pc_misc_function (pc
);
931 if (tmp
>= 0 && STREQ (misc_function_vector
[tmp
].name
, main_name ()))
937 fdata
->offset
= -fdata
->offset
;
938 return last_prologue_pc
;
942 /*************************************************************************
943 Support for creating pushing a dummy frame into the stack, and popping
945 *************************************************************************/
948 /* Pop the innermost frame, go back to the caller. */
951 rs6000_pop_frame (void)
953 CORE_ADDR pc
, lr
, sp
, prev_sp
, addr
; /* %pc, %lr, %sp */
954 struct rs6000_framedata fdata
;
955 struct frame_info
*frame
= get_current_frame ();
959 sp
= get_frame_base (frame
);
961 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame
),
962 get_frame_base (frame
),
963 get_frame_base (frame
)))
965 generic_pop_dummy_frame ();
966 flush_cached_frames ();
970 /* Make sure that all registers are valid. */
971 deprecated_read_register_bytes (0, NULL
, REGISTER_BYTES
);
973 /* Figure out previous %pc value. If the function is frameless, it is
974 still in the link register, otherwise walk the frames and retrieve the
975 saved %pc value in the previous frame. */
977 addr
= get_pc_function_start (get_frame_pc (frame
));
978 (void) skip_prologue (addr
, get_frame_pc (frame
), &fdata
);
980 wordsize
= gdbarch_tdep (current_gdbarch
)->wordsize
;
984 prev_sp
= read_memory_addr (sp
, wordsize
);
985 if (fdata
.lr_offset
== 0)
986 lr
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
);
988 lr
= read_memory_addr (prev_sp
+ fdata
.lr_offset
, wordsize
);
990 /* reset %pc value. */
991 write_register (PC_REGNUM
, lr
);
993 /* reset register values if any was saved earlier. */
995 if (fdata
.saved_gpr
!= -1)
997 addr
= prev_sp
+ fdata
.gpr_offset
;
998 for (ii
= fdata
.saved_gpr
; ii
<= 31; ++ii
)
1000 read_memory (addr
, &deprecated_registers
[REGISTER_BYTE (ii
)],
1006 if (fdata
.saved_fpr
!= -1)
1008 addr
= prev_sp
+ fdata
.fpr_offset
;
1009 for (ii
= fdata
.saved_fpr
; ii
<= 31; ++ii
)
1011 read_memory (addr
, &deprecated_registers
[REGISTER_BYTE (ii
+ FP0_REGNUM
)], 8);
1016 write_register (SP_REGNUM
, prev_sp
);
1017 target_store_registers (-1);
1018 flush_cached_frames ();
1021 /* Fixup the call sequence of a dummy function, with the real function
1022 address. Its arguments will be passed by gdb. */
1025 rs6000_fix_call_dummy (char *dummyname
, CORE_ADDR pc
, CORE_ADDR fun
,
1026 int nargs
, struct value
**args
, struct type
*type
,
1030 CORE_ADDR target_addr
;
1032 if (rs6000_find_toc_address_hook
!= NULL
)
1034 CORE_ADDR tocvalue
= (*rs6000_find_toc_address_hook
) (fun
);
1035 write_register (gdbarch_tdep (current_gdbarch
)->ppc_toc_regnum
,
1040 /* All the ABI's require 16 byte alignment. */
1042 rs6000_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
1044 return (addr
& -16);
1047 /* Pass the arguments in either registers, or in the stack. In RS/6000,
1048 the first eight words of the argument list (that might be less than
1049 eight parameters if some parameters occupy more than one word) are
1050 passed in r3..r10 registers. float and double parameters are
1051 passed in fpr's, in addition to that. Rest of the parameters if any
1052 are passed in user stack. There might be cases in which half of the
1053 parameter is copied into registers, the other half is pushed into
1056 Stack must be aligned on 64-bit boundaries when synthesizing
1059 If the function is returning a structure, then the return address is passed
1060 in r3, then the first 7 words of the parameters can be passed in registers,
1061 starting from r4. */
1064 rs6000_push_arguments (int nargs
, struct value
**args
, CORE_ADDR sp
,
1065 int struct_return
, CORE_ADDR struct_addr
)
1069 int argno
; /* current argument number */
1070 int argbytes
; /* current argument byte */
1071 char tmp_buffer
[50];
1072 int f_argno
= 0; /* current floating point argno */
1073 int wordsize
= gdbarch_tdep (current_gdbarch
)->wordsize
;
1075 struct value
*arg
= 0;
1080 /* The first eight words of ther arguments are passed in registers.
1081 Copy them appropriately.
1083 If the function is returning a `struct', then the first word (which
1084 will be passed in r3) is used for struct return address. In that
1085 case we should advance one word and start from r4 register to copy
1088 ii
= struct_return
? 1 : 0;
1091 effectively indirect call... gcc does...
1093 return_val example( float, int);
1096 float in fp0, int in r3
1097 offset of stack on overflow 8/16
1098 for varargs, must go by type.
1100 float in r3&r4, int in r5
1101 offset of stack on overflow different
1103 return in r3 or f0. If no float, must study how gcc emulates floats;
1104 pay attention to arg promotion.
1105 User may have to cast\args to handle promotion correctly
1106 since gdb won't know if prototype supplied or not.
1109 for (argno
= 0, argbytes
= 0; argno
< nargs
&& ii
< 8; ++ii
)
1111 int reg_size
= REGISTER_RAW_SIZE (ii
+ 3);
1114 type
= check_typedef (VALUE_TYPE (arg
));
1115 len
= TYPE_LENGTH (type
);
1117 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1120 /* Floating point arguments are passed in fpr's, as well as gpr's.
1121 There are 13 fpr's reserved for passing parameters. At this point
1122 there is no way we would run out of them. */
1126 "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno
);
1128 memcpy (&deprecated_registers
[REGISTER_BYTE (FP0_REGNUM
+ 1 + f_argno
)],
1129 VALUE_CONTENTS (arg
),
1137 /* Argument takes more than one register. */
1138 while (argbytes
< len
)
1140 memset (&deprecated_registers
[REGISTER_BYTE (ii
+ 3)], 0,
1142 memcpy (&deprecated_registers
[REGISTER_BYTE (ii
+ 3)],
1143 ((char *) VALUE_CONTENTS (arg
)) + argbytes
,
1144 (len
- argbytes
) > reg_size
1145 ? reg_size
: len
- argbytes
);
1146 ++ii
, argbytes
+= reg_size
;
1149 goto ran_out_of_registers_for_arguments
;
1156 /* Argument can fit in one register. No problem. */
1157 int adj
= TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
? reg_size
- len
: 0;
1158 memset (&deprecated_registers
[REGISTER_BYTE (ii
+ 3)], 0, reg_size
);
1159 memcpy ((char *)&deprecated_registers
[REGISTER_BYTE (ii
+ 3)] + adj
,
1160 VALUE_CONTENTS (arg
), len
);
1165 ran_out_of_registers_for_arguments
:
1167 saved_sp
= read_sp ();
1169 /* Location for 8 parameters are always reserved. */
1172 /* Another six words for back chain, TOC register, link register, etc. */
1175 /* Stack pointer must be quadword aligned. */
1178 /* If there are more arguments, allocate space for them in
1179 the stack, then push them starting from the ninth one. */
1181 if ((argno
< nargs
) || argbytes
)
1187 space
+= ((len
- argbytes
+ 3) & -4);
1193 for (; jj
< nargs
; ++jj
)
1195 struct value
*val
= args
[jj
];
1196 space
+= ((TYPE_LENGTH (VALUE_TYPE (val
))) + 3) & -4;
1199 /* Add location required for the rest of the parameters. */
1200 space
= (space
+ 15) & -16;
1203 /* This is another instance we need to be concerned about
1204 securing our stack space. If we write anything underneath %sp
1205 (r1), we might conflict with the kernel who thinks he is free
1206 to use this area. So, update %sp first before doing anything
1209 write_register (SP_REGNUM
, sp
);
1211 /* If the last argument copied into the registers didn't fit there
1212 completely, push the rest of it into stack. */
1216 write_memory (sp
+ 24 + (ii
* 4),
1217 ((char *) VALUE_CONTENTS (arg
)) + argbytes
,
1220 ii
+= ((len
- argbytes
+ 3) & -4) / 4;
1223 /* Push the rest of the arguments into stack. */
1224 for (; argno
< nargs
; ++argno
)
1228 type
= check_typedef (VALUE_TYPE (arg
));
1229 len
= TYPE_LENGTH (type
);
1232 /* Float types should be passed in fpr's, as well as in the
1234 if (TYPE_CODE (type
) == TYPE_CODE_FLT
&& f_argno
< 13)
1239 "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno
);
1241 memcpy (&deprecated_registers
[REGISTER_BYTE (FP0_REGNUM
+ 1 + f_argno
)],
1242 VALUE_CONTENTS (arg
),
1247 write_memory (sp
+ 24 + (ii
* 4), (char *) VALUE_CONTENTS (arg
), len
);
1248 ii
+= ((len
+ 3) & -4) / 4;
1252 /* Secure stack areas first, before doing anything else. */
1253 write_register (SP_REGNUM
, sp
);
1255 /* set back chain properly */
1256 store_address (tmp_buffer
, 4, saved_sp
);
1257 write_memory (sp
, tmp_buffer
, 4);
1259 target_store_registers (-1);
1263 /* Function: ppc_push_return_address (pc, sp)
1264 Set up the return address for the inferior function call. */
1267 ppc_push_return_address (CORE_ADDR pc
, CORE_ADDR sp
)
1269 write_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
,
1270 CALL_DUMMY_ADDRESS ());
1274 /* Extract a function return value of type TYPE from raw register array
1275 REGBUF, and copy that return value into VALBUF in virtual format. */
1277 e500_extract_return_value (struct type
*valtype
, struct regcache
*regbuf
, void *valbuf
)
1280 int vallen
= TYPE_LENGTH (valtype
);
1281 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1283 if (TYPE_CODE (valtype
) == TYPE_CODE_ARRAY
1285 && TYPE_VECTOR (valtype
))
1287 regcache_raw_read (regbuf
, tdep
->ppc_ev0_regnum
+ 3, valbuf
);
1291 /* Return value is copied starting from r3. Note that r3 for us
1292 is a pseudo register. */
1294 int return_regnum
= tdep
->ppc_gp0_regnum
+ 3;
1295 int reg_size
= REGISTER_RAW_SIZE (return_regnum
);
1301 /* Compute where we will start storing the value from. */
1302 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1304 if (vallen
<= reg_size
)
1305 offset
= reg_size
- vallen
;
1307 offset
= reg_size
+ (reg_size
- vallen
);
1310 /* How big does the local buffer need to be? */
1311 if (vallen
<= reg_size
)
1312 val_buffer
= alloca (reg_size
);
1314 val_buffer
= alloca (vallen
);
1316 /* Read all we need into our private buffer. We copy it in
1317 chunks that are as long as one register, never shorter, even
1318 if the value is smaller than the register. */
1319 while (copied
< vallen
)
1321 reg_part_size
= REGISTER_RAW_SIZE (return_regnum
+ i
);
1322 /* It is a pseudo/cooked register. */
1323 regcache_cooked_read (regbuf
, return_regnum
+ i
,
1324 val_buffer
+ copied
);
1325 copied
+= reg_part_size
;
1328 /* Put the stuff in the return buffer. */
1329 memcpy (valbuf
, val_buffer
+ offset
, vallen
);
1334 rs6000_extract_return_value (struct type
*valtype
, char *regbuf
, char *valbuf
)
1337 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1339 if (TYPE_CODE (valtype
) == TYPE_CODE_FLT
)
1344 /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes.
1345 We need to truncate the return value into float size (4 byte) if
1348 if (TYPE_LENGTH (valtype
) > 4) /* this is a double */
1350 ®buf
[REGISTER_BYTE (FP0_REGNUM
+ 1)],
1351 TYPE_LENGTH (valtype
));
1354 memcpy (&dd
, ®buf
[REGISTER_BYTE (FP0_REGNUM
+ 1)], 8);
1356 memcpy (valbuf
, &ff
, sizeof (float));
1359 else if (TYPE_CODE (valtype
) == TYPE_CODE_ARRAY
1360 && TYPE_LENGTH (valtype
) == 16
1361 && TYPE_VECTOR (valtype
))
1363 memcpy (valbuf
, regbuf
+ REGISTER_BYTE (tdep
->ppc_vr0_regnum
+ 2),
1364 TYPE_LENGTH (valtype
));
1368 /* return value is copied starting from r3. */
1369 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
1370 && TYPE_LENGTH (valtype
) < REGISTER_RAW_SIZE (3))
1371 offset
= REGISTER_RAW_SIZE (3) - TYPE_LENGTH (valtype
);
1374 regbuf
+ REGISTER_BYTE (3) + offset
,
1375 TYPE_LENGTH (valtype
));
1379 /* Return whether handle_inferior_event() should proceed through code
1380 starting at PC in function NAME when stepping.
1382 The AIX -bbigtoc linker option generates functions @FIX0, @FIX1, etc. to
1383 handle memory references that are too distant to fit in instructions
1384 generated by the compiler. For example, if 'foo' in the following
1389 is greater than 32767, the linker might replace the lwz with a branch to
1390 somewhere in @FIX1 that does the load in 2 instructions and then branches
1391 back to where execution should continue.
1393 GDB should silently step over @FIX code, just like AIX dbx does.
1394 Unfortunately, the linker uses the "b" instruction for the branches,
1395 meaning that the link register doesn't get set. Therefore, GDB's usual
1396 step_over_function() mechanism won't work.
1398 Instead, use the IN_SOLIB_RETURN_TRAMPOLINE and SKIP_TRAMPOLINE_CODE hooks
1399 in handle_inferior_event() to skip past @FIX code. */
1402 rs6000_in_solib_return_trampoline (CORE_ADDR pc
, char *name
)
1404 return name
&& !strncmp (name
, "@FIX", 4);
1407 /* Skip code that the user doesn't want to see when stepping:
1409 1. Indirect function calls use a piece of trampoline code to do context
1410 switching, i.e. to set the new TOC table. Skip such code if we are on
1411 its first instruction (as when we have single-stepped to here).
1413 2. Skip shared library trampoline code (which is different from
1414 indirect function call trampolines).
1416 3. Skip bigtoc fixup code.
1418 Result is desired PC to step until, or NULL if we are not in
1419 code that should be skipped. */
1422 rs6000_skip_trampoline_code (CORE_ADDR pc
)
1424 register unsigned int ii
, op
;
1426 CORE_ADDR solib_target_pc
;
1427 struct minimal_symbol
*msymbol
;
1429 static unsigned trampoline_code
[] =
1431 0x800b0000, /* l r0,0x0(r11) */
1432 0x90410014, /* st r2,0x14(r1) */
1433 0x7c0903a6, /* mtctr r0 */
1434 0x804b0004, /* l r2,0x4(r11) */
1435 0x816b0008, /* l r11,0x8(r11) */
1436 0x4e800420, /* bctr */
1437 0x4e800020, /* br */
1441 /* Check for bigtoc fixup code. */
1442 msymbol
= lookup_minimal_symbol_by_pc (pc
);
1443 if (msymbol
&& rs6000_in_solib_return_trampoline (pc
, SYMBOL_NAME (msymbol
)))
1445 /* Double-check that the third instruction from PC is relative "b". */
1446 op
= read_memory_integer (pc
+ 8, 4);
1447 if ((op
& 0xfc000003) == 0x48000000)
1449 /* Extract bits 6-29 as a signed 24-bit relative word address and
1450 add it to the containing PC. */
1451 rel
= ((int)(op
<< 6) >> 6);
1452 return pc
+ 8 + rel
;
1456 /* If pc is in a shared library trampoline, return its target. */
1457 solib_target_pc
= find_solib_trampoline_target (pc
);
1458 if (solib_target_pc
)
1459 return solib_target_pc
;
1461 for (ii
= 0; trampoline_code
[ii
]; ++ii
)
1463 op
= read_memory_integer (pc
+ (ii
* 4), 4);
1464 if (op
!= trampoline_code
[ii
])
1467 ii
= read_register (11); /* r11 holds destination addr */
1468 pc
= read_memory_addr (ii
, gdbarch_tdep (current_gdbarch
)->wordsize
); /* (r11) value */
1472 /* Determines whether the function FI has a frame on the stack or not. */
1475 rs6000_frameless_function_invocation (struct frame_info
*fi
)
1477 CORE_ADDR func_start
;
1478 struct rs6000_framedata fdata
;
1480 /* Don't even think about framelessness except on the innermost frame
1481 or if the function was interrupted by a signal. */
1482 if (get_next_frame (fi
) != NULL
1483 && !(get_frame_type (get_next_frame (fi
)) == SIGTRAMP_FRAME
))
1486 func_start
= get_pc_function_start (get_frame_pc (fi
));
1488 /* If we failed to find the start of the function, it is a mistake
1489 to inspect the instructions. */
1493 /* A frame with a zero PC is usually created by dereferencing a NULL
1494 function pointer, normally causing an immediate core dump of the
1495 inferior. Mark function as frameless, as the inferior has no chance
1496 of setting up a stack frame. */
1497 if (get_frame_pc (fi
) == 0)
1503 (void) skip_prologue (func_start
, get_frame_pc (fi
), &fdata
);
1504 return fdata
.frameless
;
1507 /* Return the PC saved in a frame. */
1510 rs6000_frame_saved_pc (struct frame_info
*fi
)
1512 CORE_ADDR func_start
;
1513 struct rs6000_framedata fdata
;
1514 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1515 int wordsize
= tdep
->wordsize
;
1517 if ((get_frame_type (fi
) == SIGTRAMP_FRAME
))
1518 return read_memory_addr (get_frame_base (fi
) + SIG_FRAME_PC_OFFSET
,
1521 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
),
1522 get_frame_base (fi
),
1523 get_frame_base (fi
)))
1524 return deprecated_read_register_dummy (get_frame_pc (fi
),
1525 get_frame_base (fi
), PC_REGNUM
);
1527 func_start
= get_pc_function_start (get_frame_pc (fi
));
1529 /* If we failed to find the start of the function, it is a mistake
1530 to inspect the instructions. */
1534 (void) skip_prologue (func_start
, get_frame_pc (fi
), &fdata
);
1536 if (fdata
.lr_offset
== 0 && get_next_frame (fi
) != NULL
)
1538 if ((get_frame_type (get_next_frame (fi
)) == SIGTRAMP_FRAME
))
1539 return read_memory_addr ((get_frame_base (get_next_frame (fi
))
1540 + SIG_FRAME_LR_OFFSET
),
1542 else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (get_next_frame (fi
)), 0, 0))
1543 /* The link register wasn't saved by this frame and the next
1544 (inner, newer) frame is a dummy. Get the link register
1545 value by unwinding it from that [dummy] frame. */
1548 frame_unwind_unsigned_register (get_next_frame (fi
),
1549 tdep
->ppc_lr_regnum
, &lr
);
1553 return read_memory_addr (FRAME_CHAIN (fi
) + tdep
->lr_frame_offset
,
1557 if (fdata
.lr_offset
== 0)
1558 return read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
);
1560 return read_memory_addr (FRAME_CHAIN (fi
) + fdata
.lr_offset
, wordsize
);
1563 /* If saved registers of frame FI are not known yet, read and cache them.
1564 &FDATAP contains rs6000_framedata; TDATAP can be NULL,
1565 in which case the framedata are read. */
1568 frame_get_saved_regs (struct frame_info
*fi
, struct rs6000_framedata
*fdatap
)
1570 CORE_ADDR frame_addr
;
1571 struct rs6000_framedata work_fdata
;
1572 struct gdbarch_tdep
* tdep
= gdbarch_tdep (current_gdbarch
);
1573 int wordsize
= tdep
->wordsize
;
1580 fdatap
= &work_fdata
;
1581 (void) skip_prologue (get_pc_function_start (get_frame_pc (fi
)),
1582 get_frame_pc (fi
), fdatap
);
1585 frame_saved_regs_zalloc (fi
);
1587 /* If there were any saved registers, figure out parent's stack
1589 /* The following is true only if the frame doesn't have a call to
1592 if (fdatap
->saved_fpr
== 0
1593 && fdatap
->saved_gpr
== 0
1594 && fdatap
->saved_vr
== 0
1595 && fdatap
->saved_ev
== 0
1596 && fdatap
->lr_offset
== 0
1597 && fdatap
->cr_offset
== 0
1598 && fdatap
->vr_offset
== 0
1599 && fdatap
->ev_offset
== 0)
1602 /* NOTE: cagney/2002-04-14: The ->frame points to the inner-most
1603 address of the current frame. Things might be easier if the
1604 ->frame pointed to the outer-most address of the frame. In the
1605 mean time, the address of the prev frame is used as the base
1606 address of this frame. */
1607 frame_addr
= FRAME_CHAIN (fi
);
1609 /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr.
1610 All fpr's from saved_fpr to fp31 are saved. */
1612 if (fdatap
->saved_fpr
>= 0)
1615 CORE_ADDR fpr_addr
= frame_addr
+ fdatap
->fpr_offset
;
1616 for (i
= fdatap
->saved_fpr
; i
< 32; i
++)
1618 fi
->saved_regs
[FP0_REGNUM
+ i
] = fpr_addr
;
1623 /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr.
1624 All gpr's from saved_gpr to gpr31 are saved. */
1626 if (fdatap
->saved_gpr
>= 0)
1629 CORE_ADDR gpr_addr
= frame_addr
+ fdatap
->gpr_offset
;
1630 for (i
= fdatap
->saved_gpr
; i
< 32; i
++)
1632 fi
->saved_regs
[i
] = gpr_addr
;
1633 gpr_addr
+= wordsize
;
1637 /* if != -1, fdatap->saved_vr is the smallest number of saved_vr.
1638 All vr's from saved_vr to vr31 are saved. */
1639 if (tdep
->ppc_vr0_regnum
!= -1 && tdep
->ppc_vrsave_regnum
!= -1)
1641 if (fdatap
->saved_vr
>= 0)
1644 CORE_ADDR vr_addr
= frame_addr
+ fdatap
->vr_offset
;
1645 for (i
= fdatap
->saved_vr
; i
< 32; i
++)
1647 fi
->saved_regs
[tdep
->ppc_vr0_regnum
+ i
] = vr_addr
;
1648 vr_addr
+= REGISTER_RAW_SIZE (tdep
->ppc_vr0_regnum
);
1653 /* if != -1, fdatap->saved_ev is the smallest number of saved_ev.
1654 All vr's from saved_ev to ev31 are saved. ????? */
1655 if (tdep
->ppc_ev0_regnum
!= -1 && tdep
->ppc_ev31_regnum
!= -1)
1657 if (fdatap
->saved_ev
>= 0)
1660 CORE_ADDR ev_addr
= frame_addr
+ fdatap
->ev_offset
;
1661 for (i
= fdatap
->saved_ev
; i
< 32; i
++)
1663 fi
->saved_regs
[tdep
->ppc_ev0_regnum
+ i
] = ev_addr
;
1664 fi
->saved_regs
[tdep
->ppc_gp0_regnum
+ i
] = ev_addr
+ 4;
1665 ev_addr
+= REGISTER_RAW_SIZE (tdep
->ppc_ev0_regnum
);
1670 /* If != 0, fdatap->cr_offset is the offset from the frame that holds
1672 if (fdatap
->cr_offset
!= 0)
1673 fi
->saved_regs
[tdep
->ppc_cr_regnum
] = frame_addr
+ fdatap
->cr_offset
;
1675 /* If != 0, fdatap->lr_offset is the offset from the frame that holds
1677 if (fdatap
->lr_offset
!= 0)
1678 fi
->saved_regs
[tdep
->ppc_lr_regnum
] = frame_addr
+ fdatap
->lr_offset
;
1680 /* If != 0, fdatap->vrsave_offset is the offset from the frame that holds
1682 if (fdatap
->vrsave_offset
!= 0)
1683 fi
->saved_regs
[tdep
->ppc_vrsave_regnum
] = frame_addr
+ fdatap
->vrsave_offset
;
1686 /* Return the address of a frame. This is the inital %sp value when the frame
1687 was first allocated. For functions calling alloca(), it might be saved in
1688 an alloca register. */
1691 frame_initial_stack_address (struct frame_info
*fi
)
1694 struct rs6000_framedata fdata
;
1695 struct frame_info
*callee_fi
;
1697 /* If the initial stack pointer (frame address) of this frame is known,
1700 if (fi
->extra_info
->initial_sp
)
1701 return fi
->extra_info
->initial_sp
;
1703 /* Find out if this function is using an alloca register. */
1705 (void) skip_prologue (get_pc_function_start (get_frame_pc (fi
)),
1706 get_frame_pc (fi
), &fdata
);
1708 /* If saved registers of this frame are not known yet, read and
1711 if (!fi
->saved_regs
)
1712 frame_get_saved_regs (fi
, &fdata
);
1714 /* If no alloca register used, then fi->frame is the value of the %sp for
1715 this frame, and it is good enough. */
1717 if (fdata
.alloca_reg
< 0)
1719 fi
->extra_info
->initial_sp
= get_frame_base (fi
);
1720 return fi
->extra_info
->initial_sp
;
1723 /* There is an alloca register, use its value, in the current frame,
1724 as the initial stack pointer. */
1726 char *tmpbuf
= alloca (MAX_REGISTER_RAW_SIZE
);
1727 if (frame_register_read (fi
, fdata
.alloca_reg
, tmpbuf
))
1729 fi
->extra_info
->initial_sp
1730 = extract_unsigned_integer (tmpbuf
,
1731 REGISTER_RAW_SIZE (fdata
.alloca_reg
));
1734 /* NOTE: cagney/2002-04-17: At present the only time
1735 frame_register_read will fail is when the register isn't
1736 available. If that does happen, use the frame. */
1737 fi
->extra_info
->initial_sp
= get_frame_base (fi
);
1739 return fi
->extra_info
->initial_sp
;
1742 /* Describe the pointer in each stack frame to the previous stack frame
1745 /* FRAME_CHAIN takes a frame's nominal address
1746 and produces the frame's chain-pointer. */
1748 /* In the case of the RS/6000, the frame's nominal address
1749 is the address of a 4-byte word containing the calling frame's address. */
1752 rs6000_frame_chain (struct frame_info
*thisframe
)
1754 CORE_ADDR fp
, fpp
, lr
;
1755 int wordsize
= gdbarch_tdep (current_gdbarch
)->wordsize
;
1757 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (thisframe
),
1758 get_frame_base (thisframe
),
1759 get_frame_base (thisframe
)))
1760 /* A dummy frame always correctly chains back to the previous
1762 return read_memory_addr (get_frame_base (thisframe
), wordsize
);
1764 if (inside_entry_file (get_frame_pc (thisframe
))
1765 || get_frame_pc (thisframe
) == entry_point_address ())
1768 if ((get_frame_type (thisframe
) == SIGTRAMP_FRAME
))
1769 fp
= read_memory_addr (get_frame_base (thisframe
) + SIG_FRAME_FP_OFFSET
,
1771 else if (get_next_frame (thisframe
) != NULL
1772 && (get_frame_type (get_next_frame (thisframe
)) == SIGTRAMP_FRAME
)
1773 && FRAMELESS_FUNCTION_INVOCATION (thisframe
))
1774 /* A frameless function interrupted by a signal did not change the
1776 fp
= get_frame_base (thisframe
);
1778 fp
= read_memory_addr (get_frame_base (thisframe
), wordsize
);
1782 /* Return the size of register REG when words are WORDSIZE bytes long. If REG
1783 isn't available with that word size, return 0. */
1786 regsize (const struct reg
*reg
, int wordsize
)
1788 return wordsize
== 8 ? reg
->sz64
: reg
->sz32
;
1791 /* Return the name of register number N, or null if no such register exists
1792 in the current architecture. */
1795 rs6000_register_name (int n
)
1797 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1798 const struct reg
*reg
= tdep
->regs
+ n
;
1800 if (!regsize (reg
, tdep
->wordsize
))
1805 /* Index within `registers' of the first byte of the space for
1809 rs6000_register_byte (int n
)
1811 return gdbarch_tdep (current_gdbarch
)->regoff
[n
];
1814 /* Return the number of bytes of storage in the actual machine representation
1815 for register N if that register is available, else return 0. */
1818 rs6000_register_raw_size (int n
)
1820 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1821 const struct reg
*reg
= tdep
->regs
+ n
;
1822 return regsize (reg
, tdep
->wordsize
);
1825 /* Return the GDB type object for the "standard" data type
1826 of data in register N. */
1828 static struct type
*
1829 rs6000_register_virtual_type (int n
)
1831 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1832 const struct reg
*reg
= tdep
->regs
+ n
;
1835 return builtin_type_double
;
1838 int size
= regsize (reg
, tdep
->wordsize
);
1842 if (tdep
->ppc_ev0_regnum
<= n
&& n
<= tdep
->ppc_ev31_regnum
)
1843 return builtin_type_vec64
;
1845 return builtin_type_int64
;
1848 return builtin_type_vec128
;
1851 return builtin_type_int32
;
1857 /* For the PowerPC, it appears that the debug info marks float parameters as
1858 floats regardless of whether the function is prototyped, but the actual
1859 values are always passed in as doubles. Tell gdb to always assume that
1860 floats are passed as doubles and then converted in the callee. */
1863 rs6000_coerce_float_to_double (struct type
*formal
, struct type
*actual
)
1868 /* Return whether register N requires conversion when moving from raw format
1871 The register format for RS/6000 floating point registers is always
1872 double, we need a conversion if the memory format is float. */
1875 rs6000_register_convertible (int n
)
1877 const struct reg
*reg
= gdbarch_tdep (current_gdbarch
)->regs
+ n
;
1881 /* Convert data from raw format for register N in buffer FROM
1882 to virtual format with type TYPE in buffer TO. */
1885 rs6000_register_convert_to_virtual (int n
, struct type
*type
,
1886 char *from
, char *to
)
1888 if (TYPE_LENGTH (type
) != REGISTER_RAW_SIZE (n
))
1890 double val
= extract_floating (from
, REGISTER_RAW_SIZE (n
));
1891 store_floating (to
, TYPE_LENGTH (type
), val
);
1894 memcpy (to
, from
, REGISTER_RAW_SIZE (n
));
1897 /* Convert data from virtual format with type TYPE in buffer FROM
1898 to raw format for register N in buffer TO. */
1901 rs6000_register_convert_to_raw (struct type
*type
, int n
,
1902 char *from
, char *to
)
1904 if (TYPE_LENGTH (type
) != REGISTER_RAW_SIZE (n
))
1906 double val
= extract_floating (from
, TYPE_LENGTH (type
));
1907 store_floating (to
, REGISTER_RAW_SIZE (n
), val
);
1910 memcpy (to
, from
, REGISTER_RAW_SIZE (n
));
1914 e500_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1915 int reg_nr
, void *buffer
)
1919 char *temp_buffer
= (char*) alloca (MAX_REGISTER_RAW_SIZE
);
1920 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1922 if (reg_nr
>= tdep
->ppc_gp0_regnum
1923 && reg_nr
<= tdep
->ppc_gplast_regnum
)
1925 base_regnum
= reg_nr
- tdep
->ppc_gp0_regnum
+ tdep
->ppc_ev0_regnum
;
1927 /* Build the value in the provided buffer. */
1928 /* Read the raw register of which this one is the lower portion. */
1929 regcache_raw_read (regcache
, base_regnum
, temp_buffer
);
1930 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1932 memcpy ((char *) buffer
, temp_buffer
+ offset
, 4);
1937 e500_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1938 int reg_nr
, const void *buffer
)
1942 char *temp_buffer
= (char*) alloca (MAX_REGISTER_RAW_SIZE
);
1943 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1945 if (reg_nr
>= tdep
->ppc_gp0_regnum
1946 && reg_nr
<= tdep
->ppc_gplast_regnum
)
1948 base_regnum
= reg_nr
- tdep
->ppc_gp0_regnum
+ tdep
->ppc_ev0_regnum
;
1949 /* reg_nr is 32 bit here, and base_regnum is 64 bits. */
1950 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1953 /* Let's read the value of the base register into a temporary
1954 buffer, so that overwriting the last four bytes with the new
1955 value of the pseudo will leave the upper 4 bytes unchanged. */
1956 regcache_raw_read (regcache
, base_regnum
, temp_buffer
);
1958 /* Write as an 8 byte quantity. */
1959 memcpy (temp_buffer
+ offset
, (char *) buffer
, 4);
1960 regcache_raw_write (regcache
, base_regnum
, temp_buffer
);
1964 /* Convert a dwarf2 register number to a gdb REGNUM. */
1966 e500_dwarf2_reg_to_regnum (int num
)
1969 if (0 <= num
&& num
<= 31)
1970 return num
+ gdbarch_tdep (current_gdbarch
)->ppc_gp0_regnum
;
1975 /* Convert a dbx stab register number (from `r' declaration) to a gdb
1978 rs6000_stab_reg_to_regnum (int num
)
1984 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_mq_regnum
;
1987 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
;
1990 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_ctr_regnum
;
1993 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_xer_regnum
;
2002 /* Store the address of the place in which to copy the structure the
2003 subroutine will return. */
2006 rs6000_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
2008 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2009 write_register (tdep
->ppc_gp0_regnum
+ 3, addr
);
2012 /* Write into appropriate registers a function return value
2013 of type TYPE, given in virtual format. */
2015 e500_store_return_value (struct type
*type
, char *valbuf
)
2017 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2019 /* Everything is returned in GPR3 and up. */
2022 int len
= TYPE_LENGTH (type
);
2023 while (copied
< len
)
2025 int regnum
= gdbarch_tdep (current_gdbarch
)->ppc_gp0_regnum
+ 3 + i
;
2026 int reg_size
= REGISTER_RAW_SIZE (regnum
);
2027 char *reg_val_buf
= alloca (reg_size
);
2029 memcpy (reg_val_buf
, valbuf
+ copied
, reg_size
);
2031 deprecated_write_register_gen (regnum
, reg_val_buf
);
2037 rs6000_store_return_value (struct type
*type
, char *valbuf
)
2039 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2041 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
2043 /* Floating point values are returned starting from FPR1 and up.
2044 Say a double_double_double type could be returned in
2045 FPR1/FPR2/FPR3 triple. */
2047 deprecated_write_register_bytes (REGISTER_BYTE (FP0_REGNUM
+ 1), valbuf
,
2048 TYPE_LENGTH (type
));
2049 else if (TYPE_CODE (type
) == TYPE_CODE_ARRAY
)
2051 if (TYPE_LENGTH (type
) == 16
2052 && TYPE_VECTOR (type
))
2053 deprecated_write_register_bytes (REGISTER_BYTE (tdep
->ppc_vr0_regnum
+ 2),
2054 valbuf
, TYPE_LENGTH (type
));
2057 /* Everything else is returned in GPR3 and up. */
2058 deprecated_write_register_bytes (REGISTER_BYTE (gdbarch_tdep (current_gdbarch
)->ppc_gp0_regnum
+ 3),
2059 valbuf
, TYPE_LENGTH (type
));
2062 /* Extract from an array REGBUF containing the (raw) register state
2063 the address in which a function should return its structure value,
2064 as a CORE_ADDR (or an expression that can be used as one). */
2067 rs6000_extract_struct_value_address (struct regcache
*regcache
)
2069 /* FIXME: cagney/2002-09-26: PR gdb/724: When making an inferior
2070 function call GDB knows the address of the struct return value
2071 and hence, should not need to call this function. Unfortunately,
2072 the current hand_function_call() code only saves the most recent
2073 struct address leading to occasional calls. The code should
2074 instead maintain a stack of such addresses (in the dummy frame
2076 /* NOTE: cagney/2002-09-26: Return 0 which indicates that we've
2077 really got no idea where the return value is being stored. While
2078 r3, on function entry, contained the address it will have since
2079 been reused (scratch) and hence wouldn't be valid */
2083 /* Return whether PC is in a dummy function call.
2085 FIXME: This just checks for the end of the stack, which is broken
2086 for things like stepping through gcc nested function stubs. */
2089 rs6000_pc_in_call_dummy (CORE_ADDR pc
, CORE_ADDR sp
, CORE_ADDR fp
)
2091 return sp
< pc
&& pc
< fp
;
2094 /* Hook called when a new child process is started. */
2097 rs6000_create_inferior (int pid
)
2099 if (rs6000_set_host_arch_hook
)
2100 rs6000_set_host_arch_hook (pid
);
2103 /* Support for CONVERT_FROM_FUNC_PTR_ADDR(ADDR).
2105 Usually a function pointer's representation is simply the address
2106 of the function. On the RS/6000 however, a function pointer is
2107 represented by a pointer to a TOC entry. This TOC entry contains
2108 three words, the first word is the address of the function, the
2109 second word is the TOC pointer (r2), and the third word is the
2110 static chain value. Throughout GDB it is currently assumed that a
2111 function pointer contains the address of the function, which is not
2112 easy to fix. In addition, the conversion of a function address to
2113 a function pointer would require allocation of a TOC entry in the
2114 inferior's memory space, with all its drawbacks. To be able to
2115 call C++ virtual methods in the inferior (which are called via
2116 function pointers), find_function_addr uses this function to get the
2117 function address from a function pointer. */
2119 /* Return real function address if ADDR (a function pointer) is in the data
2120 space and is therefore a special function pointer. */
2123 rs6000_convert_from_func_ptr_addr (CORE_ADDR addr
)
2125 struct obj_section
*s
;
2127 s
= find_pc_section (addr
);
2128 if (s
&& s
->the_bfd_section
->flags
& SEC_CODE
)
2131 /* ADDR is in the data space, so it's a special function pointer. */
2132 return read_memory_addr (addr
, gdbarch_tdep (current_gdbarch
)->wordsize
);
2136 /* Handling the various POWER/PowerPC variants. */
2139 /* The arrays here called registers_MUMBLE hold information about available
2142 For each family of PPC variants, I've tried to isolate out the
2143 common registers and put them up front, so that as long as you get
2144 the general family right, GDB will correctly identify the registers
2145 common to that family. The common register sets are:
2147 For the 60x family: hid0 hid1 iabr dabr pir
2149 For the 505 and 860 family: eie eid nri
2151 For the 403 and 403GC: icdbdr esr dear evpr cdbcr tsr tcr pit tbhi
2152 tblo srr2 srr3 dbsr dbcr iac1 iac2 dac1 dac2 dccr iccr pbl1
2155 Most of these register groups aren't anything formal. I arrived at
2156 them by looking at the registers that occurred in more than one
2159 Note: kevinb/2002-04-30: Support for the fpscr register was added
2160 during April, 2002. Slot 70 is being used for PowerPC and slot 71
2161 for Power. For PowerPC, slot 70 was unused and was already in the
2162 PPC_UISA_SPRS which is ideally where fpscr should go. For Power,
2163 slot 70 was being used for "mq", so the next available slot (71)
2164 was chosen. It would have been nice to be able to make the
2165 register numbers the same across processor cores, but this wasn't
2166 possible without either 1) renumbering some registers for some
2167 processors or 2) assigning fpscr to a really high slot that's
2168 larger than any current register number. Doing (1) is bad because
2169 existing stubs would break. Doing (2) is undesirable because it
2170 would introduce a really large gap between fpscr and the rest of
2171 the registers for most processors. */
2173 /* Convenience macros for populating register arrays. */
2175 /* Within another macro, convert S to a string. */
2179 /* Return a struct reg defining register NAME that's 32 bits on 32-bit systems
2180 and 64 bits on 64-bit systems. */
2181 #define R(name) { STR(name), 4, 8, 0, 0 }
2183 /* Return a struct reg defining register NAME that's 32 bits on all
2185 #define R4(name) { STR(name), 4, 4, 0, 0 }
2187 /* Return a struct reg defining register NAME that's 64 bits on all
2189 #define R8(name) { STR(name), 8, 8, 0, 0 }
2191 /* Return a struct reg defining register NAME that's 128 bits on all
2193 #define R16(name) { STR(name), 16, 16, 0, 0 }
2195 /* Return a struct reg defining floating-point register NAME. */
2196 #define F(name) { STR(name), 8, 8, 1, 0 }
2198 /* Return a struct reg defining a pseudo register NAME. */
2199 #define P(name) { STR(name), 4, 8, 0, 1}
2201 /* Return a struct reg defining register NAME that's 32 bits on 32-bit
2202 systems and that doesn't exist on 64-bit systems. */
2203 #define R32(name) { STR(name), 4, 0, 0, 0 }
2205 /* Return a struct reg defining register NAME that's 64 bits on 64-bit
2206 systems and that doesn't exist on 32-bit systems. */
2207 #define R64(name) { STR(name), 0, 8, 0, 0 }
2209 /* Return a struct reg placeholder for a register that doesn't exist. */
2210 #define R0 { 0, 0, 0, 0, 0 }
2212 /* UISA registers common across all architectures, including POWER. */
2214 #define COMMON_UISA_REGS \
2215 /* 0 */ R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), \
2216 /* 8 */ R(r8), R(r9), R(r10),R(r11),R(r12),R(r13),R(r14),R(r15), \
2217 /* 16 */ R(r16),R(r17),R(r18),R(r19),R(r20),R(r21),R(r22),R(r23), \
2218 /* 24 */ R(r24),R(r25),R(r26),R(r27),R(r28),R(r29),R(r30),R(r31), \
2219 /* 32 */ F(f0), F(f1), F(f2), F(f3), F(f4), F(f5), F(f6), F(f7), \
2220 /* 40 */ F(f8), F(f9), F(f10),F(f11),F(f12),F(f13),F(f14),F(f15), \
2221 /* 48 */ F(f16),F(f17),F(f18),F(f19),F(f20),F(f21),F(f22),F(f23), \
2222 /* 56 */ F(f24),F(f25),F(f26),F(f27),F(f28),F(f29),F(f30),F(f31), \
2223 /* 64 */ R(pc), R(ps)
2225 #define COMMON_UISA_NOFP_REGS \
2226 /* 0 */ R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), \
2227 /* 8 */ R(r8), R(r9), R(r10),R(r11),R(r12),R(r13),R(r14),R(r15), \
2228 /* 16 */ R(r16),R(r17),R(r18),R(r19),R(r20),R(r21),R(r22),R(r23), \
2229 /* 24 */ R(r24),R(r25),R(r26),R(r27),R(r28),R(r29),R(r30),R(r31), \
2230 /* 32 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2231 /* 40 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2232 /* 48 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2233 /* 56 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2234 /* 64 */ R(pc), R(ps)
2236 /* UISA-level SPRs for PowerPC. */
2237 #define PPC_UISA_SPRS \
2238 /* 66 */ R4(cr), R(lr), R(ctr), R4(xer), R4(fpscr)
2240 /* UISA-level SPRs for PowerPC without floating point support. */
2241 #define PPC_UISA_NOFP_SPRS \
2242 /* 66 */ R4(cr), R(lr), R(ctr), R4(xer), R0
2244 /* Segment registers, for PowerPC. */
2245 #define PPC_SEGMENT_REGS \
2246 /* 71 */ R32(sr0), R32(sr1), R32(sr2), R32(sr3), \
2247 /* 75 */ R32(sr4), R32(sr5), R32(sr6), R32(sr7), \
2248 /* 79 */ R32(sr8), R32(sr9), R32(sr10), R32(sr11), \
2249 /* 83 */ R32(sr12), R32(sr13), R32(sr14), R32(sr15)
2251 /* OEA SPRs for PowerPC. */
2252 #define PPC_OEA_SPRS \
2254 /* 88 */ R(ibat0u), R(ibat0l), R(ibat1u), R(ibat1l), \
2255 /* 92 */ R(ibat2u), R(ibat2l), R(ibat3u), R(ibat3l), \
2256 /* 96 */ R(dbat0u), R(dbat0l), R(dbat1u), R(dbat1l), \
2257 /* 100 */ R(dbat2u), R(dbat2l), R(dbat3u), R(dbat3l), \
2258 /* 104 */ R(sdr1), R64(asr), R(dar), R4(dsisr), \
2259 /* 108 */ R(sprg0), R(sprg1), R(sprg2), R(sprg3), \
2260 /* 112 */ R(srr0), R(srr1), R(tbl), R(tbu), \
2261 /* 116 */ R4(dec), R(dabr), R4(ear)
2263 /* AltiVec registers. */
2264 #define PPC_ALTIVEC_REGS \
2265 /*119*/R16(vr0), R16(vr1), R16(vr2), R16(vr3), R16(vr4), R16(vr5), R16(vr6), R16(vr7), \
2266 /*127*/R16(vr8), R16(vr9), R16(vr10),R16(vr11),R16(vr12),R16(vr13),R16(vr14),R16(vr15), \
2267 /*135*/R16(vr16),R16(vr17),R16(vr18),R16(vr19),R16(vr20),R16(vr21),R16(vr22),R16(vr23), \
2268 /*143*/R16(vr24),R16(vr25),R16(vr26),R16(vr27),R16(vr28),R16(vr29),R16(vr30),R16(vr31), \
2269 /*151*/R4(vscr), R4(vrsave)
2271 /* Vectors of hi-lo general purpose registers. */
2272 #define PPC_EV_REGS \
2273 /* 0*/R8(ev0), R8(ev1), R8(ev2), R8(ev3), R8(ev4), R8(ev5), R8(ev6), R8(ev7), \
2274 /* 8*/R8(ev8), R8(ev9), R8(ev10),R8(ev11),R8(ev12),R8(ev13),R8(ev14),R8(ev15), \
2275 /*16*/R8(ev16),R8(ev17),R8(ev18),R8(ev19),R8(ev20),R8(ev21),R8(ev22),R8(ev23), \
2276 /*24*/R8(ev24),R8(ev25),R8(ev26),R8(ev27),R8(ev28),R8(ev29),R8(ev30),R8(ev31)
2278 /* Lower half of the EV registers. */
2279 #define PPC_GPRS_PSEUDO_REGS \
2280 /* 0 */ P(r0), P(r1), P(r2), P(r3), P(r4), P(r5), P(r6), P(r7), \
2281 /* 8 */ P(r8), P(r9), P(r10),P(r11),P(r12),P(r13),P(r14),P(r15), \
2282 /* 16 */ P(r16),P(r17),P(r18),P(r19),P(r20),P(r21),P(r22),P(r23), \
2283 /* 24 */ P(r24),P(r25),P(r26),P(r27),P(r28),P(r29),P(r30),P(r31), \
2285 /* IBM POWER (pre-PowerPC) architecture, user-level view. We only cover
2286 user-level SPR's. */
2287 static const struct reg registers_power
[] =
2290 /* 66 */ R4(cnd
), R(lr
), R(cnt
), R4(xer
), R4(mq
),
2294 /* PowerPC UISA - a PPC processor as viewed by user-level code. A UISA-only
2295 view of the PowerPC. */
2296 static const struct reg registers_powerpc
[] =
2303 /* PowerPC UISA - a PPC processor as viewed by user-level
2304 code, but without floating point registers. */
2305 static const struct reg registers_powerpc_nofp
[] =
2307 COMMON_UISA_NOFP_REGS
,
2311 /* IBM PowerPC 403. */
2312 static const struct reg registers_403
[] =
2318 /* 119 */ R(icdbdr
), R(esr
), R(dear
), R(evpr
),
2319 /* 123 */ R(cdbcr
), R(tsr
), R(tcr
), R(pit
),
2320 /* 127 */ R(tbhi
), R(tblo
), R(srr2
), R(srr3
),
2321 /* 131 */ R(dbsr
), R(dbcr
), R(iac1
), R(iac2
),
2322 /* 135 */ R(dac1
), R(dac2
), R(dccr
), R(iccr
),
2323 /* 139 */ R(pbl1
), R(pbu1
), R(pbl2
), R(pbu2
)
2326 /* IBM PowerPC 403GC. */
2327 static const struct reg registers_403GC
[] =
2333 /* 119 */ R(icdbdr
), R(esr
), R(dear
), R(evpr
),
2334 /* 123 */ R(cdbcr
), R(tsr
), R(tcr
), R(pit
),
2335 /* 127 */ R(tbhi
), R(tblo
), R(srr2
), R(srr3
),
2336 /* 131 */ R(dbsr
), R(dbcr
), R(iac1
), R(iac2
),
2337 /* 135 */ R(dac1
), R(dac2
), R(dccr
), R(iccr
),
2338 /* 139 */ R(pbl1
), R(pbu1
), R(pbl2
), R(pbu2
),
2339 /* 143 */ R(zpr
), R(pid
), R(sgr
), R(dcwr
),
2340 /* 147 */ R(tbhu
), R(tblu
)
2343 /* Motorola PowerPC 505. */
2344 static const struct reg registers_505
[] =
2350 /* 119 */ R(eie
), R(eid
), R(nri
)
2353 /* Motorola PowerPC 860 or 850. */
2354 static const struct reg registers_860
[] =
2360 /* 119 */ R(eie
), R(eid
), R(nri
), R(cmpa
),
2361 /* 123 */ R(cmpb
), R(cmpc
), R(cmpd
), R(icr
),
2362 /* 127 */ R(der
), R(counta
), R(countb
), R(cmpe
),
2363 /* 131 */ R(cmpf
), R(cmpg
), R(cmph
), R(lctrl1
),
2364 /* 135 */ R(lctrl2
), R(ictrl
), R(bar
), R(ic_cst
),
2365 /* 139 */ R(ic_adr
), R(ic_dat
), R(dc_cst
), R(dc_adr
),
2366 /* 143 */ R(dc_dat
), R(dpdr
), R(dpir
), R(immr
),
2367 /* 147 */ R(mi_ctr
), R(mi_ap
), R(mi_epn
), R(mi_twc
),
2368 /* 151 */ R(mi_rpn
), R(md_ctr
), R(m_casid
), R(md_ap
),
2369 /* 155 */ R(md_epn
), R(md_twb
), R(md_twc
), R(md_rpn
),
2370 /* 159 */ R(m_tw
), R(mi_dbcam
), R(mi_dbram0
), R(mi_dbram1
),
2371 /* 163 */ R(md_dbcam
), R(md_dbram0
), R(md_dbram1
)
2374 /* Motorola PowerPC 601. Note that the 601 has different register numbers
2375 for reading and writing RTCU and RTCL. However, how one reads and writes a
2376 register is the stub's problem. */
2377 static const struct reg registers_601
[] =
2383 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
2384 /* 123 */ R(pir
), R(mq
), R(rtcu
), R(rtcl
)
2387 /* Motorola PowerPC 602. */
2388 static const struct reg registers_602
[] =
2394 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R0
,
2395 /* 123 */ R0
, R(tcr
), R(ibr
), R(esassr
),
2396 /* 127 */ R(sebr
), R(ser
), R(sp
), R(lt
)
2399 /* Motorola/IBM PowerPC 603 or 603e. */
2400 static const struct reg registers_603
[] =
2406 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R0
,
2407 /* 123 */ R0
, R(dmiss
), R(dcmp
), R(hash1
),
2408 /* 127 */ R(hash2
), R(imiss
), R(icmp
), R(rpa
)
2411 /* Motorola PowerPC 604 or 604e. */
2412 static const struct reg registers_604
[] =
2418 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
2419 /* 123 */ R(pir
), R(mmcr0
), R(pmc1
), R(pmc2
),
2420 /* 127 */ R(sia
), R(sda
)
2423 /* Motorola/IBM PowerPC 750 or 740. */
2424 static const struct reg registers_750
[] =
2430 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
2431 /* 123 */ R0
, R(ummcr0
), R(upmc1
), R(upmc2
),
2432 /* 127 */ R(usia
), R(ummcr1
), R(upmc3
), R(upmc4
),
2433 /* 131 */ R(mmcr0
), R(pmc1
), R(pmc2
), R(sia
),
2434 /* 135 */ R(mmcr1
), R(pmc3
), R(pmc4
), R(l2cr
),
2435 /* 139 */ R(ictc
), R(thrm1
), R(thrm2
), R(thrm3
)
2439 /* Motorola PowerPC 7400. */
2440 static const struct reg registers_7400
[] =
2442 /* gpr0-gpr31, fpr0-fpr31 */
2444 /* ctr, xre, lr, cr */
2449 /* vr0-vr31, vrsave, vscr */
2451 /* FIXME? Add more registers? */
2454 /* Motorola e500. */
2455 static const struct reg registers_e500
[] =
2458 /* cr, lr, ctr, xer, "" */
2463 PPC_GPRS_PSEUDO_REGS
2466 /* Information about a particular processor variant. */
2470 /* Name of this variant. */
2473 /* English description of the variant. */
2476 /* bfd_arch_info.arch corresponding to variant. */
2477 enum bfd_architecture arch
;
2479 /* bfd_arch_info.mach corresponding to variant. */
2482 /* Number of real registers. */
2485 /* Number of pseudo registers. */
2488 /* Number of total registers (the sum of nregs and npregs). */
2491 /* Table of register names; registers[R] is the name of the register
2493 const struct reg
*regs
;
2496 #define tot_num_registers(list) (sizeof (list) / sizeof((list)[0]))
2499 num_registers (const struct reg
*reg_list
, int num_tot_regs
)
2504 for (i
= 0; i
< num_tot_regs
; i
++)
2505 if (!reg_list
[i
].pseudo
)
2512 num_pseudo_registers (const struct reg
*reg_list
, int num_tot_regs
)
2517 for (i
= 0; i
< num_tot_regs
; i
++)
2518 if (reg_list
[i
].pseudo
)
2524 /* Information in this table comes from the following web sites:
2525 IBM: http://www.chips.ibm.com:80/products/embedded/
2526 Motorola: http://www.mot.com/SPS/PowerPC/
2528 I'm sure I've got some of the variant descriptions not quite right.
2529 Please report any inaccuracies you find to GDB's maintainer.
2531 If you add entries to this table, please be sure to allow the new
2532 value as an argument to the --with-cpu flag, in configure.in. */
2534 static struct variant variants
[] =
2537 {"powerpc", "PowerPC user-level", bfd_arch_powerpc
,
2538 bfd_mach_ppc
, -1, -1, tot_num_registers (registers_powerpc
),
2540 {"power", "POWER user-level", bfd_arch_rs6000
,
2541 bfd_mach_rs6k
, -1, -1, tot_num_registers (registers_power
),
2543 {"403", "IBM PowerPC 403", bfd_arch_powerpc
,
2544 bfd_mach_ppc_403
, -1, -1, tot_num_registers (registers_403
),
2546 {"601", "Motorola PowerPC 601", bfd_arch_powerpc
,
2547 bfd_mach_ppc_601
, -1, -1, tot_num_registers (registers_601
),
2549 {"602", "Motorola PowerPC 602", bfd_arch_powerpc
,
2550 bfd_mach_ppc_602
, -1, -1, tot_num_registers (registers_602
),
2552 {"603", "Motorola/IBM PowerPC 603 or 603e", bfd_arch_powerpc
,
2553 bfd_mach_ppc_603
, -1, -1, tot_num_registers (registers_603
),
2555 {"604", "Motorola PowerPC 604 or 604e", bfd_arch_powerpc
,
2556 604, -1, -1, tot_num_registers (registers_604
),
2558 {"403GC", "IBM PowerPC 403GC", bfd_arch_powerpc
,
2559 bfd_mach_ppc_403gc
, -1, -1, tot_num_registers (registers_403GC
),
2561 {"505", "Motorola PowerPC 505", bfd_arch_powerpc
,
2562 bfd_mach_ppc_505
, -1, -1, tot_num_registers (registers_505
),
2564 {"860", "Motorola PowerPC 860 or 850", bfd_arch_powerpc
,
2565 bfd_mach_ppc_860
, -1, -1, tot_num_registers (registers_860
),
2567 {"750", "Motorola/IBM PowerPC 750 or 740", bfd_arch_powerpc
,
2568 bfd_mach_ppc_750
, -1, -1, tot_num_registers (registers_750
),
2570 {"7400", "Motorola/IBM PowerPC 7400 (G4)", bfd_arch_powerpc
,
2571 bfd_mach_ppc_7400
, -1, -1, tot_num_registers (registers_7400
),
2573 {"e500", "Motorola PowerPC e500", bfd_arch_powerpc
,
2574 bfd_mach_ppc_e500
, -1, -1, tot_num_registers (registers_e500
),
2578 {"powerpc64", "PowerPC 64-bit user-level", bfd_arch_powerpc
,
2579 bfd_mach_ppc64
, -1, -1, tot_num_registers (registers_powerpc
),
2581 {"620", "Motorola PowerPC 620", bfd_arch_powerpc
,
2582 bfd_mach_ppc_620
, -1, -1, tot_num_registers (registers_powerpc
),
2584 {"630", "Motorola PowerPC 630", bfd_arch_powerpc
,
2585 bfd_mach_ppc_630
, -1, -1, tot_num_registers (registers_powerpc
),
2587 {"a35", "PowerPC A35", bfd_arch_powerpc
,
2588 bfd_mach_ppc_a35
, -1, -1, tot_num_registers (registers_powerpc
),
2590 {"rs64ii", "PowerPC rs64ii", bfd_arch_powerpc
,
2591 bfd_mach_ppc_rs64ii
, -1, -1, tot_num_registers (registers_powerpc
),
2593 {"rs64iii", "PowerPC rs64iii", bfd_arch_powerpc
,
2594 bfd_mach_ppc_rs64iii
, -1, -1, tot_num_registers (registers_powerpc
),
2597 /* FIXME: I haven't checked the register sets of the following. */
2598 {"rs1", "IBM POWER RS1", bfd_arch_rs6000
,
2599 bfd_mach_rs6k_rs1
, -1, -1, tot_num_registers (registers_power
),
2601 {"rsc", "IBM POWER RSC", bfd_arch_rs6000
,
2602 bfd_mach_rs6k_rsc
, -1, -1, tot_num_registers (registers_power
),
2604 {"rs2", "IBM POWER RS2", bfd_arch_rs6000
,
2605 bfd_mach_rs6k_rs2
, -1, -1, tot_num_registers (registers_power
),
2608 {0, 0, 0, 0, 0, 0, 0, 0}
2611 /* Initialize the number of registers and pseudo registers in each variant. */
2614 init_variants (void)
2618 for (v
= variants
; v
->name
; v
++)
2621 v
->nregs
= num_registers (v
->regs
, v
->num_tot_regs
);
2622 if (v
->npregs
== -1)
2623 v
->npregs
= num_pseudo_registers (v
->regs
, v
->num_tot_regs
);
2627 /* Return the variant corresponding to architecture ARCH and machine number
2628 MACH. If no such variant exists, return null. */
2630 static const struct variant
*
2631 find_variant_by_arch (enum bfd_architecture arch
, unsigned long mach
)
2633 const struct variant
*v
;
2635 for (v
= variants
; v
->name
; v
++)
2636 if (arch
== v
->arch
&& mach
== v
->mach
)
2643 gdb_print_insn_powerpc (bfd_vma memaddr
, disassemble_info
*info
)
2645 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2646 return print_insn_big_powerpc (memaddr
, info
);
2648 return print_insn_little_powerpc (memaddr
, info
);
2651 /* Initialize the current architecture based on INFO. If possible, re-use an
2652 architecture from ARCHES, which is a list of architectures already created
2653 during this debugging session.
2655 Called e.g. at program startup, when reading a core file, and when reading
2658 static struct gdbarch
*
2659 rs6000_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
2661 struct gdbarch
*gdbarch
;
2662 struct gdbarch_tdep
*tdep
;
2663 int wordsize
, from_xcoff_exec
, from_elf_exec
, power
, i
, off
;
2665 const struct variant
*v
;
2666 enum bfd_architecture arch
;
2670 enum gdb_osabi osabi
= GDB_OSABI_UNKNOWN
;
2673 from_xcoff_exec
= info
.abfd
&& info
.abfd
->format
== bfd_object
&&
2674 bfd_get_flavour (info
.abfd
) == bfd_target_xcoff_flavour
;
2676 from_elf_exec
= info
.abfd
&& info
.abfd
->format
== bfd_object
&&
2677 bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
;
2679 sysv_abi
= info
.abfd
&& bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
;
2682 osabi
= gdbarch_lookup_osabi (info
.abfd
);
2684 /* Check word size. If INFO is from a binary file, infer it from
2685 that, else choose a likely default. */
2686 if (from_xcoff_exec
)
2688 if (bfd_xcoff_is_xcoff64 (info
.abfd
))
2693 else if (from_elf_exec
)
2695 if (elf_elfheader (info
.abfd
)->e_ident
[EI_CLASS
] == ELFCLASS64
)
2702 if (info
.bfd_arch_info
!= NULL
&& info
.bfd_arch_info
->bits_per_word
!= 0)
2703 wordsize
= info
.bfd_arch_info
->bits_per_word
/
2704 info
.bfd_arch_info
->bits_per_byte
;
2709 /* Find a candidate among extant architectures. */
2710 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
2712 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
2714 /* Word size in the various PowerPC bfd_arch_info structs isn't
2715 meaningful, because 64-bit CPUs can run in 32-bit mode. So, perform
2716 separate word size check. */
2717 tdep
= gdbarch_tdep (arches
->gdbarch
);
2718 if (tdep
&& tdep
->wordsize
== wordsize
&& tdep
->osabi
== osabi
)
2719 return arches
->gdbarch
;
2722 /* None found, create a new architecture from INFO, whose bfd_arch_info
2723 validity depends on the source:
2724 - executable useless
2725 - rs6000_host_arch() good
2727 - "set arch" trust blindly
2728 - GDB startup useless but harmless */
2730 if (!from_xcoff_exec
)
2732 arch
= info
.bfd_arch_info
->arch
;
2733 mach
= info
.bfd_arch_info
->mach
;
2737 arch
= bfd_arch_powerpc
;
2739 bfd_default_set_arch_mach (&abfd
, arch
, mach
);
2740 info
.bfd_arch_info
= bfd_get_arch_info (&abfd
);
2742 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
2743 tdep
->wordsize
= wordsize
;
2744 tdep
->osabi
= osabi
;
2746 /* For e500 executables, the apuinfo section is of help here. Such
2747 section contains the identifier and revision number of each
2748 Application-specific Processing Unit that is present on the
2749 chip. The content of the section is determined by the assembler
2750 which looks at each instruction and determines which unit (and
2751 which version of it) can execute it. In our case we just look for
2752 the existance of the section. */
2756 sect
= bfd_get_section_by_name (info
.abfd
, ".PPC.EMB.apuinfo");
2759 arch
= info
.bfd_arch_info
->arch
;
2760 mach
= bfd_mach_ppc_e500
;
2761 bfd_default_set_arch_mach (&abfd
, arch
, mach
);
2762 info
.bfd_arch_info
= bfd_get_arch_info (&abfd
);
2766 gdbarch
= gdbarch_alloc (&info
, tdep
);
2767 power
= arch
== bfd_arch_rs6000
;
2769 /* Initialize the number of real and pseudo registers in each variant. */
2772 /* Choose variant. */
2773 v
= find_variant_by_arch (arch
, mach
);
2777 tdep
->regs
= v
->regs
;
2779 tdep
->ppc_gp0_regnum
= 0;
2780 tdep
->ppc_gplast_regnum
= 31;
2781 tdep
->ppc_toc_regnum
= 2;
2782 tdep
->ppc_ps_regnum
= 65;
2783 tdep
->ppc_cr_regnum
= 66;
2784 tdep
->ppc_lr_regnum
= 67;
2785 tdep
->ppc_ctr_regnum
= 68;
2786 tdep
->ppc_xer_regnum
= 69;
2787 if (v
->mach
== bfd_mach_ppc_601
)
2788 tdep
->ppc_mq_regnum
= 124;
2790 tdep
->ppc_mq_regnum
= 70;
2792 tdep
->ppc_mq_regnum
= -1;
2793 tdep
->ppc_fpscr_regnum
= power
? 71 : 70;
2795 set_gdbarch_pc_regnum (gdbarch
, 64);
2796 set_gdbarch_sp_regnum (gdbarch
, 1);
2797 set_gdbarch_fp_regnum (gdbarch
, 1);
2798 set_gdbarch_deprecated_extract_return_value (gdbarch
,
2799 rs6000_extract_return_value
);
2800 set_gdbarch_deprecated_store_return_value (gdbarch
, rs6000_store_return_value
);
2802 if (v
->arch
== bfd_arch_powerpc
)
2806 tdep
->ppc_vr0_regnum
= 71;
2807 tdep
->ppc_vrsave_regnum
= 104;
2808 tdep
->ppc_ev0_regnum
= -1;
2809 tdep
->ppc_ev31_regnum
= -1;
2811 case bfd_mach_ppc_7400
:
2812 tdep
->ppc_vr0_regnum
= 119;
2813 tdep
->ppc_vrsave_regnum
= 152;
2814 tdep
->ppc_ev0_regnum
= -1;
2815 tdep
->ppc_ev31_regnum
= -1;
2817 case bfd_mach_ppc_e500
:
2818 tdep
->ppc_gp0_regnum
= 39;
2819 tdep
->ppc_gplast_regnum
= 70;
2820 tdep
->ppc_toc_regnum
= -1;
2821 tdep
->ppc_ps_regnum
= 1;
2822 tdep
->ppc_cr_regnum
= 2;
2823 tdep
->ppc_lr_regnum
= 3;
2824 tdep
->ppc_ctr_regnum
= 4;
2825 tdep
->ppc_xer_regnum
= 5;
2826 tdep
->ppc_ev0_regnum
= 7;
2827 tdep
->ppc_ev31_regnum
= 38;
2828 set_gdbarch_pc_regnum (gdbarch
, 0);
2829 set_gdbarch_sp_regnum (gdbarch
, 40);
2830 set_gdbarch_fp_regnum (gdbarch
, 40);
2831 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, e500_dwarf2_reg_to_regnum
);
2832 set_gdbarch_pseudo_register_read (gdbarch
, e500_pseudo_register_read
);
2833 set_gdbarch_pseudo_register_write (gdbarch
, e500_pseudo_register_write
);
2834 set_gdbarch_extract_return_value (gdbarch
, e500_extract_return_value
);
2835 set_gdbarch_deprecated_store_return_value (gdbarch
, e500_store_return_value
);
2838 tdep
->ppc_vr0_regnum
= -1;
2839 tdep
->ppc_vrsave_regnum
= -1;
2840 tdep
->ppc_ev0_regnum
= -1;
2841 tdep
->ppc_ev31_regnum
= -1;
2845 /* Set lr_frame_offset. */
2847 tdep
->lr_frame_offset
= 16;
2849 tdep
->lr_frame_offset
= 4;
2851 tdep
->lr_frame_offset
= 8;
2853 /* Calculate byte offsets in raw register array. */
2854 tdep
->regoff
= xmalloc (v
->num_tot_regs
* sizeof (int));
2855 for (i
= off
= 0; i
< v
->num_tot_regs
; i
++)
2857 tdep
->regoff
[i
] = off
;
2858 off
+= regsize (v
->regs
+ i
, wordsize
);
2861 /* Select instruction printer. */
2863 set_gdbarch_print_insn (gdbarch
, print_insn_rs6000
);
2865 set_gdbarch_print_insn (gdbarch
, gdb_print_insn_powerpc
);
2867 set_gdbarch_read_pc (gdbarch
, generic_target_read_pc
);
2868 set_gdbarch_write_pc (gdbarch
, generic_target_write_pc
);
2869 set_gdbarch_read_fp (gdbarch
, generic_target_read_fp
);
2870 set_gdbarch_read_sp (gdbarch
, generic_target_read_sp
);
2871 set_gdbarch_write_sp (gdbarch
, generic_target_write_sp
);
2873 set_gdbarch_num_regs (gdbarch
, v
->nregs
);
2874 set_gdbarch_num_pseudo_regs (gdbarch
, v
->npregs
);
2875 set_gdbarch_register_name (gdbarch
, rs6000_register_name
);
2876 set_gdbarch_register_size (gdbarch
, wordsize
);
2877 set_gdbarch_register_bytes (gdbarch
, off
);
2878 set_gdbarch_register_byte (gdbarch
, rs6000_register_byte
);
2879 set_gdbarch_register_raw_size (gdbarch
, rs6000_register_raw_size
);
2880 set_gdbarch_max_register_raw_size (gdbarch
, 16);
2881 set_gdbarch_register_virtual_size (gdbarch
, generic_register_size
);
2882 set_gdbarch_max_register_virtual_size (gdbarch
, 16);
2883 set_gdbarch_register_virtual_type (gdbarch
, rs6000_register_virtual_type
);
2885 set_gdbarch_ptr_bit (gdbarch
, wordsize
* TARGET_CHAR_BIT
);
2886 set_gdbarch_short_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
2887 set_gdbarch_int_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
2888 set_gdbarch_long_bit (gdbarch
, wordsize
* TARGET_CHAR_BIT
);
2889 set_gdbarch_long_long_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2890 set_gdbarch_float_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
2891 set_gdbarch_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2892 set_gdbarch_long_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2893 set_gdbarch_char_signed (gdbarch
, 0);
2895 set_gdbarch_call_dummy_length (gdbarch
, 0);
2896 set_gdbarch_call_dummy_address (gdbarch
, entry_point_address
);
2897 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch
, 1);
2898 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 0);
2899 set_gdbarch_call_dummy_start_offset (gdbarch
, 0);
2900 set_gdbarch_call_dummy_p (gdbarch
, 1);
2901 set_gdbarch_call_dummy_stack_adjust_p (gdbarch
, 0);
2902 set_gdbarch_fix_call_dummy (gdbarch
, rs6000_fix_call_dummy
);
2903 set_gdbarch_frame_align (gdbarch
, rs6000_frame_align
);
2904 set_gdbarch_push_dummy_frame (gdbarch
, generic_push_dummy_frame
);
2905 set_gdbarch_save_dummy_frame_tos (gdbarch
, generic_save_dummy_frame_tos
);
2906 set_gdbarch_push_return_address (gdbarch
, ppc_push_return_address
);
2907 set_gdbarch_believe_pcc_promotion (gdbarch
, 1);
2908 set_gdbarch_coerce_float_to_double (gdbarch
, rs6000_coerce_float_to_double
);
2910 set_gdbarch_register_convertible (gdbarch
, rs6000_register_convertible
);
2911 set_gdbarch_register_convert_to_virtual (gdbarch
, rs6000_register_convert_to_virtual
);
2912 set_gdbarch_register_convert_to_raw (gdbarch
, rs6000_register_convert_to_raw
);
2913 set_gdbarch_stab_reg_to_regnum (gdbarch
, rs6000_stab_reg_to_regnum
);
2914 /* Note: kevinb/2002-04-12: I'm not convinced that rs6000_push_arguments()
2915 is correct for the SysV ABI when the wordsize is 8, but I'm also
2916 fairly certain that ppc_sysv_abi_push_arguments() will give even
2917 worse results since it only works for 32-bit code. So, for the moment,
2918 we're better off calling rs6000_push_arguments() since it works for
2919 64-bit code. At some point in the future, this matter needs to be
2921 if (sysv_abi
&& wordsize
== 4)
2922 set_gdbarch_push_arguments (gdbarch
, ppc_sysv_abi_push_arguments
);
2924 set_gdbarch_push_arguments (gdbarch
, rs6000_push_arguments
);
2926 set_gdbarch_store_struct_return (gdbarch
, rs6000_store_struct_return
);
2927 set_gdbarch_extract_struct_value_address (gdbarch
, rs6000_extract_struct_value_address
);
2928 set_gdbarch_pop_frame (gdbarch
, rs6000_pop_frame
);
2930 set_gdbarch_skip_prologue (gdbarch
, rs6000_skip_prologue
);
2931 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2932 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
2933 set_gdbarch_function_start_offset (gdbarch
, 0);
2934 set_gdbarch_breakpoint_from_pc (gdbarch
, rs6000_breakpoint_from_pc
);
2936 /* Not sure on this. FIXMEmgo */
2937 set_gdbarch_frame_args_skip (gdbarch
, 8);
2940 set_gdbarch_use_struct_convention (gdbarch
,
2941 ppc_sysv_abi_use_struct_convention
);
2943 set_gdbarch_use_struct_convention (gdbarch
,
2944 generic_use_struct_convention
);
2946 set_gdbarch_frame_chain_valid (gdbarch
, file_frame_chain_valid
);
2948 set_gdbarch_frameless_function_invocation (gdbarch
,
2949 rs6000_frameless_function_invocation
);
2950 set_gdbarch_frame_chain (gdbarch
, rs6000_frame_chain
);
2951 set_gdbarch_frame_saved_pc (gdbarch
, rs6000_frame_saved_pc
);
2953 set_gdbarch_frame_init_saved_regs (gdbarch
, rs6000_frame_init_saved_regs
);
2954 set_gdbarch_init_extra_frame_info (gdbarch
, rs6000_init_extra_frame_info
);
2958 /* Handle RS/6000 function pointers (which are really function
2960 set_gdbarch_convert_from_func_ptr_addr (gdbarch
,
2961 rs6000_convert_from_func_ptr_addr
);
2963 set_gdbarch_frame_args_address (gdbarch
, rs6000_frame_args_address
);
2964 set_gdbarch_frame_locals_address (gdbarch
, rs6000_frame_args_address
);
2965 set_gdbarch_saved_pc_after_call (gdbarch
, rs6000_saved_pc_after_call
);
2967 /* We can't tell how many args there are
2968 now that the C compiler delays popping them. */
2969 set_gdbarch_frame_num_args (gdbarch
, frame_num_args_unknown
);
2971 /* Hook in ABI-specific overrides, if they have been registered. */
2972 gdbarch_init_osabi (info
, gdbarch
, osabi
);
2978 rs6000_dump_tdep (struct gdbarch
*current_gdbarch
, struct ui_file
*file
)
2980 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2985 fprintf_unfiltered (file
, "rs6000_dump_tdep: OS ABI = %s\n",
2986 gdbarch_osabi_name (tdep
->osabi
));
2989 static struct cmd_list_element
*info_powerpc_cmdlist
= NULL
;
2992 rs6000_info_powerpc_command (char *args
, int from_tty
)
2994 help_list (info_powerpc_cmdlist
, "info powerpc ", class_info
, gdb_stdout
);
2997 /* Initialization code. */
3000 _initialize_rs6000_tdep (void)
3002 gdbarch_register (bfd_arch_rs6000
, rs6000_gdbarch_init
, rs6000_dump_tdep
);
3003 gdbarch_register (bfd_arch_powerpc
, rs6000_gdbarch_init
, rs6000_dump_tdep
);
3005 /* Add root prefix command for "info powerpc" commands */
3006 add_prefix_cmd ("powerpc", class_info
, rs6000_info_powerpc_command
,
3007 "Various POWERPC info specific commands.",
3008 &info_powerpc_cmdlist
, "info powerpc ", 0, &infolist
);