1 /* Target-dependent code for GDB, the GNU debugger.
3 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996,
4 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
32 #include "arch-utils.h"
36 #include "parser-defs.h"
39 #include "libbfd.h" /* for bfd_default_set_arch_mach */
40 #include "coff/internal.h" /* for libcoff.h */
41 #include "libcoff.h" /* for xcoff_data */
42 #include "coff/xcoff.h"
47 #include "solib-svr4.h"
50 #include "gdb_assert.h"
53 #include "trad-frame.h"
54 #include "frame-unwind.h"
55 #include "frame-base.h"
57 /* If the kernel has to deliver a signal, it pushes a sigcontext
58 structure on the stack and then calls the signal handler, passing
59 the address of the sigcontext in an argument register. Usually
60 the signal handler doesn't save this register, so we have to
61 access the sigcontext structure via an offset from the signal handler
63 The following constants were determined by experimentation on AIX 3.2. */
64 #define SIG_FRAME_PC_OFFSET 96
65 #define SIG_FRAME_LR_OFFSET 108
66 #define SIG_FRAME_FP_OFFSET 284
68 /* To be used by skip_prologue. */
70 struct rs6000_framedata
72 int offset
; /* total size of frame --- the distance
73 by which we decrement sp to allocate
75 int saved_gpr
; /* smallest # of saved gpr */
76 int saved_fpr
; /* smallest # of saved fpr */
77 int saved_vr
; /* smallest # of saved vr */
78 int saved_ev
; /* smallest # of saved ev */
79 int alloca_reg
; /* alloca register number (frame ptr) */
80 char frameless
; /* true if frameless functions. */
81 char nosavedpc
; /* true if pc not saved. */
82 int gpr_offset
; /* offset of saved gprs from prev sp */
83 int fpr_offset
; /* offset of saved fprs from prev sp */
84 int vr_offset
; /* offset of saved vrs from prev sp */
85 int ev_offset
; /* offset of saved evs from prev sp */
86 int lr_offset
; /* offset of saved lr */
87 int cr_offset
; /* offset of saved cr */
88 int vrsave_offset
; /* offset of saved vrsave register */
91 /* Description of a single register. */
95 char *name
; /* name of register */
96 unsigned char sz32
; /* size on 32-bit arch, 0 if nonextant */
97 unsigned char sz64
; /* size on 64-bit arch, 0 if nonextant */
98 unsigned char fpr
; /* whether register is floating-point */
99 unsigned char pseudo
; /* whether register is pseudo */
102 /* Breakpoint shadows for the single step instructions will be kept here. */
104 static struct sstep_breaks
106 /* Address, or 0 if this is not in use. */
108 /* Shadow contents. */
113 /* Hook for determining the TOC address when calling functions in the
114 inferior under AIX. The initialization code in rs6000-nat.c sets
115 this hook to point to find_toc_address. */
117 CORE_ADDR (*rs6000_find_toc_address_hook
) (CORE_ADDR
) = NULL
;
119 /* Hook to set the current architecture when starting a child process.
120 rs6000-nat.c sets this. */
122 void (*rs6000_set_host_arch_hook
) (int) = NULL
;
124 /* Static function prototypes */
126 static CORE_ADDR
branch_dest (int opcode
, int instr
, CORE_ADDR pc
,
128 static CORE_ADDR
skip_prologue (CORE_ADDR
, CORE_ADDR
,
129 struct rs6000_framedata
*);
130 static void frame_get_saved_regs (struct frame_info
* fi
,
131 struct rs6000_framedata
* fdatap
);
132 static CORE_ADDR
frame_initial_stack_address (struct frame_info
*);
134 /* Is REGNO an AltiVec register? Return 1 if so, 0 otherwise. */
136 altivec_register_p (int regno
)
138 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
139 if (tdep
->ppc_vr0_regnum
< 0 || tdep
->ppc_vrsave_regnum
< 0)
142 return (regno
>= tdep
->ppc_vr0_regnum
&& regno
<= tdep
->ppc_vrsave_regnum
);
145 /* Use the architectures FP registers? */
147 ppc_floating_point_unit_p (struct gdbarch
*gdbarch
)
149 const struct bfd_arch_info
*info
= gdbarch_bfd_arch_info (gdbarch
);
150 if (info
->arch
== bfd_arch_powerpc
)
151 return (info
->mach
!= bfd_mach_ppc_e500
);
152 if (info
->arch
== bfd_arch_rs6000
)
157 /* Read a LEN-byte address from debugged memory address MEMADDR. */
160 read_memory_addr (CORE_ADDR memaddr
, int len
)
162 return read_memory_unsigned_integer (memaddr
, len
);
166 rs6000_skip_prologue (CORE_ADDR pc
)
168 struct rs6000_framedata frame
;
169 pc
= skip_prologue (pc
, 0, &frame
);
174 /* Fill in fi->saved_regs */
176 struct frame_extra_info
178 /* Functions calling alloca() change the value of the stack
179 pointer. We need to use initial stack pointer (which is saved in
180 r31 by gcc) in such cases. If a compiler emits traceback table,
181 then we should use the alloca register specified in traceback
183 CORE_ADDR initial_sp
; /* initial stack pointer. */
186 /* Get the ith function argument for the current function. */
188 rs6000_fetch_pointer_argument (struct frame_info
*frame
, int argi
,
192 get_frame_register (frame
, 3 + argi
, &addr
);
196 /* Calculate the destination of a branch/jump. Return -1 if not a branch. */
199 branch_dest (int opcode
, int instr
, CORE_ADDR pc
, CORE_ADDR safety
)
206 absolute
= (int) ((instr
>> 1) & 1);
211 immediate
= ((instr
& ~3) << 6) >> 6; /* br unconditional */
215 dest
= pc
+ immediate
;
219 immediate
= ((instr
& ~3) << 16) >> 16; /* br conditional */
223 dest
= pc
+ immediate
;
227 ext_op
= (instr
>> 1) & 0x3ff;
229 if (ext_op
== 16) /* br conditional register */
231 dest
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
) & ~3;
233 /* If we are about to return from a signal handler, dest is
234 something like 0x3c90. The current frame is a signal handler
235 caller frame, upon completion of the sigreturn system call
236 execution will return to the saved PC in the frame. */
237 if (dest
< TEXT_SEGMENT_BASE
)
239 struct frame_info
*fi
;
241 fi
= get_current_frame ();
243 dest
= read_memory_addr (get_frame_base (fi
) + SIG_FRAME_PC_OFFSET
,
244 gdbarch_tdep (current_gdbarch
)->wordsize
);
248 else if (ext_op
== 528) /* br cond to count reg */
250 dest
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_ctr_regnum
) & ~3;
252 /* If we are about to execute a system call, dest is something
253 like 0x22fc or 0x3b00. Upon completion the system call
254 will return to the address in the link register. */
255 if (dest
< TEXT_SEGMENT_BASE
)
256 dest
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
) & ~3;
265 return (dest
< TEXT_SEGMENT_BASE
) ? safety
: dest
;
269 /* Sequence of bytes for breakpoint instruction. */
271 const static unsigned char *
272 rs6000_breakpoint_from_pc (CORE_ADDR
*bp_addr
, int *bp_size
)
274 static unsigned char big_breakpoint
[] = { 0x7d, 0x82, 0x10, 0x08 };
275 static unsigned char little_breakpoint
[] = { 0x08, 0x10, 0x82, 0x7d };
277 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
278 return big_breakpoint
;
280 return little_breakpoint
;
284 /* AIX does not support PT_STEP. Simulate it. */
287 rs6000_software_single_step (enum target_signal signal
,
288 int insert_breakpoints_p
)
292 const char *breakp
= rs6000_breakpoint_from_pc (&dummy
, &breakp_sz
);
298 if (insert_breakpoints_p
)
303 insn
= read_memory_integer (loc
, 4);
305 breaks
[0] = loc
+ breakp_sz
;
307 breaks
[1] = branch_dest (opcode
, insn
, loc
, breaks
[0]);
309 /* Don't put two breakpoints on the same address. */
310 if (breaks
[1] == breaks
[0])
313 stepBreaks
[1].address
= 0;
315 for (ii
= 0; ii
< 2; ++ii
)
318 /* ignore invalid breakpoint. */
319 if (breaks
[ii
] == -1)
321 target_insert_breakpoint (breaks
[ii
], stepBreaks
[ii
].data
);
322 stepBreaks
[ii
].address
= breaks
[ii
];
329 /* remove step breakpoints. */
330 for (ii
= 0; ii
< 2; ++ii
)
331 if (stepBreaks
[ii
].address
!= 0)
332 target_remove_breakpoint (stepBreaks
[ii
].address
,
333 stepBreaks
[ii
].data
);
335 errno
= 0; /* FIXME, don't ignore errors! */
336 /* What errors? {read,write}_memory call error(). */
340 /* return pc value after skipping a function prologue and also return
341 information about a function frame.
343 in struct rs6000_framedata fdata:
344 - frameless is TRUE, if function does not have a frame.
345 - nosavedpc is TRUE, if function does not save %pc value in its frame.
346 - offset is the initial size of this stack frame --- the amount by
347 which we decrement the sp to allocate the frame.
348 - saved_gpr is the number of the first saved gpr.
349 - saved_fpr is the number of the first saved fpr.
350 - saved_vr is the number of the first saved vr.
351 - saved_ev is the number of the first saved ev.
352 - alloca_reg is the number of the register used for alloca() handling.
354 - gpr_offset is the offset of the first saved gpr from the previous frame.
355 - fpr_offset is the offset of the first saved fpr from the previous frame.
356 - vr_offset is the offset of the first saved vr from the previous frame.
357 - ev_offset is the offset of the first saved ev from the previous frame.
358 - lr_offset is the offset of the saved lr
359 - cr_offset is the offset of the saved cr
360 - vrsave_offset is the offset of the saved vrsave register
363 #define SIGNED_SHORT(x) \
364 ((sizeof (short) == 2) \
365 ? ((int)(short)(x)) \
366 : ((int)((((x) & 0xffff) ^ 0x8000) - 0x8000)))
368 #define GET_SRC_REG(x) (((x) >> 21) & 0x1f)
370 /* Limit the number of skipped non-prologue instructions, as the examining
371 of the prologue is expensive. */
372 static int max_skip_non_prologue_insns
= 10;
374 /* Given PC representing the starting address of a function, and
375 LIM_PC which is the (sloppy) limit to which to scan when looking
376 for a prologue, attempt to further refine this limit by using
377 the line data in the symbol table. If successful, a better guess
378 on where the prologue ends is returned, otherwise the previous
379 value of lim_pc is returned. */
381 /* FIXME: cagney/2004-02-14: This function and logic have largely been
382 superseded by skip_prologue_using_sal. */
385 refine_prologue_limit (CORE_ADDR pc
, CORE_ADDR lim_pc
)
387 struct symtab_and_line prologue_sal
;
389 prologue_sal
= find_pc_line (pc
, 0);
390 if (prologue_sal
.line
!= 0)
393 CORE_ADDR addr
= prologue_sal
.end
;
395 /* Handle the case in which compiler's optimizer/scheduler
396 has moved instructions into the prologue. We scan ahead
397 in the function looking for address ranges whose corresponding
398 line number is less than or equal to the first one that we
399 found for the function. (It can be less than when the
400 scheduler puts a body instruction before the first prologue
402 for (i
= 2 * max_skip_non_prologue_insns
;
403 i
> 0 && (lim_pc
== 0 || addr
< lim_pc
);
406 struct symtab_and_line sal
;
408 sal
= find_pc_line (addr
, 0);
411 if (sal
.line
<= prologue_sal
.line
412 && sal
.symtab
== prologue_sal
.symtab
)
419 if (lim_pc
== 0 || prologue_sal
.end
< lim_pc
)
420 lim_pc
= prologue_sal
.end
;
427 skip_prologue (CORE_ADDR pc
, CORE_ADDR lim_pc
, struct rs6000_framedata
*fdata
)
429 CORE_ADDR orig_pc
= pc
;
430 CORE_ADDR last_prologue_pc
= pc
;
431 CORE_ADDR li_found_pc
= 0;
435 long vr_saved_offset
= 0;
444 int minimal_toc_loaded
= 0;
445 int prev_insn_was_prologue_insn
= 1;
446 int num_skip_non_prologue_insns
= 0;
447 const struct bfd_arch_info
*arch_info
= gdbarch_bfd_arch_info (current_gdbarch
);
448 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
450 /* Attempt to find the end of the prologue when no limit is specified.
451 Note that refine_prologue_limit() has been written so that it may
452 be used to "refine" the limits of non-zero PC values too, but this
453 is only safe if we 1) trust the line information provided by the
454 compiler and 2) iterate enough to actually find the end of the
457 It may become a good idea at some point (for both performance and
458 accuracy) to unconditionally call refine_prologue_limit(). But,
459 until we can make a clear determination that this is beneficial,
460 we'll play it safe and only use it to obtain a limit when none
461 has been specified. */
463 lim_pc
= refine_prologue_limit (pc
, lim_pc
);
465 memset (fdata
, 0, sizeof (struct rs6000_framedata
));
466 fdata
->saved_gpr
= -1;
467 fdata
->saved_fpr
= -1;
468 fdata
->saved_vr
= -1;
469 fdata
->saved_ev
= -1;
470 fdata
->alloca_reg
= -1;
471 fdata
->frameless
= 1;
472 fdata
->nosavedpc
= 1;
476 /* Sometimes it isn't clear if an instruction is a prologue
477 instruction or not. When we encounter one of these ambiguous
478 cases, we'll set prev_insn_was_prologue_insn to 0 (false).
479 Otherwise, we'll assume that it really is a prologue instruction. */
480 if (prev_insn_was_prologue_insn
)
481 last_prologue_pc
= pc
;
483 /* Stop scanning if we've hit the limit. */
484 if (lim_pc
!= 0 && pc
>= lim_pc
)
487 prev_insn_was_prologue_insn
= 1;
489 /* Fetch the instruction and convert it to an integer. */
490 if (target_read_memory (pc
, buf
, 4))
492 op
= extract_signed_integer (buf
, 4);
494 if ((op
& 0xfc1fffff) == 0x7c0802a6)
496 /* Since shared library / PIC code, which needs to get its
497 address at runtime, can appear to save more than one link
511 remember just the first one, but skip over additional
514 lr_reg
= (op
& 0x03e00000);
517 else if ((op
& 0xfc1fffff) == 0x7c000026)
519 cr_reg
= (op
& 0x03e00000);
523 else if ((op
& 0xfc1f0000) == 0xd8010000)
524 { /* stfd Rx,NUM(r1) */
525 reg
= GET_SRC_REG (op
);
526 if (fdata
->saved_fpr
== -1 || fdata
->saved_fpr
> reg
)
528 fdata
->saved_fpr
= reg
;
529 fdata
->fpr_offset
= SIGNED_SHORT (op
) + offset
;
534 else if (((op
& 0xfc1f0000) == 0xbc010000) || /* stm Rx, NUM(r1) */
535 (((op
& 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */
536 (op
& 0xfc1f0003) == 0xf8010000) && /* std rx,NUM(r1) */
537 (op
& 0x03e00000) >= 0x01a00000)) /* rx >= r13 */
540 reg
= GET_SRC_REG (op
);
541 if (fdata
->saved_gpr
== -1 || fdata
->saved_gpr
> reg
)
543 fdata
->saved_gpr
= reg
;
544 if ((op
& 0xfc1f0003) == 0xf8010000)
546 fdata
->gpr_offset
= SIGNED_SHORT (op
) + offset
;
551 else if ((op
& 0xffff0000) == 0x60000000)
554 /* Allow nops in the prologue, but do not consider them to
555 be part of the prologue unless followed by other prologue
557 prev_insn_was_prologue_insn
= 0;
561 else if ((op
& 0xffff0000) == 0x3c000000)
562 { /* addis 0,0,NUM, used
564 fdata
->offset
= (op
& 0x0000ffff) << 16;
565 fdata
->frameless
= 0;
569 else if ((op
& 0xffff0000) == 0x60000000)
570 { /* ori 0,0,NUM, 2nd ha
571 lf of >= 32k frames */
572 fdata
->offset
|= (op
& 0x0000ffff);
573 fdata
->frameless
= 0;
577 else if (lr_reg
!= -1 &&
578 /* std Rx, NUM(r1) || stdu Rx, NUM(r1) */
579 (((op
& 0xffff0000) == (lr_reg
| 0xf8010000)) ||
580 /* stw Rx, NUM(r1) */
581 ((op
& 0xffff0000) == (lr_reg
| 0x90010000)) ||
582 /* stwu Rx, NUM(r1) */
583 ((op
& 0xffff0000) == (lr_reg
| 0x94010000))))
584 { /* where Rx == lr */
585 fdata
->lr_offset
= offset
;
586 fdata
->nosavedpc
= 0;
588 if ((op
& 0xfc000003) == 0xf8000000 || /* std */
589 (op
& 0xfc000000) == 0x90000000) /* stw */
591 /* Does not update r1, so add displacement to lr_offset. */
592 fdata
->lr_offset
+= SIGNED_SHORT (op
);
597 else if (cr_reg
!= -1 &&
598 /* std Rx, NUM(r1) || stdu Rx, NUM(r1) */
599 (((op
& 0xffff0000) == (cr_reg
| 0xf8010000)) ||
600 /* stw Rx, NUM(r1) */
601 ((op
& 0xffff0000) == (cr_reg
| 0x90010000)) ||
602 /* stwu Rx, NUM(r1) */
603 ((op
& 0xffff0000) == (cr_reg
| 0x94010000))))
604 { /* where Rx == cr */
605 fdata
->cr_offset
= offset
;
607 if ((op
& 0xfc000003) == 0xf8000000 ||
608 (op
& 0xfc000000) == 0x90000000)
610 /* Does not update r1, so add displacement to cr_offset. */
611 fdata
->cr_offset
+= SIGNED_SHORT (op
);
616 else if (op
== 0x48000005)
622 else if (op
== 0x48000004)
627 else if ((op
& 0xffff0000) == 0x3fc00000 || /* addis 30,0,foo@ha, used
628 in V.4 -mminimal-toc */
629 (op
& 0xffff0000) == 0x3bde0000)
630 { /* addi 30,30,foo@l */
634 else if ((op
& 0xfc000001) == 0x48000001)
638 fdata
->frameless
= 0;
639 /* Don't skip over the subroutine call if it is not within
640 the first three instructions of the prologue. */
641 if ((pc
- orig_pc
) > 8)
644 op
= read_memory_integer (pc
+ 4, 4);
646 /* At this point, make sure this is not a trampoline
647 function (a function that simply calls another functions,
648 and nothing else). If the next is not a nop, this branch
649 was part of the function prologue. */
651 if (op
== 0x4def7b82 || op
== 0) /* crorc 15, 15, 15 */
652 break; /* don't skip over
657 /* update stack pointer */
658 else if ((op
& 0xfc1f0000) == 0x94010000)
659 { /* stu rX,NUM(r1) || stwu rX,NUM(r1) */
660 fdata
->frameless
= 0;
661 fdata
->offset
= SIGNED_SHORT (op
);
662 offset
= fdata
->offset
;
665 else if ((op
& 0xfc1f016a) == 0x7c01016e)
666 { /* stwux rX,r1,rY */
667 /* no way to figure out what r1 is going to be */
668 fdata
->frameless
= 0;
669 offset
= fdata
->offset
;
672 else if ((op
& 0xfc1f0003) == 0xf8010001)
673 { /* stdu rX,NUM(r1) */
674 fdata
->frameless
= 0;
675 fdata
->offset
= SIGNED_SHORT (op
& ~3UL);
676 offset
= fdata
->offset
;
679 else if ((op
& 0xfc1f016a) == 0x7c01016a)
680 { /* stdux rX,r1,rY */
681 /* no way to figure out what r1 is going to be */
682 fdata
->frameless
= 0;
683 offset
= fdata
->offset
;
686 /* Load up minimal toc pointer */
687 else if (((op
>> 22) == 0x20f || /* l r31,... or l r30,... */
688 (op
>> 22) == 0x3af) /* ld r31,... or ld r30,... */
689 && !minimal_toc_loaded
)
691 minimal_toc_loaded
= 1;
694 /* move parameters from argument registers to local variable
697 else if ((op
& 0xfc0007fe) == 0x7c000378 && /* mr(.) Rx,Ry */
698 (((op
>> 21) & 31) >= 3) && /* R3 >= Ry >= R10 */
699 (((op
>> 21) & 31) <= 10) &&
700 ((long) ((op
>> 16) & 31) >= fdata
->saved_gpr
)) /* Rx: local var reg */
704 /* store parameters in stack */
706 else if ((op
& 0xfc1f0003) == 0xf8010000 || /* std rx,NUM(r1) */
707 (op
& 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */
708 (op
& 0xfc1f0000) == 0xfc010000) /* frsp, fp?,NUM(r1) */
712 /* store parameters in stack via frame pointer */
715 ((op
& 0xfc1f0000) == 0x901f0000 || /* st rx,NUM(r1) */
716 (op
& 0xfc1f0000) == 0xd81f0000 || /* stfd Rx,NUM(r1) */
717 (op
& 0xfc1f0000) == 0xfc1f0000))
718 { /* frsp, fp?,NUM(r1) */
721 /* Set up frame pointer */
723 else if (op
== 0x603f0000 /* oril r31, r1, 0x0 */
726 fdata
->frameless
= 0;
728 fdata
->alloca_reg
= (tdep
->ppc_gp0_regnum
+ 31);
731 /* Another way to set up the frame pointer. */
733 else if ((op
& 0xfc1fffff) == 0x38010000)
734 { /* addi rX, r1, 0x0 */
735 fdata
->frameless
= 0;
737 fdata
->alloca_reg
= (tdep
->ppc_gp0_regnum
738 + ((op
& ~0x38010000) >> 21));
741 /* AltiVec related instructions. */
742 /* Store the vrsave register (spr 256) in another register for
743 later manipulation, or load a register into the vrsave
744 register. 2 instructions are used: mfvrsave and
745 mtvrsave. They are shorthand notation for mfspr Rn, SPR256
746 and mtspr SPR256, Rn. */
747 /* mfspr Rn SPR256 == 011111 nnnnn 0000001000 01010100110
748 mtspr SPR256 Rn == 011111 nnnnn 0000001000 01110100110 */
749 else if ((op
& 0xfc1fffff) == 0x7c0042a6) /* mfvrsave Rn */
751 vrsave_reg
= GET_SRC_REG (op
);
754 else if ((op
& 0xfc1fffff) == 0x7c0043a6) /* mtvrsave Rn */
758 /* Store the register where vrsave was saved to onto the stack:
759 rS is the register where vrsave was stored in a previous
761 /* 100100 sssss 00001 dddddddd dddddddd */
762 else if ((op
& 0xfc1f0000) == 0x90010000) /* stw rS, d(r1) */
764 if (vrsave_reg
== GET_SRC_REG (op
))
766 fdata
->vrsave_offset
= SIGNED_SHORT (op
) + offset
;
771 /* Compute the new value of vrsave, by modifying the register
772 where vrsave was saved to. */
773 else if (((op
& 0xfc000000) == 0x64000000) /* oris Ra, Rs, UIMM */
774 || ((op
& 0xfc000000) == 0x60000000))/* ori Ra, Rs, UIMM */
778 /* li r0, SIMM (short for addi r0, 0, SIMM). This is the first
779 in a pair of insns to save the vector registers on the
781 /* 001110 00000 00000 iiii iiii iiii iiii */
782 /* 001110 01110 00000 iiii iiii iiii iiii */
783 else if ((op
& 0xffff0000) == 0x38000000 /* li r0, SIMM */
784 || (op
& 0xffff0000) == 0x39c00000) /* li r14, SIMM */
787 vr_saved_offset
= SIGNED_SHORT (op
);
789 /* Store vector register S at (r31+r0) aligned to 16 bytes. */
790 /* 011111 sssss 11111 00000 00111001110 */
791 else if ((op
& 0xfc1fffff) == 0x7c1f01ce) /* stvx Vs, R31, R0 */
793 if (pc
== (li_found_pc
+ 4))
795 vr_reg
= GET_SRC_REG (op
);
796 /* If this is the first vector reg to be saved, or if
797 it has a lower number than others previously seen,
798 reupdate the frame info. */
799 if (fdata
->saved_vr
== -1 || fdata
->saved_vr
> vr_reg
)
801 fdata
->saved_vr
= vr_reg
;
802 fdata
->vr_offset
= vr_saved_offset
+ offset
;
804 vr_saved_offset
= -1;
809 /* End AltiVec related instructions. */
811 /* Start BookE related instructions. */
812 /* Store gen register S at (r31+uimm).
813 Any register less than r13 is volatile, so we don't care. */
814 /* 000100 sssss 11111 iiiii 01100100001 */
815 else if (arch_info
->mach
== bfd_mach_ppc_e500
816 && (op
& 0xfc1f07ff) == 0x101f0321) /* evstdd Rs,uimm(R31) */
818 if ((op
& 0x03e00000) >= 0x01a00000) /* Rs >= r13 */
821 ev_reg
= GET_SRC_REG (op
);
822 imm
= (op
>> 11) & 0x1f;
824 /* If this is the first vector reg to be saved, or if
825 it has a lower number than others previously seen,
826 reupdate the frame info. */
827 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
829 fdata
->saved_ev
= ev_reg
;
830 fdata
->ev_offset
= ev_offset
+ offset
;
835 /* Store gen register rS at (r1+rB). */
836 /* 000100 sssss 00001 bbbbb 01100100000 */
837 else if (arch_info
->mach
== bfd_mach_ppc_e500
838 && (op
& 0xffe007ff) == 0x13e00320) /* evstddx RS,R1,Rb */
840 if (pc
== (li_found_pc
+ 4))
842 ev_reg
= GET_SRC_REG (op
);
843 /* If this is the first vector reg to be saved, or if
844 it has a lower number than others previously seen,
845 reupdate the frame info. */
846 /* We know the contents of rB from the previous instruction. */
847 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
849 fdata
->saved_ev
= ev_reg
;
850 fdata
->ev_offset
= vr_saved_offset
+ offset
;
852 vr_saved_offset
= -1;
858 /* Store gen register r31 at (rA+uimm). */
859 /* 000100 11111 aaaaa iiiii 01100100001 */
860 else if (arch_info
->mach
== bfd_mach_ppc_e500
861 && (op
& 0xffe007ff) == 0x13e00321) /* evstdd R31,Ra,UIMM */
863 /* Wwe know that the source register is 31 already, but
864 it can't hurt to compute it. */
865 ev_reg
= GET_SRC_REG (op
);
866 ev_offset
= ((op
>> 11) & 0x1f) * 8;
867 /* If this is the first vector reg to be saved, or if
868 it has a lower number than others previously seen,
869 reupdate the frame info. */
870 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
872 fdata
->saved_ev
= ev_reg
;
873 fdata
->ev_offset
= ev_offset
+ offset
;
878 /* Store gen register S at (r31+r0).
879 Store param on stack when offset from SP bigger than 4 bytes. */
880 /* 000100 sssss 11111 00000 01100100000 */
881 else if (arch_info
->mach
== bfd_mach_ppc_e500
882 && (op
& 0xfc1fffff) == 0x101f0320) /* evstddx Rs,R31,R0 */
884 if (pc
== (li_found_pc
+ 4))
886 if ((op
& 0x03e00000) >= 0x01a00000)
888 ev_reg
= GET_SRC_REG (op
);
889 /* If this is the first vector reg to be saved, or if
890 it has a lower number than others previously seen,
891 reupdate the frame info. */
892 /* We know the contents of r0 from the previous
894 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
896 fdata
->saved_ev
= ev_reg
;
897 fdata
->ev_offset
= vr_saved_offset
+ offset
;
901 vr_saved_offset
= -1;
906 /* End BookE related instructions. */
910 /* Not a recognized prologue instruction.
911 Handle optimizer code motions into the prologue by continuing
912 the search if we have no valid frame yet or if the return
913 address is not yet saved in the frame. */
914 if (fdata
->frameless
== 0
915 && (lr_reg
== -1 || fdata
->nosavedpc
== 0))
918 if (op
== 0x4e800020 /* blr */
919 || op
== 0x4e800420) /* bctr */
920 /* Do not scan past epilogue in frameless functions or
923 if ((op
& 0xf4000000) == 0x40000000) /* bxx */
924 /* Never skip branches. */
927 if (num_skip_non_prologue_insns
++ > max_skip_non_prologue_insns
)
928 /* Do not scan too many insns, scanning insns is expensive with
932 /* Continue scanning. */
933 prev_insn_was_prologue_insn
= 0;
939 /* I have problems with skipping over __main() that I need to address
940 * sometime. Previously, I used to use misc_function_vector which
941 * didn't work as well as I wanted to be. -MGO */
943 /* If the first thing after skipping a prolog is a branch to a function,
944 this might be a call to an initializer in main(), introduced by gcc2.
945 We'd like to skip over it as well. Fortunately, xlc does some extra
946 work before calling a function right after a prologue, thus we can
947 single out such gcc2 behaviour. */
950 if ((op
& 0xfc000001) == 0x48000001)
951 { /* bl foo, an initializer function? */
952 op
= read_memory_integer (pc
+ 4, 4);
954 if (op
== 0x4def7b82)
955 { /* cror 0xf, 0xf, 0xf (nop) */
957 /* Check and see if we are in main. If so, skip over this
958 initializer function as well. */
960 tmp
= find_pc_misc_function (pc
);
962 && strcmp (misc_function_vector
[tmp
].name
, main_name ()) == 0)
968 fdata
->offset
= -fdata
->offset
;
969 return last_prologue_pc
;
973 /*************************************************************************
974 Support for creating pushing a dummy frame into the stack, and popping
976 *************************************************************************/
979 /* All the ABI's require 16 byte alignment. */
981 rs6000_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
986 /* Pass the arguments in either registers, or in the stack. In RS/6000,
987 the first eight words of the argument list (that might be less than
988 eight parameters if some parameters occupy more than one word) are
989 passed in r3..r10 registers. float and double parameters are
990 passed in fpr's, in addition to that. Rest of the parameters if any
991 are passed in user stack. There might be cases in which half of the
992 parameter is copied into registers, the other half is pushed into
995 Stack must be aligned on 64-bit boundaries when synthesizing
998 If the function is returning a structure, then the return address is passed
999 in r3, then the first 7 words of the parameters can be passed in registers,
1000 starting from r4. */
1003 rs6000_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
1004 struct regcache
*regcache
, CORE_ADDR bp_addr
,
1005 int nargs
, struct value
**args
, CORE_ADDR sp
,
1006 int struct_return
, CORE_ADDR struct_addr
)
1008 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1011 int argno
; /* current argument number */
1012 int argbytes
; /* current argument byte */
1013 char tmp_buffer
[50];
1014 int f_argno
= 0; /* current floating point argno */
1015 int wordsize
= gdbarch_tdep (current_gdbarch
)->wordsize
;
1017 struct value
*arg
= 0;
1022 /* The first eight words of ther arguments are passed in registers.
1023 Copy them appropriately. */
1026 /* If the function is returning a `struct', then the first word
1027 (which will be passed in r3) is used for struct return address.
1028 In that case we should advance one word and start from r4
1029 register to copy parameters. */
1032 regcache_raw_write_unsigned (regcache
, tdep
->ppc_gp0_regnum
+ 3,
1038 effectively indirect call... gcc does...
1040 return_val example( float, int);
1043 float in fp0, int in r3
1044 offset of stack on overflow 8/16
1045 for varargs, must go by type.
1047 float in r3&r4, int in r5
1048 offset of stack on overflow different
1050 return in r3 or f0. If no float, must study how gcc emulates floats;
1051 pay attention to arg promotion.
1052 User may have to cast\args to handle promotion correctly
1053 since gdb won't know if prototype supplied or not.
1056 for (argno
= 0, argbytes
= 0; argno
< nargs
&& ii
< 8; ++ii
)
1058 int reg_size
= DEPRECATED_REGISTER_RAW_SIZE (ii
+ 3);
1061 type
= check_typedef (VALUE_TYPE (arg
));
1062 len
= TYPE_LENGTH (type
);
1064 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1067 /* Floating point arguments are passed in fpr's, as well as gpr's.
1068 There are 13 fpr's reserved for passing parameters. At this point
1069 there is no way we would run out of them. */
1073 "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno
);
1075 memcpy (&deprecated_registers
[DEPRECATED_REGISTER_BYTE (FP0_REGNUM
+ 1 + f_argno
)],
1076 VALUE_CONTENTS (arg
),
1084 /* Argument takes more than one register. */
1085 while (argbytes
< len
)
1087 memset (&deprecated_registers
[DEPRECATED_REGISTER_BYTE (ii
+ 3)], 0,
1089 memcpy (&deprecated_registers
[DEPRECATED_REGISTER_BYTE (ii
+ 3)],
1090 ((char *) VALUE_CONTENTS (arg
)) + argbytes
,
1091 (len
- argbytes
) > reg_size
1092 ? reg_size
: len
- argbytes
);
1093 ++ii
, argbytes
+= reg_size
;
1096 goto ran_out_of_registers_for_arguments
;
1103 /* Argument can fit in one register. No problem. */
1104 int adj
= TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
? reg_size
- len
: 0;
1105 memset (&deprecated_registers
[DEPRECATED_REGISTER_BYTE (ii
+ 3)], 0, reg_size
);
1106 memcpy ((char *)&deprecated_registers
[DEPRECATED_REGISTER_BYTE (ii
+ 3)] + adj
,
1107 VALUE_CONTENTS (arg
), len
);
1112 ran_out_of_registers_for_arguments
:
1114 saved_sp
= read_sp ();
1116 /* Location for 8 parameters are always reserved. */
1119 /* Another six words for back chain, TOC register, link register, etc. */
1122 /* Stack pointer must be quadword aligned. */
1125 /* If there are more arguments, allocate space for them in
1126 the stack, then push them starting from the ninth one. */
1128 if ((argno
< nargs
) || argbytes
)
1134 space
+= ((len
- argbytes
+ 3) & -4);
1140 for (; jj
< nargs
; ++jj
)
1142 struct value
*val
= args
[jj
];
1143 space
+= ((TYPE_LENGTH (VALUE_TYPE (val
))) + 3) & -4;
1146 /* Add location required for the rest of the parameters. */
1147 space
= (space
+ 15) & -16;
1150 /* This is another instance we need to be concerned about
1151 securing our stack space. If we write anything underneath %sp
1152 (r1), we might conflict with the kernel who thinks he is free
1153 to use this area. So, update %sp first before doing anything
1156 regcache_raw_write_signed (regcache
, SP_REGNUM
, sp
);
1158 /* If the last argument copied into the registers didn't fit there
1159 completely, push the rest of it into stack. */
1163 write_memory (sp
+ 24 + (ii
* 4),
1164 ((char *) VALUE_CONTENTS (arg
)) + argbytes
,
1167 ii
+= ((len
- argbytes
+ 3) & -4) / 4;
1170 /* Push the rest of the arguments into stack. */
1171 for (; argno
< nargs
; ++argno
)
1175 type
= check_typedef (VALUE_TYPE (arg
));
1176 len
= TYPE_LENGTH (type
);
1179 /* Float types should be passed in fpr's, as well as in the
1181 if (TYPE_CODE (type
) == TYPE_CODE_FLT
&& f_argno
< 13)
1186 "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno
);
1188 memcpy (&deprecated_registers
[DEPRECATED_REGISTER_BYTE (FP0_REGNUM
+ 1 + f_argno
)],
1189 VALUE_CONTENTS (arg
),
1194 write_memory (sp
+ 24 + (ii
* 4), (char *) VALUE_CONTENTS (arg
), len
);
1195 ii
+= ((len
+ 3) & -4) / 4;
1199 /* Set the stack pointer. According to the ABI, the SP is meant to
1200 be set _before_ the corresponding stack space is used. On AIX,
1201 this even applies when the target has been completely stopped!
1202 Not doing this can lead to conflicts with the kernel which thinks
1203 that it still has control over this not-yet-allocated stack
1205 regcache_raw_write_signed (regcache
, SP_REGNUM
, sp
);
1207 /* Set back chain properly. */
1208 store_unsigned_integer (tmp_buffer
, 4, saved_sp
);
1209 write_memory (sp
, tmp_buffer
, 4);
1211 /* Point the inferior function call's return address at the dummy's
1213 regcache_raw_write_signed (regcache
, tdep
->ppc_lr_regnum
, bp_addr
);
1215 /* Set the TOC register, get the value from the objfile reader
1216 which, in turn, gets it from the VMAP table. */
1217 if (rs6000_find_toc_address_hook
!= NULL
)
1219 CORE_ADDR tocvalue
= (*rs6000_find_toc_address_hook
) (func_addr
);
1220 regcache_raw_write_signed (regcache
, tdep
->ppc_toc_regnum
, tocvalue
);
1223 target_store_registers (-1);
1227 /* PowerOpen always puts structures in memory. Vectors, which were
1228 added later, do get returned in a register though. */
1231 rs6000_use_struct_convention (int gcc_p
, struct type
*value_type
)
1233 if ((TYPE_LENGTH (value_type
) == 16 || TYPE_LENGTH (value_type
) == 8)
1234 && TYPE_VECTOR (value_type
))
1240 rs6000_extract_return_value (struct type
*valtype
, char *regbuf
, char *valbuf
)
1243 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1245 if (TYPE_CODE (valtype
) == TYPE_CODE_FLT
)
1250 /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes.
1251 We need to truncate the return value into float size (4 byte) if
1254 if (TYPE_LENGTH (valtype
) > 4) /* this is a double */
1256 ®buf
[DEPRECATED_REGISTER_BYTE (FP0_REGNUM
+ 1)],
1257 TYPE_LENGTH (valtype
));
1260 memcpy (&dd
, ®buf
[DEPRECATED_REGISTER_BYTE (FP0_REGNUM
+ 1)], 8);
1262 memcpy (valbuf
, &ff
, sizeof (float));
1265 else if (TYPE_CODE (valtype
) == TYPE_CODE_ARRAY
1266 && TYPE_LENGTH (valtype
) == 16
1267 && TYPE_VECTOR (valtype
))
1269 memcpy (valbuf
, regbuf
+ DEPRECATED_REGISTER_BYTE (tdep
->ppc_vr0_regnum
+ 2),
1270 TYPE_LENGTH (valtype
));
1274 /* return value is copied starting from r3. */
1275 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
1276 && TYPE_LENGTH (valtype
) < DEPRECATED_REGISTER_RAW_SIZE (3))
1277 offset
= DEPRECATED_REGISTER_RAW_SIZE (3) - TYPE_LENGTH (valtype
);
1280 regbuf
+ DEPRECATED_REGISTER_BYTE (3) + offset
,
1281 TYPE_LENGTH (valtype
));
1285 /* Return whether handle_inferior_event() should proceed through code
1286 starting at PC in function NAME when stepping.
1288 The AIX -bbigtoc linker option generates functions @FIX0, @FIX1, etc. to
1289 handle memory references that are too distant to fit in instructions
1290 generated by the compiler. For example, if 'foo' in the following
1295 is greater than 32767, the linker might replace the lwz with a branch to
1296 somewhere in @FIX1 that does the load in 2 instructions and then branches
1297 back to where execution should continue.
1299 GDB should silently step over @FIX code, just like AIX dbx does.
1300 Unfortunately, the linker uses the "b" instruction for the branches,
1301 meaning that the link register doesn't get set. Therefore, GDB's usual
1302 step_over_function() mechanism won't work.
1304 Instead, use the IN_SOLIB_RETURN_TRAMPOLINE and SKIP_TRAMPOLINE_CODE hooks
1305 in handle_inferior_event() to skip past @FIX code. */
1308 rs6000_in_solib_return_trampoline (CORE_ADDR pc
, char *name
)
1310 return name
&& !strncmp (name
, "@FIX", 4);
1313 /* Skip code that the user doesn't want to see when stepping:
1315 1. Indirect function calls use a piece of trampoline code to do context
1316 switching, i.e. to set the new TOC table. Skip such code if we are on
1317 its first instruction (as when we have single-stepped to here).
1319 2. Skip shared library trampoline code (which is different from
1320 indirect function call trampolines).
1322 3. Skip bigtoc fixup code.
1324 Result is desired PC to step until, or NULL if we are not in
1325 code that should be skipped. */
1328 rs6000_skip_trampoline_code (CORE_ADDR pc
)
1330 unsigned int ii
, op
;
1332 CORE_ADDR solib_target_pc
;
1333 struct minimal_symbol
*msymbol
;
1335 static unsigned trampoline_code
[] =
1337 0x800b0000, /* l r0,0x0(r11) */
1338 0x90410014, /* st r2,0x14(r1) */
1339 0x7c0903a6, /* mtctr r0 */
1340 0x804b0004, /* l r2,0x4(r11) */
1341 0x816b0008, /* l r11,0x8(r11) */
1342 0x4e800420, /* bctr */
1343 0x4e800020, /* br */
1347 /* Check for bigtoc fixup code. */
1348 msymbol
= lookup_minimal_symbol_by_pc (pc
);
1349 if (msymbol
&& rs6000_in_solib_return_trampoline (pc
, DEPRECATED_SYMBOL_NAME (msymbol
)))
1351 /* Double-check that the third instruction from PC is relative "b". */
1352 op
= read_memory_integer (pc
+ 8, 4);
1353 if ((op
& 0xfc000003) == 0x48000000)
1355 /* Extract bits 6-29 as a signed 24-bit relative word address and
1356 add it to the containing PC. */
1357 rel
= ((int)(op
<< 6) >> 6);
1358 return pc
+ 8 + rel
;
1362 /* If pc is in a shared library trampoline, return its target. */
1363 solib_target_pc
= find_solib_trampoline_target (pc
);
1364 if (solib_target_pc
)
1365 return solib_target_pc
;
1367 for (ii
= 0; trampoline_code
[ii
]; ++ii
)
1369 op
= read_memory_integer (pc
+ (ii
* 4), 4);
1370 if (op
!= trampoline_code
[ii
])
1373 ii
= read_register (11); /* r11 holds destination addr */
1374 pc
= read_memory_addr (ii
, gdbarch_tdep (current_gdbarch
)->wordsize
); /* (r11) value */
1378 /* If saved registers of frame FI are not known yet, read and cache them.
1379 &FDATAP contains rs6000_framedata; TDATAP can be NULL,
1380 in which case the framedata are read. */
1383 frame_get_saved_regs (struct frame_info
*fi
, struct rs6000_framedata
*fdatap
)
1385 CORE_ADDR frame_addr
;
1386 struct rs6000_framedata work_fdata
;
1387 struct gdbarch_tdep
* tdep
= gdbarch_tdep (current_gdbarch
);
1388 int wordsize
= tdep
->wordsize
;
1390 if (deprecated_get_frame_saved_regs (fi
))
1395 fdatap
= &work_fdata
;
1396 (void) skip_prologue (get_frame_func (fi
), get_frame_pc (fi
), fdatap
);
1399 frame_saved_regs_zalloc (fi
);
1401 /* If there were any saved registers, figure out parent's stack
1403 /* The following is true only if the frame doesn't have a call to
1406 if (fdatap
->saved_fpr
== 0
1407 && fdatap
->saved_gpr
== 0
1408 && fdatap
->saved_vr
== 0
1409 && fdatap
->saved_ev
== 0
1410 && fdatap
->lr_offset
== 0
1411 && fdatap
->cr_offset
== 0
1412 && fdatap
->vr_offset
== 0
1413 && fdatap
->ev_offset
== 0)
1416 /* NOTE: cagney/2002-04-14: The ->frame points to the inner-most
1417 address of the current frame. Things might be easier if the
1418 ->frame pointed to the outer-most address of the frame. In the
1419 mean time, the address of the prev frame is used as the base
1420 address of this frame. */
1421 frame_addr
= DEPRECATED_FRAME_CHAIN (fi
);
1423 /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr.
1424 All fpr's from saved_fpr to fp31 are saved. */
1426 if (fdatap
->saved_fpr
>= 0)
1429 CORE_ADDR fpr_addr
= frame_addr
+ fdatap
->fpr_offset
;
1430 for (i
= fdatap
->saved_fpr
; i
< 32; i
++)
1432 deprecated_get_frame_saved_regs (fi
)[FP0_REGNUM
+ i
] = fpr_addr
;
1437 /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr.
1438 All gpr's from saved_gpr to gpr31 are saved. */
1440 if (fdatap
->saved_gpr
>= 0)
1443 CORE_ADDR gpr_addr
= frame_addr
+ fdatap
->gpr_offset
;
1444 for (i
= fdatap
->saved_gpr
; i
< 32; i
++)
1446 deprecated_get_frame_saved_regs (fi
)[tdep
->ppc_gp0_regnum
+ i
] = gpr_addr
;
1447 gpr_addr
+= wordsize
;
1451 /* if != -1, fdatap->saved_vr is the smallest number of saved_vr.
1452 All vr's from saved_vr to vr31 are saved. */
1453 if (tdep
->ppc_vr0_regnum
!= -1 && tdep
->ppc_vrsave_regnum
!= -1)
1455 if (fdatap
->saved_vr
>= 0)
1458 CORE_ADDR vr_addr
= frame_addr
+ fdatap
->vr_offset
;
1459 for (i
= fdatap
->saved_vr
; i
< 32; i
++)
1461 deprecated_get_frame_saved_regs (fi
)[tdep
->ppc_vr0_regnum
+ i
] = vr_addr
;
1462 vr_addr
+= DEPRECATED_REGISTER_RAW_SIZE (tdep
->ppc_vr0_regnum
);
1467 /* if != -1, fdatap->saved_ev is the smallest number of saved_ev.
1468 All vr's from saved_ev to ev31 are saved. ????? */
1469 if (tdep
->ppc_ev0_regnum
!= -1 && tdep
->ppc_ev31_regnum
!= -1)
1471 if (fdatap
->saved_ev
>= 0)
1474 CORE_ADDR ev_addr
= frame_addr
+ fdatap
->ev_offset
;
1475 for (i
= fdatap
->saved_ev
; i
< 32; i
++)
1477 deprecated_get_frame_saved_regs (fi
)[tdep
->ppc_ev0_regnum
+ i
] = ev_addr
;
1478 deprecated_get_frame_saved_regs (fi
)[tdep
->ppc_gp0_regnum
+ i
] = ev_addr
+ 4;
1479 ev_addr
+= DEPRECATED_REGISTER_RAW_SIZE (tdep
->ppc_ev0_regnum
);
1484 /* If != 0, fdatap->cr_offset is the offset from the frame that holds
1486 if (fdatap
->cr_offset
!= 0)
1487 deprecated_get_frame_saved_regs (fi
)[tdep
->ppc_cr_regnum
] = frame_addr
+ fdatap
->cr_offset
;
1489 /* If != 0, fdatap->lr_offset is the offset from the frame that holds
1491 if (fdatap
->lr_offset
!= 0)
1492 deprecated_get_frame_saved_regs (fi
)[tdep
->ppc_lr_regnum
] = frame_addr
+ fdatap
->lr_offset
;
1494 /* If != 0, fdatap->vrsave_offset is the offset from the frame that holds
1496 if (fdatap
->vrsave_offset
!= 0)
1497 deprecated_get_frame_saved_regs (fi
)[tdep
->ppc_vrsave_regnum
] = frame_addr
+ fdatap
->vrsave_offset
;
1500 /* Return the address of a frame. This is the inital %sp value when the frame
1501 was first allocated. For functions calling alloca(), it might be saved in
1502 an alloca register. */
1505 frame_initial_stack_address (struct frame_info
*fi
)
1508 struct rs6000_framedata fdata
;
1509 struct frame_info
*callee_fi
;
1511 /* If the initial stack pointer (frame address) of this frame is known,
1514 if (get_frame_extra_info (fi
)->initial_sp
)
1515 return get_frame_extra_info (fi
)->initial_sp
;
1517 /* Find out if this function is using an alloca register. */
1519 (void) skip_prologue (get_frame_func (fi
), get_frame_pc (fi
), &fdata
);
1521 /* If saved registers of this frame are not known yet, read and
1524 if (!deprecated_get_frame_saved_regs (fi
))
1525 frame_get_saved_regs (fi
, &fdata
);
1527 /* If no alloca register used, then fi->frame is the value of the %sp for
1528 this frame, and it is good enough. */
1530 if (fdata
.alloca_reg
< 0)
1532 get_frame_extra_info (fi
)->initial_sp
= get_frame_base (fi
);
1533 return get_frame_extra_info (fi
)->initial_sp
;
1536 /* There is an alloca register, use its value, in the current frame,
1537 as the initial stack pointer. */
1539 char tmpbuf
[MAX_REGISTER_SIZE
];
1540 if (frame_register_read (fi
, fdata
.alloca_reg
, tmpbuf
))
1542 get_frame_extra_info (fi
)->initial_sp
1543 = extract_unsigned_integer (tmpbuf
,
1544 DEPRECATED_REGISTER_RAW_SIZE (fdata
.alloca_reg
));
1547 /* NOTE: cagney/2002-04-17: At present the only time
1548 frame_register_read will fail is when the register isn't
1549 available. If that does happen, use the frame. */
1550 get_frame_extra_info (fi
)->initial_sp
= get_frame_base (fi
);
1552 return get_frame_extra_info (fi
)->initial_sp
;
1555 /* Return the size of register REG when words are WORDSIZE bytes long. If REG
1556 isn't available with that word size, return 0. */
1559 regsize (const struct reg
*reg
, int wordsize
)
1561 return wordsize
== 8 ? reg
->sz64
: reg
->sz32
;
1564 /* Return the name of register number N, or null if no such register exists
1565 in the current architecture. */
1568 rs6000_register_name (int n
)
1570 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1571 const struct reg
*reg
= tdep
->regs
+ n
;
1573 if (!regsize (reg
, tdep
->wordsize
))
1578 /* Index within `registers' of the first byte of the space for
1582 rs6000_register_byte (int n
)
1584 return gdbarch_tdep (current_gdbarch
)->regoff
[n
];
1587 /* Return the number of bytes of storage in the actual machine representation
1588 for register N if that register is available, else return 0. */
1591 rs6000_register_raw_size (int n
)
1593 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1594 const struct reg
*reg
= tdep
->regs
+ n
;
1595 return regsize (reg
, tdep
->wordsize
);
1598 /* Return the GDB type object for the "standard" data type
1599 of data in register N. */
1601 static struct type
*
1602 rs6000_register_virtual_type (int n
)
1604 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1605 const struct reg
*reg
= tdep
->regs
+ n
;
1608 return builtin_type_double
;
1611 int size
= regsize (reg
, tdep
->wordsize
);
1615 return builtin_type_int0
;
1617 return builtin_type_uint32
;
1619 if (tdep
->ppc_ev0_regnum
<= n
&& n
<= tdep
->ppc_ev31_regnum
)
1620 return builtin_type_vec64
;
1622 return builtin_type_uint64
;
1625 return builtin_type_vec128
;
1628 internal_error (__FILE__
, __LINE__
, "Register %d size %d unknown",
1634 /* Return whether register N requires conversion when moving from raw format
1637 The register format for RS/6000 floating point registers is always
1638 double, we need a conversion if the memory format is float. */
1641 rs6000_register_convertible (int n
)
1643 const struct reg
*reg
= gdbarch_tdep (current_gdbarch
)->regs
+ n
;
1647 /* Convert data from raw format for register N in buffer FROM
1648 to virtual format with type TYPE in buffer TO. */
1651 rs6000_register_convert_to_virtual (int n
, struct type
*type
,
1652 char *from
, char *to
)
1654 if (TYPE_LENGTH (type
) != DEPRECATED_REGISTER_RAW_SIZE (n
))
1656 double val
= deprecated_extract_floating (from
, DEPRECATED_REGISTER_RAW_SIZE (n
));
1657 deprecated_store_floating (to
, TYPE_LENGTH (type
), val
);
1660 memcpy (to
, from
, DEPRECATED_REGISTER_RAW_SIZE (n
));
1663 /* Convert data from virtual format with type TYPE in buffer FROM
1664 to raw format for register N in buffer TO. */
1667 rs6000_register_convert_to_raw (struct type
*type
, int n
,
1668 const char *from
, char *to
)
1670 if (TYPE_LENGTH (type
) != DEPRECATED_REGISTER_RAW_SIZE (n
))
1672 double val
= deprecated_extract_floating (from
, TYPE_LENGTH (type
));
1673 deprecated_store_floating (to
, DEPRECATED_REGISTER_RAW_SIZE (n
), val
);
1676 memcpy (to
, from
, DEPRECATED_REGISTER_RAW_SIZE (n
));
1680 e500_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1681 int reg_nr
, void *buffer
)
1685 char temp_buffer
[MAX_REGISTER_SIZE
];
1686 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1688 if (reg_nr
>= tdep
->ppc_gp0_regnum
1689 && reg_nr
<= tdep
->ppc_gplast_regnum
)
1691 base_regnum
= reg_nr
- tdep
->ppc_gp0_regnum
+ tdep
->ppc_ev0_regnum
;
1693 /* Build the value in the provided buffer. */
1694 /* Read the raw register of which this one is the lower portion. */
1695 regcache_raw_read (regcache
, base_regnum
, temp_buffer
);
1696 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1698 memcpy ((char *) buffer
, temp_buffer
+ offset
, 4);
1703 e500_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1704 int reg_nr
, const void *buffer
)
1708 char temp_buffer
[MAX_REGISTER_SIZE
];
1709 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1711 if (reg_nr
>= tdep
->ppc_gp0_regnum
1712 && reg_nr
<= tdep
->ppc_gplast_regnum
)
1714 base_regnum
= reg_nr
- tdep
->ppc_gp0_regnum
+ tdep
->ppc_ev0_regnum
;
1715 /* reg_nr is 32 bit here, and base_regnum is 64 bits. */
1716 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1719 /* Let's read the value of the base register into a temporary
1720 buffer, so that overwriting the last four bytes with the new
1721 value of the pseudo will leave the upper 4 bytes unchanged. */
1722 regcache_raw_read (regcache
, base_regnum
, temp_buffer
);
1724 /* Write as an 8 byte quantity. */
1725 memcpy (temp_buffer
+ offset
, (char *) buffer
, 4);
1726 regcache_raw_write (regcache
, base_regnum
, temp_buffer
);
1730 /* Convert a dwarf2 register number to a gdb REGNUM. */
1732 e500_dwarf2_reg_to_regnum (int num
)
1735 if (0 <= num
&& num
<= 31)
1736 return num
+ gdbarch_tdep (current_gdbarch
)->ppc_gp0_regnum
;
1741 /* Convert a dbx stab register number (from `r' declaration) to a gdb
1744 rs6000_stab_reg_to_regnum (int num
)
1750 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_mq_regnum
;
1753 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
;
1756 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_ctr_regnum
;
1759 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_xer_regnum
;
1769 rs6000_store_return_value (struct type
*type
, char *valbuf
)
1771 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1773 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1775 /* Floating point values are returned starting from FPR1 and up.
1776 Say a double_double_double type could be returned in
1777 FPR1/FPR2/FPR3 triple. */
1779 deprecated_write_register_bytes (DEPRECATED_REGISTER_BYTE (FP0_REGNUM
+ 1), valbuf
,
1780 TYPE_LENGTH (type
));
1781 else if (TYPE_CODE (type
) == TYPE_CODE_ARRAY
)
1783 if (TYPE_LENGTH (type
) == 16
1784 && TYPE_VECTOR (type
))
1785 deprecated_write_register_bytes (DEPRECATED_REGISTER_BYTE (tdep
->ppc_vr0_regnum
+ 2),
1786 valbuf
, TYPE_LENGTH (type
));
1789 /* Everything else is returned in GPR3 and up. */
1790 deprecated_write_register_bytes (DEPRECATED_REGISTER_BYTE (gdbarch_tdep (current_gdbarch
)->ppc_gp0_regnum
+ 3),
1791 valbuf
, TYPE_LENGTH (type
));
1794 /* Extract from an array REGBUF containing the (raw) register state
1795 the address in which a function should return its structure value,
1796 as a CORE_ADDR (or an expression that can be used as one). */
1799 rs6000_extract_struct_value_address (struct regcache
*regcache
)
1801 /* FIXME: cagney/2002-09-26: PR gdb/724: When making an inferior
1802 function call GDB knows the address of the struct return value
1803 and hence, should not need to call this function. Unfortunately,
1804 the current call_function_by_hand() code only saves the most
1805 recent struct address leading to occasional calls. The code
1806 should instead maintain a stack of such addresses (in the dummy
1808 /* NOTE: cagney/2002-09-26: Return 0 which indicates that we've
1809 really got no idea where the return value is being stored. While
1810 r3, on function entry, contained the address it will have since
1811 been reused (scratch) and hence wouldn't be valid */
1815 /* Hook called when a new child process is started. */
1818 rs6000_create_inferior (int pid
)
1820 if (rs6000_set_host_arch_hook
)
1821 rs6000_set_host_arch_hook (pid
);
1824 /* Support for CONVERT_FROM_FUNC_PTR_ADDR (ARCH, ADDR, TARG).
1826 Usually a function pointer's representation is simply the address
1827 of the function. On the RS/6000 however, a function pointer is
1828 represented by a pointer to a TOC entry. This TOC entry contains
1829 three words, the first word is the address of the function, the
1830 second word is the TOC pointer (r2), and the third word is the
1831 static chain value. Throughout GDB it is currently assumed that a
1832 function pointer contains the address of the function, which is not
1833 easy to fix. In addition, the conversion of a function address to
1834 a function pointer would require allocation of a TOC entry in the
1835 inferior's memory space, with all its drawbacks. To be able to
1836 call C++ virtual methods in the inferior (which are called via
1837 function pointers), find_function_addr uses this function to get the
1838 function address from a function pointer. */
1840 /* Return real function address if ADDR (a function pointer) is in the data
1841 space and is therefore a special function pointer. */
1844 rs6000_convert_from_func_ptr_addr (struct gdbarch
*gdbarch
,
1846 struct target_ops
*targ
)
1848 struct obj_section
*s
;
1850 s
= find_pc_section (addr
);
1851 if (s
&& s
->the_bfd_section
->flags
& SEC_CODE
)
1854 /* ADDR is in the data space, so it's a special function pointer. */
1855 return read_memory_addr (addr
, gdbarch_tdep (current_gdbarch
)->wordsize
);
1859 /* Handling the various POWER/PowerPC variants. */
1862 /* The arrays here called registers_MUMBLE hold information about available
1865 For each family of PPC variants, I've tried to isolate out the
1866 common registers and put them up front, so that as long as you get
1867 the general family right, GDB will correctly identify the registers
1868 common to that family. The common register sets are:
1870 For the 60x family: hid0 hid1 iabr dabr pir
1872 For the 505 and 860 family: eie eid nri
1874 For the 403 and 403GC: icdbdr esr dear evpr cdbcr tsr tcr pit tbhi
1875 tblo srr2 srr3 dbsr dbcr iac1 iac2 dac1 dac2 dccr iccr pbl1
1878 Most of these register groups aren't anything formal. I arrived at
1879 them by looking at the registers that occurred in more than one
1882 Note: kevinb/2002-04-30: Support for the fpscr register was added
1883 during April, 2002. Slot 70 is being used for PowerPC and slot 71
1884 for Power. For PowerPC, slot 70 was unused and was already in the
1885 PPC_UISA_SPRS which is ideally where fpscr should go. For Power,
1886 slot 70 was being used for "mq", so the next available slot (71)
1887 was chosen. It would have been nice to be able to make the
1888 register numbers the same across processor cores, but this wasn't
1889 possible without either 1) renumbering some registers for some
1890 processors or 2) assigning fpscr to a really high slot that's
1891 larger than any current register number. Doing (1) is bad because
1892 existing stubs would break. Doing (2) is undesirable because it
1893 would introduce a really large gap between fpscr and the rest of
1894 the registers for most processors. */
1896 /* Convenience macros for populating register arrays. */
1898 /* Within another macro, convert S to a string. */
1902 /* Return a struct reg defining register NAME that's 32 bits on 32-bit systems
1903 and 64 bits on 64-bit systems. */
1904 #define R(name) { STR(name), 4, 8, 0, 0 }
1906 /* Return a struct reg defining register NAME that's 32 bits on all
1908 #define R4(name) { STR(name), 4, 4, 0, 0 }
1910 /* Return a struct reg defining register NAME that's 64 bits on all
1912 #define R8(name) { STR(name), 8, 8, 0, 0 }
1914 /* Return a struct reg defining register NAME that's 128 bits on all
1916 #define R16(name) { STR(name), 16, 16, 0, 0 }
1918 /* Return a struct reg defining floating-point register NAME. */
1919 #define F(name) { STR(name), 8, 8, 1, 0 }
1921 /* Return a struct reg defining a pseudo register NAME. */
1922 #define P(name) { STR(name), 4, 8, 0, 1}
1924 /* Return a struct reg defining register NAME that's 32 bits on 32-bit
1925 systems and that doesn't exist on 64-bit systems. */
1926 #define R32(name) { STR(name), 4, 0, 0, 0 }
1928 /* Return a struct reg defining register NAME that's 64 bits on 64-bit
1929 systems and that doesn't exist on 32-bit systems. */
1930 #define R64(name) { STR(name), 0, 8, 0, 0 }
1932 /* Return a struct reg placeholder for a register that doesn't exist. */
1933 #define R0 { 0, 0, 0, 0, 0 }
1935 /* UISA registers common across all architectures, including POWER. */
1937 #define COMMON_UISA_REGS \
1938 /* 0 */ R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), \
1939 /* 8 */ R(r8), R(r9), R(r10),R(r11),R(r12),R(r13),R(r14),R(r15), \
1940 /* 16 */ R(r16),R(r17),R(r18),R(r19),R(r20),R(r21),R(r22),R(r23), \
1941 /* 24 */ R(r24),R(r25),R(r26),R(r27),R(r28),R(r29),R(r30),R(r31), \
1942 /* 32 */ F(f0), F(f1), F(f2), F(f3), F(f4), F(f5), F(f6), F(f7), \
1943 /* 40 */ F(f8), F(f9), F(f10),F(f11),F(f12),F(f13),F(f14),F(f15), \
1944 /* 48 */ F(f16),F(f17),F(f18),F(f19),F(f20),F(f21),F(f22),F(f23), \
1945 /* 56 */ F(f24),F(f25),F(f26),F(f27),F(f28),F(f29),F(f30),F(f31), \
1946 /* 64 */ R(pc), R(ps)
1948 #define COMMON_UISA_NOFP_REGS \
1949 /* 0 */ R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), \
1950 /* 8 */ R(r8), R(r9), R(r10),R(r11),R(r12),R(r13),R(r14),R(r15), \
1951 /* 16 */ R(r16),R(r17),R(r18),R(r19),R(r20),R(r21),R(r22),R(r23), \
1952 /* 24 */ R(r24),R(r25),R(r26),R(r27),R(r28),R(r29),R(r30),R(r31), \
1953 /* 32 */ R0, R0, R0, R0, R0, R0, R0, R0, \
1954 /* 40 */ R0, R0, R0, R0, R0, R0, R0, R0, \
1955 /* 48 */ R0, R0, R0, R0, R0, R0, R0, R0, \
1956 /* 56 */ R0, R0, R0, R0, R0, R0, R0, R0, \
1957 /* 64 */ R(pc), R(ps)
1959 /* UISA-level SPRs for PowerPC. */
1960 #define PPC_UISA_SPRS \
1961 /* 66 */ R4(cr), R(lr), R(ctr), R4(xer), R4(fpscr)
1963 /* UISA-level SPRs for PowerPC without floating point support. */
1964 #define PPC_UISA_NOFP_SPRS \
1965 /* 66 */ R4(cr), R(lr), R(ctr), R4(xer), R0
1967 /* Segment registers, for PowerPC. */
1968 #define PPC_SEGMENT_REGS \
1969 /* 71 */ R32(sr0), R32(sr1), R32(sr2), R32(sr3), \
1970 /* 75 */ R32(sr4), R32(sr5), R32(sr6), R32(sr7), \
1971 /* 79 */ R32(sr8), R32(sr9), R32(sr10), R32(sr11), \
1972 /* 83 */ R32(sr12), R32(sr13), R32(sr14), R32(sr15)
1974 /* OEA SPRs for PowerPC. */
1975 #define PPC_OEA_SPRS \
1977 /* 88 */ R(ibat0u), R(ibat0l), R(ibat1u), R(ibat1l), \
1978 /* 92 */ R(ibat2u), R(ibat2l), R(ibat3u), R(ibat3l), \
1979 /* 96 */ R(dbat0u), R(dbat0l), R(dbat1u), R(dbat1l), \
1980 /* 100 */ R(dbat2u), R(dbat2l), R(dbat3u), R(dbat3l), \
1981 /* 104 */ R(sdr1), R64(asr), R(dar), R4(dsisr), \
1982 /* 108 */ R(sprg0), R(sprg1), R(sprg2), R(sprg3), \
1983 /* 112 */ R(srr0), R(srr1), R(tbl), R(tbu), \
1984 /* 116 */ R4(dec), R(dabr), R4(ear)
1986 /* AltiVec registers. */
1987 #define PPC_ALTIVEC_REGS \
1988 /*119*/R16(vr0), R16(vr1), R16(vr2), R16(vr3), R16(vr4), R16(vr5), R16(vr6), R16(vr7), \
1989 /*127*/R16(vr8), R16(vr9), R16(vr10),R16(vr11),R16(vr12),R16(vr13),R16(vr14),R16(vr15), \
1990 /*135*/R16(vr16),R16(vr17),R16(vr18),R16(vr19),R16(vr20),R16(vr21),R16(vr22),R16(vr23), \
1991 /*143*/R16(vr24),R16(vr25),R16(vr26),R16(vr27),R16(vr28),R16(vr29),R16(vr30),R16(vr31), \
1992 /*151*/R4(vscr), R4(vrsave)
1994 /* Vectors of hi-lo general purpose registers. */
1995 #define PPC_EV_REGS \
1996 /* 0*/R8(ev0), R8(ev1), R8(ev2), R8(ev3), R8(ev4), R8(ev5), R8(ev6), R8(ev7), \
1997 /* 8*/R8(ev8), R8(ev9), R8(ev10),R8(ev11),R8(ev12),R8(ev13),R8(ev14),R8(ev15), \
1998 /*16*/R8(ev16),R8(ev17),R8(ev18),R8(ev19),R8(ev20),R8(ev21),R8(ev22),R8(ev23), \
1999 /*24*/R8(ev24),R8(ev25),R8(ev26),R8(ev27),R8(ev28),R8(ev29),R8(ev30),R8(ev31)
2001 /* Lower half of the EV registers. */
2002 #define PPC_GPRS_PSEUDO_REGS \
2003 /* 0 */ P(r0), P(r1), P(r2), P(r3), P(r4), P(r5), P(r6), P(r7), \
2004 /* 8 */ P(r8), P(r9), P(r10),P(r11),P(r12),P(r13),P(r14),P(r15), \
2005 /* 16 */ P(r16),P(r17),P(r18),P(r19),P(r20),P(r21),P(r22),P(r23), \
2006 /* 24 */ P(r24),P(r25),P(r26),P(r27),P(r28),P(r29),P(r30),P(r31)
2008 /* IBM POWER (pre-PowerPC) architecture, user-level view. We only cover
2009 user-level SPR's. */
2010 static const struct reg registers_power
[] =
2013 /* 66 */ R4(cnd
), R(lr
), R(cnt
), R4(xer
), R4(mq
),
2017 /* PowerPC UISA - a PPC processor as viewed by user-level code. A UISA-only
2018 view of the PowerPC. */
2019 static const struct reg registers_powerpc
[] =
2026 /* PowerPC UISA - a PPC processor as viewed by user-level
2027 code, but without floating point registers. */
2028 static const struct reg registers_powerpc_nofp
[] =
2030 COMMON_UISA_NOFP_REGS
,
2034 /* IBM PowerPC 403. */
2035 static const struct reg registers_403
[] =
2041 /* 119 */ R(icdbdr
), R(esr
), R(dear
), R(evpr
),
2042 /* 123 */ R(cdbcr
), R(tsr
), R(tcr
), R(pit
),
2043 /* 127 */ R(tbhi
), R(tblo
), R(srr2
), R(srr3
),
2044 /* 131 */ R(dbsr
), R(dbcr
), R(iac1
), R(iac2
),
2045 /* 135 */ R(dac1
), R(dac2
), R(dccr
), R(iccr
),
2046 /* 139 */ R(pbl1
), R(pbu1
), R(pbl2
), R(pbu2
)
2049 /* IBM PowerPC 403GC. */
2050 static const struct reg registers_403GC
[] =
2056 /* 119 */ R(icdbdr
), R(esr
), R(dear
), R(evpr
),
2057 /* 123 */ R(cdbcr
), R(tsr
), R(tcr
), R(pit
),
2058 /* 127 */ R(tbhi
), R(tblo
), R(srr2
), R(srr3
),
2059 /* 131 */ R(dbsr
), R(dbcr
), R(iac1
), R(iac2
),
2060 /* 135 */ R(dac1
), R(dac2
), R(dccr
), R(iccr
),
2061 /* 139 */ R(pbl1
), R(pbu1
), R(pbl2
), R(pbu2
),
2062 /* 143 */ R(zpr
), R(pid
), R(sgr
), R(dcwr
),
2063 /* 147 */ R(tbhu
), R(tblu
)
2066 /* Motorola PowerPC 505. */
2067 static const struct reg registers_505
[] =
2073 /* 119 */ R(eie
), R(eid
), R(nri
)
2076 /* Motorola PowerPC 860 or 850. */
2077 static const struct reg registers_860
[] =
2083 /* 119 */ R(eie
), R(eid
), R(nri
), R(cmpa
),
2084 /* 123 */ R(cmpb
), R(cmpc
), R(cmpd
), R(icr
),
2085 /* 127 */ R(der
), R(counta
), R(countb
), R(cmpe
),
2086 /* 131 */ R(cmpf
), R(cmpg
), R(cmph
), R(lctrl1
),
2087 /* 135 */ R(lctrl2
), R(ictrl
), R(bar
), R(ic_cst
),
2088 /* 139 */ R(ic_adr
), R(ic_dat
), R(dc_cst
), R(dc_adr
),
2089 /* 143 */ R(dc_dat
), R(dpdr
), R(dpir
), R(immr
),
2090 /* 147 */ R(mi_ctr
), R(mi_ap
), R(mi_epn
), R(mi_twc
),
2091 /* 151 */ R(mi_rpn
), R(md_ctr
), R(m_casid
), R(md_ap
),
2092 /* 155 */ R(md_epn
), R(md_twb
), R(md_twc
), R(md_rpn
),
2093 /* 159 */ R(m_tw
), R(mi_dbcam
), R(mi_dbram0
), R(mi_dbram1
),
2094 /* 163 */ R(md_dbcam
), R(md_dbram0
), R(md_dbram1
)
2097 /* Motorola PowerPC 601. Note that the 601 has different register numbers
2098 for reading and writing RTCU and RTCL. However, how one reads and writes a
2099 register is the stub's problem. */
2100 static const struct reg registers_601
[] =
2106 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
2107 /* 123 */ R(pir
), R(mq
), R(rtcu
), R(rtcl
)
2110 /* Motorola PowerPC 602. */
2111 static const struct reg registers_602
[] =
2117 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R0
,
2118 /* 123 */ R0
, R(tcr
), R(ibr
), R(esassr
),
2119 /* 127 */ R(sebr
), R(ser
), R(sp
), R(lt
)
2122 /* Motorola/IBM PowerPC 603 or 603e. */
2123 static const struct reg registers_603
[] =
2129 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R0
,
2130 /* 123 */ R0
, R(dmiss
), R(dcmp
), R(hash1
),
2131 /* 127 */ R(hash2
), R(imiss
), R(icmp
), R(rpa
)
2134 /* Motorola PowerPC 604 or 604e. */
2135 static const struct reg registers_604
[] =
2141 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
2142 /* 123 */ R(pir
), R(mmcr0
), R(pmc1
), R(pmc2
),
2143 /* 127 */ R(sia
), R(sda
)
2146 /* Motorola/IBM PowerPC 750 or 740. */
2147 static const struct reg registers_750
[] =
2153 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
2154 /* 123 */ R0
, R(ummcr0
), R(upmc1
), R(upmc2
),
2155 /* 127 */ R(usia
), R(ummcr1
), R(upmc3
), R(upmc4
),
2156 /* 131 */ R(mmcr0
), R(pmc1
), R(pmc2
), R(sia
),
2157 /* 135 */ R(mmcr1
), R(pmc3
), R(pmc4
), R(l2cr
),
2158 /* 139 */ R(ictc
), R(thrm1
), R(thrm2
), R(thrm3
)
2162 /* Motorola PowerPC 7400. */
2163 static const struct reg registers_7400
[] =
2165 /* gpr0-gpr31, fpr0-fpr31 */
2167 /* ctr, xre, lr, cr */
2172 /* vr0-vr31, vrsave, vscr */
2174 /* FIXME? Add more registers? */
2177 /* Motorola e500. */
2178 static const struct reg registers_e500
[] =
2181 /* cr, lr, ctr, xer, "" */
2185 R8(acc
), R(spefscr
),
2186 /* NOTE: Add new registers here the end of the raw register
2187 list and just before the first pseudo register. */
2189 PPC_GPRS_PSEUDO_REGS
2192 /* Information about a particular processor variant. */
2196 /* Name of this variant. */
2199 /* English description of the variant. */
2202 /* bfd_arch_info.arch corresponding to variant. */
2203 enum bfd_architecture arch
;
2205 /* bfd_arch_info.mach corresponding to variant. */
2208 /* Number of real registers. */
2211 /* Number of pseudo registers. */
2214 /* Number of total registers (the sum of nregs and npregs). */
2217 /* Table of register names; registers[R] is the name of the register
2219 const struct reg
*regs
;
2222 #define tot_num_registers(list) (sizeof (list) / sizeof((list)[0]))
2225 num_registers (const struct reg
*reg_list
, int num_tot_regs
)
2230 for (i
= 0; i
< num_tot_regs
; i
++)
2231 if (!reg_list
[i
].pseudo
)
2238 num_pseudo_registers (const struct reg
*reg_list
, int num_tot_regs
)
2243 for (i
= 0; i
< num_tot_regs
; i
++)
2244 if (reg_list
[i
].pseudo
)
2250 /* Information in this table comes from the following web sites:
2251 IBM: http://www.chips.ibm.com:80/products/embedded/
2252 Motorola: http://www.mot.com/SPS/PowerPC/
2254 I'm sure I've got some of the variant descriptions not quite right.
2255 Please report any inaccuracies you find to GDB's maintainer.
2257 If you add entries to this table, please be sure to allow the new
2258 value as an argument to the --with-cpu flag, in configure.in. */
2260 static struct variant variants
[] =
2263 {"powerpc", "PowerPC user-level", bfd_arch_powerpc
,
2264 bfd_mach_ppc
, -1, -1, tot_num_registers (registers_powerpc
),
2266 {"power", "POWER user-level", bfd_arch_rs6000
,
2267 bfd_mach_rs6k
, -1, -1, tot_num_registers (registers_power
),
2269 {"403", "IBM PowerPC 403", bfd_arch_powerpc
,
2270 bfd_mach_ppc_403
, -1, -1, tot_num_registers (registers_403
),
2272 {"601", "Motorola PowerPC 601", bfd_arch_powerpc
,
2273 bfd_mach_ppc_601
, -1, -1, tot_num_registers (registers_601
),
2275 {"602", "Motorola PowerPC 602", bfd_arch_powerpc
,
2276 bfd_mach_ppc_602
, -1, -1, tot_num_registers (registers_602
),
2278 {"603", "Motorola/IBM PowerPC 603 or 603e", bfd_arch_powerpc
,
2279 bfd_mach_ppc_603
, -1, -1, tot_num_registers (registers_603
),
2281 {"604", "Motorola PowerPC 604 or 604e", bfd_arch_powerpc
,
2282 604, -1, -1, tot_num_registers (registers_604
),
2284 {"403GC", "IBM PowerPC 403GC", bfd_arch_powerpc
,
2285 bfd_mach_ppc_403gc
, -1, -1, tot_num_registers (registers_403GC
),
2287 {"505", "Motorola PowerPC 505", bfd_arch_powerpc
,
2288 bfd_mach_ppc_505
, -1, -1, tot_num_registers (registers_505
),
2290 {"860", "Motorola PowerPC 860 or 850", bfd_arch_powerpc
,
2291 bfd_mach_ppc_860
, -1, -1, tot_num_registers (registers_860
),
2293 {"750", "Motorola/IBM PowerPC 750 or 740", bfd_arch_powerpc
,
2294 bfd_mach_ppc_750
, -1, -1, tot_num_registers (registers_750
),
2296 {"7400", "Motorola/IBM PowerPC 7400 (G4)", bfd_arch_powerpc
,
2297 bfd_mach_ppc_7400
, -1, -1, tot_num_registers (registers_7400
),
2299 {"e500", "Motorola PowerPC e500", bfd_arch_powerpc
,
2300 bfd_mach_ppc_e500
, -1, -1, tot_num_registers (registers_e500
),
2304 {"powerpc64", "PowerPC 64-bit user-level", bfd_arch_powerpc
,
2305 bfd_mach_ppc64
, -1, -1, tot_num_registers (registers_powerpc
),
2307 {"620", "Motorola PowerPC 620", bfd_arch_powerpc
,
2308 bfd_mach_ppc_620
, -1, -1, tot_num_registers (registers_powerpc
),
2310 {"630", "Motorola PowerPC 630", bfd_arch_powerpc
,
2311 bfd_mach_ppc_630
, -1, -1, tot_num_registers (registers_powerpc
),
2313 {"a35", "PowerPC A35", bfd_arch_powerpc
,
2314 bfd_mach_ppc_a35
, -1, -1, tot_num_registers (registers_powerpc
),
2316 {"rs64ii", "PowerPC rs64ii", bfd_arch_powerpc
,
2317 bfd_mach_ppc_rs64ii
, -1, -1, tot_num_registers (registers_powerpc
),
2319 {"rs64iii", "PowerPC rs64iii", bfd_arch_powerpc
,
2320 bfd_mach_ppc_rs64iii
, -1, -1, tot_num_registers (registers_powerpc
),
2323 /* FIXME: I haven't checked the register sets of the following. */
2324 {"rs1", "IBM POWER RS1", bfd_arch_rs6000
,
2325 bfd_mach_rs6k_rs1
, -1, -1, tot_num_registers (registers_power
),
2327 {"rsc", "IBM POWER RSC", bfd_arch_rs6000
,
2328 bfd_mach_rs6k_rsc
, -1, -1, tot_num_registers (registers_power
),
2330 {"rs2", "IBM POWER RS2", bfd_arch_rs6000
,
2331 bfd_mach_rs6k_rs2
, -1, -1, tot_num_registers (registers_power
),
2334 {0, 0, 0, 0, 0, 0, 0, 0}
2337 /* Initialize the number of registers and pseudo registers in each variant. */
2340 init_variants (void)
2344 for (v
= variants
; v
->name
; v
++)
2347 v
->nregs
= num_registers (v
->regs
, v
->num_tot_regs
);
2348 if (v
->npregs
== -1)
2349 v
->npregs
= num_pseudo_registers (v
->regs
, v
->num_tot_regs
);
2353 /* Return the variant corresponding to architecture ARCH and machine number
2354 MACH. If no such variant exists, return null. */
2356 static const struct variant
*
2357 find_variant_by_arch (enum bfd_architecture arch
, unsigned long mach
)
2359 const struct variant
*v
;
2361 for (v
= variants
; v
->name
; v
++)
2362 if (arch
== v
->arch
&& mach
== v
->mach
)
2369 gdb_print_insn_powerpc (bfd_vma memaddr
, disassemble_info
*info
)
2371 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2372 return print_insn_big_powerpc (memaddr
, info
);
2374 return print_insn_little_powerpc (memaddr
, info
);
2378 rs6000_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
2380 return frame_unwind_register_unsigned (next_frame
, PC_REGNUM
);
2383 static struct frame_id
2384 rs6000_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
2386 return frame_id_build (frame_unwind_register_unsigned (next_frame
,
2388 frame_pc_unwind (next_frame
));
2391 struct rs6000_frame_cache
2394 CORE_ADDR initial_sp
;
2395 struct trad_frame_saved_reg
*saved_regs
;
2398 static struct rs6000_frame_cache
*
2399 rs6000_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
2401 struct rs6000_frame_cache
*cache
;
2402 struct gdbarch
*gdbarch
= get_frame_arch (next_frame
);
2403 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2404 struct rs6000_framedata fdata
;
2405 int wordsize
= tdep
->wordsize
;
2407 if ((*this_cache
) != NULL
)
2408 return (*this_cache
);
2409 cache
= FRAME_OBSTACK_ZALLOC (struct rs6000_frame_cache
);
2410 (*this_cache
) = cache
;
2411 cache
->saved_regs
= trad_frame_alloc_saved_regs (next_frame
);
2413 skip_prologue (frame_func_unwind (next_frame
), frame_pc_unwind (next_frame
),
2416 /* If there were any saved registers, figure out parent's stack
2418 /* The following is true only if the frame doesn't have a call to
2421 if (fdata
.saved_fpr
== 0
2422 && fdata
.saved_gpr
== 0
2423 && fdata
.saved_vr
== 0
2424 && fdata
.saved_ev
== 0
2425 && fdata
.lr_offset
== 0
2426 && fdata
.cr_offset
== 0
2427 && fdata
.vr_offset
== 0
2428 && fdata
.ev_offset
== 0)
2429 cache
->base
= frame_unwind_register_unsigned (next_frame
, SP_REGNUM
);
2432 /* NOTE: cagney/2002-04-14: The ->frame points to the inner-most
2433 address of the current frame. Things might be easier if the
2434 ->frame pointed to the outer-most address of the frame. In
2435 the mean time, the address of the prev frame is used as the
2436 base address of this frame. */
2437 cache
->base
= frame_unwind_register_unsigned (next_frame
, SP_REGNUM
);
2438 if (!fdata
.frameless
)
2439 /* Frameless really means stackless. */
2440 cache
->base
= read_memory_addr (cache
->base
, wordsize
);
2442 trad_frame_set_value (cache
->saved_regs
, SP_REGNUM
, cache
->base
);
2444 /* if != -1, fdata.saved_fpr is the smallest number of saved_fpr.
2445 All fpr's from saved_fpr to fp31 are saved. */
2447 if (fdata
.saved_fpr
>= 0)
2450 CORE_ADDR fpr_addr
= cache
->base
+ fdata
.fpr_offset
;
2451 for (i
= fdata
.saved_fpr
; i
< 32; i
++)
2453 cache
->saved_regs
[FP0_REGNUM
+ i
].addr
= fpr_addr
;
2458 /* if != -1, fdata.saved_gpr is the smallest number of saved_gpr.
2459 All gpr's from saved_gpr to gpr31 are saved. */
2461 if (fdata
.saved_gpr
>= 0)
2464 CORE_ADDR gpr_addr
= cache
->base
+ fdata
.gpr_offset
;
2465 for (i
= fdata
.saved_gpr
; i
< 32; i
++)
2467 cache
->saved_regs
[tdep
->ppc_gp0_regnum
+ i
].addr
= gpr_addr
;
2468 gpr_addr
+= wordsize
;
2472 /* if != -1, fdata.saved_vr is the smallest number of saved_vr.
2473 All vr's from saved_vr to vr31 are saved. */
2474 if (tdep
->ppc_vr0_regnum
!= -1 && tdep
->ppc_vrsave_regnum
!= -1)
2476 if (fdata
.saved_vr
>= 0)
2479 CORE_ADDR vr_addr
= cache
->base
+ fdata
.vr_offset
;
2480 for (i
= fdata
.saved_vr
; i
< 32; i
++)
2482 cache
->saved_regs
[tdep
->ppc_vr0_regnum
+ i
].addr
= vr_addr
;
2483 vr_addr
+= register_size (gdbarch
, tdep
->ppc_vr0_regnum
);
2488 /* if != -1, fdata.saved_ev is the smallest number of saved_ev.
2489 All vr's from saved_ev to ev31 are saved. ????? */
2490 if (tdep
->ppc_ev0_regnum
!= -1 && tdep
->ppc_ev31_regnum
!= -1)
2492 if (fdata
.saved_ev
>= 0)
2495 CORE_ADDR ev_addr
= cache
->base
+ fdata
.ev_offset
;
2496 for (i
= fdata
.saved_ev
; i
< 32; i
++)
2498 cache
->saved_regs
[tdep
->ppc_ev0_regnum
+ i
].addr
= ev_addr
;
2499 cache
->saved_regs
[tdep
->ppc_gp0_regnum
+ i
].addr
= ev_addr
+ 4;
2500 ev_addr
+= register_size (gdbarch
, tdep
->ppc_ev0_regnum
);
2505 /* If != 0, fdata.cr_offset is the offset from the frame that
2507 if (fdata
.cr_offset
!= 0)
2508 cache
->saved_regs
[tdep
->ppc_cr_regnum
].addr
= cache
->base
+ fdata
.cr_offset
;
2510 /* If != 0, fdata.lr_offset is the offset from the frame that
2512 if (fdata
.lr_offset
!= 0)
2513 cache
->saved_regs
[tdep
->ppc_lr_regnum
].addr
= cache
->base
+ fdata
.lr_offset
;
2514 /* The PC is found in the link register. */
2515 cache
->saved_regs
[PC_REGNUM
] = cache
->saved_regs
[tdep
->ppc_lr_regnum
];
2517 /* If != 0, fdata.vrsave_offset is the offset from the frame that
2518 holds the VRSAVE. */
2519 if (fdata
.vrsave_offset
!= 0)
2520 cache
->saved_regs
[tdep
->ppc_vrsave_regnum
].addr
= cache
->base
+ fdata
.vrsave_offset
;
2522 if (fdata
.alloca_reg
< 0)
2523 /* If no alloca register used, then fi->frame is the value of the
2524 %sp for this frame, and it is good enough. */
2525 cache
->initial_sp
= frame_unwind_register_unsigned (next_frame
, SP_REGNUM
);
2527 cache
->initial_sp
= frame_unwind_register_unsigned (next_frame
,
2534 rs6000_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
2535 struct frame_id
*this_id
)
2537 struct rs6000_frame_cache
*info
= rs6000_frame_cache (next_frame
,
2539 (*this_id
) = frame_id_build (info
->base
, frame_func_unwind (next_frame
));
2543 rs6000_frame_prev_register (struct frame_info
*next_frame
,
2545 int regnum
, int *optimizedp
,
2546 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
2547 int *realnump
, void *valuep
)
2549 struct rs6000_frame_cache
*info
= rs6000_frame_cache (next_frame
,
2551 trad_frame_prev_register (next_frame
, info
->saved_regs
, regnum
,
2552 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
2555 static const struct frame_unwind rs6000_frame_unwind
=
2558 rs6000_frame_this_id
,
2559 rs6000_frame_prev_register
2562 static const struct frame_unwind
*
2563 rs6000_frame_sniffer (struct frame_info
*next_frame
)
2565 return &rs6000_frame_unwind
;
2571 rs6000_frame_base_address (struct frame_info
*next_frame
,
2574 struct rs6000_frame_cache
*info
= rs6000_frame_cache (next_frame
,
2576 return info
->initial_sp
;
2579 static const struct frame_base rs6000_frame_base
= {
2580 &rs6000_frame_unwind
,
2581 rs6000_frame_base_address
,
2582 rs6000_frame_base_address
,
2583 rs6000_frame_base_address
2586 static const struct frame_base
*
2587 rs6000_frame_base_sniffer (struct frame_info
*next_frame
)
2589 return &rs6000_frame_base
;
2592 /* Initialize the current architecture based on INFO. If possible, re-use an
2593 architecture from ARCHES, which is a list of architectures already created
2594 during this debugging session.
2596 Called e.g. at program startup, when reading a core file, and when reading
2599 static struct gdbarch
*
2600 rs6000_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
2602 struct gdbarch
*gdbarch
;
2603 struct gdbarch_tdep
*tdep
;
2604 int wordsize
, from_xcoff_exec
, from_elf_exec
, power
, i
, off
;
2606 const struct variant
*v
;
2607 enum bfd_architecture arch
;
2613 from_xcoff_exec
= info
.abfd
&& info
.abfd
->format
== bfd_object
&&
2614 bfd_get_flavour (info
.abfd
) == bfd_target_xcoff_flavour
;
2616 from_elf_exec
= info
.abfd
&& info
.abfd
->format
== bfd_object
&&
2617 bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
;
2619 sysv_abi
= info
.abfd
&& bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
;
2621 /* Check word size. If INFO is from a binary file, infer it from
2622 that, else choose a likely default. */
2623 if (from_xcoff_exec
)
2625 if (bfd_xcoff_is_xcoff64 (info
.abfd
))
2630 else if (from_elf_exec
)
2632 if (elf_elfheader (info
.abfd
)->e_ident
[EI_CLASS
] == ELFCLASS64
)
2639 if (info
.bfd_arch_info
!= NULL
&& info
.bfd_arch_info
->bits_per_word
!= 0)
2640 wordsize
= info
.bfd_arch_info
->bits_per_word
/
2641 info
.bfd_arch_info
->bits_per_byte
;
2646 /* Find a candidate among extant architectures. */
2647 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
2649 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
2651 /* Word size in the various PowerPC bfd_arch_info structs isn't
2652 meaningful, because 64-bit CPUs can run in 32-bit mode. So, perform
2653 separate word size check. */
2654 tdep
= gdbarch_tdep (arches
->gdbarch
);
2655 if (tdep
&& tdep
->wordsize
== wordsize
)
2656 return arches
->gdbarch
;
2659 /* None found, create a new architecture from INFO, whose bfd_arch_info
2660 validity depends on the source:
2661 - executable useless
2662 - rs6000_host_arch() good
2664 - "set arch" trust blindly
2665 - GDB startup useless but harmless */
2667 if (!from_xcoff_exec
)
2669 arch
= info
.bfd_arch_info
->arch
;
2670 mach
= info
.bfd_arch_info
->mach
;
2674 arch
= bfd_arch_powerpc
;
2675 bfd_default_set_arch_mach (&abfd
, arch
, 0);
2676 info
.bfd_arch_info
= bfd_get_arch_info (&abfd
);
2677 mach
= info
.bfd_arch_info
->mach
;
2679 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
2680 tdep
->wordsize
= wordsize
;
2682 /* For e500 executables, the apuinfo section is of help here. Such
2683 section contains the identifier and revision number of each
2684 Application-specific Processing Unit that is present on the
2685 chip. The content of the section is determined by the assembler
2686 which looks at each instruction and determines which unit (and
2687 which version of it) can execute it. In our case we just look for
2688 the existance of the section. */
2692 sect
= bfd_get_section_by_name (info
.abfd
, ".PPC.EMB.apuinfo");
2695 arch
= info
.bfd_arch_info
->arch
;
2696 mach
= bfd_mach_ppc_e500
;
2697 bfd_default_set_arch_mach (&abfd
, arch
, mach
);
2698 info
.bfd_arch_info
= bfd_get_arch_info (&abfd
);
2702 gdbarch
= gdbarch_alloc (&info
, tdep
);
2703 power
= arch
== bfd_arch_rs6000
;
2705 /* Initialize the number of real and pseudo registers in each variant. */
2708 /* Choose variant. */
2709 v
= find_variant_by_arch (arch
, mach
);
2713 tdep
->regs
= v
->regs
;
2715 tdep
->ppc_gp0_regnum
= 0;
2716 tdep
->ppc_gplast_regnum
= 31;
2717 tdep
->ppc_toc_regnum
= 2;
2718 tdep
->ppc_ps_regnum
= 65;
2719 tdep
->ppc_cr_regnum
= 66;
2720 tdep
->ppc_lr_regnum
= 67;
2721 tdep
->ppc_ctr_regnum
= 68;
2722 tdep
->ppc_xer_regnum
= 69;
2723 if (v
->mach
== bfd_mach_ppc_601
)
2724 tdep
->ppc_mq_regnum
= 124;
2726 tdep
->ppc_mq_regnum
= 70;
2728 tdep
->ppc_mq_regnum
= -1;
2729 tdep
->ppc_fpscr_regnum
= power
? 71 : 70;
2731 set_gdbarch_pc_regnum (gdbarch
, 64);
2732 set_gdbarch_sp_regnum (gdbarch
, 1);
2733 set_gdbarch_deprecated_fp_regnum (gdbarch
, 1);
2734 if (sysv_abi
&& wordsize
== 8)
2735 set_gdbarch_return_value (gdbarch
, ppc64_sysv_abi_return_value
);
2736 else if (sysv_abi
&& wordsize
== 4)
2737 set_gdbarch_return_value (gdbarch
, ppc_sysv_abi_return_value
);
2740 set_gdbarch_deprecated_extract_return_value (gdbarch
, rs6000_extract_return_value
);
2741 set_gdbarch_deprecated_store_return_value (gdbarch
, rs6000_store_return_value
);
2744 if (v
->arch
== bfd_arch_powerpc
)
2748 tdep
->ppc_vr0_regnum
= 71;
2749 tdep
->ppc_vrsave_regnum
= 104;
2750 tdep
->ppc_ev0_regnum
= -1;
2751 tdep
->ppc_ev31_regnum
= -1;
2753 case bfd_mach_ppc_7400
:
2754 tdep
->ppc_vr0_regnum
= 119;
2755 tdep
->ppc_vrsave_regnum
= 152;
2756 tdep
->ppc_ev0_regnum
= -1;
2757 tdep
->ppc_ev31_regnum
= -1;
2759 case bfd_mach_ppc_e500
:
2760 tdep
->ppc_gp0_regnum
= 41;
2761 tdep
->ppc_gplast_regnum
= tdep
->ppc_gp0_regnum
+ 32 - 1;
2762 tdep
->ppc_toc_regnum
= -1;
2763 tdep
->ppc_ps_regnum
= 1;
2764 tdep
->ppc_cr_regnum
= 2;
2765 tdep
->ppc_lr_regnum
= 3;
2766 tdep
->ppc_ctr_regnum
= 4;
2767 tdep
->ppc_xer_regnum
= 5;
2768 tdep
->ppc_ev0_regnum
= 7;
2769 tdep
->ppc_ev31_regnum
= 38;
2770 set_gdbarch_pc_regnum (gdbarch
, 0);
2771 set_gdbarch_sp_regnum (gdbarch
, tdep
->ppc_gp0_regnum
+ 1);
2772 set_gdbarch_deprecated_fp_regnum (gdbarch
, tdep
->ppc_gp0_regnum
+ 1);
2773 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, e500_dwarf2_reg_to_regnum
);
2774 set_gdbarch_pseudo_register_read (gdbarch
, e500_pseudo_register_read
);
2775 set_gdbarch_pseudo_register_write (gdbarch
, e500_pseudo_register_write
);
2778 tdep
->ppc_vr0_regnum
= -1;
2779 tdep
->ppc_vrsave_regnum
= -1;
2780 tdep
->ppc_ev0_regnum
= -1;
2781 tdep
->ppc_ev31_regnum
= -1;
2785 /* Sanity check on registers. */
2786 gdb_assert (strcmp (tdep
->regs
[tdep
->ppc_gp0_regnum
].name
, "r0") == 0);
2788 /* Set lr_frame_offset. */
2790 tdep
->lr_frame_offset
= 16;
2792 tdep
->lr_frame_offset
= 4;
2794 tdep
->lr_frame_offset
= 8;
2796 /* Calculate byte offsets in raw register array. */
2797 tdep
->regoff
= xmalloc (v
->num_tot_regs
* sizeof (int));
2798 for (i
= off
= 0; i
< v
->num_tot_regs
; i
++)
2800 tdep
->regoff
[i
] = off
;
2801 off
+= regsize (v
->regs
+ i
, wordsize
);
2804 /* Select instruction printer. */
2806 set_gdbarch_print_insn (gdbarch
, print_insn_rs6000
);
2808 set_gdbarch_print_insn (gdbarch
, gdb_print_insn_powerpc
);
2810 set_gdbarch_write_pc (gdbarch
, generic_target_write_pc
);
2812 set_gdbarch_num_regs (gdbarch
, v
->nregs
);
2813 set_gdbarch_num_pseudo_regs (gdbarch
, v
->npregs
);
2814 set_gdbarch_register_name (gdbarch
, rs6000_register_name
);
2815 set_gdbarch_deprecated_register_size (gdbarch
, wordsize
);
2816 set_gdbarch_deprecated_register_bytes (gdbarch
, off
);
2817 set_gdbarch_deprecated_register_byte (gdbarch
, rs6000_register_byte
);
2818 set_gdbarch_deprecated_register_raw_size (gdbarch
, rs6000_register_raw_size
);
2819 set_gdbarch_deprecated_register_virtual_type (gdbarch
, rs6000_register_virtual_type
);
2821 set_gdbarch_ptr_bit (gdbarch
, wordsize
* TARGET_CHAR_BIT
);
2822 set_gdbarch_short_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
2823 set_gdbarch_int_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
2824 set_gdbarch_long_bit (gdbarch
, wordsize
* TARGET_CHAR_BIT
);
2825 set_gdbarch_long_long_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2826 set_gdbarch_float_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
2827 set_gdbarch_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2829 set_gdbarch_long_double_bit (gdbarch
, 16 * TARGET_CHAR_BIT
);
2831 set_gdbarch_long_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2832 set_gdbarch_char_signed (gdbarch
, 0);
2834 set_gdbarch_frame_align (gdbarch
, rs6000_frame_align
);
2835 if (sysv_abi
&& wordsize
== 8)
2837 set_gdbarch_frame_red_zone_size (gdbarch
, 288);
2838 else if (!sysv_abi
&& wordsize
== 4)
2839 /* PowerOpen / AIX 32 bit. The saved area or red zone consists of
2840 19 4 byte GPRS + 18 8 byte FPRs giving a total of 220 bytes.
2841 Problem is, 220 isn't frame (16 byte) aligned. Round it up to
2843 set_gdbarch_frame_red_zone_size (gdbarch
, 224);
2845 set_gdbarch_deprecated_register_convertible (gdbarch
, rs6000_register_convertible
);
2846 set_gdbarch_deprecated_register_convert_to_virtual (gdbarch
, rs6000_register_convert_to_virtual
);
2847 set_gdbarch_deprecated_register_convert_to_raw (gdbarch
, rs6000_register_convert_to_raw
);
2848 set_gdbarch_stab_reg_to_regnum (gdbarch
, rs6000_stab_reg_to_regnum
);
2849 /* Note: kevinb/2002-04-12: I'm not convinced that rs6000_push_arguments()
2850 is correct for the SysV ABI when the wordsize is 8, but I'm also
2851 fairly certain that ppc_sysv_abi_push_arguments() will give even
2852 worse results since it only works for 32-bit code. So, for the moment,
2853 we're better off calling rs6000_push_arguments() since it works for
2854 64-bit code. At some point in the future, this matter needs to be
2856 if (sysv_abi
&& wordsize
== 4)
2857 set_gdbarch_push_dummy_call (gdbarch
, ppc_sysv_abi_push_dummy_call
);
2858 else if (sysv_abi
&& wordsize
== 8)
2859 set_gdbarch_push_dummy_call (gdbarch
, ppc64_sysv_abi_push_dummy_call
);
2861 set_gdbarch_push_dummy_call (gdbarch
, rs6000_push_dummy_call
);
2863 set_gdbarch_deprecated_extract_struct_value_address (gdbarch
, rs6000_extract_struct_value_address
);
2865 set_gdbarch_skip_prologue (gdbarch
, rs6000_skip_prologue
);
2866 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2867 set_gdbarch_breakpoint_from_pc (gdbarch
, rs6000_breakpoint_from_pc
);
2869 /* Handle the 64-bit SVR4 minimal-symbol convention of using "FN"
2870 for the descriptor and ".FN" for the entry-point -- a user
2871 specifying "break FN" will unexpectedly end up with a breakpoint
2872 on the descriptor and not the function. This architecture method
2873 transforms any breakpoints on descriptors into breakpoints on the
2874 corresponding entry point. */
2875 if (sysv_abi
&& wordsize
== 8)
2876 set_gdbarch_adjust_breakpoint_address (gdbarch
, ppc64_sysv_abi_adjust_breakpoint_address
);
2878 /* Not sure on this. FIXMEmgo */
2879 set_gdbarch_frame_args_skip (gdbarch
, 8);
2882 set_gdbarch_use_struct_convention (gdbarch
,
2883 rs6000_use_struct_convention
);
2887 /* Handle RS/6000 function pointers (which are really function
2889 set_gdbarch_convert_from_func_ptr_addr (gdbarch
,
2890 rs6000_convert_from_func_ptr_addr
);
2893 /* Helpers for function argument information. */
2894 set_gdbarch_fetch_pointer_argument (gdbarch
, rs6000_fetch_pointer_argument
);
2896 /* Hook in ABI-specific overrides, if they have been registered. */
2897 gdbarch_init_osabi (info
, gdbarch
);
2901 case GDB_OSABI_NETBSD_AOUT
:
2902 case GDB_OSABI_NETBSD_ELF
:
2903 case GDB_OSABI_UNKNOWN
:
2904 case GDB_OSABI_LINUX
:
2905 set_gdbarch_unwind_pc (gdbarch
, rs6000_unwind_pc
);
2906 frame_unwind_append_sniffer (gdbarch
, rs6000_frame_sniffer
);
2907 set_gdbarch_unwind_dummy_id (gdbarch
, rs6000_unwind_dummy_id
);
2908 frame_base_append_sniffer (gdbarch
, rs6000_frame_base_sniffer
);
2911 set_gdbarch_deprecated_save_dummy_frame_tos (gdbarch
, generic_save_dummy_frame_tos
);
2912 set_gdbarch_believe_pcc_promotion (gdbarch
, 1);
2914 set_gdbarch_unwind_pc (gdbarch
, rs6000_unwind_pc
);
2915 frame_unwind_append_sniffer (gdbarch
, rs6000_frame_sniffer
);
2916 set_gdbarch_unwind_dummy_id (gdbarch
, rs6000_unwind_dummy_id
);
2917 frame_base_append_sniffer (gdbarch
, rs6000_frame_base_sniffer
);
2920 if (from_xcoff_exec
)
2922 /* NOTE: jimix/2003-06-09: This test should really check for
2923 GDB_OSABI_AIX when that is defined and becomes
2924 available. (Actually, once things are properly split apart,
2925 the test goes away.) */
2926 /* RS6000/AIX does not support PT_STEP. Has to be simulated. */
2927 set_gdbarch_software_single_step (gdbarch
, rs6000_software_single_step
);
2934 rs6000_dump_tdep (struct gdbarch
*current_gdbarch
, struct ui_file
*file
)
2936 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2941 /* FIXME: Dump gdbarch_tdep. */
2944 static struct cmd_list_element
*info_powerpc_cmdlist
= NULL
;
2947 rs6000_info_powerpc_command (char *args
, int from_tty
)
2949 help_list (info_powerpc_cmdlist
, "info powerpc ", class_info
, gdb_stdout
);
2952 /* Initialization code. */
2954 extern initialize_file_ftype _initialize_rs6000_tdep
; /* -Wmissing-prototypes */
2957 _initialize_rs6000_tdep (void)
2959 gdbarch_register (bfd_arch_rs6000
, rs6000_gdbarch_init
, rs6000_dump_tdep
);
2960 gdbarch_register (bfd_arch_powerpc
, rs6000_gdbarch_init
, rs6000_dump_tdep
);
2962 /* Add root prefix command for "info powerpc" commands */
2963 add_prefix_cmd ("powerpc", class_info
, rs6000_info_powerpc_command
,
2964 "Various POWERPC info specific commands.",
2965 &info_powerpc_cmdlist
, "info powerpc ", 0, &infolist
);